JP2011166001A - Semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device having a high heat dissipation performance from a functional element. <P>SOLUTION: The semiconductor device 100 includes the functional element 140, a metal substrate (heat conductive substrate) 101 on which the functional element is mounted in the mounting region 130 which is part of the surface, and a single layer or multiple layers of wiring layer 110 formed in a wiring layer region 125 which is the region on the surface of the metal substrate except for the mounting region. The surface of the functional element opposite to the metal substrate is lower than the surface opposite to the metal substrate of the wiring layer. The metal substrate is composed of a metal material and the functional element is a plurality of semiconductor elements junctioned to the surface of the metal substrate. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a semiconductor device in which a functional element and a wiring layer are formed on the surface of a thermally conductive substrate.

  2. Description of the Related Art Conventionally, a technique related to a wiring board that improves heat dissipation of heat generated in electronic components to be mounted has been used. As such a technique, for example, in Patent Document 1, a heat radiation pattern is formed in a region where an electronic component on a wiring board is mounted by aligning the mounting surface side and the back side of the substrate, and the heat radiation patterns on both sides are formed. A technique is disclosed in which the structures are connected by via holes.

Japanese Patent Laid-Open No. 11-54883

  By the way, a well-known via hole technique as a silicon integrated circuit technique is also a technique for enhancing the heat dissipation effect. That is, the via hole technique is a technique for forming a via hole from the back side of the silicon substrate with respect to the integrated circuit pattern formed on the surface of the silicon substrate and filling the via hole with a metal having a higher thermal conductivity than the silicon substrate. Therefore, this via hole technique is one of the improved methods due to the low thermal conductivity of the silicon substrate. However, the via-hole technique has a problem that the heat dissipation effect is small because the sectional area is small.

  Further, since the size of the via hole penetrating between the multilayer wirings cannot be downsized along with the miniaturization and high integration of the functional element, the relative occupied area ratio becomes high. In such a configuration in which a heat radiation pattern is provided, when electronic components (functional elements) are mounted and integrated with high density, heat radiation patterns and via holes are formed with high density in a limited area on the wiring board. It was difficult. Furthermore, forming a large number of heat radiation patterns and via holes at a high density has resulted in an increase in substrate cost due to an increase in occupied area.

  An object of the present invention is to provide a semiconductor device with high heat dissipation from a functional element.

  In order to achieve the above object, a semiconductor device of the present invention includes a functional element, a thermally conductive substrate (for example, a metal substrate, a diamond substrate) on which the functional element is mounted in a part of the surface mounting region, And a single or multilayer wiring layer formed in a wiring layer region excluding the mounting region on the surface of the thermally conductive substrate.

  The surface of the functional element opposite to the thermally conductive substrate is preferably lower than the surface of the wiring layer opposite to the thermally conductive substrate.

  ADVANTAGE OF THE INVENTION According to this invention, the semiconductor device with the high heat dissipation from a functional element can be provided.

(A) is a perspective view for demonstrating the semiconductor device of 1st Embodiment. (B) is sectional drawing for demonstrating the semiconductor device of 1st Embodiment. (A) is sectional drawing for demonstrating the thermal radiation effect in the semiconductor device of 1st Embodiment. (B) is sectional drawing for demonstrating the thermal radiation effect in the semiconductor device of 1st Embodiment. It is sectional drawing for demonstrating the modification 1 of the semiconductor device of 1st Embodiment. (A) is sectional drawing for demonstrating the modification 2 of the semiconductor device of 1st Embodiment. (B) is sectional drawing for demonstrating the thermal radiation effect in the modification 2 of the semiconductor device of 1st Embodiment. It is sectional drawing for demonstrating the modification 3 of the semiconductor device of 1st Embodiment. It is sectional drawing for demonstrating the semiconductor device of 2nd Embodiment. (A) is a top view for demonstrating the semiconductor device of 3rd Embodiment. (B) is sectional drawing for demonstrating the semiconductor device of 3rd Embodiment. It is a top view for demonstrating the semiconductor device of 3rd Embodiment. It is a top view for demonstrating the semiconductor device of the modification of 3rd Embodiment. It is sectional drawing for demonstrating the semiconductor device of the modification of 3rd Embodiment.

  An embodiment of the present invention will be described with reference to FIGS. In the drawings, the same components are denoted by the same reference numerals. Hereinafter, embodiments of the present invention will be sequentially described with reference to the drawings.

(First embodiment)
A first embodiment of the present invention and modifications thereof will be described with reference to FIGS.

(Constitution)
The configuration of the semiconductor device of the first embodiment will be described with reference to FIGS. 1 (a) and 1 (b). FIG. 1A is a perspective view schematically showing the semiconductor device 100 of this embodiment. FIG. 1B is a cross-sectional view showing a cross section of the semiconductor device 100a cut along the line AA of the semiconductor device 100 of FIG.

  As shown in FIG. 1A and FIG. 1B, the semiconductor devices 100 and 100a include a metal substrate 101 made of a metal material and a substrate surface exposed region (mounting region) on a part of the surface of the metal substrate 101. ) The functional element 140 mounted on 130, the wiring layer 110 formed in the wiring layer region 125 excluding the substrate surface exposed region (mounting region) 130 on the surface of the metal substrate 101, and the back surface of the metal substrate 101. And a high thermal conductivity inorganic insulating film 120 (120a) made of an inorganic material having a high thermal conductivity.

  The metal substrate 101 is preferably made of a material containing at least one element of Cu and Al. Alternatively, the metal substrate 101 and the highly thermally conductive inorganic insulating film 120 (120a) can be made of diamond to make a highly thermally conductive substrate.

  The wiring layer 110 includes a single-layer or multilayer wiring layer and an interlayer insulating layer. In FIG. 1B, the wiring layer 110 includes a two-layer wiring layer and a three-layer interlayer insulating layer. In FIG. 1B, the wiring layer 110 includes, in order from the surface of the metal substrate 101, a first interlayer insulating layer 111a, a first wiring layer 112a, a second interlayer insulating layer 111b, a second wiring layer 112b, A third interlayer insulating layer 111c and connection pads 115 and 116 for connection to the outside are provided. The connection between the first wiring layer 112a and the second wiring layer 112b and the connection between the second wiring layer 112b and the connection pads 115 and 116 are respectively the second interlayer insulating layer 111b and the third interlayer. The insulating layer 111c is connected via a through hole opened.

  The first interlayer insulating layer 111a to the third interlayer insulating layer 111c can be formed of, for example, an epoxy organic material. In addition, the first wiring layer 112a, the second wiring layer 112b, and the connection pads 115 and 116 can be configured by a metal material including at least one material of Ag, Au, and Cu, for example.

The high thermal conductivity inorganic insulating film 120a provided on the back surface side of the metal substrate 101 desirably has high thermal conductivity. As a constituent material, diamond-like carbon (DLC), AlN, Al ₂ O _{3 is used.} It is preferable that the insulating film is any one of SiN and SiN, or an insulating film in which these are stacked.

  The substrate surface exposed region 130 is a surface of the metal substrate 101 whose bottom surface is exposed, and a region formed by the wiring layer 110 and the metal substrate 101 has a cross section of the wiring layer 110 having a multilayer structure. It is a rectangular recessed area.

  The functional element 140 is mounted on the surface of the metal substrate 101 in the substrate surface exposed region 130 and is connected to the wiring layer 110 by connection wiring.

(Operation)
The present embodiment is characterized in that the surface of the functional element 140 mounted in the rectangular recess region which is the substrate surface exposed region (mounting region) 130 is lower than the surface of the wiring layer 110. To do.

  With such a configuration, a heat dissipation effect in the semiconductor device 100 (100a) will be described. As shown in FIGS. 2 (a) and 2 (b), the heat transfer mode of the heat transfer in the semiconductor device 100 (100a) of the present embodiment has three types shown by the double arrows B, C, and D. There is a heat transfer form (path).

  First, as shown in FIG. 2 (a), the heat transfer form indicated by the bidirectional arrow B (hereinafter referred to as heat flux B) is a functional element 140 mounted on the surface of the metal substrate 101 from the outside. There is a heat flux B that conducts heat between the front surface of the functional element 140, the back surface of the functional element 140, the metal substrate 101, and the back surface of the wiring layer 110 and the surface of the wiring layer 110. Further, since the surface of the functional element 140 is lower than the surface of the wiring layer 110, the air outside the side surface of the wiring layer 110 in the substrate surface exposed region 130, the side surface of the wiring layer 110, and the wiring layer 110. There is a heat flux C that conducts heat to and from the inside.

  Therefore, when the functional element 140 is a heat source, the direction of the heat fluxes B and C is a heat flux in the direction starting from the functional element 140, and the heat generated in the semiconductor device 100a using the functional element 140 as a heat source is the semiconductor. Heat is dissipated from the surface of the device 100a to the outside air, and the heat dissipation becomes high.

  Further, as shown in FIG. 2 (b), the back surface of the metal substrate 101 is covered with the high thermal conductive inorganic insulating film 120a, so that the metal provided on the front side and the back side by via holes as in the background art form. There is no need to connect the layers to increase thermal conductivity.

  That is, the direction of the heat flux D between the functional element 140 or the wiring layer 110, the metal substrate 101, the high thermal conductive inorganic insulating film 120a, and the high thermal conductive inorganic insulating film 120a and the outside is from the back surface of the functional element 140 to the metal substrate 101. Then, it goes to the outside through the high thermal conductive inorganic insulating film 120a.

  Therefore, heat generated when the functional element 140 serves as a heat source is easily transferred from the back surface direction of the metal substrate 101 to the external air. That is, the heat generated in the functional element 140 is transferred from the back surface of the semiconductor device 100 a to the external air via the back surface of the metal substrate 101.

  In addition, the back surface of the metal substrate 101 can be protected by providing the high thermal conductive inorganic insulating film 120a.

(effect)
In the first embodiment of the present invention, since the surface of the functional element 140 mounted in the rectangular recess region which is the substrate surface exposed region (mounting region) 130 is lower than the surface of the wiring layer 110, Compared with the conventional form, heat generated in the semiconductor device 100a using the functional element 140 as a heat source is dissipated from the surface of the semiconductor device 100a to the outside, and heat dissipation is enhanced.

  That is, the heat generated in the functional element 140 is transferred through the metal substrate 101 to the heat flux B from the surface of the wiring layer 110 to the outside air, and from the side surface of the wiring layer 110 to the outside air. The heat flux C can be provided, and the semiconductor device 100 with high heat dissipation from the surface side of the substrate 101 can be provided.

  Furthermore, in the present embodiment, a highly thermally conductive inorganic material insulating film 120 (120a) is provided on the back surface of the metal substrate 101 to protect the back surface of the substrate, and heat generated by the functional element 140 is conducted to the metal substrate 101 to further increase the heat. Heat is transferred to the outside air through the conductive insulating thin film 120a.

  Therefore, according to the present embodiment, a semiconductor device having high density and high heat dissipation can be obtained by using the metal substrate 101 without providing via holes penetrating the front side and the back side of a silicon substrate, which is well known as a technique for manufacturing a silicon integrated circuit. Can be provided.

(Modification 1)
FIG. 3 shows a semiconductor device 100b of Modification 1 of the present embodiment. As shown in FIG. 3, a structure in which both side surfaces (two side surfaces) of the substrate 101 are covered with the high thermal conductivity inorganic material insulating film 120b, or four side surfaces of the substrate 101 with the front and rear surfaces not shown are added to the high thermal conductivity inorganic material insulating film 120b. It can also be. Also in this modification, heat transfer from the side surface of the metal substrate 101 to the outside air is performed from the side surface of the substrate 101 via the high thermal conductivity inorganic material insulating film 120b, and high heat dissipation can be ensured.

(Modification 2)
4A and 4B show a semiconductor device 100c according to the second modification of the present embodiment. As shown in FIG. 4A, a wiring layer 110b is provided on the substrate 101 outside the wiring region 126 inside the substrate 101, and a substrate surface exposed region 132 is provided around the wiring layer 110b on the surface of the metal substrate 101. A configuration in which two functional elements 141 are provided may be employed.

  In the case of this configuration, as shown in FIG. 4B, the heat flux of the heat generated by the two functional elements 141 indicates the heat transfer mode of the three heat transfer described in the present embodiment, and the arrow E , F, and G can transfer heat from both the front side and the back side of the metal substrate 101 to provide a semiconductor device 100c having high heat dissipation. In addition, it is possible to modify the wiring layer region in a ring shape and mount the functional element by providing the substrate surface exposed region in the inner region and the outer region of the ring-shaped wiring layer.

(Modification 3)
FIG. 5 is a cross-sectional view showing a semiconductor device 100d of Modification 3 of the present embodiment. In the semiconductor device 100d, a high thermal conductivity inorganic insulating film 150 is further provided on the surface of the metal substrate 101 as compared with the semiconductor device 100a of the present embodiment, and the functional element 140 and the wiring layer 110 are provided on the surface of the high thermal conductivity inorganic insulating film 150. Is provided.

A specific example of the high thermal conductive inorganic insulating film 150 is preferably an insulating film of diamond-like carbon (DLC), AlN, Al ₂ O ₃ , or SiN or an insulating film in which these are stacked. is there.

  By providing the highly heat-conductive inorganic insulating film 150 on the surface of the metal substrate 101, the exposed region of the surface of the metal substrate 101 can be protected, and a high heat transfer effect of the exposed surface region of the metal substrate 101 can be ensured.

  In addition, another metal thin film (not shown) may be provided between the high heat conductive inorganic insulating film 150 and the substrate 101 so that the adhesion between the high heat conductive inorganic material thin film 150 and the metal substrate 101 is increased. it can. As another metal thin film, for example, a metal thin film layer containing at least one of Ag, Cu, Pd, Al, Ni, and Ti can be provided.

(Second Embodiment)
Next, a second embodiment of the present invention will be described with reference to FIG.

  In the first embodiment, the high thermal conductivity inorganic insulating film 120 is provided on the back surface of the metal substrate 101. In the present embodiment, as shown in FIG. 6, the semiconductor device 200 a is different from the first embodiment, and the metal substrate 101 of the first embodiment is a substrate 210 including a metal layer 214 and a ceramic substrate 212. Hereinafter, only the differences from the first embodiment will be described with respect to the semiconductor device 200a of the second embodiment.

  In the semiconductor device 200a of the present embodiment, the substrate 210 includes a ceramic substrate 212 and a metal layer 214 provided on the ceramic substrate 212. The functional element 140 and the wiring layer 110 are provided on the surface of the metal layer 214 as in the first embodiment.

The ceramic substrate 212 constituting the substrate 210 is preferably composed of a high heat conductive material. As a specific example of the ceramic substrate 212, for example, a ceramic substrate such as AlN, Al ₂ O ₃ , or SiN can be used. Further, the metal layer 214 provided on the surface of the ceramic substrate 212 can be a metal material layer containing at least one of Au, Ag, Cu, Pd, Al, Ni, Ti, and Pt. .

(effect)
According to the second embodiment of the present invention, in addition to the effects obtained in the first embodiment and the modified example, the high heat conductive inorganic material layer (high heat conductive inorganic insulating film 120) provided on the back surface of the substrate is omitted. Thus, since the process step for forming the high thermal conductive inorganic insulating film 120 can be omitted, the cost of the wiring board can be reduced.

(Modification)
Modification 2 and Modification 3 described in the first embodiment can be similarly applied to this embodiment as modifications.

(Third embodiment)
A third embodiment of the present invention will be described with reference to FIGS.

  FIG. 7A is a plan view showing a semiconductor device 300 according to the third embodiment of the present invention. FIG. 7B is a cross-sectional view showing a cross section taken along the line HH in the semiconductor device 300 of FIG.

  As shown in FIG. 7A, the semiconductor device 300 of this embodiment includes a light emitting element array 310 and a drive circuit element that drives the light emitting element array 310 as the plurality of functional elements 140 described in the above embodiment. The drive circuit 312 is mounted on the surface of the metal substrate 101, and the surface of the plurality of functional elements is lower than the surface of the wiring layer 110, thereby providing a heat transfer effect with high heat dissipation. Yes.

  In FIG. 7, the same code | symbol is attached | subjected to the component equivalent to the component of the said embodiment. Description of the same reference numerals is omitted.

  7A, the semiconductor device 300 includes a light emitting element array 310 having a plurality of light emitting regions, a drive circuit 312 for driving the light emitting element array 310, a light emitting element array 310, and a drive circuit 312. Connection wiring 314 between the light emitting element driving circuits to be connected, driving circuit wiring interlayer connection wiring 316 for connecting the driving circuit 312 and the wiring layer 110 on the metal substrate 101, and a light emitting element array for connecting the light emitting element array 310 and the wiring layer 110 to each other. The wiring interlayer connection wiring 318 includes a power signal connector 350 provided on the metal substrate 101 for supplying power and drive signals from the outside.

Next, the semiconductor device 300a will be described in detail with reference to the cross-sectional view of FIG.
The structure of the light emitting element array 310 may be an array of light emitting elements in the form of a single crystal semiconductor thin film element including an AlGaAs-based material, an AlGaInP-based material, or a nitride semiconductor-based material such as AlGaN or InGaN.

  The light emitting element array 310 is in the form of a single crystal semiconductor thin film element, and is preferably in the form of being directly bonded to the surface of the metal substrate 101 in the substrate surface exposed region 130 without using an adhesive. By directly bonding to the surface of the metal substrate 101 in the form of a single crystal semiconductor thin film element, mainly heat generated in the light emitting layer of the light emitting element array 310 is efficiently transferred to the metal substrate 101, and the temperature of the light emitting element array 310 increases. Can be prevented.

  In addition, the driving circuit 312 can be selected as appropriate from single crystal Si, amorphous Si, poly-Si, an organic semiconductor, and an oxide semiconductor depending on a current for driving the light-emitting element array 310 and a driving speed.

  The drive circuit 312 can also be in the form of a semiconductor thin film element. Therefore, it is preferable to directly bond or directly form the driving circuit 312 on the surface of the metal substrate 101 without using an adhesive. By adopting this form, the heat generated in the drive circuit 312 is efficiently transferred to the metal substrate 101 as in the light emitting element array 310.

  The light emitting element array 310 is connected to the wiring layer 110 by the light emitting element array wiring interlayer connection wiring 318, and the drive circuit 312 is connected by the drive circuit wiring interlayer connection wiring 316. The light emitting element array 310 and the drive circuit 312 are connected by a light emitting element drive circuit connection wiring 314. Note that a connection form between the functional elements and the connection wiring can be formed through an interlayer insulating film 315.

  These connection wirings 318, 316, and 314 can be metal thin film wirings made of a metal material containing at least one metal selected from Au, Al, Ag, Cu, Ti, Pt, and Ni.

  The heat generated in the light emitting element array 310 and the drive circuit 312 is thermally conducted to the wiring layer 110 through the connection wirings 318 and 316, and is thermally conducted from the wiring layer 110 to the metal substrate 101. Heat is also transferred from the top surface of layer 110 to the outside air.

  In addition, the thickness of the light emitting element array 310 configured in the form of a single crystal semiconductor thin film element is preferably 0.2 μm to 3 μm, for example. When the light emitting element array 310 is directly bonded to the surface of the metal substrate 101, it is desirable that the surface of the metal substrate 101 has a flatness of nanometer order.

Here, the flatness of the nanometer order refers to the measurement of flatness using a well-known AFM (Atomic Force Microscope) when the measurement area on the surface of the metal substrate 101 is set to 5 μm square (□). As a value, it means that the maximum-minimum roughness ( _RPV ) is 5 nm or less.

Direct bonding is possible by setting the surface roughness R _PV of the bonding region of the surface of the metal substrate 101 to be bonded to the back surface of the light emitting element array 310 to 5 nm or less ( _RPV ≦ 5 nm). When the surface roughness R _PV exceeds 5 nm (R _PV > 5 nm), joining becomes difficult. In order to obtain a sufficiently strong bonding strength that can withstand the manufacturing process of the semiconductor device, it is more preferable that the surface roughness R _PV is 3 nm or less ( _RPV ≦ 3 nm).

  In addition, when the material of the functional element 140 (the light emitting element array 310 or the drive circuit 312) and the material of the metal substrate 101 are a combination having reactivity at the contact portion, a high thermal conductive thin film (for example, DLC, AlN, etc.) may be interposed therebetween. In this case, it is desirable to provide flatness on the surface of the high thermal conductivity thin film that is in direct contact with the functional element 140.

  FIG. 8 is an enlarged plan view showing a mounting form of the light emitting element array 310 and the drive circuit 312 in the semiconductor device 300. In FIG. 8, each light emitting element array 310 is provided with a light emitting region 320 and connection electrode pads 322 and 328, and a drive circuit 312 includes a drive circuit element (not shown) and connection electrode pads 324, 326 is provided.

  As in this embodiment, the semiconductor device 300 in which the light emitting element array 310 and the drive circuit 312 are mounted on the surface of the metal substrate 101 as a one-dimensional array is used as a writing light source of an electrophotographic printer (optical printer), for example. It can be an LED print head.

(effect)
In the third embodiment of the present invention, the surface of the light emitting element array 310 and the drive circuit 312 as the functional elements 140 mounted in the rectangular recessed area which is the substrate surface exposed area (mounting area) 130 is the surface of the wiring layer 110. Therefore, the heat generated in the semiconductor device 300 using the light-emitting element array 310 and the drive circuit 312 as heat sources is similar to that in the above-described embodiment. The heat can be radiated from the outside to increase the heat transfer effect.

  In addition, since the light emitting element array 310 and the drive circuit 312 are directly bonded to the surface of the metal substrate 101 and connected to the wiring layer 110 by connection wiring, the first embodiment and the second embodiment are configured. In addition to the effect, the heat generated in the light emitting element array 310 and the driving circuit 312 is efficiently transferred not only from the back surface side of the semiconductor element but also from the front surface side, so that the light emitting element array 310 and the driving circuit 312 are transferred. The temperature rise in the semiconductor device 300 due to the operation can be prevented.

  In addition, by using the semiconductor device 300 having a heat dissipation structure with high heat dissipation characteristics in consideration of heat transfer, it is possible to cope with high density and high integration with a simple configuration as compared with the above-described conventional technology. Become.

(Modification)
The semiconductor device 300 of this embodiment can take the form described in the first embodiment, the second embodiment, and the modification.

  Further, in the present embodiment, the embodiment in which the single crystal semiconductor thin film element is directly bonded onto the substrate has been described as a preferred example. However, for example, using a bulk substrate semiconductor chip as a light emitting element array or a drive circuit, for example, a conductive paste It can also be set as the form using pastes which can ensure thermal conductivity to some extent.

  When a bulk substrate semiconductor chip is used, the bulk substrate semiconductor chip is mounted on the surface of the metal substrate 101 in the substrate surface exposed region 130, and the form of connection wiring between the chips is replaced with metal thin film wiring and bonding wires. A connection form using (for example, Au fine wire) can be used.

(Other modifications of the third embodiment)
FIG. 9 and FIG. 10 are diagrams schematically showing a semiconductor device 400 as another modification of the semiconductor device 300 of the present embodiment. FIG. 9 is a plan view, and FIG. 10 is a cross-sectional view showing a cross section taken along the line II of FIG.

  In the semiconductor device 400 of this modification, the light emitting elements and the drive circuits are two-dimensionally arranged in a matrix.

  As shown in FIGS. 9 and 10, the semiconductor device 400 (400a) includes a plurality of light emitting elements 410 having a second conductivity type layer surface 420 and a first conductivity type layer surface 422, an x-direction drive circuit 462, and a y-direction. The drive circuit 464 is disposed on the metal substrate 101 in the substrate surface exposed region (mounting region) 130 via the high thermal conductive inorganic insulating film 150.

  Between each functional element and the wiring layer 110, the first conductive side connection wiring 413 and the second conductive side connection wiring 414, the x direction wiring 415 and the y direction wiring 416, and the x direction driving circuit wiring interlayer connection, respectively. The wiring 417 and the y-direction drive circuit wiring interlayer connection wiring 418 are connected. In addition, power signal connectors 452 and 454 for inputting power and signals from the outside are provided.

  The light emitting element, the drive circuit, and the connection wiring can be made of the same materials as in the third embodiment.

  Further, the modification examples shown in the first embodiment, the second embodiment, and modifications thereof can be applied to the wiring board.

  As a specific example of the semiconductor device 400 of such an embodiment, an LED display in which the light emitting element 410 and the drive circuits 462 and 464 are two-dimensionally arranged in a matrix can be cited.

100, 100a, 100b, 100c, 100d, 200a, 300, 300a, 400, 400a Semiconductor device 101 Metal substrate (thermally conductive substrate)
110, 110b Wiring layer 111a First interlayer insulating layer 111b Second interlayer insulating layer 111c Third interlayer insulating layer 112a First wiring layer 112b Second wiring layer 115, 116 Connection pads 120, 120a, 120b, 150 High thermal conductive inorganic insulating film 125, 126 Wiring layer region 130, 132 Substrate surface exposed region (mounting region)
140, 141 Functional element 210 Substrate (thermally conductive substrate)
212 Ceramic substrate 214 Metal layer 310 Light emitting element array (functional element, light emitting element)
312 Drive circuit (functional element, drive circuit element)
314 Light emitting element drive circuit connection wiring 315 Interlayer insulating film 316 Drive circuit wiring interlayer connection wiring 318 Light emitting element array wiring interlayer connection wiring 320 Light emitting region 322, 324, 326, 328 Electrode pads 350, 452, 454 Power supply signal connector 410 Light emitting element (Functional element)
413 First conductive side connection wiring 414 Second conductive side connection wiring 415 x direction wiring 416 y direction wiring 417 x direction driving circuit wiring interlayer connection wiring 418 y direction driving circuit wiring interlayer connection wiring 420 Second conductivity type layer surface 422 First Conductive layer surface 462 x-direction drive circuit (functional element, drive circuit element)
464 Y-direction drive circuit (functional element, drive circuit element)
B, C, D, E, F, G Heat flux

Claims (11)

A functional element;
A thermally conductive substrate on which the functional element is mounted in a part of the surface mounting region;
A single-layer or multi-layer wiring layer formed in a wiring layer region excluding the mounting region on the surface of the thermally conductive substrate;
A semiconductor device comprising: 2. The semiconductor device according to claim 1, wherein a surface of the functional element opposite to the thermally conductive substrate is lower than a surface of the wiring layer opposite to the thermally conductive substrate.   3. The semiconductor device according to claim 2, wherein at least a part of the vertical plane of the wiring layer is provided with a predetermined interval with respect to the vertical plane of the functional element. The part is a part on the opposite side in the vertical direction with respect to the thermally conductive substrate,
The semiconductor device according to claim 3, wherein a gap between the other part on the heat conductive substrate side and the functional element is filled with a laminate.   The semiconductor device according to claim 1, wherein the thermally conductive substrate is made of a metal material.   6. The semiconductor device according to claim 1, wherein the functional element is a plurality of semiconductor elements bonded to a surface of the thermally conductive substrate. The plurality of semiconductor elements includes a plurality of light emitting elements and a drive circuit element that drives the plurality of light emitting elements,
7. The semiconductor device according to claim 1, wherein one or both of the light emitting element and the driving circuit element are connected to the wiring layer by a connection wiring. 8. The light emitting element is a single crystal semiconductor thin film element,
The semiconductor device according to claim 1, wherein the single crystal semiconductor thin film element is directly bonded to the surface of the thermally conductive substrate. The semiconductor device according to claim 1, wherein the thermally conductive substrate includes a ceramic substrate and a metal layer stacked on the ceramic substrate. 4. The semiconductor device according to claim 1, wherein the thermally conductive substrate includes an insulating film formed of an inorganic material layer on one or both of the front surface and the back surface. 5. . The semiconductor device according to claim 10, wherein the inorganic material layer includes at least one material layer selected from diamond-like carbon, aluminum nitride, and aluminum oxide.

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