JP2011164303A - Electrophoretic display device, method for manufacturing the same, electronic apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an electrophoretic display device and an electronic apparatus which are capable of increasing storage capacitance, suppressing the effect of feedthrough in a pixel switching element, displaying halftone, and achieving low power consumption. <P>SOLUTION: The electrophoretic display device comprises an electrophoretic layer held between an element substrate and a counter substrate and includes, on a surface on the electrophoretic layer side of the element substrate, a plurality of scan lines and a plurality of data lines extending in mutually intersecting directions, selection transistors connected to the scan lines and the data lines, pixel electrodes connected to the selection transistors, storage capacitor lines extending parallel to the scan lines, and capacitors, each of which has one electrode connected to the selection transistor and the pixel electrode and has the other electrode connected to the storage capacitor line. Insulating films of the capacitors are formed so as to be thinner than gate insulating films of the selection transistors. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to an electrophoretic display device, a method for manufacturing an electrophoretic display device, and an electronic apparatus.

  As an electrophoretic display device, an electrophoretic element in which electrophoretic particles are dispersed in a dispersion medium is sandwiched between an element substrate and a counter substrate. For example, in the electrophoretic display device described in Patent Document 1, as an element substrate, a plurality of pixel electrodes arranged in a matrix, a selection transistor connected to each pixel electrode, a drain of the selection transistor, and a pixel electrode What was provided with the connected capacitor was used. Further, the first capacitor and the second capacitor connected in parallel are formed to suppress a decrease in the retained charge of the capacitor.

JP 2008-20774 A

By the way, in an electrophoretic display device in which an image signal is written by a capacitor through a selection transistor, the influence of the feedthrough of the selection transistor is significantly larger than that of a liquid crystal display device, and density unevenness when an intermediate gradation is displayed. It has been found by the inventors' research that this phenomenon is likely to occur.
Since feedthrough is caused by the parasitic capacitance of the selection transistor, the influence can be reduced by increasing the capacitor in the pixel. Therefore, it is conceivable to employ a configuration in which a capacitor using an interlayer insulating film is stacked on a capacitor using a gate insulating film, as in the electrophoretic display device described in Patent Document 1.

  However, the configuration of Patent Document 1 has a problem that the capacitor cannot be increased because the upper-layer capacitor uses a thick interlayer insulating film.

  The present invention has been made in view of the above-mentioned problems of the prior art, and can increase the storage capacity, suppress the influence of the feedthrough of the pixel switching element, can also display intermediate gradations, and has low power consumption. An object of the present invention is to provide an electrophoretic display device, a method for manufacturing the electrophoretic display device, and an electronic device that can be realized.

  In order to solve the above-described problems, the electrophoretic display device of the present invention includes an electrophoretic element sandwiched between a first substrate and a second substrate, and the electrophoretic element side surface of the first substrate is disposed on the surface. A plurality of scanning lines and a plurality of data lines extending in directions intersecting each other, a selection transistor connected to the scanning lines and the data lines, a pixel electrode connected to the selection transistor, the selection transistor and the pixel A capacitor having one electrode connected to the electrode, wherein the insulating film of the capacitor is thinner than the thickness of the gate insulating film of the selection transistor.

According to the present invention, since the insulating film of the capacitor is thinner than the thickness of the gate insulating film of the selection transistor, the capacitance of the capacitor can be increased. Moreover, the influence of feedthrough can be suppressed by increasing the capacitance of the capacitor. As a result, it is possible to reduce variations in gradation of the displayed image, and display unevenness can be suppressed even when intermediate gradations are displayed.
Therefore, a display device capable of high-definition display and low power consumption can be obtained.

  Preferably, the gate insulating film is formed of a plurality of interlayer insulating films, and the insulating film of the capacitor is constituted by an insulating film having a number smaller than the total number of interlayer insulating films of the gate insulating film. .

  According to the present invention, the capacitor insulating film is thinner than the gate insulating film, and the capacitance of the capacitor can be increased.

  Preferably, the gate insulating film includes a first insulating film and a second insulating film, and the capacitor insulating film includes the second insulating film.

  According to the present invention, the gate insulating film has a two-layer structure of the first insulating film and the second insulating film, while the insulating film of the capacitor is composed of only the second insulating film. However, the insulating film of the capacitor becomes thinner, and as a result, the capacitance of the capacitor increases.

  Moreover, it is preferable that the first insulating film and the second insulating film are stacked at a peripheral edge portion of one electrode of the capacitor.

  According to the present invention, when the peripheral portion of one electrode of the capacitor is covered only with the second insulating film, dielectric breakdown is likely to occur at the peripheral portion of the electrode, but the first portion is formed on the peripheral portion of the electrode. By laminating the insulating film and the second insulating film, it is possible to increase the thickness of the insulating film at the peripheral portion and prevent dielectric breakdown from occurring at the peripheral portion of the electrode.

  Further, it is preferable that an opening for exposing at least a part of one electrode of the capacitor is formed in the first insulating film.

  According to the present invention, since only the second insulating film exists on one electrode of the capacitor exposed from the opening of the first insulating film, the thickness of the insulating film of the capacitor can be reduced.

Moreover, it is preferable that the semiconductor layer of the selection transistor is made of an oxide, and the insulating film in contact with the semiconductor layer is made of an oxide.
According to the present invention, the insulating film in contact with the semiconductor layer made of an oxide is an oxide (inorganic material), so that the semiconductor layer is made of hydrogen or the like by the etching solution used for patterning the insulating film on the semiconductor layer. It becomes difficult to be reduced.

  In the method for manufacturing an electrophoretic display device of the present invention, an electrophoretic element is sandwiched between a first substrate and a second substrate, and the surfaces of the first substrate on the electrophoretic element side cross each other. A plurality of scanning lines and a plurality of data lines extending to the selection line, a selection transistor connected to the scanning lines and the data lines, a pixel electrode connected to the selection transistor, and one electrode for the selection transistor and the pixel electrode Connected to the capacitor, and the insulating film of the capacitor is thinner than the thickness of the gate insulating film of the selection transistor, wherein the gate is formed on the element substrate. An electrode forming step of forming an electrode and one electrode of the capacitor; and an insulating film forming step of forming the gate insulating film and the insulating film of the capacitor, Characterized in that the thickness of the insulating film Yapashita formed thinner than the thickness of the gate insulating film.

According to the present invention, the capacitance of the capacitor can be increased by forming the insulating film of the capacitor thinner than the thickness of the gate insulating film of the selection transistor. Moreover, the influence of feedthrough can be suppressed by increasing the capacitance of the capacitor. As a result, it is possible to reduce variations in gradation of the displayed image, and display unevenness can be suppressed even when intermediate gradations are displayed.
Therefore, a display device capable of high-definition display and low power consumption can be obtained.

  In the insulating film forming step, the gate insulating film is formed by stacking a plurality of interlayer insulating films on the gate electrode, and the interlayer insulating film of the gate insulating film is formed on one of the electrodes of the capacitor. It is preferable to form an insulating film for the capacitor by forming a smaller number of insulating films than the total number.

  According to the present invention, the capacitor insulating film is thinner than the gate insulating film, and the capacitance of the capacitor can be increased.

  Preferably, the gate insulating film is formed by laminating a first insulating film and a second insulating film, and the insulating film of the capacitor is formed by the second insulating film.

  According to the present invention, the gate insulating film has a two-layer structure of the first insulating film and the second insulating film, whereas the insulating film of the capacitor is composed of only the second insulating film. However, the capacitor insulating film becomes thinner, and the capacitance of the capacitor can be increased.

  In addition, it is preferable that the first insulating film and the second insulating film are stacked in a peripheral portion of one of the electrodes of the capacitor.

  According to the present invention, when the peripheral portion of one electrode of the capacitor is covered only with the second insulating film, dielectric breakdown is likely to occur at the peripheral portion of the electrode. However, the peripheral portion of the electrode is separated from the first insulating film and the second insulating film. By covering with the film, the thickness of the insulating film at the peripheral edge can be increased, and dielectric breakdown can be prevented from occurring in the insulating film on the peripheral edge of the electrode.

  In the insulating film forming step, after forming the first insulating film on one of the electrodes of the gate electrode and the capacitor, a part of the one electrode of the capacitor is exposed to the first insulating film. It is preferable to form an opening to be formed.

  According to the present invention, the first insulating film on the electrode is partially removed to form an opening in the first insulating film that exposes a part of one electrode of the capacitor. In this case, only the second insulating film exists. Thereby, the thickness of the insulating layer of the capacitor becomes thinner than the thickness of the gate insulating film made of the first insulating film and the second insulating film, and the capacitance of the capacitor can be increased.

An electronic apparatus according to the present invention includes the electro-optical device according to the present invention.
According to the present invention, it is possible to provide an electronic device with low power consumption by including a display unit that saves power.

1 is a block diagram showing a configuration of an electrophoretic display device according to a first embodiment. FIG. 3 is a circuit diagram illustrating a detailed configuration of a pixel circuit. The figure which shows the relationship between the display state of the voltage of a liquid crystal and an electrophoretic material. The fragmentary sectional view of a TFT element substrate. The figure which shows the drive waveform of a matrix type liquid crystal display device, and the voltage applied to a liquid crystal. The figure which shows the drive waveform of a matrix-type electrophoretic display device, and the voltage applied to an electrophoretic material. 1 is a partial cross-sectional view illustrating a schematic configuration of an electrophoretic display device according to an embodiment. FIG. 8A is a plan view of an element substrate in one pixel of an electrophoretic display device, and FIG. 8B is a cross-sectional view taken along a line AA in FIG. FIG. 4A shows an enlarged electrophoretic material for one pixel in the electrophoretic display device. FIG. 9B is an equivalent circuit diagram of FIG. The figure which shows about the voltage change applied in the writing period with respect to an electrophoretic element. FIG. 6 is a partial cross-sectional view illustrating a manufacturing process of an electrophoretic display device. FIG. 6 is a partial cross-sectional view illustrating a manufacturing process of an electrophoretic display device. FIG. 14 illustrates an example of an electronic device.

  Embodiments of the present invention will be described below with reference to the drawings. In each drawing used for the following description, the scale of each member is appropriately changed to make each member a recognizable size.

[First Embodiment]
FIG. 1 is a block diagram showing a configuration of an electrophoretic display device 100 of the present invention.
The electrophoretic display device 100 shown in FIG. 1 is provided so as to intersect with the plurality of scanning lines 66 (Y1, Y2,..., Ym), a scanning driver 61 for sequentially selecting the scanning lines 66, and the scanning lines 66. A plurality of data lines 68 (Y1, X2,..., Xn), a data driver 62 for sequentially selecting the data lines 68, and the intersections of the scanning lines 66 and the data lines 68 are arranged in a matrix. The display unit 5 includes a plurality of pixels 40, and a controller (not shown) that controls the data driver 62 and the scan driver 61.

FIG. 2 shows a typical circuit configuration of one pixel.
As shown in FIG. 2, the pixel circuit in each pixel 40 includes an electrophoretic element 32 as an electro-optic material, a holding capacitor Cs (capacitor) for holding the electropolarization state of the electrophoretic element 32, and a switching operation. And a selection transistor TRs for accumulating charges in the storage capacitor Cs. The selection transistor TRs has a gate connected to the scanning line 66, a source connected to the data line 68, and a drain connected to the electrophoretic element 32 and one electrode 10a of the storage capacitor Cs.
Each scanning line 66 is connected to a storage capacitor Cs of other pixels 40A and 40B adjacent in the column direction.
For example, the electrode 10b of the storage capacitor Cs in the pixel 40A is different from the scanning line 66 connected to the selection transistor TRs in the pixel 40A (scanning line connected to the selection transistor TRs in the pixel 40B). ), The reference potential line can be omitted.

Next, the effect of feedthrough on a unipolar electro-optic material and a bipolar material will be described.
Description will be made using an electrophoretic material as a unipolar material and liquid crystal as a bipolar material. FIG. 3 shows the relationship between the voltage of the liquid crystal and the electrophoretic material and the display state.
The display state of the liquid crystal display device 51 changes depending on the effective value of the voltage applied to the liquid crystal 52 as shown in FIG. On the other hand, the display state of the electrophoretic display device 53 changes depending on the polarity of the applied voltage as shown in FIG. In this case, the white charged particles 27 are attracted to the negative side, and the black charged particles 26 are attracted to the positive side.
The liquid crystal display device 51 needs to continue to apply a voltage during display, but the electrophoretic display device 53 does not have to be written again because it has a memory property once written.

  The state of the electrophoretic display device 53 changes depending on the polarity of the voltage applied to each of the charged particles 26 and 27. In this case, black and white changes and control is performed. Further, the control depends not only on the polarity but also on the absolute value of the applied voltage and the application time. What is most important in the present embodiment is that a new problem that arises from the principle of the principle that the display state varies depending on the polarity, as will be described later, has been newly invented.

Next, the influence of feedthrough on electrophoretic material (charged particles) in a conventional pixel circuit will be described in comparison with liquid crystal. FIG. 4 is a partial cross-sectional view of the element substrate.
As shown in FIG. 4, a gate electrode 41e (scanning line 66) and a storage capacitor line 69 (electrode 10b) are formed on the element substrate 30 so as to cover the gate electrode 41e and the storage capacitor line 69. A gate insulating film 41b is provided. A semiconductor layer 41a is provided at a position overlapping the gate electrode 41e of the gate insulating film 41b, and a drain electrode 41d and a source electrode 41c are formed so as to partially run on the peripheral edge of the semiconductor layer 41a. One electrode 10 a of the storage capacitor Cs is connected to the drain electrode 41 d, and the other electrode 10 b is connected to the storage capacitor line 69.
The pixel electrode 35 formed on the select transistor TRs through the interlayer insulating film 34b is connected to the drain electrode 41d through the contact hole H formed in the interlayer insulating film 34b.

Here, there is a parasitic capacitance (Cgd) unavoidable due to the structure between the gate electrode 41e and the drain electrode 41d of the selection transistor TRs. The capacitance is centered on the capacitance between the electrodes 41e and 41d in the overlap of the gate electrode 41e and the drain electrode 41d.
As is well known, when the parasitic capacitance (Cgd) selection transistor TRs is in a conductive state, approximately half of the entire channel region L and a region indicated by ΔL (a region where the gate electrode 41b and the drain electrode 41d overlap). The capacitor is composed of a gate insulating film 41b. Incidentally, the remaining half of the channel region L and the other region ΔL are distributed on the source electrode 41c side, and become a capacitance (Cgs) between the source electrode 41c and the gate electrode 41e. When the select transistor TRs is non-conductive, the stacked film of the gate insulating film 41b and the semiconductor layer 41a in the region ΔL forms a parasitic capacitance (Cgd). In the feedthrough described later, a parasitic capacitance (Cgd) when the selection transistor TRs is in a conductive state is generally used.

  In the gate selection period (period in which the gate voltage is high), the voltage (image signal) of the data line 68 is written to the storage capacitor Cs via the selection transistor TRs. In the holding period (period in which the potential of the gate electrode 41e is lowered to a low potential), the selection transistor TRs is turned off. Here, assuming that the gate voltage change amount Vg, the holding capacitance Cs, the electro-optic material capacitance Ce, and the gate-drain parasitic capacitance Cgd, the feedthrough ΔVg is obtained by the following equation (1).

  The effect when this value varies in one display body is compared between the liquid crystal and the electrophoretic material.

FIG. 5 shows a driving waveform of the matrix type liquid crystal display device and a voltage applied to the liquid crystal.
The leakage current during the holding period T11 was ignored. Data is written in the holding capacitor Cs and the capacitance Ce of the electro-optic material within the selection period, and the gate voltage is turned off at the start of the holding period to cause feedthrough. The common potential Vcom is set in advance lower than the common voltage of the signal voltage by the amount corresponding to the feedthrough, and an AC voltage is applied to the liquid crystal. The effective voltage applied to the liquid crystal at this time is obtained by the following equation 2.

  The effective voltage when the feedthrough is changed due to manufacturing variation or the like and becomes Vb larger than the previous one is obtained by the following equation (3).

  Therefore, Vb × Vb × (½) is a variation in effective value. Here, in general, since Vb << 1V, this term can be substantially ignored (close to zero). That is, in the bipolar electro-optical device, the variation of the selection transistor hardly affects the display.

FIG. 6 shows the drive waveform of the matrix type electrophoresis apparatus and the voltage applied to the electrophoretic material.
Here, the leakage current during the holding period was ignored. Data is written in the holding capacitor Cs and the capacitance Ce of the electro-optic material within the selection period, and the gate voltage is turned off at the start of the holding period to cause feedthrough. The common potential is previously set lower than the common voltage of the signal voltage by the amount corresponding to the feedthrough, and an alternating voltage is applied to the electrophoretic material. The effective voltage applied to the material at this time is obtained by the following equation 4.

  The effective voltage when the feedthrough changes due to manufacturing variation or the like and becomes Vb higher than the previous one is obtained by the following equation (5).

Twice Vb is the voltage variation.
As a result, it can be seen that variations that were not a problem with liquid crystals are a major problem with unipolarity. This results in display unevenness (non-uniform display) in halftones. This problem becomes conspicuous when a pixel becomes small and sufficient storage capacity cannot be secured for realizing high definition or color display. In fact, in a prototype using an amorphous TFT of 385 dpi (Cs = 400 fF, Cgd = 60 fF), display unevenness occurred in the intermediate gradation, and only monochrome two gradation display was possible.

  In order to eliminate the display unevenness, the feedthrough variation may be reduced. In the above formula (1), generally, the parasitic capacitance Cgd << the holding capacitance Cs and the capacitance Ce of the electro-optic material. In order to reduce the variation in feedthrough, it is conceivable to increase the storage capacitor Cs or to reduce the parasitic capacitance Cgd from the equation (1). (The capacitance Ce of the electro-optic material is fixed because of the material, so it is not considered here.) To increase the retention capacitance Cs, it is effective to create a TFT substrate with the following structure and manufacturing method, and parasitic capacitance. In order to reduce Cgd, it is effective to use a selection transistor TRs having high mobility and reducing the selection transistor TRs itself.

In this embodiment, a TFT using a-IGZO (a compound of In, Ga, Zn, and O in an amorphous state) as a semiconductor layer is shown. Since the mobility is about 10 cm ² / V / s and the previous amorphous silicon TFT has a mobility of 0.2, W of the selection transistor TRs is set to 4 μm. This reduced the feedthrough variation to about 1/2.

FIG. 7 is a partial cross-sectional view showing a schematic configuration of the electrophoretic display device 100 of the present embodiment.
As shown in FIG. 7, the electrophoretic display device 100 according to this embodiment includes a capsule-type electrophoretic element 32 sandwiched between an element substrate 30 and a counter substrate 31. On the surface of the element substrate 30 on the electrophoretic element 32 side, a plurality of scanning lines 66 and a plurality of data lines 68 are formed extending in directions intersecting each other. Further, the scanning line 66 and the data line 68 are configured to include a selection transistor TRs, a pixel electrode 35 connected to the selection transistor TRs, and a storage capacitor Cs (capacitor).

FIG. 8A is a plan view of the element substrate 30 in one pixel of the electrophoretic display device 100, and FIG. 8B is a cross-sectional view at a position along the line AA in FIG.
The selection transistor TRs includes a semiconductor layer 41a, a source electrode 41c extending from the data line 68, a drain electrode 41d connecting the semiconductor layer 41a and the pixel electrode 35, and a gate electrode 41e extending from the scanning line 66. And having. A storage capacitor Cs is formed in a region where the drain electrode 41d and the storage capacitor line 69 overlap. One electrode 10b of the storage capacitor Cs is connected to the storage capacitor line 69, and the other electrode 10b is connected to the drain electrode 41d of the selection transistor TRs. The pixel electrode 35 formed through the interlayer insulating film 34b is connected to the drain electrode 41d through a contact hole H formed in the interlayer insulating film 34b.

  As shown in FIG. 8B, on the element substrate 30 made of a glass substrate, a gate electrode 41e (scanning line 66) made of aluminum (Al) having a thickness of 300 nm and a storage capacitor line 69 are provided. . A first insulating film 41b having a thickness of 200 nm made of silicon oxide or silicon nitride is formed over the entire substrate surface so as to cover the gate electrode 41e and the storage capacitor line 69. An opening 411 for exposing a part of the storage capacitor line 69 is formed in the first gate insulating film 41b.

A second insulating film 41B made of a silicon nitride film having a thickness of 50 nm and a silicon oxide film having a thickness of 50 nm is formed on the first insulating film 41A. Here, the second insulating film 41B is formed so as to fill the opening 411 of the first insulating film 41A. The first insulating film 41A and the second insulating film 41B constitute a gate insulating film 41b of the selection transistor TRs. The insulating film of the storage capacitor Cs of this embodiment is composed of the second insulating film 41B in the opening 411, and is an insulating film thinner than the gate insulating film 41b.
An oxide semiconductor material made of a-IGZO having a thickness of 100 nm is provided as a semiconductor layer 41a at a position overlapping the gate electrode 41e on the surface of the second insulating film 41B.

  On the second insulating film 41B, a source electrode 41c and a drain electrode 41d made of 300 nm thick aluminum (Al) are provided so as to partially overlap the gate electrode 41e and the semiconductor layer 41a, respectively. The source electrode 41c and the drain electrode 41d are formed so as to partially run over the semiconductor layer 41a. Similarly, one electrode 10 a of the storage capacitor Cs made of aluminum (Al) having a thickness of 300 nm is formed on the storage capacitor line 69. One electrode 10a of the storage capacitor Cs is connected to the drain electrode 41d.

  A first composed of a silicon oxide film having a thickness of 100 nm and a silicon nitride film having a thickness of 300 nm is formed on the second insulating film 41B so as to cover one electrode 10a of the source electrode 41c, the drain electrode 41d, and the storage capacitor Cs. A protective film 42 is provided. A second protective film 43 made of acrylic having a thickness of 1 nm is further provided on the first protective film 42. The second protective film 43 functions as a planarizing film.

  A pixel electrode 35 made of ITO having a thickness of 50 nm is formed on the second protective film 43. The pixel electrode 35 is connected to the lower drain electrode 41 d through a contact hole H penetrating the first protective film 42 and the second protective film 43.

  On the other hand, the counter substrate 31 is provided with a common electrode 37 (counter electrode) made of ITO having a thickness of 100 nm on a transparent substrate made of PET. Here, in the case of the configuration of the element substrate 30 described above, the film thickness of the insulating film of the storage capacitor Cs is as thin as 100 nm.

  It is a normal configuration that the first insulating film 41A and the second insulating film 41B are not used, and the gate insulating film 41b and the insulating film 45 of the storage capacitor Cs are used as a single insulating film as shown in FIG. It is. At the time of writing, the gate electrode 41e of the selection transistor TRs is applied with a voltage that combines the voltage for driving the electro-optic material (a voltage 2Va that is twice as large as Va) and the threshold voltage Vth of the selection transistor TRs to turn on the selection transistor. Therefore, the gate insulating film 41b needs to have a sufficient thickness to increase the breakdown voltage. On the other hand, only ± Va is applied to the insulating film 45 of the storage capacitor Cs. For this reason, the thickness of the insulating film 45 on the side of the storage capacitor Cs can be reduced originally, but in the case of the above-described configuration, it can function as the gate insulating film 41b and cannot be reduced. Therefore, when a single-layer insulating film serving as the gate insulating film 41b and the insulating film 45 of the storage capacitor Cs is used, the thickness cannot be reduced.

  In the present embodiment, the gate insulating film 41b of the selection transistor TRs has a two-layer structure of a first insulating film 41A and a second insulating film 41B, but the insulating film 45 of the storage capacitor Cs is only the second insulating film 41B. It has become. In the case of the conventional configuration, the thickness of the two-layer gate insulating film is 300 nm. On the other hand, in the configuration of this embodiment, since the insulating film 45 of the storage capacitor Cs is 100 nm, the storage capacitor Cs can be increased about three times compared to the conventional configuration.

  The opening 411 of the first insulating film 41 </ b> A is located on the storage capacitor line 69 and the opening end 411 a is formed so as to partially run on the storage capacitor line 69. If the entire storage capacitor line 69 is covered only with the second insulating film 41B, dielectric breakdown is likely to occur. However, the first insulating film 41A and the second insulating film 41B are stacked on the edge (peripheral portion) of the storage capacitor line 69. This prevents such dielectric breakdown from occurring.

  Note that the opening 411 of the first insulating film 41 </ b> A may be formed with a size that exposes the entire storage capacitor line 69. That is, when the storage capacitor line 69 is covered only with the second insulating film 41B, the dielectric breakdown can be reduced by making the etching shape of the storage capacitor line 69 tapered.

  In addition, since the oxide semiconductor is easily reduced by hydrogen or the like, the insulating film in contact with the oxide semiconductor is preferably an oxide film. Therefore, in the present embodiment, portions of the second insulating film 41B and the first protective film 42 that are in contact with the semiconductor layer 41a are formed of an oxide film.

Next, the effect of reducing the power consumption of the electrophoretic display device will be described.
FIG. 9A shows an enlarged electrophoretic material of an equivalent circuit of one pixel in the electrophoretic display device. FIG. 9B is an equivalent circuit diagram of FIG.
In a normal electro-optical device, the power consumption increases when the capacity is increased, but in the case of an electrophoretic display device using an electrophoretic material, the power consumption decreases.
As shown in FIG. 9A, the electrophoretic material is a microcapsule in which white charge particles 27, black charge particles 36 and dispersion medium 21 charged in reverse polarity are enclosed in an adhesive material called a binder 23. A plurality of 20 are held. The microcapsule 20 is sandwiched between the common electrode 37 and the pixel electrode 35, and one or more microcapsules 20 are arranged in one pixel 40. Then, the white charged particles 27 and the black charged particles 26 move to perform black and white display.

  As shown in FIG. 9B, in the equivalent circuit of the electrophoretic element 32, the capacitance component, the variable resistance R1 due to the current generated by the movement of the charged particles, and the constant resistance component R2 due to the leakage component of the binder 23 and the solution are included. Have. Here, charge movement (current) occurs during the movement of the charged particles, but no charge movement (current flows) after the movement is completed, so that the variable resistance is adopted.

  Due to these resistance components, a leak occurs in the holding period (one field period) after writing when the active matrix operation of the electrophoretic display device 100 is performed, and the voltage applied during the writing period to the electrophoretic element 32 leaks. Decreases. This is shown in FIG.

FIG. 10 shows a change in voltage applied during the writing period for the electrophoretic element.
In FIG. 10, there was a 5V drop from 15V to 10V during one field of 80 msec. Due to this decrease, the voltage for moving the charged particles necessary for rewriting the display is insufficient, and the moving speed of the charged particles is reduced, which causes a problem that a long time is required for rewriting. Therefore, rewriting is performed a plurality of times, for example, in the configuration using the element shown in FIG. The reason why the moving speed decreases as the voltage decreases can be easily understood from the fact that the force applied to the charged particles by the electric field is proportional to the electric field. Furthermore, there is a case where the charge necessary for moving the charged particles disappears in one writing, and rewriting cannot be performed.

In the present embodiment, since the holding capacity is about three times, the voltage decrease amount is about 1/3, and the number of rewrites can be reduced from the conventional four times to one or two times. Most of the power consumption of the electrophoretic display device 100 is the power for charging and discharging the capacity of the source line, as in a general active matrix display device, and is proportional to the number of rewrites. That is, the power consumption could be reduced from 1/2 to 1/4. At this time, after rewriting, the voltage applied to the scanning line 66 and the data line 68 was cut off, and the image was held.
The above reduction in power consumption is effective in an optical apparatus using an electrophoretic element that can hold a display image without rewriting after rewriting the display image. A liquid crystal display device that continuously applies a voltage when performing display cannot reduce power consumption. On the contrary, it tends to increase by the increase of the storage capacity.

Next, a method for manufacturing the electrophoretic display device 100 of this embodiment will be described.
11 and 12 are partial cross-sectional views illustrating the manufacturing process of the electrophoretic display device 100. FIG.

  As shown in FIG. 11A, 300 nm of aluminum (Al) is formed on the entire surface of a base material 30A made of a 0.6 mm thick glass substrate by sputtering, and the gate electrode 41e and the storage capacitor are formed by photoetching. Line 69 is formed.

  As shown in FIG. 11B, a silicon nitride film having a thickness of about 200 nm is formed on the entire surface by plasma CVD, and a part thereof is selectively etched by photoetching so that the storage capacitor line 69 is partially exposed. Then, an opening 411 is formed. In this way, the first insulating film 41A is formed.

As shown in FIG. 11C, on the first insulating film 41A, a second insulating film 41B is formed by forming a 50 nm thick silicon nitride film and a 50 nm thick silicon oxide film in this order. It is formed. At this time, the second insulating film 41B is formed by plasma CVD so as to fill the opening 411 of the first insulating film 41A.
The first insulating film 41A and the second insulating film 41B constitute a gate insulating film 41b of the selection transistor TRs, and the second insulating film 41B constitutes an insulating film of the storage capacitor Cs. Therefore, the insulating film of the storage capacitor Cs is thinner than the gate insulating film 41b of the selection transistor TRs.
The first insulating film 41A and the second insulating film 41B are stacked on the peripheral edge of the one electrode 10a of the storage capacitor Cs to prevent dielectric breakdown.

  In general, a film obtained by a plasma CVD method has hydrogen in an atomic ratio of the order of% and can easily reduce the oxide semiconductor layer. Therefore, the oxide semiconductor layer is formed so as to be sandwiched between oxides.

  As shown in FIG. 11D, a semiconductor layer 41a made of a-IGZO and having a thickness of 100 nm is formed on the entire surface of the second insulating film 41B by sputtering, and a part of the gate electrode 41e is partially formed by a photoetching process. Processed into an island to leave. It is known that the source and drain regions of an oxide semiconductor are naturally formed without introducing impurities. Also in this embodiment, impurities are not introduced. Further, the formation of the second insulating film 41B and the semiconductor layer 41a is not necessarily a continuous film formation in a vacuum as in the case of amorphous silicon.

  As shown in FIG. 12E, an aluminum (Al) film is formed on the entire surface of the second insulating film 41B by a sputtering method to a thickness of 300 nm, and the aluminum film is patterned by a photoetching method, thereby forming a gate. A source electrode 41c and a drain electrode 41d were formed on the electrode 41e side, and one electrode 69a of the storage capacitor was formed on the storage capacitor line 69 side.

  As shown in FIG. 12F, the second insulating film 41B is made of a silicon oxide film having a thickness of 100 nm and a silicon nitride film having a thickness of 300 nm so as to cover the source electrode 41c, the drain electrode 41d, and the electrode 69a. The first protective film 42 was formed by a plasma CVD method. Thereafter, the first protective film 42 was partially exposed and developed to form a through hole 11a that partially exposed the drain electrode 41d.

  As shown in FIG. 12G, a second protective film 43 is formed by applying photosensitive acryl having a thickness of 1 μm on the first protective film 42 by spin coating. Thereafter, the second protective film 43 is partially exposed and developed to form a through hole 11b that exposes part of the drain electrode 41d, and the acrylic in the through hole 11a is removed using the second protective film 43 as a mask. To complete the contact hole H.

As shown in FIG. 12H, an ITO film having a thickness of 50 nm was formed on the entire surface of the second protective film 43 by a sputtering method, and was patterned by a photoetching method to form a pixel electrode 35.
Although not shown, the electrophoretic display device 100 is completed by pasting the TFT substrate 30 and the counter substrate 31 to which the electrophoretic sheet is pasted.

  Although the electrophoretic display device 100 can be formed by the method described above, in this manufacturing method, the opening 411 is provided in the first insulating film 41A on the storage capacitor line 69, and the insulating film in the storage capacitor C is used as the second insulating film. That is, only 41B is used, which is thinner than the gate insulating film of the TFT (the entire thickness of the first insulating film 41A and the second insulating film 41B). Further, this method can be applied to a bottom gate type TFT, and can also be applied to an amorphous silicon TFT.

  In this example, the same 385 dpi electrophoretic display device as in the previous embodiment was prototyped. The holding capacity was about 3 times 1200 fF, and the TFT size was L / W = 4/7 μm. (TFT W = 7 μm is the limit of the performance of the batch exposure machine, because if it is made smaller than this, the dimensional variation will increase.) With this configuration, there will be no uneven display of intermediate gradations, and uniform 16 gradation display will be achieved. Realized.

  In addition, the member which comprises each in this embodiment does not stick to the above. As the element substrate 30 and the counter substrate 31, an organic material other than PET or an inorganic material other than glass may be used. The source electrode 41c, the drain electrode 41d, and the gate electrode 41e may be made of a metal other than Al or an organic material. As the semiconductor material, oxide semiconductors such as AGZO, ZnO, and AZO other than a-IGZO, organic semiconductor materials, and inorganic materials such as hydrogenated amorphous and polycrystalline silicon may be used. For the various insulating films, inorganic insulating materials or organic insulating materials other than those described above may be used.

A film thickness other than the above may also be used.
The manufacturing method is not limited to plasma CVD, sputtering, or photo etching. An application method such as ink jet may be used.

The gate insulating film 41b of the TFT may be composed of two or more layers. The insulating film of the storage capacitor Cs at that time is constituted by using a part of them.
Moreover, the insulating films 41A and 41B of the gate insulating film 41b composed of a plurality of layers may be formed at a lower temperature, for example, as the insulating film is formed later.
Further, the second protective film 43 is not always necessary. If the surface (surface on which the pixel electrode 35 is formed) can be planarized by the first protective film 42, the second protective film 43 may be omitted.

  Although the bottom gate structure TFT is used in the above embodiment, the same structure can be used when a top gate structure TFT is used. The gate insulating film 41b is a first insulating film 41A and a second insulating film 41B. First, the first insulating film 41A is formed on the entire surface of the substrate, and the first insulating film 41A in the region for forming the storage capacitor Cs is partially etched. Then, an opening 411 is formed. Thereafter, a second insulating film 41B is formed. With this configuration, the gate insulating film 41b of the TFT has a two-layer structure of the first insulating film 41A and the second insulating film 41B, and the insulating film of the storage capacitor Cs becomes one layer of the second insulating film 41B.

  As described above, the preferred embodiments according to the present invention have been described with reference to the accompanying drawings, but the present invention is not limited to the examples. It is obvious for those skilled in the art that various changes or modifications can be conceived within the scope of the technical idea described in the claims. It is understood that it belongs to.

For example, in the previous embodiment, the gate insulating film 41b has a two-layer structure, but it may have a structure of three or more layers. In this case, an insulating film having a smaller number than the total number of the plurality of insulating films constituting the gate insulating film 41b is stacked on the electrode 10a of the storage capacitor Cs to form an insulating film of the storage capacitor Cs.
Although the capsule-type electrophoretic element 32 is used in FIG. 7, other applications are possible. For example, a partition wall may be formed between a pair of substrates, and the electrophoretic element may be sealed in a space formed by the pair of substrates and the partition wall.

(Electronics)
Next, a case where the electrophoretic display device 100 of each of the above embodiments is applied to an electronic device will be described.
FIG. 13 is a perspective view illustrating a specific example of an electronic apparatus to which the electrophoretic display device 100 of the present invention is applied.
FIG. 13A is a perspective view illustrating an electronic book which is an example of the electronic apparatus. The electronic book 1000 includes a book-shaped frame 1001, a cover 1002 that can be rotated (openable and closable) with respect to the frame 1001, an operation unit 1003, and the electrophoretic display device of the present invention. Display unit 1004.

  FIG. 13B is a perspective view illustrating a wrist watch that is an example of an electronic apparatus. The wristwatch 1100 includes a display unit 1101 configured by the electrophoretic display device of the present invention.

  FIG. 13C is a perspective view illustrating an electronic paper which is an example of the electronic apparatus. This electronic paper 1200 includes a main body portion 1201 formed of a rewritable sheet having the same texture and flexibility as paper, and a display portion 1202 formed of an electrophoretic display device of the present invention.

For example, electronic books, electronic papers, and the like are supposed to be used for repeatedly writing characters on a white background, and therefore it is necessary to eliminate afterimages at the time of erasure and afterimages over time.
Note that the range of electronic devices to which the electrophoretic display device of the present invention can be applied is not limited to this, and includes a wide range of devices that utilize changes in visual color tone accompanying the movement of charged particles.

  According to the electronic book 1000, the wristwatch 1100, and the electronic paper 1200 described above, since the electrophoretic display device according to the present invention is employed, the electronic apparatus includes a display unit with low power consumption.

  In addition, said electronic device illustrates the electronic device which concerns on this invention, Comprising: The technical scope of this invention is not limited. For example, the electrophoretic display device according to the present invention can be suitably used for a display portion of an electronic device such as a mobile phone or a portable audio device.

100 Electrophoretic Display Device, Cs Retention Capacitor (Capacitor), H Contact Hole, L Channel Region, 10a Electrode, 10b Electrode, 26 Charged Particles, 27 Charged Particles, 30 Element Substrate, 32 Electrophoretic Element, 34b Interlayer Insulating Film, 35 Pixel electrode, 41A First insulating film, 41B Second insulating film, 41a Semiconductor layer, 41b Gate insulating film, 41d Drain electrode, 41e Gate electrode, 42 First protective film, 43 Second protective film, 66 Scan line, 68 Data Line, 69 holding capacity line, Cs holding capacity, 100 electrophoretic display device, 411 opening, TRs selection transistor, 1000 electronic book (electronic device), 1100 wristwatch (electronic device), 1200 electronic paper (electronic device)

Claims (12)

An electrophoretic element is sandwiched between the first substrate and the second substrate,
On the surface of the first substrate on the side of the electrophoretic element,
A plurality of scanning lines and a plurality of data lines extending in directions intersecting each other;
A select transistor connected to the scan line and the data line;
A pixel electrode connected to the selection transistor;
A capacitor having one electrode connected to the selection transistor and the pixel electrode;
The electrophoretic display device, wherein the insulating film of the capacitor is thinner than the thickness of the gate insulating film of the selection transistor. The gate insulating film comprises a plurality of interlayer insulating films laminated,
2. The electrophoretic display device according to claim 1, wherein the insulating film of the capacitor is constituted by an insulating film having a number smaller than the total number of interlayer insulating films of the gate insulating film.   3. The electrophoretic display device according to claim 1, wherein the gate insulating film includes a first insulating film and a second insulating film, and the capacitor insulating film includes the second insulating film. .   The electrophoretic display device according to claim 3, wherein the first insulating film and the second insulating film are stacked at a peripheral portion of one electrode of the capacitor.   5. The electrophoretic display device according to claim 3, wherein an opening for exposing at least a part of one electrode of the capacitor is formed in the first insulating film. 6. A semiconductor layer of the selection transistor is an oxide semiconductor layer;
6. The electrophoretic display device according to claim 1, wherein the insulating film in contact with the semiconductor layer is made of an oxide. A plurality of scanning lines and a plurality of data lines extending between the first substrate and the second substrate and extending in a direction intersecting each other on the surface of the first substrate on the side of the electrophoresis element. A selection transistor connected to the scanning line and the data line, a pixel electrode connected to the selection transistor, and a capacitor having one electrode connected to the selection transistor and the pixel electrode, A method of manufacturing an electrophoretic display device in which an insulating film of a capacitor is thinner than a thickness of a gate insulating film of the selection transistor,
An electrode forming step of forming a gate electrode and one electrode of the capacitor on the element substrate;
An insulating film forming step for forming the gate insulating film and the insulating film of the capacitor;
A method of manufacturing an electrophoretic display device, wherein the thickness of the insulating film of the capacitor is formed thinner than the thickness of the gate insulating film. In the insulating film forming step,
A plurality of interlayer insulating films are stacked on the gate electrode to form the gate insulating film,
8. The electricity according to claim 7, wherein an insulating film having a number smaller than the total number of the interlayer insulating films of the gate insulating film is formed on one of the electrodes of the capacitor to form the insulating film of the capacitor. Manufacturing method of electrophoretic display device.   9. The electrophoresis according to claim 7, wherein the gate insulating film is formed by laminating a first insulating film and a second insulating film, and the insulating film of the capacitor is formed by the second insulating film. Manufacturing method of display device.   10. The method of manufacturing an electrophoretic display device according to claim 9, wherein the first insulating film and the second insulating film are laminated on a peripheral portion of one of the electrodes of the capacitor. In the insulating film forming step,
After forming the first insulating film on one of the electrodes of the gate electrode and the capacitor, an opening for exposing a part of the one electrode of the capacitor is formed in the first insulating film. The manufacturing method of the electrophoretic display device according to claim 9 or 10.   An electronic apparatus comprising the electrophoretic display device according to claim 1.

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