JP2011139181A - Solid-state imaging device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a solid-state imaging device capable of reducing a margin without depending on a variation between and among pixels, improving the accuracy of determination associated with the occurrence of a black level depression phenomenon, and suppressing the lowering of a dynamic range. <P>SOLUTION: A difference circuit 29 performs difference processing on a reset signal or a pixel signal after initializing a charge retention unit and an optical signal or a pixel signal after transferring a signal charge to the charge retention unit for each pixel. A variation detection circuit 25 detects a variation value in a reset signal for each pixel. A correction determining circuit 28 compares the variation value with a predetermined threshold. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a solid-state imaging device such as a digital still camera or a digital video camera using a solid-state imaging device.

  In recent years, the performance improvement of MOS type solid-state imaging devices capable of on-chip peripheral circuits has been remarkable and has been spreading. In a MOS type solid-state imaging device, a plurality of transistors such as an amplification transistor and a reset transistor are provided for each pixel in addition to a photoelectric conversion element. However, variations in transistor threshold values for each pixel and kTC noise (thermal noise) at reset ) Causes fixed pattern noise and random noise in the image. In order to remove these noises, processing (difference processing) is performed in which the difference between the reset level immediately after resetting the pixel and the signal level based on the signal charge accumulated in the photoelectric conversion element is obtained. In a solid-state imaging device that performs this difference processing, a problem called a black sun phenomenon occurs.

  Hereinafter, the black sun phenomenon will be described with reference to FIGS. FIG. 11 shows a configuration in the pixel. The signal charge accumulated in the photoelectric conversion element PD is transferred to the charge holding unit FD, and a signal based on the signal charge accumulated in the charge holding unit FD is output to the vertical signal line through the amplification transistor and the selection transistor.

  FIG. 12 (a) shows the dependence of the reset level and signal level on the amount of light. In FIG. 12, the vertical axis indicating the signal level indicates the direction changed by the incidence of light as the + direction. As shown in FIG. 12 (a), the optical signal Vs output from the amplification transistor includes a signal generated by photoelectric conversion and a reset signal Vr at a reset level. Therefore, by subtracting the reset signal Vr from the optical signal Vs (difference processing), a signal Vs−Vr generated by photoelectric conversion is obtained.

  FIG. 12 (b) shows the light quantity dependency of Vs−Vr. Since the optical signal Vs is saturated when the incident light intensity is stronger than B (Vssat level in FIG. 12 (a)), Vs-Vr is also saturated and has a constant value (Vsat of FIG. 12 (b)). Level). The level of the reset signal Vr is constant even if the optical signal Vs is saturated (the level of Vr1 in the figure), but if the stronger light is incident and the incident light intensity is stronger than C, the reset signal Vr Will increase. Therefore, Vs-Vr becomes small, and this becomes a black sun phenomenon.

  The increase in the reset signal Vr described above occurs because a light leak noise signal is added to the reset signal at the input portion of the amplification transistor due to light leakage when very strong light is incident on the photoelectric conversion element. This is shown in FIG. This state is a state in which the amount of incident light is stronger than C in FIG. 12, and the difference processing result Vs−Vr decreases. When the level of the reset signal Vr reaches the saturation level due to the light leak noise signal (at the time of the light amount E in FIG. 12), the difference processing result Vs−Vr becomes 0.

  When such a black sun phenomenon occurs, for example, when the sun is photographed, as shown in FIG. 13 (a), the central portion of the sun becomes a black dot, resulting in an unnatural image. FIG. 13 (b) shows a conceptual diagram in which the brightness in the region 130 including the sun corresponds to the light quantity in FIG. 12 (b) in FIG. 13 (a). A to E in FIG. 13B represent the light amounts A to E in FIG. In this way, when strong light is incident, generally the amount of light in the periphery of the area where the light is incident gradually decreases, so the image has a donut whose level changes around the area where the strong light is incident. The pattern looks like a shape.

  As a method for suppressing the black sun phenomenon, Patent Document 1 discloses that the absolute value of the reset level is detected and a predetermined voltage is output as a reset level output when it is determined that the black sun phenomenon has occurred. ing.

JP 2000-287131 A

  The prior art provides a threshold corresponding to the original reset level or saturation level, and determines whether or not the black sun phenomenon has occurred depending on whether or not the detected reset level exceeds the threshold. Since there are variations in the circuits and pixels that perform this determination, an error occurs in the determination result. Therefore, in order to compensate for this error, a margin must be provided for the threshold of the reset level or the saturation level, and there is a problem that the dynamic range of the final output is reduced by this margin.

  This problem will be described with reference to FIGS. 12 (a) and 12 (c). In FIG. 12A, it is assumed that the level Vref is a detection level for detecting the output fluctuation of the reset level. In the prior art, the detection of the output fluctuation at the reset level is performed only once. This level Vref is set to include a certain margin (Vref-Vr1 in FIG. 12A) in consideration of the above-described variation. In this case, if the amount of light exceeds D, it is determined that the black sun phenomenon has occurred, and for example, correction is performed so that the signal level after the difference processing surely exceeds the saturation level. The light quantity dependency of Vs-Vr has characteristics as shown in FIG. 12C, and when the light quantity is C to D, a black sun phenomenon occurs.

  Therefore, the difference processing result Vs−Vr is clipped at the level Vb in FIG. Therefore, the dynamic range is reduced by the threshold margin with respect to the original saturation level Vsat. In order to reduce the degradation of the dynamic range, it is necessary to reduce the margin provided in the threshold value. However, conventionally, it is necessary to set the margin in consideration of the variation between pixels. was there.

  The present invention has been made in view of the above-described problems, and can reduce the margin without depending on the variation between pixels, improve the accuracy of determination related to the occurrence of the black sun phenomenon, and It is an object of the present invention to provide a solid-state imaging device that can reduce a decrease in dynamic range.

  The present invention has been made to solve the above-described problem, and is a photoelectric conversion unit that converts incident light into signal charge and stores it, a charge holding unit that holds the signal charge, and a photoelectric conversion unit that stores the signal charge. A transfer unit that transfers the signal charge to the charge holding unit, an amplification unit that amplifies the signal charge held in the charge holding unit and outputs it as a pixel signal, and a reset unit that initializes the potential of the charge holding unit A pixel portion in which pixels including the pixel signal are arranged in a two-dimensional manner, a reset signal that is the pixel signal after the charge holding portion is initialized, and the pixel signal after the signal charge is transferred to the charge holding portion A difference processing unit that performs a difference process with respect to an optical signal for each pixel and generates an imaging signal of the pixel, a detection unit that detects a variation value of the reset signal for each pixel, and the variation value as a predetermined threshold value A comparison unit for comparing with A solid-state imaging device, characterized by.

  In the solid-state imaging device according to the present invention, the detection unit samples the reset signal a plurality of times, and detects the variation value from a level difference between signals obtained by sampling.

  In addition, the solid-state imaging device of the present invention further includes a correction unit that corrects the reset signal or the imaging signal for each pixel based on the detection result of the variation value.

  The solid-state imaging device of the present invention further includes a determination unit that determines whether or not the reset signal is saturated, and the correction unit determines that the reset signal is saturated when the reset signal is saturated. The reset signal or the imaging signal is corrected.

  In addition, the solid-state imaging device of the present invention further includes a storage unit that stores the reset signal, and sequentially outputs the reset signal from the pixels for each row, and stores the reset signal in the storage unit. All pixels in a predetermined area are exposed simultaneously, and after the exposure, the optical signal is sequentially output from the pixel for each row, and a difference process between the optical signal and the reset signal stored in the storage unit is performed. Thus, the imaging signal is generated.

  According to the present invention, it is possible to detect the black sun phenomenon by detecting the fluctuation value of the reset signal for each pixel and comparing the detected fluctuation value with a predetermined threshold value. As a result, there is no need to consider the variation between pixels for the margin included in the predetermined threshold, so that the margin can be reduced, the accuracy of determination relating to the occurrence of the black sun phenomenon can be improved, and the dynamic range can be improved. Can be reduced.

1 is a block diagram showing a configuration of a solid-state imaging device according to a first embodiment of the present invention. FIG. 2 is a circuit diagram illustrating a configuration of a pixel included in the solid-state imaging device according to the first embodiment of the present invention. 3 is a timing chart showing the operation of the solid-state imaging device according to the first embodiment of the present invention. 3 is a timing chart showing the operation of the solid-state imaging device according to the first embodiment of the present invention. 6 is a timing chart for explaining another determination method according to the first embodiment of the present invention. FIG. 5 is a block diagram showing a configuration of a solid-state imaging device according to a second embodiment of the present invention. 6 is a timing chart showing the operation of the solid-state imaging device according to the second embodiment of the present invention. FIG. 6 is a block diagram showing a configuration of a solid-state imaging device according to a third embodiment of the present invention. FIG. 6 is a circuit diagram illustrating a configuration of a pixel included in a solid-state imaging device according to a third embodiment of the present invention. 10 is a timing chart showing the operation of the solid-state imaging device according to the third embodiment of the present invention. It is a circuit diagram which shows the structure of a pixel. It is a graph which shows the characteristic of the signal output with respect to light quantity. It is a reference diagram showing an image when the black sun phenomenon occurs.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(First embodiment)
First, a first embodiment of the present invention will be described. FIG. 1 shows the configuration of the solid-state imaging device according to the present embodiment. The solid-state imaging device shown in FIG. 1 has a pixel unit 101 in which a plurality of pixels 10 for acquiring image information are arranged in a two-dimensional matrix. Here, in order to simplify the description, a case where the pixels 10 are arranged in 2 rows and 2 columns will be described as an example. FIG. 2 shows a detailed configuration of the pixel 10.

  The photodiode PD is a photoelectric conversion element that converts incident light into signal charges (photoelectric conversion) and accumulates the signal charges. The amplification transistor M4 is a transistor for holding a signal charge generated in the photodiode PD by a PN junction capacitance, a gate capacitance, etc., converting the charge to voltage, amplifying it, and outputting a pixel signal. The gate terminal of the amplification transistor M4 is an input section. Hereinafter, the input part of the amplification transistor M4 is referred to as a charge holding part FD. The signal charge generated in the photodiode PD is held in the charge holding unit FD. The transfer transistor M2 is a transistor for transferring the signal charge generated in the photodiode PD to the charge holding unit FD. The reset transistor M3 is a transistor for resetting (initializing) the potential of the charge holding unit FD. The selection transistor M5 is a transistor for outputting the pixel signal, which is the output of the amplification transistor M4, to the vertical signal line 11. Here, light is shielded except for the photodiode PD.

  The pixel power supply VDD supplies power to all pixels in common, and is electrically connected to the drain terminal of the amplification transistor M4 and the drain terminal of the reset transistor M3. A reset pulse ΦRS for controlling the reset operation is applied to the gate terminal of the reset transistor M3. A transfer pulse ΦTR for controlling the transfer operation is applied to the gate terminal of the transfer transistor M2. A selection pulse ΦSE for controlling the selection operation is applied to the gate terminal of the selection transistor M5. The reset pulse ΦRS, the transfer pulse ΦTR, and the selection pulse ΦSE are supplied for each row from the vertical scanning circuit 12 in FIG. With such a pixel configuration, a photoelectric conversion function, a reset function, an amplification read function, and a selection function are realized.

  Hereinafter, another configuration shown in FIG. 1 will be described. The vertical scanning circuit 12 is a control circuit that outputs control signals (reset pulse ΦRS, transfer pulse ΦTR, selection pulse ΦSE) necessary for driving each pixel 10. This control signal is supplied to the unit pixel 10 for each row via the signal lines 13-1, 14-1, 15-1, 13-2, 14-2, and 15-2. A vertical signal line 11 is provided for each column.

  The vertical signal line 11 of each column is connected to switches 16-1, 16-2, 16-3. The switches 16-1, 16-2, and 16-3 are switches that can be turned on and off by control signals Φ20-1, Φ20-2, and Φ20-3, respectively. The switches 16-1, 16-2, 16-3 are connected to the memories 17-1, 17-2, 17-3, respectively. The memories 17-1, 17-2, and 17-3 are light signals based on signals output from the pixels 10 in each column (reset signal when the charge holding unit FD is reset and signal charges accumulated in the photodiode PD). Signal) temporarily.

  The memories 17-1, 17-2, and 17-3 are connected to horizontal selection switches 18-1, 18-2, and 18-3, respectively. The horizontal selection switches 18-1, 18-2, and 18-3 are switches that can be switched on and off. The horizontal selection switches 18-1, 18-2, 18-3 in the first row are controlled by the control signal ΦH-1, and the horizontal selection switches 18-1, 18-2, 18-3 in the second row are controlled by the control signal ΦH. Controlled by -2. The horizontal selection switches 18-1, 18-2, 18-3 are connected to the horizontal signal lines 21, 22, 23, respectively. The horizontal scanning circuit 24 is a control circuit that outputs control signals ΦH-1 and ΦH-2 for controlling output of signals to the horizontal signal lines 21, 22, and 23.

  In each pixel 10, a reset signal which is a pixel output immediately after resetting the charge holding unit FD is transmitted to the memory 17-1 or the memory 17-2 via the vertical signal line 11 and the switches 16-1 and 16-2. Thus, the time after resetting the charge holding unit FD is output at different timings. The reset signals stored in the memories 17-1 and 17-2 are output to the horizontal signal lines 21 and 22 in a column order via the horizontal selection switches 18-1 and 18-2.

  The fluctuation value detection circuit 25 outputs a signal obtained by calculating the difference between two reset signals (SigR1, SigR2) output to the horizontal signal lines 21 and 22 at different timings. The output signal of the fluctuation value detection circuit 25 indicates the fluctuation value of the reset signal. Further, the fluctuation value detection circuit 25 also performs amplification of a signal obtained by taking the difference between the two reset signals (SigR1, SigR2) as necessary. The output amplifier 26 amplifies and outputs the reset signal (SigR2) output to the horizontal signal line 22.

  In each pixel 10, the optical signal that is the pixel output immediately after the signal charge generated in the photodiode PD is transferred to the charge holding unit FD is output to the memory 17-3 via the vertical signal line 11 and the switch 16-3. The The optical signals stored in the memory 17-3 are output to the horizontal signal line 23 in a column order via the horizontal selection switch 18-3. The output amplifier 27 amplifies and outputs the optical signal (Sig3) output to the horizontal signal line 23.

  The correction determination circuit 28 is a circuit that determines the necessity of correction due to the occurrence of a black sun phenomenon by comparing the level of the output signal of the fluctuation value detection circuit 25 with a predetermined threshold value. When the level of the output signal of the fluctuation value detection circuit 25 exceeds the threshold value, it is determined that correction is necessary. The difference circuit 29 is a circuit that outputs a signal (imaging signal) obtained by taking a difference between the reset signal output through the output amplifiers 26 and 27 and the optical signal in order to remove noise included in the optical signal.

  The correction circuit 30 is a circuit that corrects and outputs the output signal of the difference circuit 29 so that the level becomes equal to or higher than the saturation level when the correction determination circuit 28 determines that correction is necessary. When the correction determination circuit 28 determines that there is no need for correction, the correction circuit 30 outputs the output signal of the difference circuit 29 as it is. The output signal of the correction circuit 30 becomes an imaging signal. The determination by the correction determination circuit 28, the difference processing by the difference circuit 29, and the correction processing by the correction circuit 30 are performed in units of signals for each pixel.

  Next, operations of the solid-state imaging device (driving, black sun phenomenon determination method, and correction method) will be described with reference to a timing chart shown in FIG. 3 shows reset pulses ΦRS-1 and ΦRS-2, transfer pulses ΦTR-1 and ΦTR-2, selection pulses ΦSE-1 and ΦSE-2, and control signals Φ20-1, Φ20-2, and Φ20-3 in FIG. And a timing chart of the control signals ΦH-1 and ΦH-2, the reset signal, and the optical signal (SigR1, SigR2, Sig3). FIG. 4 shows the selection pulse ΦSE-1, the reset pulse ΦRS-1, and the transfer pulse ΦTR-1 extracted from FIG. 3, and further describes the potential change of the charge holding unit FD.

  Hereinafter, an operation related to the pixels 10 in the first row in FIG. 1 will be described. The operation of other lines is the same as that of the first line.

  In FIG. 4, first, the selection pulse ΦSE-1 rises during the horizontal blanking (HBL) period, and the selection transistor M5 is turned on (time I). Thereby, signal output from the pixel 10 to the vertical signal line 11 is possible. Subsequently, the reset pulse ΦRS-1 rises, the reset transistor M3 is turned on, and the potential of the charge holding unit FD is set to VDD (time II). Subsequently, the reset pulse ΦRS-1 falls, and the reset transistor M3 is turned off (time III). At this time, as shown in FIG. 4, the potential of the charge holding unit FD is somewhat lowered to a certain voltage level. This voltage level is a constant value (Vrs_nml in FIG. 4) even when time passes in a state where the black sun phenomenon does not occur. A period in which the potential of the charge holding portion FD is Vrs_nml is represented by a period from time IV to time V in FIG. However, in the state where the black sun phenomenon has occurred, the potential of the charge holding portion FD after the reset transistor M3 is turned off gradually decreases in the period of time IV to V, and thus does not become constant at Vrs_nml.

  During this period of time IV to V, the switch 16-1 is turned on by the control signal Φ20-1, and the first reset signal is stored in the memory 17-1 (first sampling). Subsequently, the switch 16-2 is turned on by the control signal Φ20-2, and the second reset signal is stored in the memory 17-2 (second sampling). Subsequently, the transfer pulse ΦTR-1 rises and the transfer transistor M2 is turned on (time V). As a result, the signal charge that has been photoelectrically converted by the photodiode PD and accumulated is transferred to the charge holding unit FD, and the voltage of the charge holding unit FD decreases according to the amount of the charge. After the transfer of the signal charge from the photodiode PD to the charge holding unit FD is completed, the transfer pulse ΦTR-1 falls and the transfer transistor M2 is turned off (time VI).

  After the transfer transistor M2 is turned off, the voltage of the charge holding unit FD decreases somewhat, and then becomes a constant value (optical signal level). The period in which the voltage of the charge holding unit FD is maintained at the optical signal level is represented by the period from time VII to VIII in FIG. During this period, the switch 16-3 is turned on by the control signal Φ20-3, and the optical signal is stored in the memory 17-3. Subsequently, the selection pulse ΦSE-1 falls (time VIII). Subsequently, the control signals ΦH-1 and ΦH-2 are sequentially output from the horizontal scanning circuit 24 to the horizontal selection switches 18-1, 18-2, and 18-3 in the first and second columns, and the first reset is performed. The signal (SigR1), the second reset signal (SigR2), and the optical signal (Sig3) are output to the horizontal signal lines 21, 22, and 23, respectively.

  The fluctuation value detection circuit 25 outputs a difference value between two reset signals sampled at different timings, that is, a fluctuation value. The correction determination circuit 28 compares the fluctuation value with a predetermined threshold value to determine whether correction due to the occurrence of a black sun phenomenon is necessary, and outputs a control signal indicating whether correction is performed or not to the correction circuit 30. To do. The optical signal Sig3 output to the horizontal signal line 23 is amplified by the output amplifier 27 and output to the difference circuit 29. At the same time, the reset signal SigR2 output to the horizontal signal line 22 is amplified by the output amplifier 26 and output to the difference circuit 29. The difference circuit 29 performs a difference process between the optical signal Sig3 and the reset signal SigR2, extracts only the imaging signal, and outputs this imaging signal to the correction circuit 30. The correction circuit 30 performs black sun correction based on the determination result in the correction determination circuit 28 described above, and then outputs the imaging signal after black sun correction to the subsequent stage.

  In the present embodiment, the reset level is sampled a plurality of times within the period from time V to VI in FIG. Here, in order to simplify the description, the case where sampling is performed twice has been described. Accordingly, the number of memories, the number of switches, the number of output amplifiers, and the like in FIG. 1 can vary depending on the number of samplings.

  Hereinafter, as a modification, a determination method in the case of performing sampling three times will be described. As shown in FIG. 5, sampling is performed at times L, M, and N within a period corresponding to the period of time IV to V in FIG. 4, and the level of the reset signal sampled at each time is expressed as Vl, Vm, and Vn. To do. When sampling is performed at these three points L, M, and N, Vl> Vm = Vn may be satisfied. Therefore, the fluctuation value detection circuit 25 outputs the fluctuation values Vl-Vm and Vm-Vn, and the correction judgment circuit 28 blacks out when either of the fluctuation values Vl-Vm or Vm-Vn is a positive value. It is determined that correction is necessary due to the occurrence of the phenomenon.

  As described above, when sampling is performed twice, Vm = Vn may be obtained as a result of sampling at times M and N in FIG. Even if the black sun phenomenon has occurred and Vl> Vm = Vn, there is a possibility that an erroneous determination may be made if the determination is made from the results of sampling twice at times M and N. However, determination accuracy can be improved by performing sampling three times as described above. The number of samplings is not limited to two or three, but may be four or more.

  As described above, according to the present embodiment, it is possible to determine whether or not the black sun phenomenon has occurred by comparing the variation value of the reset signal for each pixel with a predetermined threshold value. Each reset signal contains a noise component that is unique to each pixel due to variations between pixels, but by obtaining a variation value that is the difference between reset signals sampled at different timings, the noise component due to variations between pixels Can be reduced. Accordingly, since it is not necessary to consider the variation between pixels in the threshold setting when performing the determination related to occurrence of the black sun phenomenon, the threshold margin used for the determination is reduced, and the accuracy of the determination relating to the occurrence of the black sun phenomenon is reduced. Can be improved. Furthermore, it is possible to perform black sun correction by reducing a decrease in dynamic range.

  Further, by performing the reset signal sampling a plurality of times and comparing the fluctuation values a plurality of times, it is possible to further improve the accuracy of the determination relating to the occurrence of the black sun phenomenon.

  In the present embodiment, the fluctuation value detection circuit 25, the difference circuit 29, the correction determination circuit 28, and the correction circuit 30 are common to all columns, but these may be provided for each column or for each of a plurality of columns. Good.

(Second embodiment)
Next, a second embodiment of the present invention will be described. FIG. 6 shows the configuration of the solid-state imaging device according to the present embodiment. The reset signal saturation determination circuit 31 is provided, and the correction determination circuit 28 is the same as the solid-state imaging device according to the first embodiment except that the determination result output from the reset signal saturation determination circuit 31 is used. The reset signal saturation determination circuit 31 determines whether or not the reset signal is saturated. The correction determination circuit 28 determines whether or not correction is necessary due to the occurrence of the black sun phenomenon based on the variation value from the variation value detection circuit 25 and the determination result from the reset signal saturation determination circuit 31.

  FIG. 7 is the same as FIG. 4 with respect to the reset pulse ΦRS-1, the transfer pulse ΦTR-1, and the selection pulse ΦSE-1, and can be immediately accommodated in the charge holding unit FD immediately after the potential of the charge holding unit FD is reset. This corresponds to the case where a large amount of light that saturates the charge is incident on the solid-state imaging device. In this case, as shown in FIG. 7, the potential of the charge holding unit FD may converge to the lowest potential during the period of time IV to V.

  In this case, even if the determination is made only with the variation value of the reset signal, it is determined that the black sun phenomenon does not occur (no correction is necessary) because the reset signal does not vary. Therefore, in addition to the fluctuation value of the reset signal, by adding the determination result of whether the reset signal is saturated or not, the black sun phenomenon occurs even though the black sun phenomenon has occurred. It is possible to appropriately perform the black sun correction without erroneously determining that it has not occurred. The reset signal saturation determination circuit 31 determines that the reset signal is saturated when the level of the output signal of the output amplifier 26 falls below a predetermined threshold.

  The correction determination circuit 28 performs determination as follows. First, the correction determination circuit 28 compares the fluctuation value with a predetermined threshold value to determine whether correction due to the occurrence of a black sun phenomenon is necessary. When the variation value exceeds the threshold value, the correction determination circuit 28 determines that correction is necessary. When the variation value does not exceed the threshold value, the correction determination circuit 28 determines whether correction due to the occurrence of the black sun phenomenon is necessary based on the determination result from the reset signal saturation determination circuit 31. When the reset signal is saturated, the correction determination circuit 28 determines that correction is necessary. If the reset signal is not saturated, the correction determination circuit 28 determines that no correction is necessary.

  As described above, according to the present embodiment, it is possible to determine whether or not the black sun phenomenon has occurred from the variation value for each pixel and the determination result of whether or not the reset signal is saturated. Become. Accordingly, since it is not necessary to consider the variation between pixels in the threshold setting when performing the determination related to occurrence of the black sun phenomenon, the threshold margin used for the determination is reduced, and the accuracy of the determination relating to the occurrence of the black sun phenomenon is reduced. Can be improved. Furthermore, it is possible to perform black sun correction by reducing a decrease in dynamic range.

  Also in this embodiment, as in the first embodiment, the fluctuation value detection circuit 25, the difference circuit 29, the correction determination circuit 28, and the correction circuit 30 are common to all columns, but these are for each column. Or you may provide for every several columns.

(Third embodiment)
Next, a third embodiment of the present invention will be described. This embodiment is applied to the case where the charge holding unit FD is used as an in-pixel memory and a global shutter operation is performed with the same exposure period for all pixels.

  FIG. 8 shows the configuration of the solid-state imaging device according to the present embodiment. The solid-state imaging device shown in FIG. 8 includes a pixel unit 102 in which a plurality of pixels 40 are arranged in a two-dimensional matrix. Here, in order to simplify the description, a case where the pixels 40 are arranged in 3 rows and 3 columns will be described as an example. FIG. 9 shows a detailed configuration of the pixel 40.

  The pixel 40 is obtained by adding a reset transistor M6 for resetting the photodiode PD and a pixel power supply VDD2 for generating a reset potential to the configuration of the pixel 10 of the first embodiment and the second embodiment. is there. The reset transistor M6 is controlled by a reset pulse ΦRS_PD from the vertical scanning circuit 12.

  Hereinafter, another configuration illustrated in FIG. 8 will be described. 8, the same components as those illustrated in FIG. 1 are denoted by the same reference numerals, and the description thereof is omitted. In FIG. 8, signal lines for outputting control signals (reset pulse ΦRS, transfer pulse ΦTR, selection pulse ΦSE, reset pulse ΦRS_PD) necessary for driving each pixel 40 from the vertical scanning circuit 12 are collectively referred to as a signal line 13.

  The vertical signal line 11 of each column is connected to switches 280-1 and 280-2. The switches 280-1 and 280-2 are switches that can be turned on and off by control signals Φ50-1 and Φ50-2, respectively. The switches 280-1 and 280-2 are connected to the memories 41-1 and 41-2, respectively. The memories 41-1 and 41-2 temporarily receive signals output from the pixels 40 in each column (reset signals when the charge holding unit FD is reset and optical signals based on the signal charges accumulated in the photodiode PD). It is a memory that holds it automatically.

  The memories 41-1 and 41-2 are connected to the horizontal selection switches 150-1 and 150-2, respectively. The horizontal selection switches 150-1 and 150-2 are switches that can be switched on and off. The horizontal selection switches 150-1 and 150-2 in the first column are controlled by control signals ΦH-1 and ΦH-11, and the horizontal selection switches 150-1 and 150-2 in the second column are controlled by signals ΦH-2 and ΦH. The horizontal selection switches 150-1 and 150-2 in the third column are controlled by control signals ΦH-3 and ΦH-33. The horizontal selection switches 150-1 and 150-2 are connected to horizontal signal lines 190 and 200, respectively. The horizontal scanning circuit 42 outputs control signals ΦH-1, ΦH-11, ΦH-2, ΦH-22, ΦH-3, and ΦH-33 for controlling the output of signals to the horizontal signal lines 190 and 200. It is a control circuit.

  In each pixel 10, a reset signal which is a pixel output immediately after resetting the charge holding unit FD is transmitted to the memory 41-1 or the memory 41-2 via the vertical signal line 11 and the switches 280-1 and 280-2. Thus, the time after resetting the charge holding unit FD is output at different timings. The reset signals stored in the memory 41-1 and the memory 41-2 are output to the horizontal signal lines 190 and 200 in column order via the horizontal selection switches 150-1 and 150-2.

  In each pixel 10, an optical signal that is a pixel output immediately after the signal charge generated in the photodiode PD is transferred to the charge holding unit FD is sent to the memory 41-2 via the vertical signal line 11 and the switch 280-2. Is output. The optical signals stored in the memory 41-2 are output to the horizontal signal line 200 in column order via the horizontal selection switch 150-2.

  The fluctuation value detection circuit 32 outputs a signal obtained by taking a difference between two reset signals (Sig1, Sig2) output to the horizontal signal lines 190, 200 at different timings. Further, the fluctuation value detection circuit 32 also performs amplification of a signal obtained by taking the difference between the two reset signals (Sig1, Sig2) as necessary.

  The reset signal saturation determination circuit 38 determines whether or not the reset signal (Sig2) output to the horizontal signal line 200 is saturated. The correction determination circuit 33 determines the necessity of correction due to the occurrence of the black sun phenomenon based on the variation value from the variation value detection circuit 32 and the determination result from the reset signal saturation determination circuit. The determination method performed by the correction determination circuit 33 is the same as in the second embodiment.

  The ADC 39 is an AD converter that performs A-D conversion (analog-digital conversion) on the reset signal and the optical signal (Sig2) output to the horizontal signal line 200. The correction circuit 34 is a circuit that, when the correction determination circuit 33 determines that correction is necessary, corrects and outputs the reset signal output from the ADC 39 so that the level becomes equal to or higher than the saturation level. When the correction determination circuit 33 determines that correction is not necessary, the correction circuit 34 outputs the reset signal as it is.

  The frame memory 36 is a memory that temporarily holds the reset signal output from the correction circuit 34. The adder 37 is a circuit that outputs a signal obtained by subtracting the reset signal read from the frame memory 36 from the optical signal output from the ADC 39 in order to remove noise included in the optical signal. The output signal of the adder 37 becomes an imaging signal. The determination by the reset signal saturation determination circuit 38, the determination by the correction determination circuit 33, the correction processing by the correction circuit 34, and the subtraction by the adder 37 are performed in units of signals for each pixel.

  Next, the operation of the solid-state imaging device will be described using the timing chart shown in FIG. First, the PD reset pulse ΦRS_PD of all rows rises, and the reset transistor M6 is turned on. As a result, the photodiodes PD of all the pixels are reset. Subsequently, the selection pulse ΦSEL-1 rises and the selection transistor M5 is turned on. As a result, the pixels in the first row are selected.

  Subsequently, the FD reset pulse ΦRS-1 rises, the reset transistor M3 is turned on, and the charge holding unit FD is reset. Subsequently, the control signals Φ50-1, Φ50-2 are output to the switches 280-1, 280-2 in this order, and the memory 41-1, The reset signal is stored in 41-2. Subsequently, when the selection pulse ΦSEL-1 falls and the selection transistor M5 is turned off, the state where the pixels in the first row are selected ends.

  Subsequently, pulses are sequentially output from the horizontal scanning circuit 42 to the switches 150-1 and 150-2 in the order of the control signals ΦH-1, ΦH-11, ΦH-2, ΦH-22, ΦH-3, and ΦH-33. Then, two reset signals are output from the memories 41-1 and 41-2 to the horizontal signal lines 190 and 200, respectively, in column order. These reset signals (Sig1, Sig2) are output to the fluctuation value detection circuit 32, and the fluctuation value detection circuit 32 detects the fluctuation value of the reset signal from the signal obtained by taking the difference between them, and the result is the correction determination circuit 33. Is output. At the same time, one reset signal (Sig2) is output to the reset signal saturation determination circuit 38. In the reset signal saturation determination circuit 38, it is determined whether or not the reset signal is saturated, and the determination result is the correction determination circuit 33. Is output.

  The correction determination circuit 33 determines whether or not to perform correction due to the occurrence of the black sun phenomenon based on the fluctuation value of the reset signal and the determination result of whether or not the reset signal is saturated. The result of determination by the correction determination circuit 33 is output to the correction circuit 34. At the same time, one reset signal is AD-converted by the ADC circuit 39. Based on the result of determination by the correction determination circuit 33, the correction circuit 34 corrects this reset signal, and the corrected reset signal is stored in the frame memory. Stored in 36. Here, when it is determined that the black sun phenomenon has occurred and correction is necessary, the reset signal is corrected to a signal level that does not cause the black sun phenomenon and is stored in the frame memory 36. If it is determined that the black sun phenomenon has not occurred and correction is not necessary, the reset signal is not corrected and is stored in the frame memory 36 as it is.

  The same operation is repeated for the pixels in the second and third rows, and reset signals for all the pixels are stored in the frame memory 36. Subsequently, the PD reset pulse ΦRS-PD of all rows falls and the reset transistor M6 is turned off, so that the reset of the photodiode PD of all the pixels is completed and the exposure to the photodiode PD of all the pixels is started. .

  When the desired exposure period elapses, the transfer pulse ΦTX of all rows rises, the signal charges generated by the exposure by the photodiode PD are transferred to the charge holding unit FD in all pixels, and the exposure ends. Subsequently, the PD reset pulse ΦRS-PD for all rows rises, and the reset transistor M6 is turned on. As a result, the photodiodes PD of all the pixels are reset. Subsequently, the selection pulse ΦSEL-1 rises and the selection transistor M5 is turned on. As a result, the pixels in the first row are selected.

  In this state, the control signal Φ50-2 is output to the switch 280-2, and the optical signal is stored in the memory 41-2. Subsequently, when the selection pulse ΦSEL-1 falls and the selection transistor M5 is turned off, the state where the pixels in the first row are selected ends. Subsequently, pulses are output in the order of the control signals ΦH-11, ΦH-22, and ΦH-33 from the horizontal scanning circuit 42 to the switch 150-2 in the column order, and the optical signals are output from the memory 41-2 to the horizontal signal line in the column order. Output to 200.

  The optical signal output to the horizontal signal line 200 is A / D converted by the ADC 39 and output to the adder 37. In the adder 37, the reset signal stored in the frame memory 36 described above is subtracted from the optical signal, and the imaging signal is extracted. Thereafter, the same operation as the first line is performed for the second line. For the third row, after the operation of the second row is completed, the same operation as that of the first and second rows is performed, and imaging signals for all pixels are acquired.

  As described above, according to the present embodiment, when the charge holding unit FD is used as an in-pixel memory and the global shutter operation is performed with the same exposure period for all the pixels, the first and second embodiments are also used. Similarly, it is possible to perform black sun correction by reducing a decrease in dynamic range.

  In the present embodiment, the fluctuation value detection circuit 32, the ADC 39, the correction determination circuit 33, and the correction circuit 34 are common to all the pixel columns. However, some or all of these may be provided for each column. In this embodiment, in order to reset the photodiode PD, the reset transistor M6 dedicated for resetting the photodiode PD is provided. However, the reset transistor M6 is not provided, and the transfer transistor M2 and the reset transistor M3 are simultaneously turned on. Thus, the present invention is also applicable to a pixel that resets the photodiode PD.

  As described above, the embodiments of the present invention have been described in detail with reference to the drawings. However, the specific configuration is not limited to the above-described embodiments, and includes design changes and the like without departing from the gist of the present invention. .

  10,40 ... pixel, 12 ... vertical scanning circuit, 16-1,16-2,16-3,280-1,280-2 ... switch, 17-1,17-2,17-3,41- 1,41-2 ... Memory, 18-1, 18-2, 18-3, 150-1, 150-2 ... Horizontal selection switch, 25, 32 ... Fluctuation value detection circuit (detection unit), 26 , 27 ... Output amplifier, 28, 33 ... Correction determination circuit (comparison unit), 29 ... Difference circuit (difference processing unit), 30, 34 ... Correction circuit (correction unit), 31, 38 ... Reset signal saturation determination circuit (determination unit), 34 ... ADC, 36 ... Frame memory (storage unit), 37 ... Adder (difference processing unit), 24,42 ... Horizontal scanning Circuit, 101, 102 ... Pixel part, M2 ... Transfer transistor (transfer part), M3 ... Reset transistor (reset part), M4 ... Amplification transistor (amplification part), M5 ... Selection transistor, M6 ... Reset transistor, PD ... Photodiode (photoelectric converter), FD Charge holding portion

Claims (5)

A photoelectric conversion unit that converts incident light into signal charge and stores it, a charge holding unit that holds the signal charge, a transfer unit that transfers the signal charge stored in the photoelectric conversion unit to the charge holding unit, and the charge holding An amplifying unit that amplifies the signal charge held in the unit and outputs it as a pixel signal, and a pixel unit in which pixels including a reset unit that initializes the electric potential of the charge holding unit are two-dimensionally arranged,
Difference processing between the reset signal that is the pixel signal after initialization of the charge holding unit and the optical signal that is the pixel signal after transferring the signal charge to the charge holding unit is performed for each pixel, and A difference processing unit that generates an imaging signal of the pixel;
A detection unit for detecting a variation value of the reset signal for each pixel;
A comparison unit for comparing the fluctuation value with a predetermined threshold;
A solid-state imaging device.   The solid-state imaging device according to claim 1, wherein the detection unit samples the reset signal a plurality of times, and detects the variation value from a level difference between signals obtained by sampling.   The solid-state imaging device according to claim 1, further comprising a correction unit that corrects the reset signal or the imaging signal for each pixel based on the detection result of the variation value. A determination unit for determining whether or not the reset signal is saturated;
The solid-state imaging device according to claim 3, wherein the correction unit corrects the reset signal or the imaging signal when it is determined that the reset signal is saturated. A storage unit for storing the reset signal;
The reset signal is sequentially output from the pixel for each row, and after the reset signal is stored in the storage unit, exposure is simultaneously performed on all pixels in a predetermined region, and the optical signal is output from the pixel to the row after the exposure. 5. The imaging signal is generated by sequentially outputting the image signal and performing a difference process between the optical signal and the reset signal stored in the storage unit. Solid-state imaging device.