JP2020057883A - Imaging apparatus - Google Patents

Abstract

To provide an imaging apparatus that includes an AD conversion circuit for each column and that allows for materialization of low power consumption without affecting image quality.SOLUTION: The imaging apparatus includes: a pixel portion in which a plurality of unit pixels including photoelectric conversion elements are arranged in a matrix; a plurality of vertical signal lines that are arranged corresponding to a pixel column and transmit pixel signals; a reference signal generation unit that can generate a first reference signal not changing with time, and a second reference signal of which the voltage changes with a predetermined slope with time; and a plurality of AD conversion circuits arranged corresponding to the vertical signal lines, and compare a signal from the pixel with a second reference voltage and convert the signal into a digital signal, and when a signal that changes according to the amount of light incident on the photoelectric conversion element is denoted as a first pixel signal, the AD conversion circuit performs a determination operation of comparing the first reference signal with the first pixel signal, and switches whether to perform the AD conversion using the second reference signal according to the result of the determination operation.SELECTED DRAWING: Figure 4

Description

  The present invention relates to an imaging device.

  2. Description of the Related Art Imaging devices such as digital video cameras and digital still cameras are generally supplied with power from a battery, and electronic components mounted on the imaging device have low power consumption in order to realize long-time shooting with the imaging device. It is desired. A main electronic component mounted on an imaging device includes an imaging device that converts light into an electric signal. As a typical image pickup device, a CMOS image sensor is known. 2. Description of the Related Art A CMOS image sensor in recent years generally has a configuration in which an AD signal provided from a plurality of pixels arranged in a matrix is subjected to AD conversion by an AD conversion circuit provided for each column.

  As an example of the AD conversion circuit, a configuration of an AD conversion circuit arranged for each column including a comparator and a counter circuit and a reference signal generation circuit that generates a reference signal that changes with a certain gradient with time can be considered. In the AD conversion period, the counter starts counting at the same time when the pixel signal and the reference signal are input to the comparator. The comparator outputs an inverted signal at a timing when the pixel signal and the reference signal that changes with time match, and the counter circuit receives the inverted signal of the comparator and stops the counting operation. The count value at this time is treated as a digital signal.

  The following proposals have been made regarding the reduction of power consumption in a CMOS image sensor equipped with such an AD conversion circuit.

  One has a circuit capable of power saving (hereinafter, PSAVE) for stopping or reducing the power supply of at least a part of the AD conversion circuit of each column independently. It has been proposed to PSAVE the AD conversion circuit in the column after the timing when the signal and the reference signal match (Patent Document 1).

  Further, in the AD conversion, after performing the first AD conversion with the first reference signal in one signal, the first reference signal is more accurate in the vicinity of the signal obtained by the first AD conversion than the first reference signal. There is a method of performing the second A / D conversion using the second reference signal.

  In order to reduce the power consumption in this drive, considering the gamma curve at the time of JPEG conversion, the second AD conversion is performed without performing the second AD conversion at a black level or below or near the saturation where the gradient of the gamma curve is sufficiently small. A drive that performs at least a part of PSAVE of the AD conversion circuit during the conversion period has been proposed (Patent Document 2).

  Here, when the AD conversion using the reference signal that changes from the black level to the saturation level is considered, the saturation signal is disadvantageous in power consumption because the counter continues to operate during the AD conversion period.

JP 2009-159271 A JP 2014-138364 A

  In the driving described in Patent Literature 1, for example, when an image including a large number of saturation signals is acquired, power consumption is hardly reduced. In the drive described in Patent Document 2, although there is no problem in JPEG recording, a camera having a function capable of recording a RAW image allows a user to JPEG develop an acquired RAW image with an arbitrary gamma curve. Therefore, depending on the gamma curve at that time, the gradation near the black level or near the saturation becomes coarse, which is not preferable for the user.

  Therefore, an object of the present invention is to provide an imaging device capable of driving with low power consumption without affecting image quality.

In order to achieve the above object, an imaging device according to the present invention includes:
A pixel portion in which a plurality of unit pixels including the photoelectric conversion elements are arranged in a matrix, a plurality of vertical signal lines transmitting pixel signals arranged corresponding to the pixel columns, and a first reference signal that does not change with time. A reference signal generating unit capable of generating a second reference signal whose voltage changes at a predetermined gradient with time, a signal from the pixel and the second reference voltage arranged corresponding to the vertical signal line And a plurality of A / D conversion circuits for performing a comparison with the A / D converter and converting the signals into digital signals. When a signal that changes according to the amount of light incident on the photoelectric conversion element is set as a first pixel signal, the A / D conversion circuit A determination operation for comparing the first reference signal with the first pixel signal, and switching whether or not to perform the AD conversion using the second reference signal according to a result of the determination operation. I do.

  Advantageous Effects of Invention According to the present invention, in an imaging apparatus including an AD conversion circuit for each column, by reducing the power of an unnecessary imaging element circuit, it is possible to efficiently reduce power consumption without affecting image quality. Equipment can be provided.

Schematic configuration diagram of the imaging device Equivalent circuit diagram of image sensor Equivalent circuit diagram of image sensor pixel section Explanatory drawing of the driving method when the S signal potential is higher than the threshold potential in the first embodiment Explanatory drawing of the driving method when the S signal potential is lower than the threshold potential in the first embodiment Explanatory drawing of the method for determining the threshold potential in the first embodiment Simplified diagram of an image sensor in Embodiment 2. Explanatory drawing of the method for determining the threshold potential in the second embodiment Explanatory drawing of the method for determining the threshold potential in the third embodiment

  Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

(Imaging system)
FIG. 1 is a block diagram showing an example of an imaging system according to the present invention. In FIG. 1, reference numeral 101 denotes a lens unit that forms an optical image of a subject on the image sensor 105, and zoom control, focus control, aperture control, and the like are performed by a lens driving device 102. Reference numeral 103 denotes a mechanical shutter, which is controlled by shutter control means 104. Reference numeral 105 denotes an image sensor for capturing a subject formed by the lens unit 101 as an image signal, and reference numeral 106 denotes a temperature sensor for detecting the temperature of the image sensor 105.

  Reference numeral 107 denotes an image signal signal which performs OB clamp processing for determining a black level using a light-shielded pixel described later, digital gain processing for increasing the gain, various corrections, data compression, and the like for the image signal output from the image sensor 105. Circuit. Reference numeral 108 denotes a timing generation circuit that is a driving unit that outputs various timing signals to the imaging element 105 and the imaging signal processing circuit 107. Reference numeral 110 denotes a control circuit that controls various operations and the entire imaging device. Reference numeral 109 temporarily stores image data. It is a memory for Reference numeral 111 denotes an interface for recording or reading on a recording medium, reference numeral 112 denotes a detachable recording medium such as a semiconductor memory for recording or reading image data, and reference numeral 113 denotes a display unit for displaying various information and captured images. .

  Next, the operation of the digital camera at the time of shooting in the above configuration will be described.

  When the main power supply is turned on, the power supply of the control system is turned on, and the power supply of the imaging system circuit such as the imaging signal processing circuit 107 is also turned on.

  Then, when a release button (not shown) is pressed, a shooting operation is started. When the photographing operation is completed, the image signal output from the image sensor 105 is subjected to correction of the image sensor output and image processing by the photographing signal processing circuit 107, and is written into the memory according to an instruction from the control circuit 110. The data stored in the memory 109 passes through the recording medium control I / F unit 111 under the control of the control circuit 110 and is recorded on a removable recording medium 112 such as a semiconductor memory.

  Further, the image may be processed by being directly input to a computer or the like through an external I / F unit (not shown).

(Equivalent circuit diagram of imaging device)
Next, the configuration of the image sensor 105 according to the first embodiment will be described in detail with reference to FIG. FIG. 2 shows an equivalent circuit diagram of the image sensor. In FIG. 2, only one unit pixel and a readout circuit associated with the unit pixel are shown for simplicity. However, originally, the unit pixels are arranged in a matrix in a matrix, and the readout circuit is constituted in each unit pixel column. You. A readout circuit formed in each unit pixel column is indicated by a broken line, and is hereinafter referred to as a column circuit.

  Reference numeral 201 denotes a unit pixel, which includes a microlens (hereinafter, ML), a photodiode (hereinafter, PD), a floating diffusion (hereinafter, FD), and the like. The detailed configuration of the unit pixel will be described later.

  The vertical scanning circuit 202 supplies a drive signal (PRES, PTX, PSEL) to each pixel on a row-by-row basis.

  The signal of each pixel is transmitted to a subsequent circuit via a vertical signal line 203 arranged for each unit pixel column, and a constant current circuit 204 is connected to each vertical signal line 203 as shown in the figure.

  The column signal 205 is connected to the vertical signal line 203. The column amplifier 205 has a function of amplifying the signal transmitted to the vertical signal line 203, but is not always necessary and need not be provided. Further, the amplifier may function as a gain amplifier that can apply a plurality of analog gains.

  Reference numeral 206 denotes a comparator provided corresponding to each column. The comparator 206 receives a pixel signal and a ramp signal VRAMP supplied from the DAC circuit 207 which fluctuates with a certain slope, and compares the two signals. The comparator 206 has a function of outputting a low level when the voltage of the pixel signal is lower than the ramp signal VRAMP, and outputting a high level when the voltage of the pixel signal is higher than the ramp signal VRAMP. A counter 208 performs a count operation during the AD conversion period based on the input reference clock CLK, stops the count operation when the output signal of the comparator 212 changes from low to high, and holds the value. I do. The value held by the counter 208 is output from the output circuit 210. The output signal of the output circuit 210 is input to the imaging signal processing circuit 106 shown in FIG.

  Reference numeral 209 denotes a PSAVE circuit to which an output signal of the comparator 206 and an external signal PJ input from the timing generator 108 are input. When the output signal of the comparator 206 is Low at the timing when the signal PJ falls, the PSAVE circuit 209 resets the count value of the counter 208 to a saturation value, and stops the counting operation of the counter 208 during the subsequent period. Has a function of bringing the unit 206 into the PSAVE state. The comparator that has been PSAVE is returned from PSAVE by a signal that is input by the timing generator 108 at the start of reading of the next row.

(Equivalent circuit diagram of unit pixel section)
Next, the unit pixel will be described in detail with reference to FIG.

  The unit pixel includes one ML (not shown), one PD, one FD, and four transistors.

  Reference numeral 301 denotes a PD, which performs photoelectric conversion. The transistor 302 is a transfer switch, and transfers the charge photoelectrically converted by the PD 301 to the FD 303. The FD 303 has a function of converting transferred charges to a potential. The transistor 304 forms a source follower amplifier together with a constant current source connected to the vertical signal line. The transistor 302 is driven by the signal PTX. The FD 303 is connected to the potential VDD through the transistor 306 driven by the signal PRES. When the PRES becomes Hi, the FD 303 is reset to the potential VDD. The transistor 305 is driven by the signal PSEL and serves as a switch for transmitting the output of the transistor 304 to a vertical signal line.

(Drive method when S signal potential is higher than threshold potential (S signal is lower than threshold signal))
Next, a read driving method of the image sensor in the above circuit configuration will be described.

  FIG. 4 shows a timing chart for reading a signal of each pixel after exposure for a predetermined period, a graph showing the output potential VC of the column amplifier 205 and a potential VRAMP output from the DAC 207, and a graph showing the count value of the counter. I have.

  Prior to the read driving, all the pixels are collectively reset and accumulation is performed for a predetermined period. After that, PSEL is set to Hi, and the signal of the selected row is output to the vertical signal line 203. In addition, PRES is set to Hi, and the FD 303 is reset by the potential VDD. Next, at time t401, PRES is set to Low, and the reset of the FD 303 is released. The signal at this time has a different value each time it is reset, and becomes noise. This is called reset noise. Since the reset noise affects the image quality, the VC potential (hereinafter, referred to as N signal) after reset release needs to be read in order to perform correlated double sampling later. During a period from time t402 to time t403, the DAC 207 outputs the RAMP signal and performs AD conversion of the N signal. The counter 208 counts down from the timing when the AD conversion is started until VC and VRAMP match and the output signal of the comparator 212 is inverted, and stops counting when the output signal of the comparator 212 is inverted. , Hold the value at that time.

  Next, in a period from time t404 to time t405, the signal PTX becomes Hi, and the electric charge accumulated in the PD is transferred in addition to the FD in which the reset noise is held. The signal at this time is referred to as an S signal.

  Next, it is determined whether or not the potential VC corresponding to the S signal is lower than a certain threshold potential (Vth) during a period from time t406 to t407. During a period from time t406 to t407, the signal PJ becomes Hi. VRAMP controlled by the DAC 207 becomes Vth, and VC and Vth are compared. Here, a case where the potential VC corresponding to the S signal is higher than Vth is shown. As a result of the comparison, since the potential VC is higher than Vth, the comparator output becomes Hi. Since the output of the comparator is Hi at the falling timing of the signal PJ, the PSAVE circuit 209 does not function.

  Next, in a period from time t408 to t409, the DAC 207 outputs a RAMP signal and performs AD conversion of the potential VC according to the S signal. The counter 208 counts up from when the AD conversion is started until VC and VRAMP match and the output signal of the comparator 212 is inverted. When the output signal of the comparator 212 is inverted, the counter 208 stops counting. , Hold the value at that time. AD conversion ends when VRAMP reaches the threshold potential Vth. At this time, since the N signal is down-counted and the potential VC corresponding to the S signal is AD-converted by up-counting, the count value obtained by AD conversion of the S signal is a signal from which the reset signal is removed, and the reset signal is reset. The signal is a signal from which noise has been removed (hereinafter, an SN signal).

(Drive method when S signal potential is lower than threshold potential (S signal is higher than threshold signal))
The read driving method described with reference to FIG. 4 is for the case where the potential VC of the S signal is higher than the threshold potential Vth. Here, the case where the potential VC of the S signal is lower than the threshold potential Vth will be described with reference to FIG. I do.

  The drive from time t501 to t505 in FIG. 5 is the same as the drive from time t401 to t405 in FIG.

  Next, it is determined whether or not the potential VC of the S signal is lower than a certain threshold potential (Vth) during a period from time t506 to t507. During a period from time t506 to t507, the signal PJ becomes Hi. VRAMP controlled by the DAC 207 becomes Vth, and VC and Vth are compared. Here, a case where the potential VC of the S signal is lower than Vth is shown. As a result of the comparison, since the potential VC is lower than Vth, the output of the comparator becomes Low. Since the comparator output becomes low at the falling timing of the signal PJ, the PSAVE circuit 209 functions. Specifically, the PSAVE circuit 209 has a function of resetting the count value of the counter 208 to a saturation value, stopping the count operation of the counter 208, and setting the comparator 206 to the PSAVE state.

  Thus, after time t507, a saturated value can be obtained while reducing the power consumption by the counting operation of the counter 208 and the power consumption by the comparator.

  As described above, according to the relationship between the potential VC of the S signal and the threshold potential Vth, all the pixel signals can be read by performing the read driving method described with reference to FIGS.

(About threshold potential Vth)
Here, the concept of how to determine the threshold potential Vth in the driving method described with reference to FIGS. 4 and 5 will be described with reference to FIG.

  FIG. 6 shows the relationship between the AD conversion range and the image signal range. For example, in a camera, there is a scene in which a digital gain is applied to an image signal output from the image sensor 105 for increasing sensitivity represented by ISO sensitivity or performing various corrections. This digital gain is set to N times. The AD conversion range performed by the image sensor is 10 bits, and the signal range of the RAW image output by the camera is also 10 bits. Here, consider a signal in which strong light impinges on the image sensor and becomes saturated in the AD conversion range. Assuming that the digital gain N is doubled, even if 10-bit AD conversion is performed in the image sensor, the digital gain is doubled, so that the upper half of the AD conversion range hits saturation and information is not used. Become. This means that about half of the power consumed for AD conversion of the S signal is wasted. In this embodiment, by setting the threshold potential Vth to 1 / N of the A / D conversion range, it is possible to determine whether or not saturation occurs after digital gain before performing A / D conversion of the S signal, thereby consuming without affecting image quality. The power can be reduced.

  In this embodiment, a counter is provided for each column, and the A / D conversion of the N signal is down-counted and the A / D conversion of the S signal is up-counted. However, the present invention is not limited to this. For example, a digital memory may be provided for each column, and an AD conversion result of the N signal and the S signal may be stored in the digital memory and then subtracted to perform correlated double sampling to obtain an SN signal. Alternatively, the counter may be common to each column, and a latch circuit may be provided for each column to latch the count value at the timing when the comparator is inverted. In this case, the column for which saturation is determined is subjected to PSAVE of at least one of the latch circuit and the comparator.

  As described above, the preferred embodiments of the present invention have been described, but the present invention is not limited to these embodiments, and various modifications and changes can be made within the scope of the gist.

  In the first embodiment, an example in which the threshold potential Vth is changed in accordance with the digital gain after AD conversion has been described. In the second embodiment, an example will be described in which the threshold potential Vth is changed according to the amount of dark current generated in the PD in addition to the digital gain. Here, only how to determine the threshold potential Vth, which is the difference from the first embodiment, and the portions that need to be described in more detail are described.

(Configuration of imaging device)
FIG. 7 is a diagram illustrating the configuration of the image sensor 101 according to the second embodiment. The image sensor 101 includes an aperture pixel unit 701, an OB pixel unit 702, and a NULL pixel unit 703. The aperture pixel unit 701 has the configuration shown in FIG. 3, and outputs a signal corresponding to the amount of light incident on the image sensor. The OB pixel portion 702 has a pixel configuration similar to that of the aperture pixel portion 701, but the PD is shielded from light by the wiring metal, and always outputs in the dark state regardless of the amount of incident light, and is used as a reference for the black level. The NULL pixel portion 703 has a pixel structure without a PD unlike the aperture pixel portion 701 and the OB pixel portion 702. Other transistors and the like are the same as the other pixel portions. Since the NULL pixel portion 703 does not have a PD, the signal does not change depending on the amount of incident light, and the dark current generated in the PD does not occur. Therefore, the amount of dark current generated in the PD can be determined from the difference between the output of the OB pixel unit 702 and the output of the NULL pixel unit 703.

  The reading of the image sensor is performed in a row-sequential manner from the NULL pixel portion to the aperture pixel portion.

(About threshold potential Vth)
FIG. 8 shows the details of each signal and the flow of signal processing. The vertical axis indicates the signal amount. The N signal is reset noise as described above. The S signal is composed of a dark current generated in the PD and a signal (hereinafter, an optical signal) generated by the amount of light incident on the PD, in addition to the reset noise. The SN signal consists of dark current and light signals, with reset noise removed by correlated double sampling. The optical signal is subjected to OB clamping by the image signal processing circuit 107. The OB clamp is a process of setting the signal of the OB pixel portion 702 to a black level (0), thereby removing a dark current component. After the OB clamp, only an optical signal is generated, a digital gain is applied to the optical signal, and an image signal is generated.

  At this time, the AD conversion is performed on the S signal, and the S signal includes a dark current. Since the dark current increases depending on the temperature and the accumulation time, in a high-temperature environment or when the accumulation time is long, the threshold potential Vth needs to be a value obtained by dividing the image signal range by the digital gain and adding the dark current. is there.

  At this time, the dark current is the difference between the OB pixel portion 702 and the NULL pixel portion 703 which are read before the opening pixel portion 701.

  By performing this driving, low-power-consumption driving that does not affect image quality can be performed regardless of shooting conditions and temperature environment.

  Note that the dark current is not limited to being obtained from the OB pixel unit 702 and the NULL pixel unit 703. For example, a table of the amount of dark current for the temperature, the accumulation time, or both is stored in advance, and the accumulation time, the temperature detection element 106 The threshold potential Vth may be changed depending on the detected temperature. In addition, the threshold voltage is changed according to the digital gain shown in the present embodiment and the threshold potential according to the dark current according to the temperature and the accumulation time or a combination thereof, and the threshold potential is changed according to the digital gain shown in the first embodiment. It is also possible to switch between driving and conventional driving.

  In the first and second embodiments, an example has been described in which it is determined whether or not the image signal is saturated before the A / D conversion of the S signal is performed. If it is determined that the S signal is saturated, the A / D conversion of the S signal is not performed. In the present embodiment, an application example in a mode (hereinafter, HDR mode) for acquiring an image having a wide dynamic range by synthesizing two images having different exposures, which is one of techniques for obtaining a wide dynamic range. explain.

  Here, an example is shown in which the exposure is made different by changing the accumulation time. However, the present invention is not limited to this, and may be applied to, for example, an HDR mode realized by an image sensor including low-sensitivity pixels and high-sensitivity pixels.

  FIG. 9 is a diagram showing the relationship between the dynamic range of the image sensor and the brightness of the subject. When the vertical axis represents the output of the image sensor and the horizontal axis represents the brightness of the subject, the line indicated by 901 is an output when the accumulation time is relatively long, and the line indicated by 902 is a case where the accumulation time is relatively short. Respectively are shown. Here, for example, when the photographer shoots a subject with a storage time of 901 with respect to a certain subject, a so-called overexposure occurs in which the high-luminance side hits with saturation.

  Therefore, in order to obtain a gradation of brightness saturated at 901, shooting was performed using an accumulation time shorter than 901 shown at 902, and a wide dynamic range was obtained by combining the images obtained at 901 and 902. Images can be obtained.

  Here, when considering the signal area used for the composite image, reference numeral 902 denotes a signal area larger than the signal (Lth) saturated in the accumulation time of 901. That is, a signal area smaller than Lth in the image signal 902 is not used for image synthesis, and thus it is not necessary to output a correct signal. In the present embodiment, attention is paid here, and in AD conversion of an image for obtaining a high-luminance gradation, the threshold potential is set to a potential VLth corresponding to Lth, and in comparison between VLth and the potential VC of the S signal, the potential VC becomes If the threshold value is higher than the threshold potential VLth (if the S signal is lower than the signal Lth), the count value of the counter 208 is reset to 0, and thereafter, the counting operation of the counter 208 is stopped, and the comparator 206 is set to the PSAVE state. Let it. By this driving, it is possible to reduce power consumption of the AD conversion circuit in an area not used for an image.

101 lens unit, 102 lens driving device,
103 mechanical shutter, 104 shutter control means,
105 imaging element 106 temperature detection element, 107 imaging signal processing circuit,
108 timing generation circuit, 109 memory, 110 control circuit,
111 interface, 112 recording medium, 113 display unit

Claims (6)

A pixel portion in which a plurality of unit pixels including the photoelectric conversion element are arranged in a matrix,
A plurality of vertical signal lines for transmitting pixel signals arranged corresponding to the pixel columns;
A reference signal generation unit that can generate a first reference signal that does not change with time and a second reference signal whose voltage changes with a predetermined slope with time;
A plurality of A / D conversion circuits arranged corresponding to the vertical signal lines, for comparing a signal from the pixel with the second reference voltage and converting the signal into a digital signal;
When a signal that changes according to the amount of light incident on the photoelectric conversion element is a first pixel signal, the AD conversion circuit performs a determination operation of comparing a first reference signal and the first pixel signal, A solid-state imaging device that switches whether to perform AD conversion using the second reference signal according to a result of a determination operation. The imaging apparatus further includes a signal processing circuit capable of multiplying the digital signal by a digital gain,
2. The imaging device according to claim 1, wherein the level of the first reference signal is changed according to the digital gain.   In the determination operation, when the first pixel signal is larger than the first reference signal, at least a part of the operation of the AD conversion circuit is stopped, or power supply is stopped, and the output digital signal is changed to an arbitrary value. The imaging device according to claim 1, wherein the value is a value. The imaging apparatus further includes a temperature detection element capable of detecting a temperature of the imaging element,
The imaging apparatus according to claim 1, wherein a level of the first reference signal changes according to a temperature detected by the temperature detection element. The imaging device further includes an exposure control unit,
The imaging apparatus according to claim 1, wherein the level of the first reference signal changes according to an exposure time controlled by the exposure control unit. A first pixel group including a unit pixel including a photoelectric conversion element, and a pixel having a configuration in which incident light enters the unit pixel;
A second pixel group including a pixel including a photoelectric conversion element and configured to block light so that incident light does not enter the unit pixel;
The pixel unit includes a third pixel group including unit pixels that do not include a photoelectric conversion element.
The imaging apparatus according to claim 1, wherein the level of the first reference signal changes according to a difference between an output of the second pixel group and an output of the third pixel group.