JP5627728B2 - Imaging apparatus and imaging system - Google Patents

Description

  The present invention relates to an imaging apparatus and an imaging system.

  In recent years, digital cameras with higher image quality and lower prices have become widespread due to advances in imaging devices. In particular, the performance of a CMOS sensor having an active element in a pixel and allowing peripheral circuits to be on-chip has been remarkably improved, and some CCD sensors have been replaced. A CMOS sensor has an active element for converting charge into an optical signal output for each pixel. However, variations in threshold values for each pixel and kTC noise (thermal noise) at reset are the causes of fixed pattern noise and random noise in an image. Become. In order to remove these noises, there has been proposed CDS (correlated double sampling) that reads out only an optical signal as an image signal by obtaining a difference between a reset noise output after reset and an output after charge transfer.

  Problems in the case of shooting using a CMOS sensor that performs CDS will be described below. When a very bright light source is reflected in the shooting area, strong light is also shined on the charge conversion portion in that place. As a result, the reset noise output fluctuates, and the dynamic range is compressed. As a result, a phenomenon occurs in which the output of the image signal is lowered at a pixel that has been exposed to strong light (hereinafter referred to as a decrease in the output of the image signal at high luminance). For example, when the sun is photographed, the central portion of the sun becomes a black dot, resulting in an unnatural image. This problem can be solved for still images by attaching a mechanical shutter. However, the combined use of a mechanical shutter at the time of moving image shooting is a great demerit in securing the exposure time and the frame speed, so that it is not feasible as a solution. In addition, even when shooting a still image, an inexpensive camera often omits the mechanical shutter, which causes this problem. In view of such a problem, a method for suppressing a decrease in output of an image signal at high luminance has been proposed.

  In Patent Document 1 below, it is proposed to detect an output fluctuation at the time of reset noise reading and write a predetermined value as a reset noise output when it is determined that the luminance is high. According to this proposal, at the time of reading the output after charge transfer, the output reduction preventing circuit for the image signal at high luminance is in a cut-off state and does not particularly affect the image.

JP 2000-287131 A

  However, when the luminance is high, the image area other than the pixel that has been exposed to strong light may be affected. FIG. 3 is an explanatory diagram of a conventional CMOS sensor. Reference numerals 301 to 303 denote unit pixel cells, which are two-dimensionally arranged. Reference numerals 304 and 305 denote constant current sources provided for each column, and constitute a source follower amplifier together with a source follower transistor in the pixel cells 301 to 303. A common gate potential 307 is applied to the constant current sources 304 and 305, and a common power supply wiring 306 is connected thereto. The signals of the pixels 301 to 303 are read from the output terminals 308 and 309 for each row. When the pixel 302 is exposed to strong light exceeding the saturation output, the potential of the output terminal 308 decreases, and deviates from the operating range of the constant current source 304. As a result, a predetermined current does not flow through the constant current source 304, and the amount of current flowing through the power supply wiring 306 decreases. Due to this current fluctuation, the constant current sources 305 in other columns are affected, and the potential of the output terminal 309 may fluctuate, which may affect the image. This will be described with reference to FIG. 4 which is a schematic diagram at the time of window chart imaging. Reference numeral 401 denotes an output region that is not dark or saturated, and corresponds to the pixel 301 in FIG. 402 is irradiated with light having a saturation output or higher, which corresponds to 302 in FIG. Reference numeral 403 denotes an area irradiated with the same light as 401, which corresponds to 303 in FIG. Since the output of 403 varies under the influence of the saturation region 402, a streak image may be formed in the horizontal direction.

  An object of the present invention is to prevent the above-described two problems, that is, a decrease in output of an image signal at high luminance, and an output fluctuation of pixels in the same row read simultaneously with the high luminance pixels.

  An imaging device according to the present invention outputs a photoelectric conversion element that converts light into an electric charge, a transfer gate that transfers the converted electric charge to a floating node, and a signal based on the potential of the floating node to a signal line. An imaging device having a plurality of pixels each having a first transistor and a second transistor for resetting a potential of the floating node, and supplying a current flowing from a drain to a source of the first transistor And a clip circuit capable of limiting the potential of the signal line to a first potential and a second potential different from the first potential, and the clip circuit includes: In at least a part of the reset signal readout period, the potential of the signal line is limited to the first potential, and at least the photoelectric conversion signal readout period is reduced. In some, and limits the potential of the signal line to a second potential.

  With the imaging device of the present invention, it is possible to reduce the decrease in the output of the image signal at the time of high luminance, and at the same time, to reduce the output fluctuation of other pixel cells where no strong light is incident.

1 is a circuit diagram of an imaging apparatus according to a first embodiment. It is explanatory drawing of the drive pulse of the imaging device by 1st Embodiment. It is explanatory drawing of a CMOS sensor. It is a schematic diagram at the time of window chart imaging. It is a block diagram which shows the structural example of the still video camera of 3rd Embodiment. It is a block diagram which shows the structural example of the video camera by 4th Embodiment. It is explanatory drawing about 2nd Embodiment.

(First embodiment)
FIG. 1 is a circuit diagram of the imaging apparatus according to the first embodiment, and FIG. 2 shows the drive pulses. Although the case where the transistor is an NMOS (N-channel MOS transistor) will be described here, the effect of this embodiment can be obtained even when the transistor type and the polarity of the pulse are reversed. Reference numeral 101 denotes a unit pixel cell, which is omitted in the figure, but repeatedly arranged in two dimensions. Hereinafter, it is also referred to as a pixel. In the present embodiment, the pixel cell 101 is a three-transistor type, and the selection cell is not included in the pixel cell 101.

  The pixel cell 101 includes, for example, a photodiode 102, a floating capacitor 103, a transfer gate 104, a source follower transistor 107, and a reset transistor 105. The source follower transistor 107 has a gate connected to the floating node 108 and a drain connected to the power source 109. The reset transistor 105 has a source connected to the floating node 108 and is controlled by the reset gate 106. The photodiode (photoelectric conversion element) 102 converts received light into electric charge by photoelectric conversion and accumulates it. This charge is also called photocharge. A plurality of pixel cells 101 are connected to the vertical signal line 110. In this embodiment, as an example, a case where the photocharge is an electron will be described.

  The drain of the reset transistor 105 and the source of the source follower transistor 107 are connected to the vertical signal line 110. The vertical signal line 110 is connected to the constant current source 111. The constant current source 111 supplies a current that flows from the drain to the source of the source follower transistor. Then, a source follower operation is performed. The source follower transistor 107 outputs a signal based on the potential of the floating node 108 to the vertical signal line 110. Then, the potential of the vertical signal line 110 is read from the output terminal 112. The output is held in the sample hold circuit S / H (N). In this embodiment, there are two sample and hold circuits, which are indicated by S / H (N) and S / H (S) in FIG. This S / H (N) holds a reset signal (hereinafter referred to as N signal) based on the potential of the floating node when the floating node is reset. S / H (S) holds a signal (hereinafter referred to as S signal) based on the potential of the floating node when the charge of the photodiode is transferred to the floating node.

  Here, a period based on reading and holding a signal based on the potential of the floating node when the floating node is reset is a reset signal reading period. Then, a period based on reading and holding a signal based on the potential of the floating node when the charge of the photoelectric conversion element is transferred to the floating node is defined as a photoelectric conversion signal reading period.

  Further, the S signal is obtained by adding a signal based on electric charge to the N signal. Therefore, as described above, an image signal can be obtained by taking the difference between the S signal and the N signal.

  Row selection is performed by controlling the potential of the floating node 108. Specifically, the potential VresL113 given by the transistor 114 connected to the vertical signal line 110 and the potential VresH115 given by the transistor 116 connected to the vertical signal line 110 are controlled. VresH115 is higher in potential than VresL113. These are hereinafter referred to as reset potentials. Specifically, driving will be described. The transistor 114 connected to the vertical signal line 110 is turned on. Then, the low reset potential VresL113 is written to the vertical signal line 110, and at the same time, the reset transistors 105 in both the non-selected row and the selected row are turned on. By this operation, the vertical signal line 110 and the floating nodes 108 of all the pixels are reset with a low potential VresL113.

  Next, only the reset transistor 105 in the pixel to be selected, that is, a pixel in a certain column is turned on, the transistor 114 is turned off, and the transistor 116 is turned on. By this operation, the high reset potential VresH (115) is written to the floating node 108 of the row to be selected. That is, by turning on the transistor 116 and the reset transistor 105, the potential of the floating node 108 is set to the reset potential VresH (115).

  Further, by turning off the transistor 116, the vertical signal line 110 is operated as a source follower. At this time, a plurality of source follower transistors 107 are connected to the same vertical signal line 110. However, only the source follower having the highest potential, that is, the source follower of the selected row in which the high reset potential VresH (115) is written is effective. Therefore, a signal depending on the floating node potential of the selected row is output to the output terminal 112.

  This operation will be described with reference to the timing chart of FIG. PresL is a pulse applied to the gate of the transistor 114. PresH is a pulse applied to the gate of the transistor 114. Res (non-selected row) is a pulse applied to the gate of the reset transistor 105 in the non-selected row, and Res (selected row) is a pulse applied to the gate of the reset transistor 105 in the selected row. S / H (N) is a pulse when the N signal is sampled and held, and Tx is a pulse given to the transfer gate 104 in the pixel cell 101. S / H (S) is a pulse when the S signal is sampled and held. Vclip will be described later.

  First, the sample hold circuit S / H (N) (FIG. 1) samples and holds the N signal of the selected row in which the high reset potential VresH115 read by the above method is written at the timing of the signal S / H (N). To do. Next, photocharge from the photodiode 102 is transferred to the floating node 108 at the timing indicated by Tx. Thereafter, the potential of the output terminal 112, that is, the S signal is sampled and held by the sample hold circuit S / H (S) (FIG. 1) at the timing of the signal S / H (S). Although not shown in FIG. 1, an image signal corresponding to incident light can be read out by taking the difference between the S signal and the N signal.

  Here, the vertical signal line 110 is provided with a clip circuit. The operation of the clipping circuit is to limit the potential of the signal line outside the predetermined range to a predetermined potential. Such an operation is called a clip. The predetermined potential is set in consideration of, for example, the constant current source 111 and the dynamic range of the image signal. This will be described in detail below.

  The clipping circuit in this embodiment includes a clipping transistor 118, a power source 117, and a switching unit 119. The clip potential Vclip (FIG. 2) is applied to the gate of the transistor 118 by the switching means 119. This clipping circuit can switch the potential of the signal line depending on the potential applied to the gate of the transistor 118. The power source 117 can have the same potential as the power source 109 of the source follower transistor 107 of the pixel cell 101. The size of the clip transistor 118 is preferably the same as that of the source follower transistor 107 of the pixel cell 101.

  In the present embodiment, the clip potential Vclip is given by the pulse shown in FIG. The switching means 119 gives VclipH when reading the N signal, and gives VclipL when reading the S signal. The clip transistor 118 supplies the first potential VclipH ′ to the vertical signal line 110 when the potential applied to the gate is VclipH. The clip transistor 118 supplies the second potential VclipL ′ to the vertical signal line 110 when the potential applied to the gate is VclipL. That is, the potential of the signal line is limited to the first potential VclipH ′ during at least part of the reset signal readout period, and the potential of the signal line is limited to the second potential VclipL ′ during at least part of the photoelectric conversion signal readout period. doing. With this operation, in the case of a light amount equal to or higher than the saturation output, the signal output after charge transfer is clipped by VclipL, so that the potential of the vertical signal line 110 does not drop too much. VclipL ′ is set higher than the saturation potential, that is, the potential at which the constant current source 111 is turned off. For this reason, since a current continues to flow through the constant current source 111, it is possible to suppress the occurrence of horizontal stripes.

  Further, according to the present embodiment, when a very bright subject such as the sun is photographed, it is as follows. There is a case where the potential of the floating node 108 greatly fluctuates during a period from resetting the floating node 108 to reset noise reading. However, the potential of the reset noise output never falls below the potential VclipH 'regulated by VclipH. That is, VclipL ′ may be set in consideration of the dynamic range of the image signal after CDS.

At this time, even when a signal is output after charge transfer, the potential VclipL ′ regulated by VclipL is output to the output terminal 112 as in the case of saturation. Therefore, the image signal Vsig is expressed by the following equation.
Vsig = | VclipL′−VclipH ′ |
Thus, a constant image signal output can be obtained at high luminance.

  As described above, the clip transistor 118 supplies the first potential VclipH ′ to the vertical signal line 110 when the N signal is sampled and held by S / H (N). Then, the second potential VclipL ′ is supplied to the vertical signal line 110 when the S signal is sampled and held by S / H (S). The first potential VclipH 'and the second potential VclipL' are different from each other. In the present embodiment, the first potential VclipH ′ may be higher than the second potential VclipL ′.

  By supplying the potential VclipH ′ to the vertical signal line 110 when the potential of the vertical signal line 110 is output after the reset, it is possible to reduce the reset noise output from dropping below the potential VclipH ′, and to output an image signal at high luminance. The decrease can be reduced. In addition, when the potential of the vertical signal line 110 is output after the charge of the photodiode 102 is transferred to the floating node 108, the potential VclipL ′ is supplied to the vertical signal line 110, thereby affecting the output of other pixel cells. Can be suppressed. Therefore, it is possible to reduce the occurrence of horizontal stripes in the image.

  With the first potential VclipH ', it is possible to make it difficult to cause a decrease in the output of an image signal that may occur in a pixel irradiated with intense light. Then, the second potential VclipL ′ can make it difficult to generate lateral stripes when light with a saturation light amount or more is applied.

  Further, in this embodiment, the switching unit 119 performs clipping with two potentials from the transistor 118. For example, as in the present embodiment, two sets of transistors 118 and power supplies 117 are provided. Here, by supplying different voltages from the two power supplies and switching the transistor on and off by the switching means 119, clipping at different potentials can be performed. Thus, the clip circuit is not limited to the circuit configuration of the present embodiment.

(Second Embodiment)
As the second embodiment, a more preferable bias condition will be described in more detail. The potential of the output terminal 112 at which the constant current source 111 starts not to operate normally due to the potential of the output terminal 112 dropping too low is defined as Vlimit. The range for capturing the image signal (the difference between the output after charge transfer and the reset noise signal), that is, the saturation range for capturing the A / D (analog / digital) converter 6 (FIG. 5) in the subsequent stage is Vrange. The A / D converter converts the potential output through the output terminal 112 from an analog signal to a digital signal.

  By setting the bias to satisfy the following equation, it is possible to prevent horizontal stripes and to minimize the output drop at high brightness, and to prevent the output drop at high brightness as an image after A / D conversion. It is.

Vlimit> VclipL '
Vsig = VclipL′−VclipH ′
| Vsig | >> | Vrange |
That is, the difference Vsig between the first potential VclipH ′ and the second potential VclipL ′ is larger than the saturation range of the A / D converter.

  In more detail, the relationship between the amount of light and the output potential shown in FIG. For simplicity, the direction indicated by the arrow is negative on the vertical axis indicating the potential.

  In FIG. 7, the S signal and the N signal increase with respect to the amount of light. They have different slopes. The N signal is clipped at the first potential VclipH ', and the S signal is clipped at the second potential VclipL'. This is indicated by a solid line and a dotted line, and the amount of light at the time of clipping is a and b. Vlimit is indicated by a dotted line.

  Here, the difference between the S signal and the N signal becomes an image signal. P in FIG. 7 indicates the image signal. As shown in FIG. 7, the S signal change amount and the N signal change amount with respect to the light amount change may be different. In such a case, depending on the set values of VclipH 'and VclipL', either the S signal or the N signal is clipped first. When the S signal is clipped first as shown in FIG. 7, for example, the image signal P may decrease between a and b.

  Therefore, in this embodiment, the difference Vsig between VclipH ′ and VclipL ′ is set larger than the saturation range Vrange of the A / D converter. By setting such a condition, a linear image signal can be obtained. At the same time, it is possible to reduce the influence of the variation in the potential of the vertical signal line caused by the plurality of clip circuits on the image signal.

  Therefore, according to the present embodiment, it is possible to prevent horizontal stripes and to reduce the output decrease at high luminance. In addition, it is possible to reduce variation in image signals and obtain a higher quality image. The A / D converter arranged in the imaging device may be singular or plural. For example, an A / D converter may be provided for each vertical signal line 110. In this case, the signal reading speed can be improved. Further, by digitizing the analog signal from the pixel, it becomes possible to reduce the influence of loss and noise in the transfer.

(Third embodiment)
An example applied to an imaging system is shown below. Based on FIG. 5, an example when the imaging apparatus is applied to a still video camera will be described in detail. FIG. 5 is a block diagram illustrating a configuration example of a still video camera.

  In FIG. 5, reference numeral 1 denotes a barrier that serves as a lens protect and a main switch, 2 denotes a lens that forms an optical image of a subject on the image pickup device 4, and 3 denotes a diaphragm for changing the amount of light passing through the lens 2. Reference numeral 4 denotes an image pickup apparatus for taking in the subject imaged by the lens 2 as an image signal, and reference numeral 5 denotes an image pickup signal processing circuit that performs analog signal processing on the image pickup signal (image signal) output from the image pickup apparatus 4. Reference numeral 6 denotes an A / D converter that performs analog-digital conversion of an image signal output from the imaging signal processing circuit 5, and 7 denotes various corrections and compression of the data to the image data output from the A / D converter 6. It is a signal processing unit. 8 is a timing generation unit that outputs various timing signals to the imaging device 4, the imaging signal processing circuit 5, the A / D converter 6, and the signal processing unit 7, and 9 is an overall control unit that controls various calculations and the entire still video camera.・ It is a calculation part. Reference numeral 10 denotes a memory unit for temporarily storing image data, and 11 denotes an interface unit for performing recording or reading on the recording medium 12. Reference numeral 12 denotes a detachable recording medium such as a semiconductor memory for recording or reading image data. Reference numeral 13 denotes an interface unit for communicating with an external computer or the like. Here, for example, 5 and 6 may be formed on the same semiconductor substrate as the imaging device 4. It is also possible to form in the same process.

  Next, the operation of the still video camera at the time of shooting in the above configuration will be described. When the barrier 1 is opened, the main power supply is turned on, then the control system power supply is turned on, and the power supply of the imaging system circuit such as the A / D converter 6 is turned on. Then, in order to control the exposure amount, the overall control unit / calculation unit 9 opens the diaphragm 3, and the signal output from the imaging device 4 is converted by the A / D converter 6 via the imaging signal processing circuit 5. After that, the signal is input to the signal processing unit 7. Based on the data, exposure calculation is performed by the overall control unit / calculation unit 9. The brightness is determined based on the result of the photometry, and the overall control unit / calculation unit 9 controls the diaphragm 3 according to the result.

  Next, based on the signal output from the imaging device 4, a high-frequency component is extracted and the distance to the subject is calculated by the overall control unit / calculation unit 9. Thereafter, the lens 2 is driven to determine whether or not the lens is in focus. When it is determined that the lens is not in focus, the lens 2 is driven again to perform calculation. Then, after the in-focus state is confirmed, the main exposure starts. When the exposure is completed, the image signal output from the imaging device 4 is A / D converted by the A / D converter 6 via the imaging signal processing circuit 5, passes through the signal processing unit 7, and is controlled by the overall control unit / calculation unit 9. It is written in the memory unit 10. Thereafter, the data stored in the memory unit 10 is recorded on a removable recording medium 12 such as a semiconductor memory through the recording medium control I / F unit 11 under the control of the overall control unit / arithmetic unit 9. Further, the image may be processed by directly entering the computer or the like through the external I / F unit 13.

  Therefore, according to this application, it is possible to obtain a high-quality still image.

(Fourth embodiment)
An example applied to an imaging system is shown below. Based on FIG. 6, an example when the imaging devices of the first and second embodiments are applied to a video camera will be described in detail. The imaging device 23 uses the imaging device of FIG.

  Reference numeral 21 includes a focus lens 21A for performing focus adjustment with a photographing lens, a zoom lens 21B for performing a zoom operation, and an imaging lens 21C. Reference numeral 22 denotes an aperture and a mechanical shutter, and reference numeral 23 denotes an imaging device that photoelectrically converts a subject image formed on the imaging surface into an electrical imaging signal. Reference numeral 24 denotes a sample hold circuit (S / H circuit) that samples and holds the image pickup signal output from the image pickup device 23 and further amplifies the level, and outputs a video signal.

  A process circuit 25 performs predetermined processing such as gamma correction, color separation, and blanking processing on the video signal output from the sample hold circuit 24, and outputs a luminance signal Y and a chroma signal C. The chroma signal C output from the process circuit 25 is subjected to white balance and color balance correction by a color signal correction circuit 41, and is output as color difference signals RY and BY.

  Further, the luminance signal Y output from the process circuit 25 and the color difference signals RY and BY output from the color signal correction circuit 41 are modulated by an encoder circuit (ENC circuit) 44 and used as a standard television signal. Is output. Then, it is supplied to a video recorder (not shown) or an electronic viewfinder such as a monitor electronic viewfinder (EVF).

  Next, reference numeral 26 denotes an iris control circuit that controls the iris drive circuit 27 based on the video signal supplied from the sample hold circuit 24. Then, the ig meter 28 is automatically controlled so as to control the opening amount of the diaphragm 22 so that the level of the video signal becomes a constant value of a predetermined level.

  Reference numerals 33 and 34 denote different band-limited bandpass filters (BPFs) for extracting high-frequency components necessary for performing focus detection from the video signal output from the sample and hold circuit 24. Signals output from the first bandpass filter 33 (BPF1) and the second bandpass filter 34 (BPF2) are gated by the gate circuit 35 and the focus gate frame signal, respectively. Then, the peak value is detected and held by the peak detection circuit 36 and input to the logic control circuit 37. This signal is called a focus voltage, and the focus is adjusted by this focus voltage.

  Reference numeral 38 denotes a focus encoder that detects the moving position of the focus lens 21A, 39 denotes a zoom encoder that detects the focal length of the zoom lens 21B, and 40 denotes an iris encoder that detects the opening amount of the diaphragm 22. The detection values of these encoders are supplied to a logic control circuit 37 that performs system control.

  The logic control circuit 37 performs focus detection on the subject based on the video signal corresponding to the set focus detection area, and performs focus adjustment. First, the peak value information of the high frequency components supplied from the respective band pass filters 33 and 34 is fetched. In order to drive the focus lens 21A to a position where the peak value of the high-frequency component is maximized, control signals such as a rotation direction, a rotation speed, and rotation / stop of the focus motor 30 are supplied to the focus drive circuit 29 to control it. .

  The zoom drive circuit 31 rotates the zoom motor 32 when zooming is instructed. When the zoom motor 32 rotates, the zoom lens 21B moves and zooming is performed.

  Even in such an application, it is possible to obtain a high-quality moving image.

  As described above, according to the imaging apparatus of the present invention, it is possible to reduce the output fluctuation of the pixels in the same row that are read simultaneously with the high luminance pixels, while reducing the decrease in the image signal output at the time of high luminance. Specifically, a clipping circuit is provided at the output of each column, the clipping potential is made different between the readout of the noise signal output and the output readout after the charge transfer, and the clip circuit operates also at the output readout after the charge transfer To do.

  Since the clipping circuit operates even when a signal is output after the charge transfer of a saturated pixel, the desired current continues to flow through the constant current source, and fluctuations in the output of other columns can be reduced. It becomes. Accordingly, it is possible to obtain an effect of reducing the output decrease of the image signal of the pixel irradiated with the strong light and reducing the occurrence of the horizontal stripe when the light exceeding the saturation light amount is applied.

  In addition, it is possible to reduce variations in image signals that occur when reducing them, and it is possible to obtain higher quality images.

  The above-described embodiments are merely examples of implementation in carrying out the present invention, and the technical scope of the present invention should not be construed in a limited manner. For example, the configuration of the pixel and the configuration of the clip circuit are not limited to the embodiment. Furthermore, the present invention can be applied even in the case of an imaging device structure in which the potential relationship is opposite regardless of whether the charge is positive or negative. That is, the present invention can be implemented in various forms without departing from the technical idea or the main features thereof.

DESCRIPTION OF SYMBOLS 101 Pixel cell 102 Photodiode 103 Floating capacitance 104 Transfer gate 105 Reset transistor 107 Source follower transistor 108 Floating node 110 Vertical signal line 111 Constant current source 112 Output terminal 118 Clip transistor

Claims (5)

A photoelectric conversion element that converts light into electric charge;
A transfer gate for transferring the converted charge to a floating node;
A first transistor for amplifying a signal based on the potential of the floating node and outputting the amplified signal to a signal line;
A second transistor for resetting the potential of the floating node; and an imaging device having a plurality of pixels.
A current source for supplying current to the first transistor;
A clip circuit capable of limiting the potential of the signal line to a first potential and a second potential different from the first potential;
A sample hold circuit for holding the signal output to the signal line ,
The clip circuit has a third transistor connected to the signal line in the previous stage of the sample and hold circuit, and switching means for switching a potential supplied to the gate of the third transistor,
By switching the gate potential of the third transistor by the switching means, the potential of the signal line is limited to the first potential in at least a part of the reset signal readout period, and at least one of the photoelectric conversion signal readout period. In the imaging device, the potential of the signal line is limited to a second potential.   The imaging apparatus according to claim 1, wherein the electric charge is an electron, and the first potential is higher than the second potential. A photoelectric conversion element that converts light into electric charge;
A transfer gate for transferring the converted charge to a floating node;
A first transistor for amplifying a signal based on the potential of the floating node and outputting the amplified signal to a signal line;
A second transistor for resetting the potential of the floating node; and an imaging device having a plurality of pixels.
A current source for supplying current to the first transistor;
A clip circuit capable of limiting the potential of the signal line to a first potential and a second potential different from the first potential;
The clip circuit limits the potential of the signal line to a first potential in at least a part of a reset signal readout period, and sets the potential of the signal line to a second potential in at least part of a photoelectric conversion signal readout period. Limited to
Furthermore, it has one or a plurality of A / D converters for converting a signal output from the signal line from an analog signal to a digital signal,
An imaging apparatus, wherein a difference between the first potential and the second potential is larger than a saturation range of the A / D converter.   The imaging apparatus according to claim 3, wherein the A / D converter is disposed on each of the signal lines. The imaging device according to any one of claims 1 to 4,
A lens for forming an optical image on the imaging device;
An imaging system comprising: an aperture for changing the amount of light passing through the lens.

Images