JP2013146001A5 - - Google Patents

Description

Imaging device

  The present invention relates to an imaging apparatus capable of capturing a still image while capturing a moving image.

  In recent years, imaging devices capable of capturing still images while capturing moving images are becoming widespread. Before shooting a still image, the composition is determined while observing the subject with the viewfinder, and shooting of the still image is started. Conventionally, as a display technique for observing the subject, an optical finder has been mainly used. However, in recent years, an electronic finder using an LCD (Liquid Crystal Display) or an organic EL (Electroluminescence) is being changed. Against the background of such a technical flow, a technology for simultaneously shooting a high-quality moving image and a high-definition still image while reducing power consumption in shooting a long-time moving image has been proposed.

In Patent Document 1, when an image sensor is driven in the all-pixel readout mode, image data of all pixels read from the image sensor is thinned out by an image processing unit to form a moving image, and still image shooting is performed during moving image shooting. When instructed, a technique is described in which image data of all pixels is processed as a still image without being thinned out.

In Patent Document 2, as shown in FIG. 11, when only moving images are captured, pixel signals are thinned out from the image sensor and read out. On the other hand, when capturing a still image and a moving image at the same time, the image signal of all the pixels is read out from the image sensor as an image signal of the still image, and the image signal of the moving image is obtained by thinning out the signals of all the pixels read out from the image sensor at the thinning unit The signal is generated. As a result, moving image shooting is performed without interruption even during still image shooting, and a high-quality still image can be obtained.

  FIG. 12 is a diagram illustrating the timing of reading an image signal from the imaging unit of the imaging device according to the conventional technique. In response to the field synchronization signal, the operation of sequentially reading out the image signals of the nth pixel line from the first pixel line of the imaging unit is repeatedly executed.

Japanese Patent No. 3992659 JP 2007-150439 A

In Patent Document 1, when capturing a still image, it is necessary to always read out image signals of all pixels of a high frame for moving images from the image sensor even during moving image shooting before and after still image shooting. For this reason, there has been a problem that power consumption increases.

Further, in Patent Document 2, when reading the more image signals from the imaging device to an electronic rolling shutter motor, the thinning readout and full pixel readout, the timing of the exposure start and exposure end of the line in which each pixel belongs constituting the imaging unit Since the control method is different, it is difficult to smoothly perform the shooting control from the moving image shooting mode to the still image shooting mode. For this reason, in the process of transition from the moving image shooting mode to the still image shooting mode, or from the still image shooting mode to the moving image shooting mode, there is a problem that invalid frames are generated and the moving image data is interrupted.

The present invention has been made in view of the above circumstances, and it is an object of the present invention to provide an imaging apparatus that can shoot high-quality moving images, can shoot high-definition still images, and can reduce power consumption. And

To solve the problems described above, an imaging apparatus according to the first invention, a voltage comparing ramp and an image signal which changes stepwise as time elapses, the voltage of the ramp wave is coincident with the input voltage In an imaging device having a function of performing analog-digital conversion of the image signal based on the time until the moving image read out by the electronic rolling shutter control from the imaging unit of the imaging device in which a plurality of pixel rows having a plurality of pixels are arranged with respect to the signal, the moving image data generating unit that generates moving image data by performing analog-digital conversion of the first number of quantization bits, static read by the electronic rolling shutter control from the imaging unit of the image pickup device Tomega Still image data generation unit for generating still image data by performing analog-digital conversion with a bit number larger than the first quantization bit number on the signal And provided.

According to the imaging apparatus according to the first aspect of the invention , when analog-digital conversion with the first number of quantization bits is performed, analog-digital conversion is performed compared to when analog-digital conversion with the second number of quantization bits is performed. Since this time can be shortened, power consumption can be reduced.

The imaging imaging apparatus according to the second invention, the output in the imaging apparatus according to the first invention, a synchronization signal for controlling the timing of imaging a dynamic E及BiShizu Tomega at predetermined time intervals An element control unit and a power control unit for reducing the power supplied to the imaging element from the end of capturing an image of one frame to the generation of the next synchronization signal are provided.

According to the imaging apparatus according to the second aspect of the present invention , it is possible to reduce power consumption during moving image shooting compared to still image shooting.

The imaging apparatus according to the third invention, the Te imaging apparatus odor according to the first invention, outputs a synchronization signal for controlling the timing of imaging a dynamic E及BiShizu Tomega at predetermined time intervals An image sensor control unit is provided, and the time required for analog-digital conversion of all the pixels of the still image signal is substantially the same as the time required for analog-digital conversion of all the pixels of the moving image signal.

According to the imaging apparatus of the third aspect, there is no need to perform special timing adjustment for starting exposure of a still image or a moving image, switching from moving image to still image shooting, and shooting of a still image to moving image. Switching to is easier.

According to a fourth aspect of the present invention, there is provided an imaging apparatus according to the third aspect , wherein the time required for analog-digital conversion of one pixel of the still image signal and the analog-digital conversion of one pixel of the moving image signal are the same. When the time difference is ΔT, a power control unit is provided for reducing the power supplied to the imaging element from the end of analog-digital conversion for each pixel of the moving image signal until the time ΔT elapses. It was.

According to the imaging apparatus according to the fourth aspect of the present invention , it is possible to reduce power consumption during moving image shooting as compared with still image shooting.

Furthermore, an imaging device according to a fifth invention is the imaging device according to the first invention, the second invention, and the third invention , wherein the bit accuracy of the image data of the still image is changed to the bit accuracy of the moving image. And an image processing unit for converting the data into video data by bit conversion.

According to the imaging apparatus of the fifth aspect, it is possible to shoot a moving image even during still image shooting, and it is possible to obtain high-quality moving image data because no moving image is lost during still image shooting. it can.

  According to the present invention, it is possible to provide an imaging apparatus that can shoot a high-quality moving image, shoot a high-definition still image, and reduce power consumption.

It is a block diagram which shows the structure of the imaging device common to Embodiments 1-2 of this invention. It is a block diagram which shows schematic structure of the image pick-up element common to Embodiments 1-2 of this invention. It is a figure which shows the circuit structure of 1 pixel of an image pick-up element common to Embodiment 1-2 of this invention. It is a block diagram which shows the structure of the A / D converter common to Embodiment 1-2 of this invention. 4 is a timing chart showing a relationship between a field synchronization signal and a pixel selection signal when reading a moving image signal in Embodiment 1 of the present invention. In the embodiment 1 of the present invention is a timing chart showing the relationship between the reading by the field sync signal and the electronic rolling shutter. In the embodiment 1 of the present invention, reads out the signal of one pixel from the image sensor is a timing chart when the number of quantization bits performs A / D conversion of the 1 0-bit. 5 is a timing chart when a signal of one pixel is read from the image sensor and A / D conversion with a quantization bit number of 12 bits is performed in the first and second embodiments of the present invention. In the second embodiment of the present invention is a timing chart showing the relationship between the reading by the field sync signal and the electronic rolling shutter. 9 is a timing chart when a signal of one pixel is read from the image sensor and A / D conversion with a quantization bit number of 10 bits is performed in Embodiment 2 of the present invention. In the conventional image pickup apparatus, a timing croaker chart showing the relationship between the field sync signal and a pixel reading operation. In the conventional image pickup apparatus is a timing chart showing the relationship between the field sync signal and a pixel selection signal at the time of moving image signals read.

Embodiments of the present invention will be described below with reference to the drawings.
In the embodiment of the present invention, description of the same operation and control technique as those of a normal imaging device is omitted, or detailed description thereof is omitted.

[Embodiment 1]
FIG. 1 is a block diagram showing a configuration of an imaging apparatus of the present invention. This imaging apparatus includes a lens 101, a motor 102 that drives the lens 101, a focus control unit 103, an aperture mechanism 104, a motor 105, an aperture control unit 106, a shutter mechanism 107, a plunger 108, a plan, Jar control unit 109, image sensor 110, AE processing unit 112, AF processing unit 113, image processing unit 114, LCD driver 115, LCD 116, nonvolatile memory 117, built-in memory 118, and compression / decompression A unit 119, a removable memory 120, a CPU 121, an input unit 122, a power source unit 123, and a data bus 124.

The lens 101 is for forming an optical image of a subject on the image sensor 110 . The motor 102 drives the lens 101. The focus control unit 103 is for driving the lens 104 to the in-focus position by the motor 102. The aperture mechanism 104 limits the aperture diameter of the subject light beam that has passed through the lens 101. The motor 5 drives the diaphragm mechanism 104 so that the diaphragm has a predetermined size. The aperture control unit 106 controls the motor 105. The shutter mechanism 107 is for or shielded or passed through a subject light to the imaging element 110 by opening and closing the shutter. The plunger 108 is for driving the shutter mechanism 107. The plunger control unit 109 is for driving and controlling the plunger 108.

  The image sensor 110 is for generating an image signal by converting an optical image received on the imaging surface into an electrical signal. The image sensor 110 includes an A / D converter 203 (see FIG. 2) arranged for each pixel column, and an analog image signal read from each pixel of the image sensor 110 is an A / D converter 203. The digital image data (hereinafter, a digital signal corresponding to an analog “image signal” is simply referred to as “image data”) is output from the image sensor 110. The AE processing unit 112 calculates an exposure time and an aperture value so that the exposure level is appropriate.

The AF processing unit 113 detects the focus state of the subject based on the high frequency component of the image data output from the image sensor 110. The image processing unit 114 performs various types of image processing such as synchronization processing of image data read from the image sensor 110, gradation conversion processing, white balance adjustment, and edge processing. The image processing unit 114 also performs processing for resizing the image data read from the image sensor 110 to generate moving image data. The LCD 116 is for displaying a captured image and other information. The LCD driver 115 is for driving the LCD 116. The nonvolatile memory 117 is for storing various programs and user setting data. The built-in memory 118 is a memory capable of high-speed writing / reading, and temporarily stores image data read from the image sensor 110 . The built-in memory 118 is used as a work memory for various processes in the image processing unit 114.

Decompression unit 119 compresses the image data, and for performing expansion processing to return the image data this compressed image data before compression. The detachable memory 120 is a non-volatile memory such as a card memory for recording image data, and is detachable from the camera. The CPU 121 is for overall control of the entire imaging apparatus. CPU121 has the imaging element control unit for generating a synchronization signal for controlling the imaging timing of the moving image or still image, moving image photographing unit, the still image shooting part, a function as a power control unit. The input unit 122 is for inputting instructions for various operations such as various mode settings and release operations of the imaging apparatus. The power supply unit 123 is for supplying power to the entire imaging apparatus. The data bus 124 is a bus line for transmitting / receiving various data.

FIG. 2 is a block diagram illustrating a schematic configuration of the image sensor 110. In the imaging unit 201, pixels P11 to Pmn of n rows and m columns are arranged. A column parallel A / D conversion type A / D converter 203 (A / D1 to A / Dm) is arranged corresponding to each pixel column. The vertical scanning circuit 204 is connected to each pixel row, select sequentially pixel for each row from row 1 pixels to the pixel rows n, vertical for outputting a signal of the selected pixel to the A / D converter This is a circuit for outputting scanning signals (φS, φR, φT). The vertical scanning circuit control unit 205 is a control circuit that is connected to the vertical scanning circuit 204 and controls the timing at which a vertical scanning signal is output to each pixel row. Note that the vertical scanning circuit control unit 205 may cause the CPU 121 to have part or all of the functions.

The ramp wave generation circuit 206 is a circuit that outputs a stepped ramp wave necessary for column-parallel digital CDS A / D conversion. The A / D converter 203 is connected to the horizontal readout circuit 207. The horizontal readout circuit 207 is a circuit for converting the image data output from the A / D converter 203 in parallel for each pixel row into a serial signal and outputting the serial signal to the outside of the image sensor 110. The A / D converter 203 and the ramp wave generation circuit 206 constitute part of a moving image data generation unit and a still image data generation unit. Details of the A / D conversion will be described later.

  FIG. 3 is a diagram showing a circuit configuration of one pixel in the image sensor 110 shown in FIG. In FIG. 3, PD (Photo Diode) is a photoelectric conversion unit, and FD (Floating Diffusion) is a signal storage unit that temporarily holds a signal of the photoelectric conversion unit PD. Here, the signal storage unit FD is shielded from light so that the signal held in the signal storage unit FD does not change even when light is incident on the pixel unit 202.

  The transistor Tr1 is a transistor that also functions as a reset unit that resets the photoelectric conversion unit PD and a gate unit that transfers charges accumulated in the photoelectric conversion unit PD to the signal storage unit FD, and is controlled by the charge transfer signal φT. .

Tr2 is an amplifying transistor which functions as an amplifying unit constitute a source Roman follower amplifier. Pixel signal V _SF of the signal storage section FD is amplified by the amplifying transistor Tr2, is output to the vertical signal line L _V through the selection transistor Tr3, which functions as a signal readout section. The selection transistor Tr3 is controlled by a pixel selection signal φS.

  Tr4 is a transistor that functions as a reset unit that resets the photoelectric conversion unit PD and the signal storage unit FD, and is controlled by a pixel reset signal φR.

  Next, an outline of the configuration of the A / D converter 203 will be described with reference to FIG. The basic configuration of the A / D converter 203 is known as a column parallel digital CDS (Correlated Double Sampling) system (for example, published in technical document: CX-PAL71, Sony Corporation).

The A / D converter 203 includes a comparator 401, a latch circuit 402, and a counter 403. The input of the comparator 401, and the vertical signal line _{L V} for transmitting a pixel signal _{V SF} in FIG. 2, the signal line for outputting a reference signal _{V RAMP} to be compared with the pixel signal _{V SF} of the vertical signal line _{L V} Connected to. The latch circuit 402 is connected to a counter output unit for outputting the count value of the counter 403 and an output unit of the comparator 401. The counter 403, a signal line for supplying a counter clock signal phi _{signal CTCK,} counter 403 signal line for supplying a counter reset signal phi _CR for reset the and the up-counter the counter 403, or the down counter signal lines are connected for supplying a count direction signal phi _UD for switching to either.

The reference signal V _RAMP is generated by the ramp wave generation circuit 206 (FIG. 2). The counter clock signal φ _CTCK , the counter reset signal φ _CR , and the count direction signal φ _UD are generated by the vertical operation circuit control unit 205 and the vertical scanning circuit 204.

  Next, the operation of the first embodiment will be described.

  In the first embodiment, reading of a moving image signal and a still image signal is started in synchronization with a field synchronization signal having a fixed period, the A / D conversion bit accuracy of the moving image signal is 10 bits, and the A / D of the still image signal is The bit precision of D conversion is set to 12 bits. A / D conversion of a moving picture signal having a bit accuracy of 10 bits can be performed at a higher speed than an A / D conversion of a still picture signal having a bit precision of 12 bits (for this reason, refer to FIGS. The readout time of all pixels of the moving image signal is shorter than the readout time of all pixels of the still image signal. Therefore, in the first embodiment, power consumption is reduced for a predetermined period from the completion of reading of all the pixels of the still image signal to the generation of the next synchronization signal.

  FIG. 5 is a timing chart showing the relationship between the field synchronization signal and the pixel selection signal φS when the moving image signal is read (when the bit accuracy of A / D conversion is 10 bits) in the first embodiment. Reading is sequentially performed from the pixel data of the first pixel row. As described above, since the readout time of all pixels of the moving image signal is shorter than the readout time of all pixels of the still image signal, Tlp until the next field synchronization signal is generated from the completion of readout of the pixel data of the last n-th row. Have time. Therefore, since the timing for completing the A / D conversion of the image signal of one field is known, the period of Tlp from the completion of the A / D conversion of the image signal of one field to the generation of the next field synchronization signal. Transmits a signal for reducing power consumption from the CPU 121 to the power supply unit 123. As a method for reducing power consumption, only a block having a function that is not necessary in the Tlp period may be reduced in power consumption. At least, the power consumption of the image sensor is reduced by stopping the power supply of the block having unnecessary functions.

FIG. 6 is a timing chart showing the relationship between the field synchronization signal and readout by the electronic rolling shutter in the first embodiment. During moving image recording, image data of one field is repeatedly read from the image sensor 110 in synchronization with the field synchronization signal. Here, the bit accuracy of the A / D converter 203 during moving image recording is 10 bits. If a photographer performs a release operation for recording a still image via the input unit 122 during moving image recording, the CPU 121 receives a release signal associated with the release operation and converts the image signal of the next field into a 12-bit bit. Preparation for transmitting a switching signal for A / D conversion with accuracy to the image sensor control unit 11 is performed. Then, in synchronization with the next field synchronization signal, A / D conversion of the moving image signal and reading of the image data of the moving image are performed with a bit accuracy of 10 bits. Next, pulses are applied in order of the pixel reset signal φR and the charge transfer signal φT in order to start still image exposure sequentially from the first pixel row at a predetermined timing, and still image exposure is performed. The process is started (see the oblique dotted line in the chart of reading by the electronic rolling shutter in FIG. 6).

Here, in the chart of the electronic rolling shutter by reading 6, the slope of the dashed line representing a still image exposure start, or the inclination of the solid line representing the reading of still image data, moving image exposure start, or the video data read As described above, since the bit accuracy of the A / D conversion of the still image signal is higher than that of the moving image signal, the A / D conversion takes time. Because of this.

  When the exposure of the still image in one field period is completed, the image signal of the pixel in the first row is A / D converted with a bit accuracy of 12 bits and read out from the image sensor 110 in synchronization with the next field synchronization signal. Similarly, the pixel signals of the pixels in the 2nd to nth pixel columns are A / D converted. The readout time for image data of all the pixels of the still image is set to approximately one field period. The image data of the still image having the same number of pixels as the read moving image image data is subjected to various image processing such as synchronization processing, gradation processing, and white balance processing by the image processing unit 114. The compression / decompression unit 119 performs compression processing and records the still image data in the removable memory 120. Further, the still image data is bit-converted into 10-bit data by the image processing unit 114 and then recorded in the removable memory 120 together with the moving image data read so far.

In FIG. 6, pixels for which still image data has been read out are sequentially pulsed from the first row pixel in order of pixel reset signal φR and charge transfer signal φT in order to start exposure of the next moving image. Then, the exposure of the moving image is started (refer to the alternate long and short dash line in the reading chart by the electronic rolling shutter in FIG. 6 ). Then, reading of moving image data is started sequentially from the first row pixel in synchronization with the next field synchronization signal. Since the exposure time of this moving image data is shorter than one field period, the image processing unit 114 multiplies this moving image data by a predetermined coefficient of 1 or more to convert it into moving image data corresponding to the exposure of one field period. Then, it is compressed and recorded in the removable memory 120 as moving image data.

Next, the operation of the A / D converter 203 with 10-bit bit accuracy will be described in detail with reference to the timing chart of FIG. Period of the pixel selection signal φS is "H", the voltage of the signal storage section FD is outputted to the signal output line L _V as a pixel signal V _SF, is supplied to one input of a comparator 401. When the pulse of the pixel reset signal φR is applied to the gate of the transistor Tr4, the voltage of the signal storage unit FD is reset to the voltage VDD. It can be seen that the pixel signal V _{SF in} FIG. 7 rises to the reset voltage simultaneously with the application of φR.

Then, when the counter reset signal phi _CR is applied to the A / D converter 203, the counter 403 is reset. At this time, the count direction signal φ _UD is set to the down count. Next, the counter clock signal φ _CTCK is output to the counter 403, and at the same time, a stepped ramp wave as the reference signal V _RAMP is supplied to the other input of the comparator 401. The counter 403 starts counting, and digital data (counter output) representing the count number is output to the latch circuit 402. Subsequently, when the reference signal V _RAMP decreases with time and the V _RAMP and the pixel signal V _SF coincide with each other, the output φ _COUT of the comparator 401 is inverted, and the counter 403 counts in response to the change of φ _COUT. Operation stops. Here, the counter 403 holds the count value finally counted. The digital data held in this counter corresponds to the reset signal _VRST .

When Nrst number of pulses are output, the counter clock φ _CTCK is stopped to have a constant steady value. The number of pulses Nrst may if slightly larger analog voltage the number of bits that can be converted into digital data from the reset voltage V _RST. The value of Nrst is approximately ¼ when the number of quantization bits for A / D conversion (hereinafter referred to as “bit precision”) is 10 bits, compared to the case of 12 bits described later. For example, the bit precision of the A / D conversion in the case of 10-bit and NRST = 256, in the case of 12-bit bit precision of the A / D conversion will be described later and 1024.

Next, when the charge transfer signal φT is applied to the gate of the transistor Tr1, the signal charge stored in the photoelectric conversion unit PD for one field period is transferred to the signal storage unit FD. V _SIG shown in FIG. 7 corresponds to the transferred signal charge. The reference signal V _RAMP is reset in synchronization with the pulse output of φT. Further, in synchronization with the output of .phi.T, counting direction phi _UD is switched to the up counter. Further, the output φ _COUT of the comparator 401 is inverted in synchronization with φR and becomes “H” level. Subsequently, when the reference signal V _RAMP decreases with time and the V _RAMP and the pixel signal V _SF coincide with each other, the output φ _COUT of the comparator 401 is inverted. The digital data representing the count number of the counter 403 is latched, and the count operation of the counter 402 is stopped. Here, the digital data latched by the latch circuit 402 corresponds to the addition data of the pixel signal V _SIG and the reset signal V _RST superimposed on the pixel signal.

When N (sig + rst) pulses are output, the counter clock φ _CTCK is stopped and becomes a constant steady value. The number of pulses N (sig + rst) may be any number of bits that can convert an analog voltage slightly larger than a voltage obtained by adding the reset voltage V _RST and the pixel signal voltage V _SIG into digital data. This value is almost four times as large as that of 12 bits when the bit precision of A / D conversion is 10 bits. For example, Nrst = 1380 when the bit precision of A / D conversion is 10 bits, and 5520 when the bit precision of A / D conversion is 12 bits. Therefore, assuming that the period of the ramp wave in FIG. 7 is constant, when A / D conversion is performed with bit accuracy of 10 bits, A / D conversion is completed faster than when A / D conversion is performed with 12 bits. I can do it. Further, when the bit accuracy is 10 bits, the power consumption is reduced because the number of counter clocks _φCTCK and the count number of the counter 403 are smaller than when the bit accuracy is 12 bits. Recently, the number of pixels of the image sensor has increased, and the frequency of the counter clock _φCTCK has become very high accordingly. Therefore, the power consumption of the entire image sensor is very large, and the effect of reducing the power consumption is large. .

As a result of the A / D conversion operation described above, the count result finally latched in the latch circuit 402 is obtained by subtracting V _RST from the addition data of the pixel signal V _SIG and the reset signal V _RST superimposed on the pixel signal. It is equal to digital pixel data corresponding to the pixel signal V _SIG . Then, the pixel data latched by the latch circuit 402 is converted into serial data from the image sensor 110 together with pixel data of the same line in other columns via the horizontal readout circuit 207 (see FIG. 1) of the image sensor. Read out.

FIG. 7 shows an A / D conversion operation of one pixel belonging to a predetermined pixel row. All pixels belonging to the predetermined pixel row are simultaneously parallelized by A / D converters arranged for each pixel column. Therefore, the same A / D conversion operation is executed. When the A / D conversion of the pixel signal V _{SIG in} the predetermined row is completed, the same A / D conversion is executed for the next pixel row. The above operation is performed until the reading of the pixel signal V _SIG of all the pixels is completed. Such a method of exposure control by pixel readout is generally referred to as electronic rolling shutter control.

  In the first embodiment, assuming that the period of the ramp wave in FIG. 7 is constant, the down-count time and the up-count time when performing A / D conversion with 10-bit bit accuracy are as follows when the bit accuracy is 12 bits. It is shorter than that. As described above, in the first embodiment, the time required for A / D conversion is shortened by this shortening. Therefore, if the readout time of image data of all pixels when A / D conversion is performed with 12-bit bit accuracy is set to be substantially equal to one period of the field synchronization signal, A / D conversion is performed with 10-bit bit accuracy. In this case, the readout time of the image data of all the pixels is shorter than one period of the field synchronization signal.

  FIG. 8 is a timing chart showing an A / D conversion operation when A / D conversion is performed on a still image signal with a bit accuracy of 12 bits. Since the basic operation is the same as in FIG. 7, only the differences from FIG. 7 will be described.

When A / D conversion is performed on a still image signal with 12-bit bit accuracy, the ramp changes the voltage per cycle of the wave V _RAMP compared to when A / D conversion is performed on a moving image signal with 10-bit bit accuracy. Is 1/4 compared to the case of A / D conversion with a bit precision of 10 bits. The range of the analog voltage capable of A / D converting the image signal is the same regardless of whether the bit accuracy is 10 bits or 12 bits. Therefore, the down-count period and the up-count period when A / D conversion is performed with 12-bit precision. The count number of the counter clock φ _CTCK is about four times that when A / D conversion is performed with 10-bit accuracy. Therefore, even if A / D conversion is performed on an analog signal having the same value, it takes about four times as long when A / D conversion is performed with a bit precision of 12 bits.

  In the first embodiment described above, the moving image signal is A / D converted with 10-bit bit accuracy, and the still image signal is A / D converted with 12-bit bit accuracy. Of course, other combinations are possible as long as the bit accuracy of the A / D conversion is set lower than that of the still image signal.

  In the first embodiment, power consumption during A / D conversion of a moving image signal is reduced compared to power consumption during A / D conversion of a still image signal. In the first embodiment, the moving image data and the still image data are read out in synchronization with the field synchronization signal having a fixed period, and the bit accuracy of the A / D conversion of the moving image signal is set to be equal to that of the still image signal. In addition to setting it lower, the readout time of image data per feed of moving images is set to be shorter than the readout time of image data of still images. During the period until the reading of the field synchronization signal, at least power consumption supplied to the image sensor is reduced. In addition, the image processing unit 114 converts the bit accuracy of still image data to the bit accuracy of moving images to obtain moving image data, so that it is possible to shoot moving images even during still image shooting. Data can be obtained.

[Embodiment 2]
Next, Embodiment 2 of the present invention will be described.
9 and 10 are drawings according to the second embodiment. In the description of the present embodiment, differences from the first embodiment will be mainly described.

  In the second embodiment, similarly to the first embodiment, exposure and readout of a moving image signal and a still image signal are started in synchronization with a field synchronization signal of a fixed period, and the A / The bit precision of D conversion is 10 bits, and the bit precision of A / D conversion of still image signal is 12 bits. In the first embodiment, the time excluding the readout time of image data of all the pixels having a bit accuracy of 10 bits in one field period is reduced in power consumption. On the other hand, in the second embodiment, it takes time to perform A / D conversion of one pixel with 10-bit bit accuracy, and to perform A / D conversion of one pixel with 12-bit bit accuracy. By making it substantially equal to the time, the reading time of image data of all pixels having a bit accuracy of 10 bits is made substantially equal to the reading time of image data of all pixels having a bit accuracy of 12 bits.

  As described with reference to FIGS. 7 and 8, the down-count period and the up-count period in A / D conversion of a moving picture signal having a bit precision of 10 bits are A of the still picture image signal having a bit precision of 12 bits. Compared with / D conversion, the speed can be increased by about 4 times. Therefore, in the second embodiment, when A / D conversion is performed with a bit accuracy of 10 bits, the power consumption is reduced for a predetermined time after the end of the down-count and the up-count (see FIGS. 7 and 8). As a method for reducing power consumption, only a block having a function that is not necessary in the Tlp period may be reduced in power consumption. At least, the power consumption of the image sensor is reduced by stopping the power supply of the block having unnecessary functions.

  FIG. 9 is a timing chart showing the relationship between the field synchronization signal and readout by the electronic rolling shutter in the second embodiment. In the second embodiment, the readout time of image data per line is the same for moving images and still images. Accordingly, in the chart of reading by the electronic rolling shutter in FIG. 9, the slope of the hatched line indicating the start of exposure of moving image data and the start of reading is the same as the slope of the hatched line indicating the start of exposure of still image data and the start of reading. For this reason, as described in the first embodiment, it is unnecessary to start exposure for still image shooting, reset operation for starting exposure of moving images immediately after still image shooting, and amplification processing of moving image data immediately after reading still image data. Become.

  FIG. 10 is a timing chart when a signal of one pixel is read from the image sensor and A / D conversion with a quantization bit number of 10 bits is performed in the second embodiment. The basic operation is the same as that of FIG. 7 according to the first embodiment. As described above, in the present embodiment, the time taken to perform A / D conversion time of one pixel with 10-bit bit accuracy is set to the time taken to perform A / D conversion of one pixel with 12-bit bit accuracy. Make approximately equal. Then, control is performed to reduce power consumption for a predetermined time TPS1 after the end of the down-count and a predetermined time TPS2 after the end of the up-count.

  The operation of A / D converting a still image signal with 12-bit bit accuracy is the same as that described in the first embodiment with reference to FIG.

  The still image data and the moving image data are recorded in the removable memory 120 as in the first embodiment. Further, the 12-bit precision still image data is bit-converted into 10-bit precision image data by the image processing unit 114, subjected to predetermined image processing, and recorded in the removable memory 120 as moving image data.

As described above, in the second embodiment, the moving image data and the still image data are read in synchronization with the field synchronization signal having a fixed period, and the bit accuracy of the A / D conversion of the moving image signal is set to the still image. The image data read-out time per feed of the moving image signal is set substantially the same as that of the still image signal, and the A / B of one pixel of the moving image signal is set. During D conversion, at least the image sensor is supplied with a time corresponding to the difference between the time required for A / D conversion of the image signal of one pixel of the still image and the time required for A / D conversion of the image signal of one pixel of the moving image. Reduced power consumption. Further, as described in detail with reference to FIG. 7, when A / D conversion is performed with 10-bit bit accuracy, A / D conversion is being performed compared to when A / D conversion is performed with 12-bit bit accuracy. It is also possible to reduce the power consumption during the time interval (excluding Tlp in FIG. 5).

  In addition, the image processing unit 114 converts the bit accuracy of the still image data into the moving image bit accuracy to convert it into moving image data, so that it is possible to shoot a moving image even during still image shooting. Movie data can be obtained.

  Furthermore, since the readout time of the image data per feed of the moving image signal is set to be the same as that of the still image signal, it is not necessary to perform a special timing adjustment for starting the exposure of the still image or the moving image. Switching from moving image to still image shooting and switching from still image to moving image shooting become easy.

  Note that the present invention is not limited to the above-described embodiment, and the constituent elements can be modified and embodied without departing from the spirit of the invention in the implementation stage. Various inventions can also be formed by appropriately combining a plurality of constituent elements disclosed in the embodiment. Furthermore, constituent elements over different embodiments may be appropriately combined. Thus, various modifications and applications are possible without departing from the spirit of the invention.

DESCRIPTION OF SYMBOLS 101 ... Lens 102 ... Motor 103 ... Focus control part 104 ... Aperture mechanism 105 ... Motor 106 ... Aperture control part 107 ... Shutter mechanism 108 ... Plunger 109 ... Plunger control part 110 ... Imaging element 112 ... AE process part 113 ... AF process Part 114: Image processing part 115 ... LCD driver 116 ... LCD
117: Non-volatile memory 118 ... Internal memory 119 ... Compression / decompression unit 120 ... Detachable memory 121 ... CPU
122 ... Input unit 123 ... Power supply unit 124 ... Data bus

Claims (5)

Comparing the ramp and the image signal changes stepwise voltage as time elapses, the image pickup having a function of analog-to-digital conversion of the image signal based on the time until the voltage of the ramp wave is coincident with the input voltage In the device
Moving image data is obtained by performing analog-digital conversion of the first number of quantization bits on a moving image signal read out by an electronic rolling shutter control from an imaging unit of an imaging element in which a plurality of pixel rows having a plurality of pixels are arranged. A video data generation unit to be generated;
Against still image signal read out by the electronic rolling shutter control from the imaging unit of the imaging device, and generates still image data by performing analog-digital conversion of the first number of bits greater than the number of quantization bits A still image data generation unit ;
Imaging apparatus characterized by comprising a. And imaging element control unit for outputting a synchronization signal for controlling the timing of imaging a dynamic E及BiShizu Tomega at predetermined time intervals,
2. The apparatus according to claim 1, further comprising a power control unit configured to reduce power supplied to the image sensor from the end of capturing an image of one frame until a next synchronization signal is generated. Imaging device. An imaging element control unit for outputting a synchronization signal for controlling the timing of imaging a dynamic E及BiShizu Tomega at predetermined time intervals,
The imaging apparatus according to claim 1, wherein a time required for analog-digital conversion of all pixels of the still image signal is substantially the same as a time required for analog-digital conversion of all pixels of the moving image signal.   When the difference between the time required for analog-digital conversion of one pixel of the still image signal and the time required for analog-digital conversion of one pixel of the moving image signal is ΔT, when the analog-digital conversion for each pixel of the moving image signal is completed The imaging apparatus according to claim 3, further comprising: a power control unit configured to reduce power consumption of the imaging element until ΔT elapses from the time point. The bit precision of the still image data, according to claim 1, characterized in that it comprises an image processing unit for converting the video data to bit conversion in bit precision video, according to claim 2, and claim 3 Imaging device.