JP2011124509A - Semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device reduced in on-resistance and power consumption while maintaining optimum a concentration ratio of a two-dimensional electron gas generated between a source and a gate and between a drain and the gate. <P>SOLUTION: The composition ratio of aluminum in a second AlGaN layer 6 is larger than that in a first AlGaN layer 5. Accordingly, when a voltage is applied to a gate electrode 8, the two-dimensional electron gas is generated in a first interface S1 between the second AlGaN layer 6 and the side 31 of an inner surface in the concave groove 30 of a GaN layer 3, and there can be suppressed an effect that the electron gas may be generated in a second interface S2 between an insulating layer 7 and a portion parallel to the side 31 of the inner surface in the concave groove 30 of the second AlGaN layer 6. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a semiconductor device such as a normally-off type field effect transistor.

  A field effect transistor based on GaN, which is a nitride semiconductor, has a high band gap, and a two-dimensional electron gas generated at the AlGaN / GaN interface as an electron channel due to the laminated structure of thick GaN and thin AlGaN. Can be used. Therefore, it is possible to realize a high breakdown voltage characteristic and a low on-resistance characteristic as compared with a field effect transistor using conventional Si. Among these, normally-off type field effect transistors are in high demand especially in the field of power devices that handle large currents from the viewpoint of safety at the time of failure. A normally-off transistor is normally turned off (when no voltage is applied to the gate), while the transistor is turned on by applying a voltage to the gate.

  As a conventional normally-off transistor, for example, as disclosed in Japanese Patent Application Laid-Open No. 2008-21083 (Patent Document 1), a step portion having a groove shape is provided in a gate portion, and 2 exists between a source and a drain. Some block the dimensional electron gas. At the time of turning on, a gate voltage is applied to generate a two-dimensional electron gas on the side wall of the stepped portion, thereby energizing between the source and the drain.

  In order to turn on this transistor, it is necessary to apply a positive potential to the gate electrode. Therefore, as illustrated in FIG. 6A, it is essential to provide the insulating layer 107 on the gate electrode 108. At this time, the laminated structure in the side wall portion of the stepped portion becomes the gate electrode 108, the insulating layer 107, the AlGaN layer 105, and the GaN layer 103 in order from the inner surface side of the groove.

  During the ON operation, a two-dimensional electron gas is generated at the interface between the AlGaN layer 105 and the GaN layer 103 by applying a gate electric field.

  However, according to the simulation results performed by the present inventors, not only the first interface S10 between the AlGaN layer 105 and the GaN layer 103 but also the second interface S20 between the insulating layer 107 and the AlGaN layer 105. Two-dimensional electron gas is generated. Specifically, as will be described in detail later, as indicated by a dotted line L1 in FIG. 6C, a two-dimensional electron gas is generated at the first interface S10, and as indicated by a dotted line L2 in FIG. A two-dimensional electron gas is generated at the interface S20.

This is because the Al composition ratio (Al _0.2 Ga _0.8 N) of AlGaN that optimizes the two-dimensional electron gas concentration generated between the source and the gate and between the gate and the drain is the side wall portion of the step portion It was found that the Al composition ratio was low for use in

  In this way, when the two-dimensional electron gas is generated twice, the current channel is also doubled. Since the mobility of the second interface S20 between the insulating layer 107 and the AlGaN layer 105 is lower than the mobility of the first interface S10 between the AlGaN layer 105 and the GaN layer 103, the two-dimensional electrons Compared with the case where the gas exists only at the first interface S10, the mobility as a whole decreases. Therefore, there are problems that the on-resistance is high and the power consumption is high.

JP 2008-210836 A (FIG. 12)

  Accordingly, an object of the present invention is to provide a semiconductor device with low power consumption by reducing the on-resistance while optimizing the concentration of the two-dimensional electron gas generated between the source and gate and between the drain and gate. is there.

In order to solve the above problems, a semiconductor device of the present invention is
A substrate,
A GaN layer laminated on the substrate and having a groove,
A first AlGaN layer stacked on both sides of the GaN layer across the groove,
A source electrode provided on the first AlGaN layer on one side of both sides of the concave groove;
A drain electrode provided on the first AlGaN layer on the other side of both sides of the concave groove;
A second AlGaN layer provided along the inner surface of the groove to cover the inner surface of the groove of the GaN layer;
An insulating layer stacked on the second AlGaN layer;
A gate electrode provided on the insulating layer,
The Al composition ratio of the second AlGaN layer is larger than the Al composition ratio of the first AlGaN layer.

  According to the semiconductor device of the present invention, since the Al composition ratio of the second AlGaN layer is larger than the Al composition ratio of the first AlGaN layer, when a voltage is applied to the gate electrode, The two-dimensional electron gas is generated at the first interface between the side surface of the inner surface of the groove and the second AlGaN layer, and the portion of the second AlGaN layer parallel to the side surface of the inner surface of the groove and the insulating layer Generation of a two-dimensional electron gas at the interface between the two can be suppressed. That is, the mobility of the first interface is higher than the mobility of the second interface, and a two-dimensional electron gas is generated at the first interface with a high mobility, and the mobility at the second interface with a low mobility is generated. Generation of two-dimensional electron gas can be suppressed. As a result, the mobility as a whole can be increased and the on-resistance can be decreased.

  In addition, since the Al composition ratio of the first AlGaN layer is smaller than the Al composition ratio of the second AlGaN layer, two-dimensionality is generated at the third interface between the first AlGaN layer and the GaN layer. The concentration of electron gas can be optimized. That is, it is possible to optimize the concentration of the two-dimensional electron gas generated at the third interface between the source electrode and the gate electrode and at the third interface between the drain electrode and the gate electrode.

  Therefore, since the on-resistance can be lowered while the concentration of the two-dimensional electron gas generated between the source and gate and between the drain and gate is optimized, a semiconductor device with low power consumption can be realized.

In the semiconductor device of one embodiment, 0.25 ≦ x <1 is satisfied when the composition formula of the second AlGaN layer is Al _x Ga _1-x N.

According to the semiconductor device of this embodiment, when the composition formula of the second AlGaN layer is Al _x Ga _1-x N, 0.25 ≦ x <1 is satisfied, so the second mobility is low. The two-dimensional electron gas can be generated only at the first interface having a high mobility without generating the two-dimensional electron gas at the interface. For this reason, mobility can be further increased and on-resistance can be further decreased.

  In one embodiment, the insulating layer and the gate electrode are along the inner surface of the groove of the GaN layer.

  According to the semiconductor device of this embodiment, since the insulating layer and the gate electrode are along the inner surface of the groove of the GaN layer, the gate electrode has a portion facing the first interface. When a voltage is applied to the gate electrode, a two-dimensional electron gas can be reliably generated at the first interface. Moreover, the cost of the material of the insulating layer and the gate electrode can be reduced.

  According to the semiconductor device of the present invention, since the Al composition ratio of the second AlGaN layer is larger than the Al composition ratio of the first AlGaN layer, it occurs between the source and gate and between the drain and gate. Since the on-resistance can be lowered while the concentration of the two-dimensional electron gas is optimized, a semiconductor device with low power consumption can be realized.

It is sectional drawing which shows one Embodiment of the semiconductor device of this invention. It is sectional drawing which shows the 1st process of the manufacturing method of a semiconductor device. It is sectional drawing which shows the 2nd process of the manufacturing method of a semiconductor device. It is sectional drawing which shows the 3rd process of the manufacturing method of a semiconductor device. It is sectional drawing which shows the 4th process of the manufacturing method of a semiconductor device. It is sectional drawing which shows the 5th process of the manufacturing method of a semiconductor device. It is sectional drawing which shows the 1st simulation of the operating characteristic of a semiconductor device. It is a graph which shows the result of the 1st simulation of the operating characteristic of a semiconductor device. It is a graph which shows the result of the 1st simulation of the operating characteristic of a semiconductor device. It is sectional drawing which shows the 2nd simulation of the operating characteristic of a semiconductor device. It is a graph which shows the result of the 2nd simulation of the operating characteristic of a semiconductor device. It is sectional drawing which shows the 3rd simulation of the operating characteristic of a semiconductor device. It is a graph which shows the result of the 3rd simulation of the operating characteristic of a semiconductor device. It is sectional drawing which shows the simulation of the operating characteristic of the conventional semiconductor device. It is a graph which shows the result of the simulation of the operation characteristic of the conventional semiconductor device. It is a graph which shows the result of the simulation of the operation characteristic of the conventional semiconductor device.

  Hereinafter, the present invention will be described in detail with reference to the illustrated embodiments.

  FIG. 1 is a sectional view showing an embodiment of a semiconductor device according to the present invention. As shown in FIG. 1, this semiconductor device 1 is a normally-off transistor, and includes a substrate 2, a GaN layer 3, an AlN layer 4, a first AlGaN layer 5, a second AlGaN layer 6, an insulating layer 7, and a gate. It has an electrode 8, a source electrode 9 and a drain electrode 10.

  The GaN layer 3 is stacked on the substrate 2. The GaN layer 3 has a concave groove 30. The first AlGaN layer 5 is stacked on both sides of the GaN layer 3 with the concave groove 30 interposed therebetween. The AlN layer 4 is interposed between the GaN layer 3 and the first AlGaN layer 5.

  The side surface of the first AlGaN layer 5, the side surface of the AlN layer 4, and the inner surface of the groove 30 of the GaN layer 3 constitute a step portion 11 as a recess structure. The step portion 11 is formed by dry etching, for example.

  The second AlGaN layer 6 is provided in parallel along the inner surface of the groove 30 so as to cover the inner surface of the groove 30 of the GaN layer 3. The second AlGaN layer 6 covers the upper surface of the first AlGaN layer 5 and the inner surface of the step portion 11.

  The insulating layer 7 is stacked on the second AlGaN layer 6. The insulating layer 7 is parallel along the inner surface of the groove 30 of the GaN layer 3. The insulating layer 7 covers the entire portion of the second AlGaN layer 6 that exists in the stepped portion 11 and the portion of the second AlGaN layer 6 that exists on the upper surface of the first AlGaN layer 5.

  The gate electrode 8 is provided on the insulating layer 7. The gate electrode 8 is parallel along the inner surface of the concave groove 30 of the GaN layer 3.

  The source electrode 9 is provided on the upper surface of the second AlGaN layer 6 on the first AlGaN layer 5 on one side of the both sides of the concave groove 30. The drain electrode 10 is provided on the upper surface of the second AlGaN layer 6 on the first AlGaN layer 5 on the other side of both sides of the concave groove 30.

  At the interface between the polar face of the GaN layer 3 and the first AlGaN layer 5 (the AlN layer 4), it is normal (while the gate electric field is off and no voltage is applied to the gate electrode 8). Also, a two-dimensional electron gas is generated, and the same region (in-plane direction X of the interface between the GaN layer 3 and the first AlGaN layer 5 (AlN layer 4)) has a high mobility and a low resistance current. Become a channel.

  In the first interface S1 between the side surface 31 on the inner surface of the concave groove 30 of the GaN layer 3 and the second AlGaN layer 6, the GaN layer 3 is perpendicular to the plane and not a polar surface. Two-dimensional electron gas is not generated. For this reason, normally, the first interface S1 does not become a current channel, and the semiconductor device 1 is turned off. On the other hand, since the two-dimensional electron gas is generated at the first interface S1 when the gate electric field is on, the semiconductor device 1 is turned on.

Here, the Al composition ratio of the second AlGaN layer 6 is larger than the Al composition ratio of the first AlGaN layer 5. When the composition formula of the second AlGaN layer 6 is Al _x Ga _1-x N, 0.25 ≦ x <1 is satisfied. Therefore, when the gate electric field is turned on, generation of a two-dimensional electron gas at the second interface S2 between the insulating layer 7 and the portion parallel to the side surface 31 of the inner surface of the groove 30 in the second AlGaN layer 6 is suppressed. However, the two-dimensional electron gas can be generated only at the first interface S1 having higher mobility.

  Next, a method for manufacturing the semiconductor device 1 having the above configuration will be described.

  First, as shown in FIG. 2A, a GaN layer 3, an AlN layer 4, and a first AlGaN layer 5 are formed on a substrate 2 by epitaxial growth. As the substrate 2, for example, a Si (111) substrate, a sapphire (0001) substrate, or a GaN (0001) substrate is used.

  The GaN layer 3 is formed, for example, by laminating about 1 to 5 μm at a substrate temperature of about 1000 ° C. using an MOCVD apparatus. When a GaN (0001) substrate is used for the substrate 2, the GaN layer 3 has a polar surface as a growth surface. When a substrate other than the GaN (0001) substrate is used as the substrate 2, a buffer layer may be formed on the substrate 2 before the GaN layer 3 is laminated in order to improve the crystallinity of the GaN layer 3.

The first AlGaN layer 5 is used to generate a two-dimensional electron gas at the interface with the GaN layer 3. The composition of the first AlGaN layer 5 is Al _0.2 Ga _0.8 N, and the thickness of the first AlGaN layer 5 is preferably 20 nm. In this case, an optimal two-dimensional electron gas concentration can be generated between the source and the drain.

  The AlN layer 4 is used to further improve the mobility as compared with the case of the first AlGaN layer 5 alone. The thickness of the AlN layer 4 is preferably about 1 nm.

  Thereafter, the temperature of the substrate 2 is lowered to room temperature, and recess etching is performed as shown in FIG. This etching is performed by, for example, an ICP (Inductive Coupled Plasma) etching method after forming a resist pattern by lithography. When the etching depth D is too shallow, the length of the side surface 31 of the groove 30 is shortened and the withstand voltage characteristics at the time of OFF are lowered, so that it is about 50 to 500 nm, preferably 100 to 500 nm. The etching width H is about 0.1 to 1 μm, preferably 0.1 to 0.3 μm, from the resolution limit of the lithography apparatus.

Then, the temperature of the substrate 2 is raised to about 1000 ° C., and the second AlGaN layer 6 is regrown by the MOCVD apparatus as shown in FIG. 2C. As the composition ratio of the second AlGaN layer 6, a composition having a high Al composition of 25% or more, such as Al _0.25 Ga _0.75 N, is used. The thickness of the second AlGaN layer 6 is preferably 2 to 10 nm because if it is too thin, the two-dimensional electron gas concentration generated when the gate electric field is applied is too low. Thereby, it is possible to generate the two-dimensional electron gas only at the first interface S1 while suppressing the generation of the two-dimensional electron gas at the second interface S2. For this reason, optimal mobility can be obtained. Thus, the composition of the second AlGaN layer 6 of the step portion 11 is changed from the first AlGaN layer 5 by using a manufacturing method in which the second AlGaN layer 6 is newly regrown after the recess etching. Can be designed independently.

  Thereafter, as shown in FIG. 2D, the insulating layer 7 is formed by, for example, a sputtering apparatus. As a material of the insulating layer 7, for example, silicon oxide, hafnium oxide, aluminum oxide, a mixed crystal thereof, and a laminated film are used.

  Finally, as shown in FIG. 2E, the gate electrode 8, the source electrode 9, and the drain electrode 10 are formed. As these electrode materials, for example, metals such as Al, Ti, Au, Hu, and W, alloys thereof, and laminated films are used. The source electrode 9 and the drain electrode 10 may be formed immediately after the formation of the nitride semiconductor epitaxial layers (GaN layer 3, AlN layer 4 and first AlGaN layer 5) shown in FIG. 2A.

Next, the operating characteristics of the semiconductor device 1 having the above configuration were verified by simulation. The results of the simulation are shown in FIGS. 3A, 3B, 3C to 5A, 5B. In this semiconductor device 1, the thickness of the AlN layer 4 is 1 nm, the composition of the first AlGaN layer 5 is Al _0.2 Ga _0.8 N, the thickness of the first AlGaN layer 5 is 20 nm, and the second AlGaN layer 6 The composition is Al _0.25 Ga _0.75 N, the thickness of the second AlGaN layer 6 is 5 nm, and the thickness of the insulating layer 7 is 40 nm.

  First, as shown in FIG. 3A, the operating characteristics at the AA cross section in the direction (in-plane direction) orthogonal to the side surface 31 in the vicinity of the side surface 31 of the groove 30 of the semiconductor device 1 are shown. Verified.

  As a result, as shown in FIG. 3B, it can be seen that when the gate electric field is not applied (Vgs = 0), the two-dimensional electron gas is not generated in the AA cross section of the semiconductor device 1. Therefore, normally-off characteristics can be realized. In FIG. 3B, solid lines B1 and B2 indicate the energy band of the semiconductor device 1, and hatching G indicates the energy band of the gate electrode 8. The vertical axis on the left indicates electron energy, the vertical axis on the right indicates electron concentration, and the horizontal axis indicates the distance from the gate electrode.

  On the other hand, as shown in FIG. 3C, when a gate electric field is applied (Vgs = 4.6 V), a state where a two-dimensional electron gas is generated is shown in the AA cross section of the semiconductor device 1. That is, as indicated by the dotted line L1, a two-dimensional electron gas is generated at the first interface S1. Further, no two-dimensional electron gas is generated at the second interface S2. In FIG. 3C, a dotted line L1 indicates the electron concentration of the semiconductor device 1.

  Therefore, when a gate electric field is applied, a current channel having high mobility is formed and the transistor is turned on. As described above, it was found that the Al composition of the second AlGaN layer 6 needs 25 to 100% in order to generate the two-dimensional electron gas only at the first interface S1.

  Secondly, as shown in FIG. 4A, the operation characteristics in the BB cross section in the direction orthogonal to the bottom surface in the vicinity of the bottom surface of the groove 30 of the semiconductor device 1 were verified.

  As a result, as shown in FIG. 4B, it can be seen that when the gate electric field is not applied (Vgs = 0), a two-dimensional electron gas is generated in the BB cross section of the semiconductor device 1. That is, as indicated by a dotted line L1, a two-dimensional electron gas is generated at the interface between the GaN layer 3 and the second AlGaN layer 6. Thus, in the in-plane direction of the interface between the GaN layer 3 and the second AlGaN layer 6, a two-dimensional electron gas is generated regardless of on / off of the gate electric field, and always has high mobility. It becomes a current channel.

  Third, as shown in FIG. 5A, in a portion between the source electrode 9 and the gate electrode 8 of the semiconductor device 1, at a CC cross-sectional portion in a direction orthogonal to the upper surface of the second AlGaN layer 6. The operating characteristics were verified.

  As a result, as shown in FIG. 5B, even when the gate electric field is not applied (Vgs = 0), the two-dimensional electron gas is generated in the CC cross section of the semiconductor device 1, and the movement is always high. The current channel has a degree.

  As a result of the first to third simulations, the semiconductor device 1 of the present invention normally has no current channel in the side wall portion of the stepped portion 11 during normal times, and a new side wall of the stepped portion 11 when a gate electric field is applied. Since the two-dimensional electron gas is generated only at the first interface S1 of the part, it can be said that it has the characteristics of a normally-off transistor having high mobility.

Next, as a comparative example, the operation characteristics of the conventional semiconductor device 101 were verified by simulation. The simulation results are shown in FIGS. 6A to 6C. In this semiconductor device 101, an AlGaN layer 105, an insulating layer 107, and a gate electrode 108 are stacked on a GaN layer 103 having a concave groove 130. That is, the second AlGaN layer 6 of the semiconductor device 1 of FIG. 1 is not provided. The composition of the AlGaN layer 105 is Al _0.2 Ga _0.8 N, the thickness of the first AlGaN layer 5 is 25 nm, and the thickness of the insulating layer 107 is 40 nm.

  As shown in FIG. 6A, the operating characteristics in the DD cross-section portion in the direction (in-plane direction) perpendicular to the side surface 131 in the vicinity of the side surface 131 of the concave groove 130 of the semiconductor device 101 were verified.

  As a result, as shown in FIG. 6B, it can be seen that when the gate electric field is not applied (Vgs = 0), the two-dimensional electron gas is not generated in the DD cross section of the semiconductor device 101.

  On the other hand, as shown in FIG. 6C, when a gate electric field is applied (Vgs = 4.6 V), a state where a two-dimensional electron gas is generated is shown in the DD cross section of the semiconductor device 101. That is, two-dimensional electron gas is generated at the first interface S10 between the AlGaN layer 105 and the GaN layer 103 as indicated by the dotted line L1, and the insulating layer 107 and the AlGaN layer 105 are indicated as indicated by the dotted line L2. Two-dimensional electron gas is generated at the second interface S20 between the two.

  Since the mobility of the second interface S20 is lower than the mobility of the first interface S10, the mobility as a whole is lower than when the two-dimensional electron gas exists only in the first interface S10. To do. Therefore, the conventional semiconductor device 101 has a high on-resistance and high power consumption.

  According to the semiconductor device 1 having the above configuration, since the Al composition ratio of the second AlGaN layer 6 is larger than the Al composition ratio of the first AlGaN layer 5, when a voltage is applied to the gate electrode 8. The two-dimensional electron gas is generated at the first interface S1 between the side surface 31 of the inner surface of the concave groove 30 of the GaN layer 3 and the second AlGaN layer 6, and the inner surface of the concave groove 30 of the second AlGaN layer 6 is generated. Generation of a two-dimensional electron gas at the second interface S2 between the portion parallel to the side surface 31 and the insulating layer 7 can be suppressed. That is, the mobility of the first interface S1 is higher than the mobility of the second interface S2, and a two-dimensional electron gas is generated at the first interface S1 having a high mobility. Generation of a two-dimensional electron gas at the interface S2 can be suppressed. As a result, the mobility as a whole can be increased and the on-resistance can be decreased.

  Further, since the Al composition ratio of the first AlGaN layer 5 is smaller than the Al composition ratio of the second AlGaN layer 6, the first AlGaN layer 5 (AlN layer 4) and the GaN layer 3 The concentration of the two-dimensional electron gas generated at the third interface can be optimized. That is, the concentration of the two-dimensional electron gas generated at the third interface between the source electrode 9 and the gate electrode 8 and at the third interface between the drain electrode 10 and the gate electrode 8 is optimized. Can be.

  Therefore, since the on-resistance can be lowered while the concentration of the two-dimensional electron gas generated between the source and gate and between the drain and gate is optimized, the semiconductor device 1 with low power consumption can be realized.

Further, when the composition formula of the second AlGaN layer 6 is Al _x Ga _1-x N, 0.25 ≦ x <1 is satisfied, so that the two-dimensional electrons are formed on the second interface S2 having low mobility. A two-dimensional electron gas can be generated only at the first interface S1 having a high mobility without generating a gas. For this reason, mobility can be further increased and on-resistance can be further decreased.

  In addition, since the insulating layer 7 and the gate electrode 8 are along the inner surface of the concave groove 30 of the GaN layer 3, the gate electrode 8 has a portion facing the first interface S1, so that the gate electrode When a voltage is applied to 8, a two-dimensional electron gas can be reliably generated at the first interface S1. Moreover, the cost of the material of the insulating layer 7 and the gate electrode 8 can be reduced.

  In addition, this invention is not limited to the above-mentioned embodiment. For example, the second AlGaN layer 6 may be provided so as to cover only the inner surface of the groove 30 of the GaN layer 3. Alternatively, the AlN layer 4 may be omitted and the first AlGaN layer 5 may be in direct contact with the GaN layer 3. Further, the insulating layer 7 and the gate electrode 8 may be provided so as to fill the step portion 11.

DESCRIPTION OF SYMBOLS 1 Semiconductor device 2 Board | substrate 3 GaN layer 30 Groove | groove 31 Side surface 4 AlN layer 5 1st AlGaN layer 6 2nd AlGaN layer 7 Insulating layer 8 Gate electrode 9 Source electrode 10 Drain electrode 11 Step part S1 1st interface S2 2nd 2 interface

Claims (3)

A substrate,
A GaN layer laminated on the substrate and having a groove,
A first AlGaN layer stacked on both sides of the GaN layer across the groove,
A source electrode provided on the first AlGaN layer on one side of both sides of the concave groove;
A drain electrode provided on the first AlGaN layer on the other side of both sides of the concave groove;
A second AlGaN layer provided along the inner surface of the groove to cover the inner surface of the groove of the GaN layer;
An insulating layer stacked on the second AlGaN layer;
A gate electrode provided on the insulating layer,
2. The semiconductor device according to claim 1, wherein an Al composition ratio of the second AlGaN layer is larger than an Al composition ratio of the first AlGaN layer. The semiconductor device according to claim 1,
A semiconductor device characterized by satisfying 0.25 ≦ x <1 when the composition formula of the second AlGaN layer is Al _x Ga _1-x N. The semiconductor device according to claim 1 or 2,
The semiconductor device according to claim 1, wherein the insulating layer and the gate electrode are along an inner surface of the groove of the GaN layer.

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