JP2011110601A - Joining material, method of manufacturing joining material and semiconductor device, method of manufacturing semiconductor device - Google Patents

Joining material, method of manufacturing joining material and semiconductor device, method of manufacturing semiconductor device Download PDF

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JP2011110601A
JP2011110601A JP2009271886A JP2009271886A JP2011110601A JP 2011110601 A JP2011110601 A JP 2011110601A JP 2009271886 A JP2009271886 A JP 2009271886A JP 2009271886 A JP2009271886 A JP 2009271886A JP 2011110601 A JP2011110601 A JP 2011110601A
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alloy layer
semiconductor element
semiconductor device
connection
based alloy
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JP5251849B2 (en
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Takuto Yamaguchi
拓人 山口
Masahide Okamoto
正英 岡本
Yasushi Ikeda
靖 池田
慶平 ▲冬▼
Keihei Fuyu
Hiromitsu Kuroda
洋光 黒田
Kazuma Kuroki
一真 黒木
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Hitachi Cable Ltd
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    • H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
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    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
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    • H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
    • H01L2224/83101—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus as prepeg comprising a layer connector, e.g. provided in an insulating plate member
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Abstract

<P>PROBLEM TO BE SOLVED: To perform the joining of a semiconductor element and a frame or a substrate by using a material in which lead is not used and to secure high reliability. <P>SOLUTION: As the joining material between the semiconductor element and the frame or the substrate, the joining material based on a clad material in which an Al-based alloy layer 102 is held by a Zn-base alloy layers 101 is used. The Zn-Al alloy 103 exists in the clad material, but the ratio of the Zn-Al alloy 103 is taken as ≤40% of the whole. The average crystal grain size of the Zn-alloy layer 101 is 0.85-50 μm. By performing the joining by using such a clad material, the void ratio in the joined part is suppressed to ≤10%. Further, the wettability between the semiconductor and the frame or the substrate is secured. Thus, the high reliability in the joined part is secured. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

本発明は接続材料に関し、特に、パワー半導体装置、パワーモジュール等の内部接続に用いられる高耐熱接続材料に関する。   The present invention relates to a connection material, and more particularly, to a high heat resistance connection material used for internal connection of a power semiconductor device, a power module and the like.

環境への意識が高まる中、人体への有害性が指摘される鉛の規制が始まっている。欧州では自動車中の鉛使用を制限するELV指令（End-of Life Vehicles directive、廃自動車に関する指令）や電機・電子機器中の鉛使用を禁止するRoHS（Restriction of the use of certain Hazardous Substances in electrical and electronic equipment）指令が施行された。電機・電子機器の部品の電気的接続に使用されているはんだには、従来、鉛が含まれていた。はんだは融点により高温、中温、低温の3種類に分けられるが、中温はんだはSn-Ag-Cu系はんだ、Sn-Cu系はんだ等、低温はんだはSn-Bi系はんだ、Sn-In系はんだ等が既に開発・実用化され、ELV指令、RoHS指令に適合してきた。ところが、高温はんだについては、鉛の含有率が85％以上の高鉛はんだが用いられ、鉛フリーの代替材料が開発されていないため、上記ELV指令、RoHS指令の対象外になっている。しかしながら、高鉛はんだは構成成分として、85wt.％以上の鉛を含有しており、RoHS指令で禁止されているSn-Pb共晶はんだに比べて環境への負荷が大きい。よって、高鉛はんだの代替材料の開発が望まれている。   With the growing awareness of the environment, the regulation of lead that has been pointed out to be harmful to the human body has begun. In Europe, the ELV Directive (End-of Life Vehicles directive) restricts the use of lead in automobiles and the RoHS (Restriction of the use of certain Hazardous Substances in electrical and) Electronic equipment) directive was enforced. Conventionally, solder used for electrical connection of parts of electric and electronic devices has contained lead. There are three types of solder depending on the melting point: high temperature, medium temperature, and low temperature, but medium temperature solder is Sn-Ag-Cu solder, Sn-Cu solder, etc., and low temperature solder is Sn-Bi solder, Sn-In solder, etc. Has already been developed and put into practical use and has been compliant with the ELV and RoHS directives. However, for high-temperature solder, high-lead solder with a lead content of 85% or more is used, and no lead-free alternative material has been developed. However, high-lead solder contains 85 wt.% Or more of lead as a constituent component, and has a greater environmental impact than Sn-Pb eutectic solder prohibited by the RoHS directive. Therefore, development of an alternative material for high lead solder is desired.

高耐熱接続の適用例を図１に示す。図１は半導体装置の構造を示す図である。図２は、再溶融したはんだによるフラッシュを説明する図である。   An example of application of high heat resistance connection is shown in FIG. FIG. 1 is a diagram illustrating a structure of a semiconductor device. FIG. 2 is a diagram illustrating flashing by remelted solder.

図１に示すように、半導体装置７は半導体素子１がフレーム上にはんだ３により接続（ダイボンディング）され、ワイヤ４によりリード５のインナーリードと半導体素子１の電極がワイヤボンディングされた後、封止用レジン６あるいは不活性ガスにより封止されて製造される。   As shown in FIG. 1, the semiconductor device 7 is sealed after the semiconductor element 1 is connected to the frame by solder 3 (die bonding), and the inner lead of the lead 5 and the electrode of the semiconductor element 1 are wire bonded by the wire 4. It is manufactured by sealing with a stopping resin 6 or an inert gas.

この半導体装置７はSn-Ag-Cu系の中温鉛フリーはんだによりプリント基板にリフローはんだ付けされる。Sn-Ag-Cu系鉛フリーはんだの融点は約220℃と高く、リフロー接続の際に接続（ダイボンディング）部が再溶融しないように、ダイボンディングには、290℃以上の融点を有する高鉛はんだが使用される。   The semiconductor device 7 is reflow soldered to the printed circuit board with Sn-Ag-Cu based medium temperature lead-free solder. Sn-Ag-Cu-based lead-free solder has a high melting point of about 220 ° C, and high-lead with a melting point of 290 ° C or higher is used for die bonding so that the connection (die bonding) part does not remelt during reflow connection. Solder is used.

現在、既に開発されているSn-Ag-Cu系はんだ等の中温鉛フリーはんだは融点が約220℃であるため、半導体素子のダイボンディングに使用した場合、半導体装置をプリント基板にリフロー接続する際にはんだが溶融してしまう。接続部周りがレジンでモールドされている場合、内部のはんだが溶融すると、溶融時の体積膨張により、図２に示すように、フラッシュといって封止用レジン６とフレーム２の界面からはんだ３が漏れ出す現象を生ずることがある。あるいは、漏れ出さないまでも、漏れ出そうと作用し、その結果、凝固後にはんだの中に大きなボイド8が形成され不良品となる。代替材料の候補としては、融点の面からAu-Sn、Au-Si、Au-Ge等のAu系はんだ、Zn、Zn-Al系のはんだおよびBi、Bi-Cu、Bi-Ag等のはんだが報告されており、世界中で検討が進められている。   Currently developed intermediate temperature lead-free solders such as Sn-Ag-Cu solders have a melting point of about 220 ° C, so when used for die bonding of semiconductor elements, reflow connection of semiconductor devices to printed circuit boards The solder melts. When the periphery of the connecting portion is molded with a resin, when the internal solder is melted, the volume of the molten solder expands, so as shown in FIG. 2, the flash is called the solder 3 from the interface between the sealing resin 6 and the frame 2. May cause leakage. Alternatively, even if it does not leak, it acts to leak, and as a result, a large void 8 is formed in the solder after solidification, resulting in a defective product. Candidates for alternative materials are Au-Sn, Au-Si, Au-Ge, etc. Au solder, Zn, Zn-Al solder, and Bi, Bi-Cu, Bi-Ag solder, etc. It has been reported and is being studied around the world.

しかしながら、Au系のはんだは、構成成分としてAuを80wt.％以上含有しており、コスト面で汎用性に難があり、また硬くて脆いハードソルダーである。Bi系はんだは、熱伝導率が約9W/m・Kと現行の高温はんだより低く、高放熱性が要求されるパワー半導体装置およびパワーモジュール等への適用は難しいと推定できる。またこのはんだも硬くて脆い。また、ZnおよびZn-Al系はんだは約100W/m・Kと高い熱伝導率を有するが、濡れにくく（特にZn-Al系はんだ）、はんだが硬く、熱膨張率が大きいため、接続後の冷却時に熱応力によって半導体素子が破壊しやすい等の問題がある。また、純Znは反応性が高く、高温で界面反応が著しく進むため、たとえ良好な接続が得られたとしても、長期の稼動に耐える高耐熱性が得られない。   However, Au-based solder contains 80 wt.% Or more of Au as a constituent component, is difficult to be versatile in terms of cost, and is a hard and brittle hard solder. Bi-based solder has a thermal conductivity of about 9 W / m · K, which is lower than current high-temperature solder, and it can be estimated that it is difficult to apply it to power semiconductor devices and power modules that require high heat dissipation. This solder is also hard and brittle. In addition, Zn and Zn-Al solder have a high thermal conductivity of about 100 W / m · K, but they are difficult to wet (especially Zn-Al solder), hard and have a high coefficient of thermal expansion. There is a problem that the semiconductor element is easily destroyed by thermal stress during cooling. In addition, pure Zn has high reactivity, and the interfacial reaction proceeds remarkably at high temperature. Therefore, even if good connection is obtained, high heat resistance that can withstand long-term operation cannot be obtained.

またZn-Al系はんだの課題である濡れにくいことおよび硬いことを解決する接続材として、Zn/Al/Znクラッド材を用いる方法が開示されている。開示内容によれば、表面のZn層により濡れ性（接続性）を確保でき、内層の柔らかいAlにより応力緩衝能を付与し、接続信頼性を確保できるとしている。また、ZnおよびAlの融点はそれぞれ420℃、660℃であり、ZnとAlの拡散により生成するZn-Al共晶（Zn-6Al）の融点も382℃であるため、接続材は高融点であり、高耐熱性を有する。   Further, a method of using a Zn / Al / Zn clad material as a connection material that solves the problem of being hard to wet and hard, which is a problem of Zn-Al solder, is disclosed. According to the disclosure, wettability (connectivity) can be secured by the Zn layer on the surface, and stress buffering ability can be imparted by the soft Al of the inner layer to ensure connection reliability. The melting points of Zn and Al are 420 ° C and 660 ° C, respectively, and the melting point of Zn-Al eutectic (Zn-6Al) formed by the diffusion of Zn and Al is 382 ° C, so the connecting material has a high melting point. Yes, it has high heat resistance.

特許3850135号Patent No.3850135 特許3945915号Japanese Patent No.3945915 特開2008-126272号公報JP 2008-126272 A

特許文献１および２に記載のZn-Al系はんだの場合、Alが成分であるために、接合の前の段階で既にはんだ表面のAlが酸化しており接合を阻害するため、機械的に酸化物膜を破らなければ十分な濡れが得られない。その場合には、もし接続できたとしても、ごく局所的にしか接続せず、非常に低い接続強度しか得られず、実用には耐えない。   In the case of the Zn-Al solders described in Patent Documents 1 and 2, since Al is a component, Al on the solder surface has already been oxidized at the stage before joining, and the joining is inhibited. If the material film is not broken, sufficient wetting cannot be obtained. In that case, even if a connection can be made, the connection can be made only very locally, and a very low connection strength can be obtained.

特許文献３に記載のZn/Al/Znクラッド材を用いた接続に関して、本発明者が検討したところ、接続性および接続信頼性が得られることは確認できたが、該クラッド材を加熱すると、クラッド材の製造が不十分だと、図７に示すようにZn/Al層間で剥離が生じることがわかった。そのようなクラッド材を半導体接続に用いた場合、熱抵抗への影響が懸念される。また、熱間圧延すると、Zn/Al層間にはZnとAlの原子が相互に拡散したZn-Al合金層（固溶体層）が厚く形成され、圧延による接合時の加熱によってZn表層にまでAl原子が到達する可能性があり、濡れ性への影響が懸念されるということがわかった。   Regarding the connection using the Zn / Al / Zn clad material described in Patent Document 3, the inventors have confirmed that connectivity and connection reliability can be obtained, but when the clad material is heated, When the production of the clad material was insufficient, it was found that peeling occurred between the Zn / Al layers as shown in FIG. When such a clad material is used for semiconductor connection, there is a concern about influence on thermal resistance. In addition, when hot rolled, a Zn-Al alloy layer (solid solution layer) in which Zn and Al atoms diffused between each other is formed thick between the Zn / Al layers, and Al atoms reach the Zn surface layer by heating during bonding by rolling. It has been found that there is a concern about the effect on wettability.

解決しようとする問題は、Zn/Al/Znクラッド材を用いた接続において、加熱時に層間剥離を生じる点、および濡れ性が不十分な点にある。   The problem to be solved is that in the connection using a Zn / Al / Zn clad material, delamination occurs during heating and the wettability is insufficient.

本願において開示される発明のうち、代表的なものの概要を簡単に説明すれば、次の通りである。   Of the inventions disclosed in the present application, the outline of typical ones will be briefly described as follows.

本発明は、Zn/Al/Znクラッド材において、Zn/Al界面に生成するZn-Al合金（固溶体）の生成量がクラッド材の断面の面積に対して40％以下であり、且つ、Zn層の平均結晶粒径が50μm以下であることを特徴とするZn/Al/Znクラッド材を提供するものである。   The present invention provides a Zn / Al / Zn clad material in which the amount of Zn-Al alloy (solid solution) produced at the Zn / Al interface is 40% or less of the cross-sectional area of the clad material, and the Zn layer The Zn / Al / Zn clad material is characterized in that the average crystal grain size is 50 μm or less.

また本発明は、冷間クラッド圧延（室温から高々+50℃の範囲）により、Zn箔とAl箔を接続し、Zn/Al界面に生成するZn-Al合金の生成量がクラッド材の断面の面積に対して40％以下であり、且つ、Zn層の平均結晶粒径が50μm以下であることを特徴とするZn/Al/Znクラッド材の製造方法を提供するものである。   In addition, the present invention connects Zn foil and Al foil by cold clad rolling (range from room temperature to at most + 50 ° C), and the amount of Zn-Al alloy produced at the Zn / Al interface is the cross section of the clad material. The present invention provides a method for producing a Zn / Al / Zn clad material characterized by being 40% or less with respect to the area and having an average crystal grain size of a Zn layer of 50 μm or less.

また、本発明は、半導体素子をフレームに接続する半導体装置（ダイボンディング構造）、金属キャップを基板に接続する半導体装置（気密封止構造）、バンプにより接続する半導体装置（フリップチップ実装構造）において、前記クラッド材を用い接続し、接続部のボイド率が界面全体の面積において10％以下となる半導体装置を提供するものである。図３は接続部であるはんだ３の温度を上げて溶融した後、ＩＣチップ貯まった状態における平面図である。ボイド率は、図３に示すように、接続部であるはんだ３の平面方向において、ボイド８の全面積をはんだ３の平面方向の面積で割ったもので定義される。   The present invention also relates to a semiconductor device (die bonding structure) for connecting a semiconductor element to a frame, a semiconductor device for connecting a metal cap to a substrate (hermetic sealing structure), and a semiconductor device for connecting by a bump (flip chip mounting structure). The present invention provides a semiconductor device that is connected using the clad material and has a void ratio of 10% or less in the entire interface area. FIG. 3 is a plan view of the state in which the IC chip is stored after the temperature of the solder 3 as the connection portion is raised and melted. As shown in FIG. 3, the void ratio is defined as the total area of the void 8 divided by the area of the solder 3 in the plane direction in the plane direction of the solder 3 that is the connection portion.

本発明によれば、Zn層の平均結晶粒径が50μm以下とすることで、Zn層の強度が向上する。そのため、Zn/Al/Znクラッド材の加熱時に、ZnとAlの熱膨張係数差に起因した熱応力でZn/Al層間が剥離することを抑制できる。さらに、Zn/Al層間に形成するZn-Al合金層（固溶体層）の面積割合を40％以下とすることで、Zn/Al層間の密着強度の低下を抑制し、Zn/Al層間剥離を抑制する。   According to the present invention, the strength of the Zn layer is improved when the average crystal grain size of the Zn layer is 50 μm or less. Therefore, when the Zn / Al / Zn clad material is heated, it is possible to prevent the Zn / Al layers from being separated due to thermal stress caused by the difference in thermal expansion coefficient between Zn and Al. Furthermore, by reducing the area ratio of the Zn-Al alloy layer (solid solution layer) formed between the Zn / Al layers to 40% or less, the decrease in the adhesion strength between the Zn / Al layers is suppressed, and the Zn / Al delamination is suppressed. To do.

同時に、加熱時にAl原子がZn表層まで拡散することを抑制し、接続時の濡れ性を改善することができる。この結果、該クラッド材を接続材として用いた場合、半導体装置の接続部のボイド率を低減でき、半導体装置の信頼性を向上することが可能となる。   At the same time, Al atoms can be prevented from diffusing up to the Zn surface layer during heating, and wettability during connection can be improved. As a result, when the clad material is used as a connection material, the void ratio of the connection portion of the semiconductor device can be reduced, and the reliability of the semiconductor device can be improved.

接続部はボイドの周辺から破壊が進む。したがって、ボイド率を低下させることによって、接続部の破壊の進行を低減することが出来、長期の信頼性を確保することが出来る。また、熱サイクルによる接続部の劣化もボイドの周辺において進行する。したがって、ボイド率を低下させることによって、熱サイクルによる接続部の劣化も防止することが出来る。   The connection part breaks down from around the void. Therefore, by reducing the void ratio, it is possible to reduce the progress of destruction of the connecting portion, and to ensure long-term reliability. Further, the deterioration of the connection portion due to the thermal cycle also proceeds around the void. Therefore, by reducing the void ratio, it is possible to prevent the connection portion from being deteriorated due to the thermal cycle.

半導体装置の構造を示す図である。It is a figure which shows the structure of a semiconductor device. 図１の半導体装置において、再溶融したはんだによるフラッシュを説明する図である。FIG. 2 is a diagram illustrating flashing by remelted solder in the semiconductor device of FIG. 1. ボイド率の定義を示す、接続部の平面図である。It is a top view of the connection part which shows the definition of a void ratio. 本発明を実施するための形態において、冷間クラッド圧延を説明する図である。In the form for implementing this invention, it is a figure explaining cold clad rolling. 本発明を実施するための形態において、加圧成形を説明する図である。In the form for implementing this invention, it is a figure explaining pressure molding. 本発明を実施するための形態における接続材料の断面を示す図である。It is a figure which shows the cross section of the connection material in the form for implementing this invention. 従来技術により製造したZn/Al/Zn接続材を融点直下の温度まで加熱し、層間剥離が生じている断面図である。It is sectional drawing in which the Zn / Al / Zn connecting material manufactured by the prior art is heated to a temperature just below the melting point and delamination occurs. 図６の接続材料の構成を示す図である。It is a figure which shows the structure of the connection material of FIG. 本発明を実施するための形態において、接続材料（実施例１〜１６）を用いた半導体装置の断面を示す図である。In the form for implementing this invention, it is a figure which shows the cross section of the semiconductor device using the connection material (Examples 1-16). 図９の半導体装置において、接続材料による接続部の断面写真を示す図である。FIG. 10 is a view showing a cross-sectional photograph of a connection portion made of a connection material in the semiconductor device of FIG. 9. 接合材の380℃×1min加熱実験を行い、Zn層表面へのAlの露出の有無、濡れ性の評価、Zn/Al層間剥離の有無についてまとめた結果と、図９の半導体装置を製造し、接合部のボイド率と信頼性の評価結果を比較例と共に示した図である。The joint material was subjected to a heating experiment at 380 ° C. × 1 min, and the result of summarizing the presence / absence of exposure of Al on the Zn layer surface, the evaluation of wettability, the presence / absence of Zn / Al delamination, and the semiconductor device of FIG. It is the figure which showed the void ratio and reliability evaluation result of the junction part with the comparative example. 図１１の信頼性判定の基となる温度サイクル試験前後の熱抵抗変動について、結果の一部を比較例と共に示した図である。It is the figure which showed a part of result with the comparative example about the thermal resistance fluctuation | variation before and after the temperature cycle test used as the basis of reliability determination of FIG. 本発明を実施するための形態において、接続材料（実施例１７〜３２）を用いた別の半導体装置の断面を示す図である。In the form for implementing this invention, it is a figure which shows the cross section of another semiconductor device using the connection material (Examples 17-32). 図１３の半導体装置において、接続材料一体型の金属キャップを示す図である。FIG. 14 is a diagram showing a metal cap integrated with a connection material in the semiconductor device of FIG. 13. 接合材の380℃×1min加熱実験を行い、Zn層表面へのAlの露出の有無、濡れ性の評価、Zn/Al層間剥離の有無についてまとめた結果と、図１３の半導体装置を製造し、接合部のボイド率と信頼性（気密性）の評価結果を比較例と共に示した図である。Conducting a heating experiment of the bonding material at 380 ° C. × 1 min, producing the semiconductor device of FIG. 13 together with the results of summarizing the presence or absence of Al exposure to the Zn layer surface, the evaluation of wettability, and the presence or absence of Zn / Al delamination, It is the figure which showed the void ratio of the junction part, and the evaluation result of reliability (airtightness) with the comparative example. 本発明を実施するための形態において、接続材料を用いたさらに別の半導体装置の断面および実装構造を示す図である。In the form for implementing this invention, it is a figure which shows the cross section and mounting structure of another semiconductor device using the connection material.

以下、本発明の実施の形態を図面に基づいて詳細に説明する。なお、実施の形態を説明するための全図において、同一部材には原則として同一の符号を付し、その繰り返しの説明は省略する。   Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiment, and the repetitive description thereof will be omitted.

本発明を実施するために使用する接続材料の断面を図６に示す。下からZn系合金層（単にZn層、Znとも略す）101、中間がAl系合金層（単にAl層、Alとも略す）102、一番上がZn系合金層（単にZn層、Znとも略す）101、およびAl層表裏面とZn層間のZn-Al合金層103となる。ただし、Zn-Al合金層103が存在しない場合もある。クラッド材の状態において、Zn-Al合金層103が存在しない状態は理想的である。   A cross-section of the connecting material used to carry out the present invention is shown in FIG. From the bottom, a Zn-based alloy layer (simply abbreviated as Zn layer or Zn) 101, the middle is an Al-based alloy layer (simply abbreviated as Al layer or Al) 102, and the top is a Zn-based alloy layer (simply abbreviated as Zn layer or Zn) ) 101, and the Al layer front and back surfaces and the Zn-Al alloy layer 103 between the Zn layers. However, the Zn—Al alloy layer 103 may not exist. In the state of the clad material, it is ideal that the Zn—Al alloy layer 103 does not exist.

図６において、Zn系合金層におけるZnの含有量は９０％〜１００％であることが望ましい。Znを９０％以上とする理由は、溶融温度を上昇させないためである。Al系合金層におけるAlの含有量は９９％から１００％であることが望ましい。中央部に残ったAlが純Alに近ければ、Alは軟らかいために、材料のクラックを防止することが出来るからである。   In FIG. 6, the Zn content in the Zn-based alloy layer is desirably 90% to 100%. The reason why Zn is 90% or more is that the melting temperature is not increased. The Al content in the Al-based alloy layer is desirably 99% to 100%. This is because if Al remaining in the center is close to pure Al, Al is soft, so that cracking of the material can be prevented.

この接続材料は、前述した図４に示すように、Zn系合金101a、Al系合金層102a、Zn系合金層101aを重ねて冷間クラッド圧延を行うことで製造した。冷間クラッド圧延後、接続材料に数回の圧延処理を実施し、所定の厚さの接続材料を製造しているが、何れの工程も冷間圧延である。この際、冷間とは室温から高々＋50℃までの範囲である。圧延率は例えば、圧延前の厚さをｔ１とし、圧延後の厚さをｔ２とした場合、０．０１≦ｔ２/ｔ１≦０．７である。   As shown in FIG. 4 described above, this connecting material was manufactured by cold-clad rolling with a Zn-based alloy 101a, an Al-based alloy layer 102a, and a Zn-based alloy layer 101a being stacked. After the cold clad rolling, the connecting material is subjected to several rolling processes to produce a connecting material having a predetermined thickness, and all the processes are cold rolling. In this case, the term “cold” refers to a range from room temperature to at most + 50 ° C. For example, when the thickness before rolling is t1 and the thickness after rolling is t2, the rolling rate is 0.01 ≦ t2 / t1 ≦ 0.7.

製造した接続材料は、クラッドするZn系合金の初期Zn粒径と、Zn系合金およびAl系合金のクラッド前後の厚さを変化させることで、Zn平均粒径が0.85〜50μmの範囲、Zn/Al界面に形成するZn-Al合金の面積割合を0〜40％の範囲に制御した。なお、Zn平均結晶粒径については、接続材料の断面を観察し、横幅500μｍ〜600μｍの範囲で、各結晶粒の最も長い対角線の長さを計測し、その平均値を求めることで定義した。また、Zn-Al合金の面積割合については、接続材料の断面を観察し、Zn層とZn-Al合金の断面積の和に対する、Zn-Al合金の面積の割合で定義した。実施例1〜30ではこの方法によりZn/Al/Znクラッド材を作製した。   The manufactured connecting material has a Zn average particle diameter ranging from 0.85 to 50 μm by changing the initial Zn particle diameter of the Zn alloy to be clad and the thickness of the Zn alloy and Al alloy before and after the cladding. The area ratio of the Zn—Al alloy formed at the Al interface was controlled in the range of 0 to 40%. The Zn average crystal grain size was defined by observing a cross-section of the connecting material, measuring the length of the longest diagonal line of each crystal grain in the width range of 500 μm to 600 μm, and obtaining the average value. Further, the area ratio of the Zn—Al alloy was defined as the ratio of the area of the Zn—Al alloy to the sum of the cross sectional areas of the Zn layer and the Zn—Al alloy by observing the cross section of the connecting material. In Examples 1 to 30, Zn / Al / Zn clad materials were produced by this method.

また、本発明を実施するために使用する接続材料は、図５に示すように、Zn層101b、Al層102b、Zn層101bを重ねて加圧成形を行うことで製造しても良い。圧縮率は例えば、圧縮前の厚さをｔ１とし、圧縮後の厚さをｔ２とした場合、０．０１≦ｔ２/ｔ１≦０．７である。加圧成形機105を用いて加圧成形を行うと、Zn層101bとAl層102bの表面に形成されていた酸化物膜が破れ、新生面により金属接合される。加圧成形において、温度と処理時間を一定以下に抑えることで、ZnとAlの拡散は抑制され、Zn/Al界面に形成されるZn-Al合金層の生成を一定以下に抑えることができる。   Further, as shown in FIG. 5, the connecting material used for carrying out the present invention may be manufactured by press-molding a Zn layer 101b, an Al layer 102b, and a Zn layer 101b. For example, when the thickness before compression is t1 and the thickness after compression is t2, the compression rate is 0.01 ≦ t2 / t1 ≦ 0.7. When pressure molding is performed using the pressure molding machine 105, the oxide films formed on the surfaces of the Zn layer 101b and the Al layer 102b are broken, and are metal-bonded by the new surface. In pressure forming, by suppressing the temperature and processing time to a certain level or less, the diffusion of Zn and Al is suppressed, and the generation of a Zn—Al alloy layer formed at the Zn / Al interface can be suppressed to a certain level or less.

このようにして作製したZn/Al/Znクラッド材を用いて、半導体装置の内部のダイボンディングを行った。具体的には、半導体素子と前記半導体素子を接続するフレームと、一端が外部端子となるリードと、前記リードの他端と前記半導体素子の電極とを接続するワイヤと、前記半導体素子および前記ワイヤを樹脂封止するレジンとを有する半導体装置において、前記半導体素子と前記フレームとの接続に前記のZn/Al/Znクラッド材を用いた。   Using the Zn / Al / Zn clad material thus produced, die bonding inside the semiconductor device was performed. Specifically, a semiconductor element and a frame connecting the semiconductor element, a lead having one end as an external terminal, a wire connecting the other end of the lead and the electrode of the semiconductor element, the semiconductor element and the wire In the semiconductor device having a resin sealing resin, the Zn / Al / Zn cladding material is used for the connection between the semiconductor element and the frame.

接続時の熱負荷は、Zn層とAl層の共晶融解反応が十分に起こり、接続界面全体が十分に接続されるように、接続温度385℃以上、接続時間2min以上、荷重0.1kPa以上とした。このように接続を実施した場合、接続構造は、半導体素子/Zn-Al合金/Al層/Zn-Al合金/フレームとなる（Al層が消失する場合もある）。   The thermal load during connection is such that the eutectic melting reaction between the Zn layer and the Al layer occurs sufficiently, and the entire connection interface is sufficiently connected, the connection temperature is 385 ° C or higher, the connection time is 2 min or longer, and the load is 0.1 kPa or higher. did. When connection is performed in this way, the connection structure is semiconductor element / Zn—Al alloy / Al layer / Zn—Al alloy / frame (the Al layer may disappear).

Zn-Al二元系合金は脆い金属間化合物を形成しないため、高信頼の接続構造を得ることができる。また接続部の中で最も融点が低いのはZn-6Al共晶の382℃であるため、380℃の耐熱性も有している。また、本発明のクラッド材は、Zn層の強度が高いため、加熱時のZn/Al層間剥離が抑制され、前記半導体素子と前記フレームを接続した場合、接合層内部に存在するボイドを低減することができる。   Since a Zn-Al binary alloy does not form a brittle intermetallic compound, a highly reliable connection structure can be obtained. In addition, the lowest melting point of the connecting portion is 382 ° C. of Zn-6Al eutectic, and therefore it has heat resistance of 380 ° C. In addition, since the clad material of the present invention has a high strength of the Zn layer, Zn / Al delamination during heating is suppressed, and when the semiconductor element and the frame are connected, voids existing inside the bonding layer are reduced. be able to.

また、本発明によれば、クラッド材製造後にZn/Al界面に形成されるZn-Al合金層を一定以下に抑えることができる。これにより、加熱時にZn層表面にAlが拡散・露出することがなく、接続温度まで加熱した際に、溶融したZn-Al液層の濡れが良く、ボイドを軽減することができる。これらの効果により、接続強度、熱抵抗は向上し、信頼性の高い接続構造を実現できる。   Further, according to the present invention, the Zn—Al alloy layer formed at the Zn / Al interface after manufacturing the clad material can be suppressed to a certain level or less. Accordingly, Al is not diffused or exposed on the surface of the Zn layer during heating, and when heated to the connection temperature, the molten Zn—Al liquid layer is well wetted and voids can be reduced. Due to these effects, the connection strength and thermal resistance are improved, and a highly reliable connection structure can be realized.

本発明のZn/Al/Znクラッド材を、半導体装置の内部の気密封止部の接続及びダイボンディングに用いることもできる。具体的には、図１３に示すように、半導体素子と、前記半導体素子を接続する基板と、一端が外部端子となるリードと、前記リードの他端と前記半導体素子の電極とを接続するワイヤと、前記半導体素子および前記ワイヤを気密封止し、前記基板に接続する金属キャップとを有する半導体装置において、前記基板と前記金属キャップとの接続に前記のZn/Al/Znクラッド材を用いた。   The Zn / Al / Zn clad material of the present invention can also be used for connection of a hermetically sealed portion inside a semiconductor device and die bonding. Specifically, as shown in FIG. 13, a semiconductor element, a substrate for connecting the semiconductor element, a lead having one end as an external terminal, and a wire for connecting the other end of the lead and the electrode of the semiconductor element And a semiconductor device having a metal cap that hermetically seals the semiconductor element and the wire and is connected to the substrate, the Zn / Al / Zn cladding material is used for connection between the substrate and the metal cap. .

接続時の熱負荷は、Zn層とAl層の共晶融解反応が十分に起こり、接続界面全体が十分に接続されるように、接続温度385℃以上、接続時間2min以上、荷重0.1kPa以上とした。このように接続を実施した場合、接続構造は、金属キャップ/Zn-Al合金/Al層/Zn-Al合金/基板となる（Al層が消失する場合もある）。   The thermal load during connection is such that the eutectic melting reaction between the Zn layer and the Al layer occurs sufficiently, and the entire connection interface is sufficiently connected, the connection temperature is 385 ° C or higher, the connection time is 2 min or longer, and the load is 0.1 kPa or higher. did. When the connection is performed in this way, the connection structure is a metal cap / Zn—Al alloy / Al layer / Zn—Al alloy / substrate (the Al layer may disappear).

Zn-Al二元系合金は脆い金属間化合物を形成しないため、高信頼の接続構造を得ることができる。また接続部の中で最も融点が低いのはZn-6Al共晶の382℃であるため、380℃の耐熱性も有している。また、本発明のクラッド材は、加熱時のZn/Al層間剥離が抑制されるため、前記金属キャップと前記基板を接続した場合、接合層内部に存在するボイドを低減することができる。   Since a Zn-Al binary alloy does not form a brittle intermetallic compound, a highly reliable connection structure can be obtained. In addition, the lowest melting point of the connecting portion is 382 ° C. of Zn-6Al eutectic, and therefore it has heat resistance of 380 ° C. In addition, since the clad material of the present invention suppresses Zn / Al delamination during heating, voids existing inside the bonding layer can be reduced when the metal cap and the substrate are connected.

また、本発明によれば、クラッド材製造後にZn/Al界面に形成されるZn-Al合金層を一定以下に抑えることができる。これにより、加熱時にZn層表面にAlが拡散・露出することがなく、接続温度まで加熱した際に、溶融したZn-Al液層の濡れが良く、ボイドを軽減することができる。これらの効果により、接続強度、熱抵抗は向上し、信頼性の高い接続構造を実現できる。   Further, according to the present invention, the Zn—Al alloy layer formed at the Zn / Al interface after manufacturing the clad material can be suppressed to a certain level or less. Accordingly, Al is not diffused or exposed on the surface of the Zn layer during heating, and when heated to the connection temperature, the molten Zn—Al liquid layer is well wetted and voids can be reduced. Due to these effects, the connection strength and thermal resistance are improved, and a highly reliable connection structure can be realized.

本発明のZn/Al/Znクラッド材を、半導体装置の内部の半導体素子と基板の接続に用いることができる。ここで言う基板とは、回路基板のことであり、半導体チップのみでなく、抵抗、コンデンサ等の回路素子も形成されている。すなわち、このような回路基板に本発明の接続材料を用いて半導体素子を直接接続することが出来る。   The Zn / Al / Zn clad material of the present invention can be used for connecting a semiconductor element inside a semiconductor device and a substrate. The substrate referred to here is a circuit substrate, and not only a semiconductor chip but also circuit elements such as a resistor and a capacitor are formed. That is, a semiconductor element can be directly connected to such a circuit board using the connection material of the present invention.

具体的には、半導体素子を有し、前記半導体素子と該半導体素子を実装する基板において、前記半導体素子及び前記ワイヤを樹脂封止するレジンとを有する半導体装置において、前記半導体素子と前記基板との接続に前記のZn/Al/Znクラッド材を用いた。接続時の熱負荷は、Zn層とAl層の共晶融解反応が十分に起こり、接続界面全体が十分に接続されるように、接続温度385℃以上、接続時間2min以上、荷重0.1kPa以上とした。このように接続を実施した場合、接続構造は、半導体素子/Zn-Al合金/Al層/Zn-Al合金/基板となる（Al層が消失する場合もある）。   Specifically, in a semiconductor device having a semiconductor element, the semiconductor element and a substrate on which the semiconductor element is mounted, the semiconductor element and a resin sealing the wire, the semiconductor element and the substrate, The above Zn / Al / Zn clad material was used for connection. The thermal load during connection is such that the eutectic melting reaction between the Zn layer and the Al layer occurs sufficiently, and the entire connection interface is sufficiently connected, the connection temperature is 385 ° C or higher, the connection time is 2 min or longer, and the load is 0.1 kPa or higher. did. When connection is performed in this way, the connection structure is semiconductor element / Zn—Al alloy / Al layer / Zn—Al alloy / substrate (the Al layer may disappear).

Zn-Al二元系合金は脆い金属間化合物を形成しないため、高信頼の接続構造を得ることができる。また接続部の中で最も融点が低いのはZn-6Al共晶の382℃であるため、380℃の耐熱性も有している。また、本発明のクラッド材は、加熱時のZn/Al層間剥離が抑制されるため、前記半導体素子と前記基板を接続した場合、接合層内部に存在するボイドを低減することができる。   Since a Zn-Al binary alloy does not form a brittle intermetallic compound, a highly reliable connection structure can be obtained. In addition, the lowest melting point of the connecting portion is 382 ° C. of Zn-6Al eutectic, and therefore it has heat resistance of 380 ° C. In addition, since the clad material of the present invention suppresses Zn / Al delamination during heating, voids existing inside the bonding layer can be reduced when the semiconductor element and the substrate are connected.

また、本発明によれば、クラッド材製造後にZn/Al界面に形成されるZn-Al合金層を一定以下に抑えることができる。これにより、加熱時にZn層表面にAlが拡散・露出することがなく、接続温度まで加熱した際に、溶融したZn-Al液層の濡れが良く、ボイドを軽減することができる。これらの効果により、接続強度、熱抵抗は向上し、信頼性の高い接続構造を実現できる。   Further, according to the present invention, the Zn—Al alloy layer formed at the Zn / Al interface after manufacturing the clad material can be suppressed to a certain level or less. Accordingly, Al is not diffused or exposed on the surface of the Zn layer during heating, and when heated to the connection temperature, the molten Zn—Al liquid layer is well wetted and voids can be reduced. Due to these effects, the connection strength and thermal resistance are improved, and a highly reliable connection structure can be realized.

実施形態１Embodiment 1

以下に示す実施例で用いたクラッド材は、前述した冷間クラッド圧延法により作製し、Zn平均結晶粒径とZn/Al界面のZn-Al合金の面積割合を制御した。クラッド材の構造については、十分なZn-Al液相を生じさせ濡れを向上させる目的からZn層、Al層の厚さはそれぞれ5μm、10μm以上必要である。また、接合部の熱抵抗を下げ、信頼性確保するため、クラッド材の総厚は300μm以下にする必要がある。それらの制限内で、Zn層、Al層、Zn層の厚さを変化させた。作製したクラッド材の構成を図８に示す。   The clad materials used in the following examples were produced by the cold clad rolling method described above, and the Zn average crystal grain size and the area ratio of the Zn—Al alloy at the Zn / Al interface were controlled. Regarding the structure of the clad material, the thickness of the Zn layer and Al layer should be 5 μm and 10 μm or more for the purpose of generating a sufficient Zn—Al liquid phase and improving the wetting. Also, the total thickness of the clad material needs to be 300 μm or less in order to reduce the thermal resistance of the joint and ensure reliability. Within these limits, the thicknesses of the Zn layer, Al layer, and Zn layer were changed. The structure of the produced clad material is shown in FIG.

実施例1〜16
図８におけるクラッド材のうち、No.24である、Zn層、Al層、Zn層の厚さが20μm、70μm、20μmであるクラッド材について評価をしたものが、図１１に示す実施例1〜16である。実施例1〜16は、Zn平均結晶粒径とZn/Al界面のZn-Al合金の面積割合を変化させたZn/Al/Znクラッド材の加熱実験を実施したものと、このクラッド材を用いて半導体装置を製造し、接続性を評価したものである
先ず、実施例1~16に示すZn/Al/Znクラッド材について、融点より僅かに低い380℃で1min加熱し、Zn層表面のAlの有無について元素分析を実施した。その結果、Zn/Al界面の合金割合が40％以下のクラッド材においては、加熱後もZn層表面にAlが露出することがなかった。その結果、濡れ性が良好であることがわかった。また、加熱後のZn/Al界面の剥離の発生の有無を検討した。その結果、Zn平均結晶粒径が50μm以下のクラッド材においては、剥離が発生しないことがわかった。 Examples 1-16
Among the clad materials in FIG. 8, the evaluation was performed on the clad materials having the thicknesses of 20 μm, 70 μm, and 20 μm, which are No. 24, Zn layer, Al layer, and Zn layer. 16 In Examples 1 to 16, a Zn / Al / Zn clad heating experiment in which the Zn average crystal grain size and the area ratio of the Zn-Al alloy at the Zn / Al interface were changed, and this clad material were used. First, the Zn / Al / Zn cladding material shown in Examples 1 to 16 was heated for 1 min at 380 ° C., slightly lower than the melting point, and the Zn layer surface Al was manufactured. Elemental analysis was conducted for the presence or absence of. As a result, in the clad material having an alloy ratio of 40% or less at the Zn / Al interface, Al was not exposed on the surface of the Zn layer even after heating. As a result, it was found that the wettability was good. In addition, the presence or absence of delamination at the Zn / Al interface after heating was examined. As a result, it was found that no peeling occurred in the clad material having a Zn average crystal grain size of 50 μm or less.

次いで、実施例1~16に示すクラッド材を用いて、図９に示すように半導体装置11のダイボンディングを行った。この半導体装置11は、半導体装置1と、この半導体素子1を接続するフレーム2と、一端が外部端子となるリード5と、このリード5の他端と半導体素子1の電極とを接続するワイヤ4と、半導体素子1およびワイヤ4を樹脂封止する封止用レジン6とを有し、半導体素子1とフレーム2は接続材料10（Zn/Al/Znクラッド材）で接続されて構成される。   Next, using the clad materials shown in Examples 1 to 16, die bonding of the semiconductor device 11 was performed as shown in FIG. This semiconductor device 11 includes a semiconductor device 1, a frame 2 connecting the semiconductor element 1, a lead 5 having one end serving as an external terminal, and a wire 4 connecting the other end of the lead 5 and the electrode of the semiconductor element 1. And a resin 6 for sealing the semiconductor element 1 and the wire 4 with resin, and the semiconductor element 1 and the frame 2 are configured to be connected by a connection material 10 (Zn / Al / Zn clad material).

この半導体装置11の製造においては、NiあるはNi/AgあるいはNi/Auめっきを施したフレーム2上に接続材料10（Zn/Al/Znクラッド材）を供給し、大きさ5mm角の半導体素子1を積層した後、N2雰囲気中で接合温度385℃、保持時間2min、荷重3kPaとしてダイボンディングを行った。その際の接続部の断面を図１０に示す。図１０において、フレームはCuで形成され、Zn-Al合金層との境界面には、僅かな厚さでNiメッキが形成されている。 In the manufacture of the semiconductor device 11, a connection element 10 (Zn / Al / Zn clad material) is supplied onto the frame 2 on which Ni, Ni / Ag or Ni / Au plating is applied, and a semiconductor element having a size of 5 mm square. After laminating 1, die bonding was performed in a N 2 atmosphere at a bonding temperature of 385 ° C., a holding time of 2 min, and a load of 3 kPa. The cross section of the connection part in that case is shown in FIG. In FIG. 10, the frame is made of Cu, and Ni plating is formed with a slight thickness on the interface with the Zn—Al alloy layer.

接続後、半導体素子1とリード5間をワイヤ4でワイヤボンディングし、180℃で封止用レジン6により封止を行った。製造した半導体装置11について、超音波探傷により接続部のボイド面積率を測定した。ボイド率は、図３に示すように、接続部であるはんだ３の平面方向において、ボイド８の全面積をはんだ３の平面方向の面積で割ったものである。   After the connection, the semiconductor element 1 and the lead 5 were wire-bonded with a wire 4 and sealed with a sealing resin 6 at 180 ° C. About the manufactured semiconductor device 11, the void area ratio of the connection portion was measured by ultrasonic flaw detection. As shown in FIG. 3, the void ratio is obtained by dividing the total area of the void 8 by the area of the solder 3 in the plane direction in the plane direction of the solder 3 as the connection portion.

また、図１２に半導体装置の熱抵抗を初期（接続後）と-55℃/150℃×1000cycの温度サイクル試験後で測定した結果を示す。熱抵抗の変動が小さなもの（一般的に±10％以内）を高信頼とし、信頼性を○と判断した。フレームに施しためっき（Ni、Ni/Ag、Ni/Au）によらず、同様の結果が得られたため、Niめっきの場合の結果を代表例として図１０に示している。評価の結果、信頼性が○となったのは、ボイド率が10％以下のクラッド材であり、具体的には、Zn平均結晶粒径が50μm以下であり、且つ、Zn/Al界面の合金面積割合が40％以下のクラッド材の場合であった。   FIG. 12 shows the results of measuring the thermal resistance of the semiconductor device at the initial stage (after connection) and after the temperature cycle test of −55 ° C./150° C. × 1000 cyc. Those with small fluctuations in thermal resistance (generally within ± 10%) were considered highly reliable, and the reliability was judged as ○. Since the same result was obtained irrespective of the plating (Ni, Ni / Ag, Ni / Au) applied to the frame, the result in the case of Ni plating is shown in FIG. 10 as a representative example. As a result of the evaluation, the reliability was evaluated for a cladding material having a void ratio of 10% or less, specifically, an alloy having a Zn average crystal grain size of 50 μm or less and a Zn / Al interface. This was the case of a clad material having an area ratio of 40% or less.

一方、比較例1〜16は、Zn平均結晶粒径が50μm以上、または、Zn/Al界面の合金面積割合が40％以上となるクラッド材を用いた場合である。Zn平均結晶粒径が50μm以上のクラッド材については、前述の加熱実験の結果、Zn/Al界面で剥離が発生することがわかった。また、合金面積割合が40％以上のクラッド材については、加熱実験の結果、Zn層表面にAlが検出された。このような結果のため、Zn平均結晶粒径が50μm以上、または、Zn/Al界面の合金面積割合が40％以上となるクラッド材で前述の半導体装置11を作製したところ、接合部のボイド率が10％以上となると同時に、熱抵抗の値が大きく変動し、信頼性が低かったと考えられる。   On the other hand, Comparative Examples 1 to 16 are cases in which a clad material having a Zn average crystal grain size of 50 μm or more or an alloy area ratio of the Zn / Al interface of 40% or more is used. As a result of the heating experiment described above, it was found that peeling occurred at the Zn / Al interface for the clad material having an average Zn grain size of 50 μm or more. As for the clad material having an alloy area ratio of 40% or more, Al was detected on the surface of the Zn layer as a result of the heating experiment. Because of these results, when the semiconductor device 11 was made of a clad material having a Zn average crystal grain size of 50 μm or more, or an alloy area ratio of the Zn / Al interface of 40% or more, the void ratio of the junction was At the same time, the value of thermal resistance greatly fluctuated and the reliability was low.

また、図８に示す全ての接続材料について、Zn平均結晶粒径とZn-Al合金割合を変化させ、上記検討を行った。その結果、何れのクラッド材も、Zn平均結晶粒径が50μm以下、且つ、Zn/Al界面の合金面積割合が40％以下の場合に、Alの表面露出が起こらず、Zn/Al層間剥離も発生せず、接合に用いた場合は、ボイド率が10％以下となり、熱抵抗の変動が小さく信頼性が○となった。   Further, for all the connecting materials shown in FIG. 8, the above examination was performed by changing the Zn average crystal grain size and the Zn—Al alloy ratio. As a result, when any of the clad materials has a Zn average crystal grain size of 50 μm or less and the alloy area ratio of the Zn / Al interface is 40% or less, Al surface exposure does not occur and Zn / Al delamination does not occur. When it was used for joining without generating voids, the void ratio was 10% or less, the thermal resistance variation was small, and the reliability was good.

以上により、実施例1〜16によれば、本実施の形態における接続材料10を半導体装置11のダイボンディングに用いることにより、Zn/Al界面の剥離がなく、また、Zn層表面へのAlの露出もないため、ボイドが少なく高信頼の接続を実現することができる。   As described above, according to Examples 1 to 16, by using the connection material 10 in the present embodiment for die bonding of the semiconductor device 11, there is no peeling of the Zn / Al interface, and Al on the surface of the Zn layer Since there is no exposure, there is little void and a highly reliable connection can be realized.

実施例17〜32
実施例17〜32は、それぞれのZn/Al/Znクラッド材を、実施例1〜16と同様の加熱実験により評価し、また、それらのクラッド材により気密封止を必要とする半導体装置を製造し、接続性を評価したものである。Zn層、Al層、Zn層の厚さが20μm、70μm、20μmであるクラッド材の評価結果を例として図１５に示す。 Examples 17-32
In Examples 17 to 32, each Zn / Al / Zn clad material was evaluated by a heating experiment similar to that in Examples 1 to 16, and a semiconductor device that required hermetic sealing with these clad materials was manufactured. The connectivity was evaluated. FIG. 15 shows an example of the evaluation results of the clad material in which the thicknesses of the Zn layer, Al layer, and Zn layer are 20 μm, 70 μm, and 20 μm.

加熱実験による評価結果は、図１１に示した実施例1〜16と同様である。前述の気密を必要とする半導体装置は、図１３に示すように、気密封止を必要とする半導体装置21の封止材として、本接続材料10aを用いたものである。   The evaluation results by the heating experiment are the same as those in Examples 1 to 16 shown in FIG. As shown in FIG. 13, the above-described semiconductor device requiring hermeticity uses the connection material 10a as a sealing material for the semiconductor device 21 requiring hermetic sealing.

この半導体装置21は、半導体素子1と、この半導体素子1を接続するモジュール基板23と、一端が外部端子となるリード5と、このリード5の他端と半導体素子1の電極とを接続するワイヤ4と半導体素子1およびワイヤ4を気密封止し、モジュール基板23に、半導体素子1およびチップ部品等をSn系の鉛フリーはんだ3、もしくは導電性接着剤、Cu粉/Sn系はんだ粉複合材料等で接続した後、接続材料10aをモジュール基板23と金属キャップ22の間に置き、N2雰囲気中で接合温度385℃、保持時間2min、荷重3kPaとして接続した。 The semiconductor device 21 includes a semiconductor element 1, a module substrate 23 to which the semiconductor element 1 is connected, a lead 5 whose one end is an external terminal, and a wire that connects the other end of the lead 5 and the electrode of the semiconductor element 1. 4 and the semiconductor element 1 and the wire 4 are hermetically sealed, and the semiconductor element 1 and the chip parts are bonded to the module substrate 23 with Sn-based lead-free solder 3 or conductive adhesive, Cu powder / Sn-based solder powder composite material After the connection, etc., the connection material 10a was placed between the module substrate 23 and the metal cap 22, and connected in a N 2 atmosphere at a bonding temperature of 385 ° C., a holding time of 2 minutes, and a load of 3 kPa.

なお、金属キャップについては、気密封止を行うために、図１４に示すように、コバール、インバー等の金属合金24とAl層102およびZn層101を一緒に冷間クラッド圧延して、接続材料一体型の金属キャップ22aとしても構わない。   As for the metal cap, in order to perform hermetic sealing, as shown in FIG. 14, the metal alloy 24 such as Kovar and Invar, the Al layer 102 and the Zn layer 101 are cold-clad rolled together to form a connection material. An integrated metal cap 22a may be used.

実施例17〜32について、-55℃/150℃×500cycの温度サイクル試験により、気密性が維持されたものの総合評価を○とした。その結果、Zn平均結晶粒径が50μm以下であり、且つ、Zn/Al界面の合金面積割合が40％以下のクラッド材については、接合部のボイド率が10％以下になると同時に、気密性が維持された。   About Examples 17-32, the comprehensive evaluation of what maintained airtightness by the temperature cycle test of -55 degreeC / 150 degreeC x 500cyc was set as (circle). As a result, for the clad material having a Zn average crystal grain size of 50 μm or less and an alloy area ratio of the Zn / Al interface of 40% or less, the void ratio of the joint is 10% or less and the airtightness Maintained.

一方、比較例17〜32は、Zn平均結晶粒径が50μm以上、または、Zn/Al界面の合金面積割合が40％以上となるクラッド材を用いた場合である。加熱実験の結果は比較例1〜16と同様である。ボイド率および気密性について評価した結果、Zn平均結晶粒径が50μm以上、または、Zn/Al界面の合金面積割合が40％以上となるクラッド材で前述の半導体装置21を作製したところ、接合部のボイド率が10％以上となり、同時に気密性が維持されなかった。   On the other hand, Comparative Examples 17 to 32 are cases where a clad material having a Zn average crystal grain size of 50 μm or more or an alloy area ratio of the Zn / Al interface of 40% or more is used. The results of the heating experiment are the same as in Comparative Examples 1-16. As a result of evaluating the void ratio and hermeticity, the semiconductor device 21 was fabricated with a clad material having a Zn average crystal grain size of 50 μm or more or an alloy area ratio of the Zn / Al interface of 40% or more. The void ratio was 10% or more, and at the same time, the airtightness was not maintained.

また、図８における実施例17〜32に示す全ての接続材料について、Zn平均結晶粒径とZn-Al合金割合を変化させ、上記検討を行った。その結果、何れのクラッド材も、Zn平均結晶粒径が50μm以下、且つ、Zn/Al界面の合金面積割合が40％以下の場合に、Alの表面露出が起こらず、Zn/Al層間剥離も発生せず、接合に用いた場合は、ボイド率が10％以下となり、気密性が維持され信頼性が○となった。   Further, the above examination was performed by changing the Zn average crystal grain size and the Zn—Al alloy ratio for all the connection materials shown in Examples 17 to 32 in FIG. 8. As a result, when any of the clad materials has a Zn average crystal grain size of 50 μm or less and the alloy area ratio of the Zn / Al interface is 40% or less, Al surface exposure does not occur and Zn / Al delamination does not occur. When it was used for bonding without being generated, the void ratio was 10% or less, the airtightness was maintained, and the reliability was good.

以上により、実施例17〜32によれば、本実施の形態における接続材料10aを、半導体装置21の封止材として用いることにより、Zn/Al界面の剥離がなく、また、Zn層表面へのAlの露出もないため、ボイドの少なく、気密性の高い接続を実現することができる。   As described above, according to Examples 17 to 32, by using the connection material 10a in the present embodiment as a sealing material for the semiconductor device 21, there is no peeling of the Zn / Al interface, and the surface of the Zn layer Since there is no exposure of Al, it is possible to realize a highly airtight connection with few voids.

実施形態２Embodiment 2

他の実施形態は、図１６に示すように、フリップチップ実装を必要とする半導体装置31のバンプとして本接続材料10bを用いたものである。この半導体装置31は、半導体素子1を有し、この半導体素子1とこれを実装する基板34は接続材料10bで接続されて構成される。   In another embodiment, as shown in FIG. 16, this connection material 10b is used as a bump of a semiconductor device 31 that requires flip-chip mounting. The semiconductor device 31 includes a semiconductor element 1, and the semiconductor element 1 and a substrate 34 on which the semiconductor element 1 is mounted are connected by a connection material 10b.

この半導体装置31の製造においては、接続材料10bを、基板34のCu配線35
にNiまたはNi/Auめっき36を施したパッドと、半導体素子1のAl配線32にZnめっき33を施した電極の間に置き、接続温度385℃で接続を行った。なお、321はAl配線のベースメタルであり、322はAl配線のキャップメタルである。その結果、Zn平均結晶粒径が50μm以下であり、且つ、Zn/Al界面の合金面積割合が40％以下のクラッド材について、接続部のボイド率10％以内となる接続を実現することができた。 In manufacturing the semiconductor device 31, the connection material 10b is used as the Cu wiring 35 of the substrate 34.
Then, it was placed between a pad having Ni or Ni / Au plating 36 applied thereto and an electrode having Zn plating 33 applied to the Al wiring 32 of the semiconductor element 1 and connected at a connection temperature of 385 ° C. In addition, 321 is a base metal of Al wiring, and 322 is a cap metal of Al wiring. As a result, it is possible to realize a connection in which the void ratio of the connection portion is within 10% for the clad material having a Zn average crystal grain size of 50 μm or less and an alloy area ratio of the Zn / Al interface of 40% or less. It was.

この他の実施例においても、本実施の形態における接続材料10bを、半導体装置31のバンプとして用いることにより、接続部のボイド率を10％以下に低減できる。   Also in other examples, by using the connection material 10b in the present embodiment as bumps of the semiconductor device 31, the void ratio of the connection part can be reduced to 10% or less.

以上、本発明者によってなされた発明の実施の形態に基づき具体的に説明したが、本発明は前記実施の形態に限定されるものではなく、その要旨を逸脱しない範囲で種々変更可能であることはいうまでもない。   As described above, the present invention has been specifically described based on the embodiment of the invention. However, the present invention is not limited to the embodiment, and various modifications can be made without departing from the scope of the invention. Needless to say.

すなわち、上記説明では、本発明の適用について、半導体装置のダイボンディングを例に挙げて説明したが、ダイボンディングされる半導体装置であれば、多様な半導体装置に適用できる。これらには、例えば、オルタネータ用ダイオード、IGBTモジュール、RFモジュール等のフロントエンドモジュール、自動車用パワーモジュール等が挙げられる。   That is, in the above description, the application of the present invention has been described by taking die bonding of a semiconductor device as an example. However, any semiconductor device that is die bonded can be applied to various semiconductor devices. These include, for example, alternator diodes, IGBT modules, front end modules such as RF modules, automobile power modules, and the like.

また、上記説明では、半導体装置をモジュール基板にリフロー実装する場合を例に挙げて説明したが、例えば、MCM（Multi Chip Module）構成に使用する場合にも当然に適用できるものである。   In the above description, the case where the semiconductor device is reflow-mounted on the module substrate has been described as an example. However, the present invention is naturally applicable to, for example, an MCM (Multi Chip Module) configuration.

1・・・半導体素子、2・・・フレーム、3・・・はんだ、4・・・ワイヤ、5・・・リード、6・・・封止用レジン、7・・・半導体装置、8・・・ボイド、9・・・ボイド、10、10a、10b・・・接続材料、11・・・半導体装置、21・・・半導体装置、22、22a・・・金属キャップ、23・・・モジュール基板、24・・・金属合金、31・・・半導体装置、32・・・Al配線、33・・・Znめっき、34・・・基板、35・・・Cu配線、36・・・NiまたはNi/Auめっき、101・・・Zn層、102・・・Al層、103・・・Zn-Al合金、104・・・ローラー、105・・・加圧成形機。 DESCRIPTION OF SYMBOLS 1 ... Semiconductor element, 2 ... Frame, 3 ... Solder, 4 ... Wire, 5 ... Lead, 6 ... Resin for sealing, 7 ... Semiconductor device, 8 ...・ Void, 9 ... Void, 10, 10a, 10b ... Connection material, 11 ... Semiconductor device, 21 ... Semiconductor device, 22, 22a ... Metal cap, 23 ... Module substrate, 24 ... Metal alloy, 31 ... Semiconductor device, 32 ... Al wiring, 33 ... Zn plating, 34 ... Substrate, 35 ... Cu wiring, 36 ... Ni or Ni / Au Plating, 101 ... Zn layer, 102 ... Al layer, 103 ... Zn-Al alloy, 104 ... roller, 105 ... pressure molding machine.

Claims (14)

Al系合金層がZn系合金層によって挟持された接続材料であって、
前記Zn系合金層の平均結晶粒径が0.85μm 以上、50μm以下であり、且つ、前記Al系合金層と前記Zn系合金層の間に形成されるZn-Al合金の面積割合が0~40％であることを特徴とする接続材料。 A connection material in which an Al-based alloy layer is sandwiched between Zn-based alloy layers,
The average grain size of the Zn-based alloy layer is 0.85 μm or more and 50 μm or less, and the area ratio of the Zn-Al alloy formed between the Al-based alloy layer and the Zn-based alloy layer is 0 to 40 The connection material characterized by%. 請求項１に記載のAl系合金層のAl含有率が99~100％であることを特徴とする接続材料。   2. A connection material, wherein the Al content of the Al-based alloy layer according to claim 1 is 99 to 100%. 請求項１に記載のZn系合金層のZn含有率が90~100%であることを特徴とする接続材料。   A connection material, wherein the Zn-based alloy layer according to claim 1 has a Zn content of 90 to 100%. Al系合金層が第１のZn系合金層と第２のZn系合金層によって挟持されたクラッド材による接続材料の製造方法であって、
前記第１のZn系合金層の厚さが5μm以上、前記Al系合金層の厚さが10μm以上、前記第１のZn系合金層の厚さが5μm以上であって、前記クラッド材の総厚が20μm以上、300μm以下となるように、
第１のZn系合金層の上にAl系合金層を重ね、前記Al系合金層の上に第２のZn系合金層を重ねて、冷間クラッド圧延によって、前記クラッド材による接続材料を製造することを特徴とする接続材料の製造方法。 A method for producing a connection material using a clad material in which an Al alloy layer is sandwiched between a first Zn alloy layer and a second Zn alloy layer,
The first Zn-based alloy layer has a thickness of 5 μm or more, the Al-based alloy layer has a thickness of 10 μm or more, and the first Zn-based alloy layer has a thickness of 5 μm or more. So that the thickness is 20μm or more and 300μm or less,
The Al-based alloy layer is overlaid on the first Zn-based alloy layer, the second Zn-based alloy layer is stacked on the Al-based alloy layer, and the connection material made of the clad material is manufactured by cold clad rolling. A method for producing a connection material, comprising: Al系合金層が第１のZn系合金層と第２のZn系合金層によって挟持されたクラッド材による接続材料の製造方法であって、
前記第１のZn系合金層の厚さが5μm以上、前記Al系合金層の厚さが10μm以上、前記第１のZn系合金層の厚さが5μm以上であって、前記クラッド材の総厚が20μm以上、300μm以下となるように、
第１のZn系合金層の上にAl系合金層を重ね、前記Al系合金層の上に第２のZn系合金層を重ねて、加圧成形によって、前記クラッド材による接続材料を製造することを特徴とする接続材料の製造方法。 A method for producing a connection material using a clad material in which an Al alloy layer is sandwiched between a first Zn alloy layer and a second Zn alloy layer,
The first Zn-based alloy layer has a thickness of 5 μm or more, the Al-based alloy layer has a thickness of 10 μm or more, and the first Zn-based alloy layer has a thickness of 5 μm or more. So that the thickness is 20μm or more and 300μm or less,
An Al-based alloy layer is stacked on the first Zn-based alloy layer, a second Zn-based alloy layer is stacked on the Al-based alloy layer, and a connection material made of the clad material is manufactured by pressure molding. The manufacturing method of the connection material characterized by the above-mentioned. 半導体素子と、前記半導体素子を接続するフレームと、一端が外部端子となるリードと、前記リードの他端と前記半導体素子の電極とを接続するワイヤと、前記半導体素子および前記ワイヤを樹脂封止するレジンとを有し、
前記半導体素子と前記フレームとの接続部は、第１のZn-Al合金層と、第２のZn-Al合金層と、前記第１のZn-Al合金層と前記第２のZn-Al合金層とによって挟持されたAl系合金層とによって形成され、
前記接続部の接合面積に対するボイドの面積率が10%以下であることを特徴とする半導体装置。 A semiconductor element; a frame connecting the semiconductor elements; a lead having one end serving as an external terminal; a wire connecting the other end of the lead to the electrode of the semiconductor element; and the semiconductor element and the wire sealed with resin And a resin to
The connection portion between the semiconductor element and the frame includes a first Zn—Al alloy layer, a second Zn—Al alloy layer, the first Zn—Al alloy layer, and the second Zn—Al alloy. Formed by the Al-based alloy layer sandwiched between the layers,
A semiconductor device, wherein an area ratio of voids to a bonding area of the connection portion is 10% or less. 半導体素子と、前記半導体素子を接続するフレームと、一端が外部端子となるリードと、前記リードの他端と前記半導体素子の電極とを接続するワイヤと、前記半導体素子および前記ワイヤを樹脂封止するレジンとを有し、
前記半導体素子と前記フレームとの接続部は、Zn-Al合金層によって形成され、
前記接続部の接合面積に対するボイドの面積率が10%以下であることを特徴とする半導体装置。 A semiconductor element; a frame connecting the semiconductor elements; a lead having one end serving as an external terminal; a wire connecting the other end of the lead to the electrode of the semiconductor element; and the semiconductor element and the wire sealed with resin And a resin to
The connection part between the semiconductor element and the frame is formed by a Zn-Al alloy layer,
A semiconductor device, wherein an area ratio of voids to a bonding area of the connection portion is 10% or less. 半導体素子と、前記半導体素子を接続する基板と、一端が外部端子となるリードと、前記リードの他端と前記半導体素子の電極とを接続するワイヤと、前記半導体素子及び前記ワイヤを気密封止し、前記基板に接続する金属キャップをと有し、
前記金属キャップと前記基板との接続部は、第１のZn-Al合金層と、第２のZn-Al合金層と、前記第１のZn-Al合金層と前記第２のZn-Al合金層とによって挟持されたAl系合金層とによって形成され、
前記接続部の接合面積に対するボイドの面積率が10%以下であることを特徴とする半導体装置。 A semiconductor element; a substrate connecting the semiconductor element; a lead having one end serving as an external terminal; a wire connecting the other end of the lead to the electrode of the semiconductor element; and the semiconductor element and the wire are hermetically sealed And having a metal cap connected to the substrate,
The connecting portion between the metal cap and the substrate includes a first Zn—Al alloy layer, a second Zn—Al alloy layer, the first Zn—Al alloy layer, and the second Zn—Al alloy. Formed by the Al-based alloy layer sandwiched between the layers,
A semiconductor device, wherein an area ratio of voids to a bonding area of the connection portion is 10% or less. 半導体素子と、前記半導体素子を接続する基板と、一端が外部端子となるリードと、前記リードの他端と前記半導体素子の電極とを接続するワイヤと、前記半導体素子及び前記ワイヤを気密封止し、前記基板に接続する金属キャップをと有し、
前記金属キャップと前記基板との接続部は、Zn-Al合金層によって形成され、
前記接続部の接合面積に対するボイドの面積率が10%以下であることを特徴とする半導体装置。 A semiconductor element; a substrate connecting the semiconductor element; a lead having one end serving as an external terminal; a wire connecting the other end of the lead to the electrode of the semiconductor element; and the semiconductor element and the wire are hermetically sealed And having a metal cap connected to the substrate,
The connection part between the metal cap and the substrate is formed of a Zn-Al alloy layer,
A semiconductor device, wherein an area ratio of voids to a bonding area of the connection portion is 10% or less. 半導体素子を直接回路基板に実装した半導体装置であって、
前記半導体素子と前記回路基板との接続部は、第１のZn-Al合金層と、第２のZn-Al合金層と、前記第１のZn-Al合金層と前記第２のZn-Al合金層とによって挟持されたAl系合金層とによって形成され、
前記接続部の接合面積に対するボイドの面積率が10%以下であることを特徴とする半導体装置。 A semiconductor device in which a semiconductor element is directly mounted on a circuit board,
The connecting portion between the semiconductor element and the circuit board includes a first Zn—Al alloy layer, a second Zn—Al alloy layer, the first Zn—Al alloy layer, and the second Zn—Al. Formed by the Al-based alloy layer sandwiched between the alloy layers,
A semiconductor device, wherein an area ratio of voids to a bonding area of the connection portion is 10% or less. 半導体素子を直接回路基板に実装した半導体装置であって、
前記半導体素子と前記回路基板との接続部は、Zn-Al合金層によって形成され、
前記接続部の接合面積に対するボイドの面積率が10%以下であることを特徴とする半導体装置。 A semiconductor device in which a semiconductor element is directly mounted on a circuit board,
The connection part between the semiconductor element and the circuit board is formed of a Zn-Al alloy layer,
A semiconductor device, wherein an area ratio of voids to a bonding area of the connection portion is 10% or less. 半導体素子と、前記半導体素子を接続するフレームと、一端が外部端子となるリードと、前記リードの他端と前記半導体素子の電極とを接続するワイヤと、前記半導体素子および前記ワイヤを樹脂封止するレジンとを有する半導体装置の製造方法であって、
前記半導体素子と前記フレームとを、請求項１乃至３のいずれか１項に記載の接続材料を溶融して接続することを特徴とする半導体装置の製造方法。 A semiconductor element; a frame connecting the semiconductor elements; a lead having one end serving as an external terminal; a wire connecting the other end of the lead to the electrode of the semiconductor element; and the semiconductor element and the wire sealed with resin A method of manufacturing a semiconductor device having a resin that comprises:
4. A method for manufacturing a semiconductor device, wherein the semiconductor element and the frame are connected by melting the connecting material according to claim 1. 半導体素子と、前記半導体素子を接続する基板と、一端が外部端子となるリードと、前記リードの他端と前記半導体素子の電極とを接続するワイヤと、前記半導体素子及び前記ワイヤを気密封止し、前記基板に接続する金属キャップをと有する半導体装置の製造方法であって、
前記基板と前記金属キャップとを、請求項１乃至３のいずれか１項に記載の接続材料を溶融して接続することを特徴とする半導体装置の製造方法。 A semiconductor element; a substrate connecting the semiconductor element; a lead having one end serving as an external terminal; a wire connecting the other end of the lead to the electrode of the semiconductor element; and the semiconductor element and the wire are hermetically sealed And a method of manufacturing a semiconductor device having a metal cap connected to the substrate,
A method for manufacturing a semiconductor device, comprising: connecting the substrate and the metal cap by melting the connection material according to claim 1. 半導体素子を直接回路基板に実装した半導体装置の製造方法であって、
前記半導体素子と前記回路基板とを、請求項１乃至３のいずれか１項に記載の接続材料を溶融して接続することを特徴とする半導体装置の製造方法。 A method of manufacturing a semiconductor device in which a semiconductor element is directly mounted on a circuit board,
A manufacturing method of a semiconductor device, wherein the semiconductor element and the circuit board are connected by melting the connection material according to claim 1.
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013063449A (en) * 2011-09-16 2013-04-11 Hitachi Cable Ltd Composite material for brazing and manufacturing method thereof
CN115161444A (en) * 2022-08-12 2022-10-11 山西太钢不锈钢精密带钢有限公司 Low-expansion alloy 4J36 precision foil and superfine crystal solid solution heat treatment method and application thereof

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62173095A (en) * 1986-01-24 1987-07-29 Showa Alum Corp Sheet material for soldering
JP2001127064A (en) * 1999-09-09 2001-05-11 Samsung Electronics Co Ltd Method of flattening insulation film for semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62173095A (en) * 1986-01-24 1987-07-29 Showa Alum Corp Sheet material for soldering
JP2001127064A (en) * 1999-09-09 2001-05-11 Samsung Electronics Co Ltd Method of flattening insulation film for semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013063449A (en) * 2011-09-16 2013-04-11 Hitachi Cable Ltd Composite material for brazing and manufacturing method thereof
CN115161444A (en) * 2022-08-12 2022-10-11 山西太钢不锈钢精密带钢有限公司 Low-expansion alloy 4J36 precision foil and superfine crystal solid solution heat treatment method and application thereof
CN115161444B (en) * 2022-08-12 2024-01-19 山西太钢不锈钢精密带钢有限公司 Low-expansion alloy 4J36 precise foil and superfine crystal solid solution heat treatment method and application thereof

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