JP2012142320A - Semiconductor device manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor manufacturing method in which a substrate and the like and a semiconductor element and the like are bonded via a solder layer, which has excellent solderability and high strength at a bonded interface between the substrate and the like, and the solder layer.SOLUTION: A manufacturing method of a semiconductor device 10 in which a substrate 1 and a semiconductor element 5 are bonded via a solder layer 3, comprises: a step of forming a thin film 2 including a Ni metal, a Sn metal, an Au metal or either one of alloys of the metals at least on a surface 1a to be located on the solder layer side of the substrate 1 by performing a dry process such as spattering; and a step of manufacturing the semiconductor device 10 by coating a solder paste 3' on the thin film 2 formed on the surface of the substrate 1, forming the solder layer 3 with placing the semiconductor element 5 on the solder paste 3' under a high temperature atmosphere in a heating furnace, and bonding the substrate 1 and the semiconductor element 5 via the solder layer 3.

Description

  The present invention relates to a method for manufacturing a semiconductor device.

  As a method of manufacturing a semiconductor device such as a power module or a semiconductor package by joining a semiconductor element such as an IC chip (silicon chip), a transistor, or a diode, and a substrate or die pad on which the semiconductor element is mounted, a solder connection method is generally applied. Has been. In addition, lead alloys containing 85% or more of lead (such as Sn—Pb solder) have been used for conventional solders. The regulations on the materials used for various products in the community are becoming stricter, and lead-free soldering is also progressing at the time of soldering. Sn—Ag solder, Sn—Cu solder, Sn—Ag—Cu solder, Sn— Zn-based solder, Sn—Sb-based solder and the like are applied.

  For example, the substrate described above is made of copper, aluminum, or an alloy thereof. For example, a solder layer is directly formed on the surface of a copper substrate, and an element is mounted on the solder layer to perform reflow. Joining in a furnace is a common solder joining method.

  When lead solder such as Sn-Pb solder is used, its melting point is about 183 ° C, which is relatively low, so substrates to be joined such as substrates and silicon elements when soldering in a reflow furnace There is an advantage that it is difficult to apply a thermal load to a component, and there is an advantage that wettability with a substrate or the like is good, and a semiconductor device with high product reliability has been manufactured.

  On the other hand, for example, when the surface of a copper substrate (or a copper foil wiring pattern on the surface of the substrate, etc.) is to be joined with an element using a lead-free solder such as Sn-Zn solder, Cu and solder Zn react to form a Cu—Zn compound layer, and this compound layer becomes brittle at about 150 ° C. Therefore, a semiconductor with extremely low bonding strength at the bonding interface between the solder layer and the substrate, etc. It must be a device.

  Therefore, in Patent Document 1, instead of directly forming a lead-free solder layer on the surface of the copper foil on the substrate surface, an Ni plating layer is formed on the surface of the copper foil, and an Au plating layer is further formed on the surface of the Ni plating layer. A technique for performing a surface treatment and forming a lead-free solder layer via the surface treatment layer is disclosed.

  According to this disclosed technique, the Ni-plated layer formed on the copper foil surface becomes a barrier layer, and the Cu-Zn reaction that causes a decrease in the bonding strength at the interface when soldering with Sn-Zn solder is performed. The formation of a layer (compound layer) is prevented.

  However, according to the present inventors, the Ni plating layer often has a thickness of 5 to 6 μm or more, Ni metal in this Ni plating layer, Cu of the substrate material, Sn of the solder layer, etc. It has been pointed out that the alloy tends to be alloyed to become an intermetallic compound, and this intermetallic compound is brittle, so that this becomes a starting point of a crack, and that the progress causes a great factor in reducing the strength of the interface between the substrate and the solder layer.

Japanese Patent Laid-Open No. 2002-359459

  The present invention has been made in view of the above-described problems, and relates to a semiconductor device in which a substrate or the like and a semiconductor element or the like are joined via a solder layer, and has good solderability, and the substrate or the like and the solder layer. It is an object of the present invention to provide a method for manufacturing a semiconductor device having high bonding strength at an interface.

  In order to achieve the above object, a method of manufacturing a semiconductor device according to the present invention is a method of manufacturing a semiconductor device in which a substrate and a semiconductor element are joined via a solder layer, and at least on the surface on the solder layer side of the substrate. A step of forming a thin film made of any one of Ni metal, Sn metal, Au metal or an alloy thereof by a dry process; and applying a solder paste on the thin layer formed on the surface of the substrate; The semiconductor element is placed on the substrate, a solder layer is formed in a high-temperature atmosphere in a heating furnace, and the substrate and the semiconductor element are joined via the solder layer to manufacture a semiconductor device.

  In the manufacturing method of the present invention, a dry process is applied to form a thin layer made of at least one of Ni metal, Sn metal, Au metal, or an alloy thereof on the surface of the substrate. Examples of the dry process include a vacuum deposition method and a sputtering method included in the PVD method (Physical Vapor Deposition physical vapor deposition method), and a CVD method (Chemical Vapor Deposition chemical vapor deposition). Law).

  By passing through the dry process which consists of the above-mentioned PVD method and CVD method, compared with the case where it passes through wet processes, such as an electrolytic plating process, a remarkably thin metal layer can be formed in the surfaces, such as a board | substrate.

  More specifically, in the case of a wet process such as an electrolytic plating process, a treatment film having a thickness of about 5 to 6 μm is formed, but by a dry process, it is several hundred nm or less, for example, about 5 nm. An extremely thin film can be formed.

  When a treatment film having a thickness of about 5 to 6 μm is formed on the substrate surface or the semiconductor element surface, the treatment film improves the solder wettability, but the treatment film is processed during the high-temperature treatment for solder joining. Between the metal forming the film and the metal forming the substrate and the solder layer, an intermetallic compound composed of both metals is easily generated, and this is formed in a layered manner at the interface. The layered intermetallic compound is generally brittle, and this tends to be a starting point for cracks and the like and cause interface peeling between the solder layer and the substrate. Therefore, the metal that forms the treatment layer treated on the surface of the substrate or the like in order to improve the solder wettability inherently diffuses inside the solder layer or the like during the high-temperature treatment at the time of soldering. As a result, the metal forming the solder layer and the metal forming the substrate are metal-bonded, so that a semiconductor device having high interface strength between the solder layer and the substrate is obtained.

  According to the present inventors, a thin film can be formed by performing a surface treatment of a substrate or the like by a dry process. For example, a thin film treatment layer of about 200 nm or less can be used for soldering. The metal that forms the treatment layer in a high-temperature atmosphere is diffused into the solder layer and the substrate, and there is not enough metal to form an intermetallic compound, so that the intermetallic compound is formed at the interface between the solder layer and the substrate. A semiconductor device which is not formed or has only a few intermetallic compounds formed can be obtained.

  Since no or little intermetallic compound is formed between the solder layer and the substrate, the semiconductor element generates heat and the substrate and the solder layer constituting the semiconductor device are thermally deformed with different amounts of displacement. Even in this case, the interface is not easily cracked due to the high interface strength, and the semiconductor device has high durability.

  Here, “at least the surface on the solder layer side of the substrate” means the entire surface of the surface on the solder layer side of the substrate, the region of the surface on the solder layer side of the substrate, where the solder layer is formed, this substrate surface In addition to the surface on the solder layer side of the semiconductor element.

  A semiconductor device to be manufactured has a structure in which a substrate made of copper, aluminum, or an alloy thereof and a semiconductor element are connected through a solder layer. , A die pad, a combination of a circuit board and an insulating substrate, or a combination of a circuit board, an insulating substrate, and a stress relaxation substrate. The insulating substrate includes a laminate (DBA) formed by laminating a substrate made of pure aluminum and a base made of aluminum nitride, for example. Further, the semiconductor element indicates all elements such as an IC chip (silicon chip), a transistor, and a diode.

  In addition, the semiconductor device may include a heat sink plate or an aluminum die-cast integrated molded body of a heat sink plate and a cooler including a refrigerant return path below the substrate. Even if the laminated body of the element, the substrate, the heat sink plate, etc. is housed in a case of insulating material (ceramics, thermosetting or thermoplastic resin material, aluminum or its alloy material, etc.) It may be. In addition, a relatively high-rigidity potting resin body, a low-rigidity and highly flexible gel-like potting resin body, etc. are provided on the surface of the semiconductor element or circuit board in order to provide insulation to the semiconductor element or substrate surface. It may be a form to do. Furthermore, although the solder layer includes both Pb-based solder and Pb-free solder, as described above, in order to reduce environmental impact load, Sn-Ag solder, Sn-Cu solder, Sn-- It is preferable to use a Pb-free solder such as an Ag—Cu solder, Sn—Zn solder, or Sn—Sb solder.

  As described above, the “thin film” made of Ni metal or the like formed by a dry process is a layer that is much thinner than a plating layer having a thickness of about 5 μm or more. Since the amount of intermetallic compounds that can be generated in a high-temperature atmosphere at the time of soldering is significantly reduced when the thin film is about 200 nm, the thickness of the thin film is preferably about 200 nm or less, more preferably 100 nm. The following is good, and it is preferable that the layer be as thin as possible within the range that can be formed. And it has also been specified by the present inventors that an ultra-thin thin film of about 5 nm can be formed by applying a dry process, and by forming such an ultra-thin thin film on a substrate, it is favorable While guaranteeing solder wettability, the thin film is completely lost in a high-temperature atmosphere during solder bonding, and the interface between the solder layer and the substrate becomes a semiconductor device having high bonding strength formed by metal bonding of both metals.

  The semiconductor device manufactured by the manufacturing method described above is highly suitable for in-vehicle devices because the semiconductor element is well soldered to the surface of the substrate via the solder layer and the interface strength between the solder layer and the substrate is high. It is optimal for application to inverters mounted on recent hybrid vehicles and electric vehicles that require high performance and high durability.

  As can be understood from the above description, according to the method of manufacturing a semiconductor device of the present invention, a thin film made of Ni metal or the like is formed by a dry process on at least the surface of the substrate on the solder layer side, and the solder layer is formed thereon. In this way, the metal components that form the thin film are diffused into the solder layer and the board at the interface between the solder layer and the board while guaranteeing the solder wettability of the substrate by the thin film, while the solder layer is formed in a high temperature atmosphere. A semiconductor device that can effectively eliminate the formation of a fragile metal compound, promotes the metal bond between the metal forming the solder layer and the metal forming the substrate, and has high bonding strength at the interface by this metal bond. Can be manufactured.

(A), (b) is a flowchart explaining the manufacturing method of the semiconductor device of this invention in order. FIG. 2 is a flowchart for explaining the semiconductor device manufacturing method of the present invention following FIG. 1 and showing the manufactured semiconductor device. FIG. 6 is a result of a liquid-phase cooling / heating cycle test on a semiconductor device (Example) according to the manufacturing method of the present invention and a semiconductor device (Comparative Example) according to a conventional manufacturing method, in the interface between the solder layer and the substrate to the base material of the solder layer; It is a graph which shows the result of having measured the void rate. (A) is the cross-sectional photograph figure after the liquid phase thermal cycle test of the semiconductor element of an Example, a solder layer, and a board | substrate, (b) is a cross-sectional photograph figure of the semiconductor element of a comparative example, a solder layer, and a board | substrate.

  Embodiments of the present invention will be described below with reference to the drawings. In addition, in the manufacturing method of this invention, the apparatus and reflow furnace used by dry processes, such as sputtering, shall apply a well-known thing, and those illustration is abbreviate | omitted.

  1a, 1b, and 2 are sequential flowcharts for explaining a method of manufacturing a semiconductor device of the present invention.

  First, as shown in FIG. 1a, a thin film 2 for improving solder wettability is formed on a surface 1a on the solder layer side of a substrate 1 made of copper, aluminum, or an alloy thereof by a dry process. To do.

  In addition to the circuit board, any one of a combination of a die pad, a circuit board and an insulating board, or a combination of a circuit board, an insulating board, and a stress relaxation board can be applied to the board 1. For example, a laminate (DBA) formed by laminating a substrate made of pure aluminum and a base made of aluminum nitride is included.

  The thin film 2 is formed of any one of Ni metal, Sn metal, Au metal, or an alloy thereof. As a dry process, a vacuum evaporation method or a sputtering method of a PVD method, or a CVD method is used. Either kind is applied.

  Further, the thickness t of the thin film 2 should be as thin as possible. As will be described later, at the interface between the solder layer and the substrate 1, the metal between the metal forming the thin layer and the metal forming the substrate 1, etc. The thickness at which the compound is not formed or is difficult to form is set to about 200 nm or less, more preferably 100 nm or less, and the thickness that can be formed by sputtering or the like is set to about 5 nm.

  When the thin film 2 is formed on the surface 1a on the solder layer side of the substrate 1 by the dry process, as shown in FIG. 1b, the Pb-free Sn-based solder paste 3 ′ (solder metal particles are applied on the surface of the thin film 2). (Cream solder kneaded with flux) is applied, and the semiconductor element 5 is placed thereon. A thin film 4 made of Ni metal or the like is formed on the surface 5a on the solder layer side of the semiconductor element 5 in the same manner as the surface 1a on the solder layer side of the substrate 1 by a dry process. In addition, a thin film of Au metal may be formed.

  As the semiconductor element 5, any one of an IC chip (silicon chip), a transistor, a diode, and the like can be applied.

  When the laminated body shown in FIG. 1b is formed, it is placed in a reflow furnace (not shown), the solder paste 3 'is heated in a high temperature atmosphere, and this is melt-cured to form the solder layer 3. The semiconductor element 5 and the substrate 1 are joined through the solder layer 3 to manufacture the semiconductor device 10 as shown in FIG.

  In a high-temperature atmosphere in this reflow furnace, for example, Ni metal forming the thin layer 2 made of Ni metal is Sn metal forming the solder layer 3, Al metal forming the substrate 1 and Sn—Ni-based or Al—Ni. The thin layer 2 is eliminated by diffusing into the solder layer 3 and the substrate 1 without forming an intermetallic compound. This is because there is not enough Ni metal to form an intermetallic compound because the thin layer 2 is, for example, as thin as about 200 nm or less. In order to form the thin layer 2 made of such a thin Ni metal, a wet process such as plating is not possible, and a dry process such as sputtering is essential.

  Instead of forming an Sn—Ni-based intermetallic compound, at the interface 6 between the solder layer 3 and the substrate 1, metal bonding of the Sn metal forming the solder layer 3 and the substrate 1, for example, Al metal is promoted. Depending on the combination of both materials, the interface strength may be higher than the Sn base material strength of the solder layer 3.

  That is, when the solder layer 3 is formed while the wettability at the time of soldering is favorably secured by the thin layer 2, the starting point of the interfacial delamination between the solder layer 3 and the substrate 1 by the brittle and repeated cooling cycle. Since there is no thin layer 2 that can be formed, the bonding strength at the interface 6 between the solder layer 3 and the substrate 1 is extremely high, and the durability of the semiconductor device 10 is extremely high.

  In addition, the interface 7 between the semiconductor element 5 and the solder layer 3 also disappears in a high-temperature atmosphere in the reflow furnace, and the wettability at the time of solder joining is ensured as in the case of the interface 6. However, the interfacial strength is extremely high.

[Liquid Phase Cooling and Cycle Test and Results for Semiconductor Device (Example) According to the Manufacturing Method of the Present Invention and Semiconductor Device (Comparative Example) According to Conventional Manufacturing Method]
The inventors of the present invention manufactured the semiconductor device shown in FIG. 2 by the manufacturing method of the present invention (Example), Ni metal is plated on the surface of the substrate and the semiconductor element, and these are joined by a solder layer. Two types of test specimens of a semiconductor device (comparative example) manufactured by a conventional method were prototyped. Note that Pb-free Sn-based solder is used for the solder layer.

  A liquid phase thermal cycle test was performed in which 3000 cycles of the thermal cycle in which the specimens of the examples and comparative examples were immersed in antifreeze solution (Galden) and placed at −40 ° C. for 5 minutes and then at 105 ° C. for 5 minutes were performed.

  The state of the interface between the solder layer and the substrate after 3000 cycles is image-analyzed with an X-ray inspection apparatus, and the ratio of the crack region area (void region area) generated in the interface to the solder layer to the total interface area is determined. The void ratios of both were compared. The result is shown in FIG.

  From the figure, it is proved that the crack region is reduced by 15% and 5% in the example with respect to 20% in the comparative example. More specifically, in the case of the embodiment, a 15% crack generation region is confirmed in a plane by X-ray analysis, but not all of this is generated at the interface, and a part of it is soldered. The difference in crack rate (void ratio) at the interface is actually larger than 5% because all of the crack generation regions of the comparative example are generated at the interface. It has become.

  Moreover, the cross section of the semiconductor element, the solder layer, and the substrate was cut out in Examples and Comparative Examples, and the cross-sectional photographs were taken. FIG. 4a shows an example, which shows a cross-section after the liquid-phase cooling cycle test was performed, and FIG. 4b shows a comparative example in which the liquid-phase cooling cycle test was performed. The cross section is not shown.

  From FIG. 4a, it can be confirmed that no intermetallic compound layer is formed at the interface between the solder layer and the substrate, and that the Sn metal of the solder layer and the Al metal of the substrate are metal-bonded. In addition, since the Example shown by this photograph figure is a thing after a liquid phase thermal cycle test, although the black area | region which shows the crack produced by the thermal cycle test can be confirmed, in the state before a thermal cycle test, it is like this. Naturally, no cracks have occurred.

  On the other hand, as shown in FIG. 4b, a Ni plating layer having a thickness of about 6 μm is formed between the substrate and the solder layer, and a Sn—Ni intermetallic compound layer is further formed on the surface. This layer is likely to become a starting point of cracks in the cooling and heating cycle process, which is a major factor for lowering the interface strength.

  In this way, by applying the manufacturing method of the present invention, an intermetallic compound is not generated at the interface between the substrate and the solder layer, or the amount of the generated compound can be extremely reduced, and the metal bonding between the two metal materials is promoted. By doing so, it is possible to obtain a highly durable semiconductor device having extremely high bonding strength at the interface.

  The embodiment of the present invention has been described in detail with reference to the drawings. However, the specific configuration is not limited to this embodiment, and there are design changes and the like without departing from the gist of the present invention. They are also included in the present invention.

DESCRIPTION OF SYMBOLS 1 ... Board | substrate, 1a ... Solder layer side surface, 2 ... Thin film, 3 ... Solder layer, 3 '... Solder paste, 4 ... Thin film, 5 ... Semiconductor element, 6 ... Interface of board | substrate and solder layer, 7 ... Semiconductor element Interface of solder layer, 10 ... semiconductor device

Claims (4)

A method of manufacturing a semiconductor device in which a substrate and a semiconductor element are bonded via a solder layer,
Forming a thin film made of any one of Ni metal, Sn metal, Au metal, or an alloy thereof by a dry process on at least a surface of the substrate on the solder layer side;
A solder paste is applied on the thin layer formed on the surface of the substrate, a semiconductor element is placed on the solder paste, and a solder layer is formed in a high-temperature atmosphere in a heating furnace. A method for manufacturing a semiconductor device comprising the steps of manufacturing a semiconductor device by bonding a substrate and a semiconductor element.   The method of manufacturing a semiconductor device according to claim 1, wherein the dry process is one of a vacuum vapor deposition method, a sputtering method, and a CVD method among PVD methods.   The method for manufacturing a semiconductor device according to claim 1, wherein the thin layer made of Ni metal has a layer thickness of 200 nm or less.   The method for manufacturing a semiconductor device according to claim 1, wherein the thin layer made of Ni metal has a layer thickness of 100 nm or less.

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