JP2011109022A - Method of manufacturing semiconductor chip, and film for processing - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor chip that can secures a sufficient yield of manufacture by suppressing warpage of a semiconductor wafer in a thinning process, and to provide a film for processing. <P>SOLUTION: In the method of manufacturing the semiconductor chip, the film 1 for processing which has a width larger than the diameter of the semiconductor wafer 10 and whose base film 2 has a thickness of 50 to 120 μm is stuck on a circuit surface 10a of the semiconductor wafer 10. Consequently, when an excess portion 12 of the film 1 for processing which protrudes from the circuit surface 10a of the semiconductor wafer 10 is removed, operation efficiency is held excellent, and formation of burrs of a cut portion of the film 1 for processing and cutting wastes is suppressed. Further, the semiconductor wafer 10 is made thin in a state where warpage thereof is suppressed, so the semiconductor wafer 10 can be flattened without being broken and a dicing tape 16 can be stuck, thereby securing the yield of the manufacture. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a semiconductor chip manufacturing method and a processing film.

  As a technique related to this type of field, for example, there is a method for manufacturing a semiconductor device described in Patent Document 1. In this manufacturing method, back grinding of a semiconductor wafer is performed in a state in which a processing film formed by forming an adhesive layer and an adhesive layer on a base film is attached to the circuit surface of the semiconductor wafer. Further, for example, in the method of manufacturing a semiconductor device described in Patent Document 2, after bonding a bonding sheet formed by forming a thermosetting resin layer on a synthetic resin film to the bump electrode surface of the semiconductor chip, the synthetic resin film is The semiconductor chip and the circuit board are connected by peeling.

JP 2006-49482 A JP 2001-326346 A

  By the way, when performing back grinding by pasting a processing film on the circuit surface of a semiconductor wafer, from the viewpoint of handling properties, etc., from the semiconductor wafer so that the pasted processing film has substantially the same shape as the semiconductor wafer. It is preferable to cut off excess portions of the processing film that protrude. However, since the processing film is in a floating state except for the portion attached to the circuit surface of the semiconductor wafer, the processing film is deformed and the cutting force is dispersed when the surplus portion is cut. There is a risk of relaxation. For this reason, if the strength of the processing film is too high, the cutting becomes insufficient and the working efficiency is lowered.

  Moreover, even when the film for processing is successfully cut, burrs may remain in the cut portion or cutting waste may be generated. If back grinding is performed in a state where such burrs and cutting waste adhere to the semiconductor wafer, it becomes difficult to thin the semiconductor wafer uniformly and flatly. If warpage occurs in the semiconductor wafer after back grinding, it is difficult to flatten the semiconductor wafer without damaging the semiconductor wafer and affix the dicing tape in the subsequent chip forming process, which may lead to a decrease in manufacturing yield. Arise.

  The present invention has been made to solve the above problems, and provides a method for manufacturing a semiconductor chip and a film for processing capable of suppressing warpage of a semiconductor wafer during thinning and sufficiently securing a manufacturing yield. For the purpose.

  In order to solve the above problems, a method for manufacturing a semiconductor chip according to the present invention provides a long processing film formed by forming an adhesive layer on a base film, and the processing film on the circuit surface of a semiconductor wafer. A film affixing process for affixing the adhesive layer, a thinning process for thinning the semiconductor wafer by back grinding the opposite side of the semiconductor wafer, and a dicing tape affixed to the opposite side of the thinned semiconductor wafer Then, the semiconductor wafer is diced from the processing film side to obtain individual semiconductor chips, and the film pasting step has a width larger than the diameter of the semiconductor wafer and A processing film having a thickness of 50 μm to 120 μm is attached to the circuit surface of the semiconductor wafer, and before the thinning process, the circuit surface of the semiconductor wafer is It is characterized by removing the excess portion of the processing film that protrudes.

  In this semiconductor chip manufacturing method, in the film sticking step, a processing film having a width larger than the diameter of the semiconductor wafer and having a base film thickness of 50 μm to 120 μm is stuck to the circuit surface of the semiconductor wafer. For this reason, when removing the excess part of the processing film that protrudes from the circuit surface of the semiconductor wafer before the thinning step, it is possible to prevent the processing film from becoming excessively strong and to keep the working efficiency favorable. In addition, it is possible to suppress burrs from being left in the cut portion of the processing film and generation of cutting waste. As a result, the semiconductor wafer can be back-ground while suppressing warpage, so that it is possible to flatten the semiconductor wafer without damaging it in the subsequent chip forming process, and a dicing tape can be applied to ensure a sufficient manufacturing yield. it can.

  Moreover, it is preferable that the thickness of a base film is 60 micrometers-110 micrometers. In this case, it can prevent more reliably that the intensity | strength of the film for a process becomes excess, and the further improvement of working efficiency is achieved.

  In the thinning step, it is preferable to back grind the opposite surface of the semiconductor wafer so that the ratio of the thickness of the semiconductor wafer to the thickness of the base film is 1: 0.5 to 2.5. In this case, the effect of suppressing the generation of burrs at the cut portion of the processing film and the effect of ensuring the handleability of the thinned semiconductor wafer can be preferably made compatible.

  The processing film has a pressure-sensitive adhesive layer between the base film and the adhesive layer, and after the chip forming step, the base film and the pressure-sensitive adhesive layer are left from the circuit surface of the semiconductor chip leaving the adhesive layer. It is preferable to further include a pick-up step for picking up the semiconductor chip after removing. In this case, since the same processing film can be used from the thinning process to the pickup process, the manufacturing process can be simplified.

  Further, the processing film according to the present invention is a long processing film that is formed by laminating an adhesive layer and an adhesive layer in this order on a base film, and is attached to a circuit surface of a semiconductor wafer. The substrate has a width larger than the diameter of the semiconductor wafer, and the base film has a thickness of 50 μm to 120 μm.

  In this processing film, the thickness of the base film is 50 μm to 120 μm. For this reason, after pasting the adhesive layer of the processing film on the circuit surface of the semiconductor wafer, before removing the excess portion of the processing film protruding from the circuit surface of the semiconductor wafer before the thinning process, The strength of the film can be prevented from becoming excessive, and the working efficiency can be kept good. Moreover, it can suppress that a burr | flash remains in the cut part of a film for a process, or generation | occurrence | production of cutting waste. As a result, the semiconductor wafer can be back-ground while suppressing warpage, so that it is possible to flatten the semiconductor wafer without damaging it in the subsequent chip forming process, and a dicing tape can be applied to ensure a sufficient manufacturing yield. it can.

  According to the present invention, it is possible to suppress warpage of a semiconductor wafer during thinning and to ensure a sufficient manufacturing yield.

It is a figure which shows one Embodiment of the film for a process which concerns on this invention. It is a figure which shows one Embodiment of the manufacturing method of the semiconductor chip which concerns on this invention. FIG. 3 is a diagram showing a step subsequent to FIG. 2. FIG. 4 is a diagram showing a step subsequent to FIG. 3. FIG. 5 is a diagram showing a step subsequent to FIG. 4. FIG. 6 is a diagram showing a step subsequent to FIG. 5. FIG. 7 is a diagram showing a step subsequent to FIG. 6. FIG. 8 is a diagram showing a step subsequent to FIG. 7. FIG. 9 is a diagram showing a step subsequent to that in FIG. 8. FIG. 10 is a diagram showing a step subsequent to FIG. 9. FIG. 11 is a diagram showing a step subsequent to FIG. 10. FIG. 12 is a diagram showing a step subsequent to FIG. 11. It is a figure which shows the modification of a chip formation process.

  Hereinafter, preferred embodiments of a semiconductor chip manufacturing method and a processing film according to the present invention will be described in detail with reference to the drawings.

  FIG. 1 is a view showing an embodiment of a processing film according to the present invention. The processing film 1 has a function as a film for back grinding of a semiconductor wafer, and a function of giving an adhesive layer to the semiconductor chip when connecting the semiconductor chip obtained by dicing the semiconductor wafer to the circuit board. Is a film integrally having As shown in FIG. 1, this processing film 1 is formed by forming a pressure-sensitive adhesive layer 3 and an adhesive layer 4 in this order on a base film 2, and from the diameter of a semiconductor wafer to be attached. It has a long shape with a large width.

  The base film 2 is formed with a thickness of about 50 μm to 120 μm, for example. The base film 2 occupies most of the strength of the processing film 1, and when the thickness of the base film 2 exceeds 120 μm, when the processing film 1 is cut, If the thickness of the base film 2 is less than 50 μm, the warp of the semiconductor wafer thinned by back grinding increases, and the semiconductor wafer is not damaged in the subsequent chip forming process. This is because it becomes difficult to flatten and attach a dicing tape. In order to further enhance the above effect, the thickness of the base film 2 is more preferably 60 to 110 μm.

  Examples of polymers that can be selected as the base film 2 include polyethylene, polypropylene, ethylene-propylene copolymer, polybutene-1, poly-4-methylpentene-1, ethylene-vinyl acetate copolymer, and ethylene-acrylic acid. Homopolymers or copolymers of α-olefins such as ethyl copolymer, ethylene-methyl acrylate copolymer, ethylene-acrylic acid copolymer, ionomer or mixtures thereof, polyethylene terephthalate, polycarbonate, polymethyl methacrylate, etc. Engineering plastics, polyurethanes, thermoplastic elastomers such as styrene-ethylene-butene or pentene copolymers, polyamide-polyol copolymers, and mixtures thereof. Moreover, what mixed 2 or more types chosen from said material, or the thing in which said film was multilayered may be used. In this case, the polypropylene base material which formed the adhesive layer on the surface is mentioned, for example.

  The pressure-sensitive adhesive layer 3 is formed, for example, by applying a pressure-sensitive adhesive composition to the base film 2 and then drying it. Although the thickness in particular of the adhesive layer 3 is not restrict | limited, For example, it is about 2 micrometers-50 micrometers. The pressure-sensitive adhesive layer 3 has radiation curability, and has a low adhesive strength when irradiated with radiation such as ultraviolet rays, and can be easily peeled off from the adhesive layer 4.

  The adhesive layer 4 is a portion used for holding the semiconductor wafer during back grinding, protecting the circuit surface of the semiconductor wafer during dicing, and bonding / connecting the semiconductor chip and the circuit board by flip chip bonding. The adhesive layer 4 is a solid at room temperature, for example, from the viewpoint of keeping the semiconductor wafer in the back grind flat. The thickness of the adhesive layer 4 is such that the gap between the semiconductor chip and the circuit board can be filled during flip chip bonding. Usually, if the thickness of the adhesive layer 4 is equal to or greater than the sum of the height of the protruding electrode of the semiconductor chip and the height of the wiring of the circuit board, the space between the semiconductor chip and the circuit board can be sufficiently filled.

  Further, the adhesive layer 4 must follow the unevenness of the circuit surface due to the protruding electrodes when attached to the semiconductor wafer, and must be in close contact with the circuit surface without air voids being taken in. For this reason, at the time of affixing, the viscosity of the adhesive layer 4 is lowered, and it is necessary to exhibit followability to the uneven shape of the circuit surface. The viscosity of the adhesive layer 4 at the pasting temperature is preferably 1000 Pa · s or more and 10,000 Pa · s or less. When the viscosity exceeds 10,000 Pa · s, it is necessary to apply pressure to follow the unevenness of the circuit surface. When the viscosity is less than 1000 Pa · s, the adhesive layer 4 protrudes from the side surface of the semiconductor wafer at the time of bonding. This is because it becomes difficult to manage the amount of adhesive.

  The viscosity of the adhesive layer 4 before heat curing can be measured using a known dynamic viscoelasticity measuring apparatus, and the measurement is performed fully automatically. In this measurement, when a sample is sandwiched between two parallel plates in a thermostatic chamber heated to a predetermined temperature and a minute sinusoidal twist distortion is added to one plate, the stress and strain generated on the other plate are detected. Calculate elastic modulus and viscosity.

In general, the measurement frequency is 0.5 Hz to 10 Hz, and the polymer material behaves as a viscoelastic body, so that a storage elastic modulus G ′ derived from an elastic component and a loss elastic modulus G ″ derived from a viscous component are obtained. From these two values, the complex elastic modulus G * is obtained as shown in the following (1): Furthermore, the viscosity is η (Pa · s), the measurement frequency is f (Hz), and the complex elastic modulus G * (Pa). Then, the viscosity is obtained as in the following formula (2).
G * = {(G ′) ² + (G ″) ² } ^1/2 (1)
η = G * / 2πf (2)

  Further, the adhesive layer 4 preferably has an elastic modulus of, for example, 1 GPa or more at room temperature in order to hold the semiconductor wafer in the back grind. In the case of having such an elastic modulus, the adhesive layer 4 can be prevented from peeling off from the surface of the wafer and the generation of burrs during dicing of the semiconductor wafer, and the adhesive layer 4 can be made to follow the dividing line of the wafer. Can be suitably divided. It is desirable that the adhesive layer 4 contains a filler in order to increase elasticity, suppress burrs, and improve separation.

  Furthermore, the transmittance of the adhesive layer 4 by the turbidity measurement method is 10% or more for recognizing the scribe line of the semiconductor wafer during dicing or recognizing the alignment pattern formed on the chip circuit surface in the flip chip connection process. It is preferable that the visible light transmittance of the entire processing film 1 is 20% or more. In order to maintain the transmittance, the difference between the refractive index of the adhesive layer 4 and the refractive index of the filler is preferably within ± 0.06.

  Such an adhesive layer 4 has a refractive index difference of ± 0.06 between a resin composition comprising at least a thermosetting resin, a high molecular weight component, and a compound for initiating a crosslinking reaction, and the resin composition. Including fillers. The thermosetting resin is cured by three-dimensionally crosslinking with heat. The high molecular weight component is solid at room temperature, and improves the film formability of the adhesive layer 4 and is softened by heating.

  The initiator for initiating the cross-linking reaction is solid or liquid, and promotes the reaction between the thermosetting resin and the thermosetting resin during heating to cause the cross-linking reaction, while from room temperature to the pasting temperature. It does not react at temperature, or the reaction rate is slow, and the state of maintaining the reactivity is maintained to the extent that the adhesiveness at the time of flip chip connection is sufficiently developed. The filler increases the cohesive force when the resin composition is uncured and reduces the linear expansion coefficient after curing.

  Examples of the thermosetting resin include epoxy resin, bismaleimide resin, triazine resin, polyimide resin, polyamide resin, cyanoacrylate resin, phenol resin, unsaturated polyester resin, melamine resin, urea resin, polyurethane resin, polyisocyanate resin, Examples include furan resins, resorcinol resins, xylene resins, benzoguanamine resins, diallyl phthalate resins, silicone resins, polyvinyl butyral resins, siloxane-modified epoxy resins, siloxane-modified polyamideimide resins, and acrylate resins. These can be used alone or as a mixture of two or more.

  The high molecular weight component is preferably a polymer that becomes a solid state at room temperature and softens by heating, and has a weight average molecular weight of 10,000 or more. Examples of such high molecular weight components include polyester resin, polyether resin, polyamide resin, polyamideimide resin, polyimide resin, polyarylate resin, polyvinyl butyral resin, polyurethane resin, phenoxy resin, polyacrylate resin, polybutadiene, and acrylonitrile butadiene copolymer. Examples thereof include coalescence (NBR), acrylonitrile butadiene rubber styrene resin (ABS), styrene butadiene copolymer (SBR), and acrylic acid copolymer. These can be used alone or in combination of two or more. Moreover, these high molecular weight components may have a functional group that reacts with the thermosetting resin in the side chain or the terminal. Examples of the functional group include an epoxy group, a phenolic hydroxyl group, an alcoholic hydroxyl group, a carboxyl group, and an amine. These functional groups may be capped with their reactivity suppressed by a protective group that cleaves during the reaction or steric hindrance.

  The compound for initiating the crosslinking reaction is preferably a compound having the potential to achieve both high reactivity and storage stability of the thermosetting resin. The potential is, for example, protection by microcapsules, widening the difference between decomposition temperature and storage temperature, expressing the reactivity by melting in solid state during reaction and widening the difference between storage temperature and melting temperature, reaction It can be expressed by a method such as introducing a protecting group that cleaves at temperature and making it stable during storage.

  The microcapsule type curing agent is substantially composed of a coating material such as a polymer material such as polyurethane, polystyrene, gelatin and polyisocyanate, an inorganic material such as calcium silicate and zeolite, and a metal thin film such as nickel and copper with the curing agent as a core. The average particle diameter is 10 μm or less, preferably 5 μm or less. As the compound for initiating the above-mentioned crosslinking reaction, a compound optimal for the reaction mechanism of the thermosetting resin can be selected. For example, when the thermosetting resin is an epoxy resin, an imidazole or amine compound can be selected for promoting the polymerization. When the crosslinking proceeds by the addition reaction, a polymerization catalyst such as triphenylphosphine or DBU can be used.

  In addition, the adhesive resin composition includes phenolic, imidazole, hydrazide, thiol, benzoxazine, boron trifluoride-amine complex, sulfonium salt, amine imide, and polyamine as components that react with the three-dimensional crosslinkable resin. Or a dicyandiamide or an organic peroxide compound. Further, in order to increase the pot life of the curing agent, it may be coated with a polyurethane-based or polyester-based polymer substance to form microcapsules.

  The filler may be crystalline or non-crystalline. Moreover, the linear expansion coefficient after the adhesive bond layer 4 hardens | cures with a filler can be made small. When the linear expansion coefficient is small, thermal deformation is suppressed, and the electrical connection between the protruding electrode and the wiring of the circuit board can be suitably maintained even after the semiconductor chip is mounted on the circuit board. Therefore, the reliability of the manufactured semiconductor device can be improved.

  The filler may be expressed as a compound having a chemical composition or a compound having a plurality of compositions. Examples of fillers expressed as a single compound include oxide fillers such as silica, alumina, titania and magnesia, hydroxide fillers such as aluminum hydroxide and magnesium hydroxide, and sulfates such as barium sulfate and sodium sulfate. A filler etc. are mentioned.

  On the other hand, examples of fillers represented as a compound having a plurality of compositions include zinc, aluminum, antimony, ytterbium, yttrium, indium, erbium, osmium, cadmium, calcium, potassium, silver, chromium, cobalt, samarium, dysprosium, Zirconium, tin, cerium, tungsten, strontium, tantalum, titanium, iron, copper, sodium, niobium, nickel, vanadium, hafnium, palladium, barium, bismuth, praseodymium, beryllium, magnesium, manganese, molybdenum, europium, lanthanum, phosphorus, Examples thereof include oxides containing metal elements such as lutetium, ruthenium, rhodium and boron. These may be used as a mixture.

The composite oxide is preferably a compound that contains two or more kinds of metals as raw materials and has a structure different from the structure when the raw metal becomes an oxide alone. Particularly preferred are composite oxide particles comprising an oxide compound containing at least one metal element selected from aluminum, magnesium or titanium and two or more other elements as raw materials. Examples of such complex oxides include aluminum borate, cordierite, falselite, and mullite. The linear expansion coefficient of the composite oxide particles is preferably 7 × 10 ⁻⁶ / ° C. or less, more preferably 3 × 10 ⁻⁶ / ° C. or less, in a temperature range of 0 ° C. to 700 ° C. or less. When the thermal expansion coefficient is larger than this range, it is necessary to add a large amount of composite oxide particles in order to lower the thermal expansion coefficient of the adhesive layer 4.

  Further, the adhesive layer 4 may include an additive such as a coupling agent. Thereby, the adhesiveness of a semiconductor chip and a circuit board can be improved. Further, conductive particles may be dispersed in the adhesive layer 4. In this case, it is possible to reduce an adverse effect due to variations in the height of the protruding electrode. Further, even when a glass substrate or the like that is not easily deformed by compression is used as the circuit substrate, the electrical connection can be maintained. Furthermore, the adhesive layer 4 may be an anisotropic conductive adhesive layer.

  Next, a method for manufacturing a semiconductor chip using the processing film 1 described above will be described. 2-12 is a figure which shows one Embodiment of the manufacturing method of the semiconductor chip based on this invention.

  First, as shown in FIG. 2, a semiconductor wafer 10 is prepared. It has a circuit surface 10a on which a plurality of protruding electrodes 11 are formed by a predetermined semiconductor process, and an opposite surface 10b. The thickness of the semiconductor wafer 10 in a state before back grinding is about 550 μm to 750 μm. The semiconductor wafer 10 is sucked and held on the support stage S of the processing film sticking apparatus with the circuit surface 10a facing upward. Although not shown, a positioning pattern for adjusting the dicing position is formed on the circuit surface 10 a of the semiconductor wafer 10.

  Next, the processing film 1 described above is prepared, and the processing film 1 is applied to the circuit surface 10a of the semiconductor wafer 10 while applying a predetermined pressure by a pressure roll with the adhesive layer 4 facing the circuit surface 10a. Pasting (film pasting process). The processing film sticking apparatus used for sticking the processing film 1 to the semiconductor wafer 10 is preferably provided with a heating mechanism in the support stage S and the pressure roll. As shown in FIG. 3, the adhesive layer 4 is filled so as to fill the protruding electrodes 11 by pressurization when the processing film 1 is attached.

  After the processing film 1 is attached, a cutter knife K is inserted from the processing film 1 side and the cutting edge of the cutter knife K is inserted into the cutting groove Sa of the support stage S as shown in FIG. Then, by moving the cutter knife K along the edge of the semiconductor wafer 10, the excess portion 12 of the processing film 1 is removed, and the processing film 1 is cut into approximately the same size as the semiconductor wafer 10.

  Next, as shown in FIG. 5A, by using a grinding apparatus G, the semiconductor wafer 10 is ground from the opposite surface 10b side. Then, the semiconductor wafer 10 is, for example, 50 μm or so so that the ratio of the thickness of the semiconductor wafer 10 after back grinding and the thickness of the base film 2 of the processing film 1 is in the range of 1: 0.5 to 2.5. Thinning to about 550 μm (thinning step). As a result, as shown in FIG. 5B, a laminated body 13 is formed which includes the thinned semiconductor wafer 10 and the processing film 1 attached to the circuit surface 10a.

  After the laminated body 13 is formed, the laminated body 13 is set on the dicing frame 14 with the processing film 1 attached to the circuit surface 10a side of the semiconductor wafer 10, as shown in FIG. The dicing tape 16 is affixed across the opposite surface 10b of 10 and the bottom surface 14a of the dicing frame 14. The dicing frame 14 is an annular metal member. The inner diameter of the dicing frame 14 is larger than the outer diameter of the semiconductor wafer 10, and the semiconductor wafer 10 being diced is held by surrounding the outer periphery of the set semiconductor wafer 10. For fixing the dicing tape 16, a known dicing tape attaching device can be used. The dicing tape 16 has a base film 17 and an adhesive layer 18 formed on the surface of the base film 17. A known dicing tape can be used as the dicing tape 16.

  After fixing the dicing tape 16, as shown in FIG. 7, a dicing blade B is inserted from the processing film 1 side (so-called face-up dicing), and the semiconductor wafer 10 is diced together with the processing film 1 along a predetermined dicing line. To do. Thereby, a plurality of individual semiconductor chips 20 are obtained (chip forming step). In this step, by setting the visible light transmittance of the processing film 1 to 20% or more as described above, the positioning pattern formed on the circuit surface 10a of the semiconductor wafer 10 can be easily seen, and a dicing position is prepared. Can be determined. For dicing, a laser may be used instead of the blade.

  Then, as shown in FIG. 8, the adhesive tape 19 for peeling the base film 2 is affixed on the surface of the film 1 for a process. Then, by pulling the base film 2 with the pressure-sensitive adhesive tape 19, the boundary between the pressure-sensitive adhesive layer 3 and the adhesive layer 4 is divided, and the adhesive is applied to the circuit surface 10a of each semiconductor chip 20 as shown in FIG. Only layer 4 remains. At this time, when the pressure-sensitive adhesive layer 3 of the processing film 1 has radiation curability, the adhesive force of the pressure-sensitive adhesive layer 3 is reduced in advance by irradiating radiation such as ultraviolet rays after the pressure-sensitive adhesive tape 19 is attached. It is preferable to keep it. In addition, the peeling of the base film 2 can use a well-known peeling apparatus.

  Thereafter, the adhesive force of the adhesive layer 17 of the dicing tape 16 is reduced by irradiation with ultraviolet rays or the like, and the semiconductor chips 20 having the adhesive layer 4 are individually picked up as shown in FIG. 10 (pickup process). Then, as shown in FIG. 11, a circuit board 21 provided with wirings 22 corresponding to the protruding electrodes 11 of the semiconductor chip 20 is prepared, and a semiconductor is mounted on the circuit board 21 so that the wirings 22 and the protruding electrodes 11 face each other. The chip 20 is aligned. The alignment pattern described above can also be used for alignment between the semiconductor chip 20 and the circuit board 21.

  After the semiconductor chip 20 and the circuit board 21 are aligned, the semiconductor chip 20 and the circuit board 21 are heated and pressurized by using a known flip-chip connecting device. As shown in FIG. The electrode 11 and the wiring 22 are connected. Thereby, the semiconductor device 23 is completed.

  In the semiconductor wafer 10 used in the manufacturing process described above, the protruding electrode 11 is formed by a gold stud bump formed using a gold wire, a metal ball fixed by a thermocompression bonding or ultrasonic thermocompression bonding machine, or plating or vapor deposition. It may be formed. Further, the protruding electrode 11 does not need to be composed of a single metal, and may include a plurality of metal components such as gold, silver, copper, nickel, indium, palladium, tin, and bismuth. A metal layer may be laminated.

  The circuit board 21 on which the wiring 22 is formed may be a normal circuit board or a semiconductor chip. When a normal circuit board is used, the wiring 22 is formed by impregnating a glass cloth or nonwoven fabric with an epoxy resin or a resin having a benzotriazine skeleton, a board having a build-up layer, an insulating board such as polyimide, glass, or ceramics. Unnecessary portions of a metal layer such as copper formed on the surface can be removed by etching, can be formed on the surface of the insulating substrate by plating, or can be formed by vapor deposition.

  The wiring 22 does not need to be formed of a single metal, and may include a plurality of metal components such as gold, silver, copper, nickel, indium, palladium, tin, and bismuth. It may have a laminated shape. When the circuit board 21 is a semiconductor chip, the wiring 22 is usually formed of aluminum, but a metal layer such as gold, silver, copper, nickel, indium, palladium, tin, or bismuth is formed on the surface thereof. Also good.

  The recognition device used for positioning the semiconductor chip 20 and the circuit board 21 includes, for example, a halogen light source having a halogen lamp, a light guide, an irradiation device, and a CCD camera. By determining the consistency between the image captured by the CCD camera and the image pattern for registration registered in advance by the image processing apparatus, the alignment operation can be performed with high accuracy.

  Further, when the semiconductor chip 20 and the circuit board 21 are connected, if the curing reaction rate of the adhesive layer 4 is insufficient, the connection after heating may not be maintained. Therefore, the curing reaction rate of the adhesive layer 4 is preferably 80% or more. As a connection condition, when heating at 200 ° C. for 10 seconds, the curing reaction rate is preferably 80% or more, and more preferably 90% or more.

  In the above-described chip forming step, as shown in FIG. 13, the substrate film 2 and the pressure-sensitive adhesive layer 3 are peeled in advance from the circuit surface 10 a of the semiconductor wafer 10 to which the dicing tape 16 is attached, and then dicing is performed. You may make it perform.

  As described above, in this method of manufacturing a semiconductor chip, in the film sticking step, the width of the substrate wafer 2 is larger than the diameter of the semiconductor wafer 10 and the thickness of the base film 2 is 50 μm to 120 μm, preferably 60 μm to 110 μm. A certain processing film 1 is attached to the circuit surface 10 a of the semiconductor wafer 10. By using the processing film 1 having such a thickness, when the excess portion 12 of the processing film 1 protruding from the circuit surface 10a of the semiconductor wafer 10 is removed before the thinning step, the processing film 1 is removed. It is possible to prevent the strength of the film from becoming excessive and maintain good working efficiency, and it is possible to suppress burrs from being left at the cut portion of the processing film 1 or generation of cutting waste. In addition, since the semiconductor wafer 10 can be back-ground while suppressing warpage, the semiconductor wafer 10 can be flattened without being damaged in the subsequent chip forming process, and the dicing tape 16 can be attached, so that the manufacturing yield is sufficient. Can be secured.

  In this embodiment, in the thinning process, the opposite surface 10b of the semiconductor wafer 10 is backed so that the ratio of the thickness of the semiconductor wafer 10 to the thickness of the base film 2 is 1: 0.5 to 2.5. Grinding. Thereby, the effect which suppresses generation | occurrence | production of the burr | flash in the cut part of the film 1 for processing, and the effect which can ensure the handleability of the thinned semiconductor wafer 10 can be made to make compatible both suitably.

  In the present embodiment, the processing film 1 has the pressure-sensitive adhesive layer 3 between the base film 2 and the adhesive layer 4, and the adhesive layer 4 is left in the pickup process subsequent to the chip forming process. After removing the base film 2 and the adhesive layer 3 from the circuit surface 10a of the semiconductor chip 20, the semiconductor chip 20 is picked up. By using such a processing film 1, the same processing film 1 can be used from the thinning process to the pick-up process, so that the manufacturing process can be simplified.

  Hereinafter, examples and comparative examples will be described.

[Example 1]
A liquid containing 25 parts by weight of a phenoxy resin (InChem, trade name PKHC), 25 parts by weight of an epoxy resin (trade name 1032H60, manufactured by Japan Epoxy Resin Co., Ltd.) as a three-dimensional crosslinkable resin, and a microcapsule type latent curing agent Dissolved in a mixed solvent of toluene and ethyl acetate using 50 parts by weight of an epoxy resin (manufactured by Asahi Kasei Corporation, trade name HX-3941HP) and 1 part by weight of a silane coupling agent (trade name SH6040, manufactured by Toray Dow Corning) And the varnish of the resin composition for contact bonding layers was obtained.

On the other hand, cordierite particles having an average particle diameter of 1 μm (2MgO · 2Al ₂ O ₃ · 5SiO ₂ , specific gravity of 2.4, subjected to a 5 μm classification process for removing a large particle size after weighing the varnish. Linear expansion coefficient 1.5 × 10 ⁻⁶ / ° C., refractive index 1.57) 100 parts by weight are mixed, stirred and dispersed, and then rolled on a separator film (PET film) whose surface has been subjected to release treatment After coating using a coater, it was dried in an oven at 70 ° C. for 10 minutes to obtain an adhesive layer having a thickness of 30 μm on the separator.

  Subsequently, the film of the obtained adhesive layer was laminated to prepare a sample having a thickness of 500 μm. This is sandwiched between 8 mm diameter parallel plates by using a viscoelasticity measuring device ARES manufactured by Rheometrics Scientific F.E. Co., Ltd. at a frequency of 10 Hz in the process of raising the temperature from 25 ° C. to 250 ° C. at 10 ° C./min. The viscosity behavior of was measured. As a result, the viscosity at 30 ° C. was 120,000 Pa · s.

  Subsequently, the adhesive layer and a 50 μm-thick base film (polypropylene film) coated with a 5 μm-thick pressure-sensitive adhesive layer on one side are bonded together through a laminator, and the release-treated PET film on the adhesive layer side Was peeled off to obtain a processing film in which a pressure-sensitive adhesive layer and an adhesive layer were formed in this order on a base film.

  The obtained processing film was applied to the circuit surface of a semiconductor wafer (6 inch diameter, 625 μm thick) placed on the support stage of the processing film sticking apparatus (temperature 80 ° C., linear pressure 0.5). The layers were laminated by pressurizing at a rate of ˜2 kgf / cm and a feed rate of 0.5 to 5 m / min. Subsequently, the surplus portion of the processing film was cut with a cutter knife, and a semiconductor wafer with the processing film without cuts and burrs was obtained. Subsequently, this was placed in a grinding apparatus, and the opposite surface of the semiconductor wafer was ground (back grind) until the thickness became 50 μm. As a result, a semiconductor wafer having a gentle warp with a convex circuit surface side was obtained, but could be placed on the dicing tape without being damaged in a state where it was returned to a flat shape.

[Example 2]
A processing film was obtained in the same manner as in Example 1 except that a 120 μm thick base film and a 10 μm thick adhesive layer were used. When this processing film was affixed to a semiconductor wafer and the surplus portion was cut with a cutter knife, cuts and burrs were not observed. Subsequently, the semiconductor wafer was placed in a grinding apparatus, and the opposite surface of the semiconductor wafer was back-ground until the thickness became 50 μm. Also in this case, a semiconductor wafer having a gentle warp with a convex circuit surface side was obtained, but it could be placed on the dicing tape without being damaged in a state where it was returned to a flat shape.

[Comparative Example 1]
A processing film was obtained in the same manner as in Example 1 except that a base film having a thickness of 40 μm was used. When this processing film was affixed to a semiconductor wafer and the surplus portion was cut with a cutter knife, cuts and burrs were not observed. Subsequently, the semiconductor wafer was placed in a grinding apparatus, and the opposite surface of the semiconductor wafer was back-ground until the thickness became 50 μm. A semiconductor wafer having a warp on the side to which the processing film was attached was obtained. Also in this case, a semiconductor wafer having a gentle warp with a convex circuit surface side was obtained, but when it was attempted to return it to a flat shape, the semiconductor wafer was broken and placed on the dicing tape. I couldn't.

[Comparative Example 2]
A processing film was obtained in the same manner as in Example 1 except that a base film having a thickness of 150 μm was used. When this processing film was affixed to a semiconductor wafer and the excess portion was cut with a cutter knife, the generation of burrs and cutting debris on the outer periphery of the wafer was confirmed. Subsequently, the semiconductor wafer was placed in a grinding apparatus, and the opposite surface of the semiconductor wafer was back-ground until the thickness became 50 μm. A semiconductor wafer having a warp on the side of the surface to which the processing film was attached was obtained, but the warpage of the semiconductor wafer was very large as compared with Examples 1 and 2 and Comparative Example 1.

  From the above results, when the processing film according to the present invention is used, there is no adhesion of burrs or cutting debris at the time of cutting the surplus portion after being attached to the semiconductor wafer, and further, the semiconductor wafer having warpage is damaged. It was confirmed that it could be fixed on the dicing tape without doing so.

  DESCRIPTION OF SYMBOLS 1 ... Processing film, 2 ... Base film, 3 ... Adhesive layer, 4 ... Adhesive layer, 10 ... Semiconductor wafer, 10a ... Circuit surface, 10b ... Opposite surface, 12 ... Excess part, 16 ... Dicing tape, 20 ... Semiconductor chip.

Claims (5)

Preparing a long processing film formed by forming an adhesive layer on a base film, and attaching the adhesive layer of the processing film on a circuit surface of a semiconductor wafer;
A thinning step of thinning the semiconductor wafer by back grinding the opposite surface of the semiconductor wafer;
After pasting a dicing tape on the opposite surface of the thinned semiconductor wafer, the semiconductor wafer is diced from the processing film side, and a chip forming step is obtained to obtain individual semiconductor chips,
In the film sticking step, a processing film having a width larger than the diameter of the semiconductor wafer and a thickness of the base film of 50 μm to 120 μm is stuck to the circuit surface of the semiconductor wafer,
A method for manufacturing a semiconductor chip, wherein an excess portion of the processing film protruding from the circuit surface of the semiconductor wafer is removed before the thinning step.   The method of manufacturing a semiconductor chip according to claim 1, wherein the base film has a thickness of 60 μm to 110 μm.   In the thinning step, the opposite surface of the semiconductor wafer is back-ground so that the ratio of the thickness of the semiconductor wafer to the thickness of the base film is 1: 0.5 to 2.5. A method of manufacturing a semiconductor chip according to claim 1 or 2. The processing film has an adhesive layer between the base film and the adhesive layer,
After the chip forming step, the method further comprises a pickup step of picking up the semiconductor chip after removing the base film and the adhesive layer from the circuit surface of the semiconductor chip leaving the adhesive layer. The manufacturing method of the semiconductor chip as described in any one of Claims 1-3. A pressure-sensitive adhesive layer and an adhesive layer are laminated in this order on a base film, and is a long processing film attached to the circuit surface of a semiconductor wafer,
A processing film having a width larger than a diameter of the semiconductor wafer and a thickness of the base film of 50 μm to 120 μm.

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