JP2011066333A - Epitaxial substrate for electronic device and method of manufacturing the same, and epitaxial substrate for group iii nitride electronic device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an epitaxial substrate for an electronic device that can improve crystallinity of a group III nitride semiconductor grown above an aluminum diffusion region by providing the aluminum diffusion region in a predetermined region of a silicon substrate and setting surface roughness within a proper range and a method of manufacturing the same, and an epitaxial substrate for a group III nitride electronic device. <P>SOLUTION: The epitaxial substrate for the electronic device includes: a silicon substrate 2; a buffer structure including an aluminum nitride single-crystal nucleus generation layer formed on the silicon substrate and one or more sets of superlattice layers 4 formed on the aluminum nitride single-crystal layer 3, wherein a surface layer part of the silicon substrate is provided with the aluminum diffusion region 5 which spreads from a surface coming into contact with the aluminum nitride single-crystal layer in a substrate thickness direction, surface roughness Ra of the surface of the silicon substrate which comes into contact with the aluminum nitride single-crystal layer being 0.2 to 1 nm. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to an epitaxial substrate for electronic devices and a method for manufacturing the same, and more particularly to an epitaxial substrate for group III nitride electronic devices.

  In recent years, group III nitride semiconductors composed of a compound of N, Al, Ga, In, and the like have been widely used for light emitting elements, electronic device elements, and the like. Since the characteristics of such a device are greatly influenced by the crystallinity of a group III nitride semiconductor, a technique for growing a group III nitride semiconductor having high crystallinity is required.

  A group III nitride semiconductor has been conventionally formed by epitaxial growth on a sapphire substrate. However, since the lattice constants of Group III nitride semiconductors and sapphire substrates are greatly different, dislocations are caused by the difference in lattice constants, and the crystal quality of Group III nitride semiconductors grown on sapphire substrates is degraded. There was a problem that. Further, since the sapphire substrate has a low thermal conductivity, heat dissipation is poor, and there is a problem that it is not suitable for making a high-power device.

  Therefore, in recent years, a technique using a silicon substrate as a crystal growth substrate of a group III nitride semiconductor has been proposed. A silicon substrate has a heat dissipation property better than that of the sapphire substrate and is suitable for the production of a high-power device, and since it is inexpensive, it has an advantage that the manufacturing cost can be suppressed. However, like the sapphire substrate, the silicon substrate has a different lattice constant from the group III nitride semiconductor. Even if the group III nitride semiconductor is grown directly on the silicon substrate, the group III nitride semiconductor having high crystallinity is obtained. Could not expect to get.

  Therefore, in Patent Document 1, a single crystal layer of metal aluminum is deposited on a silicon single crystal substrate, heated at a temperature at which this metal aluminum single crystal layer does not melt, and then the surface is nitrided, A technique for improving the crystallinity of a group III nitride semiconductor by growing a group III nitride semiconductor is disclosed.

  Patent Document 2 discloses excellent crystallinity by sequentially depositing an aluminum layer and an aluminum nitride polycrystal nucleation layer on a silicon substrate, and growing a gallium nitride layer thereon via a buffer structure. A technique for growing gallium nitride is disclosed.

  However, both of the technologies disclosed in Patent Documents 1 and 2 are formed by forming an aluminum layer as a single layer on a silicon substrate, and a group III nitride such as an aluminum nitride polycrystal laminated directly on the aluminum layer. The temperature during the epitaxial growth of the semiconductor was 900 ° C. at the maximum.

JP-A-10-107317 JP 2005-527988 gazette

  When forming a buffer layer of aluminum nitride on a silicon substrate, the present inventors obtain a group III nitride semiconductor having higher crystallinity by forming a single crystal by high-temperature growth instead of polycrystal by low-temperature growth. Got technology. However, when the technique of forming an aluminum single layer on a silicon substrate is applied, if a single crystal aluminum nitride is directly formed on the aluminum layer at, for example, 1000 ° C., a large number of defects are generated as a result. It was found that the sex deteriorated remarkably. As a result of intensive studies by the present inventors, it has been found that this is caused by the reaction between the initially formed aluminum layer and silicon at a high temperature during crystal growth of aluminum nitride.

  Accordingly, an object of the present invention is to provide an epitaxial substrate for an electronic device, a method for manufacturing the same, and an epitaxial substrate for a group III nitride electronic device that can grow the group III nitride semiconductor having high crystallinity, which solves the above problems. There is to do.

In order to achieve the above object, the gist of the present invention is as follows.
(1) An electron comprising a silicon substrate, an aluminum nitride single crystal layer formed on the silicon substrate, and a buffer structure including at least one superlattice layer formed on the aluminum nitride single crystal layer In the device epitaxial substrate, an aluminum diffusion region extending in a substrate thickness direction from a surface in contact with the aluminum nitride single crystal layer is provided in a surface layer portion of the silicon substrate, and the aluminum nitride single crystal of the silicon substrate is provided. An epitaxial substrate for electronic devices, wherein the surface roughness Ra of the surface in contact with the layer is in the range of 0.2 to 1 nm.

  (2) The aluminum diffusion region has a diffusion length in the range of 0.3 to 1.0 μm in the depth direction of the silicon substrate with reference to the surface of the silicon substrate in contact with the aluminum nitride single crystal layer (1) The epitaxial substrate for electronic devices as described in.

(3) The epitaxial substrate for electronic devices according to (1) or (2), wherein the Al concentration in the aluminum diffusion region is in the range of 1 × 10 ¹⁵ to 1 × 10 ²⁰ atoms / cm ³ .

  (4) The said buffer structure is an epitaxial substrate for electronic devices as described in said (1), (2) or (3) which has insulation.

(5) The buffer structure is composed of B _a1 Al _b1 Ga _c1 In _d1 N (0 ≦ a ₁ ≦ 1, 0 ≦ b ₁ ≦ 1, 0 ≦ c ₁ ≦ 1, 0 ≦ d ₁ ≦ 1, a ₁ + b ₁ + c ₁ + d ₁ = 1) The first superlattice layer made of a material, and B _a2 Al _b2 Ga _c2 In _d2 N (0 ≦ a ₂ ≦ 1,0) having a band gap different from that of the first superlattice layer ≦ b ₂ ≦ 1, 0 ≦ c ₂ ≦ 1, 0 ≦ d ₂ ≦ 1, a ₂ + b ₂ + c ₂ + d ₂ = 1) Super superposed by alternately stacking second superlattice layers made of materials The epitaxial substrate for electronic devices as described in any one of said (1)-(4) which has a lattice laminated body.

  (6) An epitaxial substrate for a group III nitride electronic device comprising a gallium nitride layer on the buffer structure according to any one of (1) to (5) above.

(7) A step of forming an aluminum diffusion region in a surface layer portion of a silicon substrate, a step of epitaxially forming an aluminum nitride single crystal layer on the silicon substrate, and a step of forming a buffer structure on the aluminum nitride single crystal layer The step of forming the aluminum diffusion region includes exposing the silicon substrate to a substrate temperature of 950 ° C. or higher in an Al (CH ₃ ) ₃ gas atmosphere. The manufacturing method of the epitaxial substrate for electronic devices including this.

  (8) The epitaxial substrate for electronic devices according to (7), wherein the aluminum nitride single crystal layer is grown at the same substrate temperature of 950 ° C. or more as in the exposure treatment.

  According to the present invention, by providing an aluminum diffusion region in a silicon substrate and setting the surface roughness within an appropriate range, the crystallinity of a group III nitride semiconductor grown thereon can be improved. A substrate, a manufacturing method thereof, and an epitaxial substrate for a group III nitride electronic device can be provided.

FIG. 1 is a schematic cross-sectional view of an epitaxial substrate for an electronic device according to the present invention. FIG. 2 is a graph showing the results obtained by the secondary ion mass spectrometer (SIMS) of Example 1. FIG. 3 is a graph showing the results obtained by the secondary ion mass spectrometer (SIMS) of Comparative Example 1. FIGS. 4A to 4C are photographs showing the results of observing the sample with an atomic force microscope (AFM). FIGS. 5A and 5B are graphs plotting the results of measuring the half width of the X-ray rocking curve of the sample.

  Next, an embodiment of the epitaxial substrate for electronic devices of the present invention will be described with reference to the drawings. FIG. 1 schematically shows a cross-sectional structure of an epitaxial substrate for an electronic device according to the present invention. FIG. 1 shows the thickness direction exaggerated for convenience of explanation.

  As shown in FIG. 1 as an example, an epitaxial substrate 1 for an electronic device according to the present invention includes a silicon substrate 2, an aluminum nitride single crystal layer 3 formed on the silicon substrate 2, and the aluminum nitride single crystal layer 3. And a buffer structure 4 including at least one set of superlattice layers formed on the surface of the silicon substrate 2, an aluminum diffusion extending from the surface 2 a in contact with the aluminum nitride single crystal layer 3 in the thickness direction of the substrate. The region 5 is provided, and the surface roughness Ra of the surface 2a of the silicon substrate 2 in contact with the aluminum nitride single crystal layer 3 is in the range of 0.2 to 1 nm. The present invention has such a configuration, and in particular, as a result of setting the surface roughness of the silicon substrate 2 within an appropriate range, by inducing lateral growth when growing the aluminum nitride single crystal layer 3 thereon, dislocations are obtained. As a result, the crystallinity of the group III nitride semiconductor 6 thereon can be improved. In addition, in the epitaxial substrate 1 for electronic devices of the present invention, all the aluminum diffuses into the silicon substrate 1 by exposing the silicon substrate 1 at a high temperature and does not remain as a single layer. Even if the subsequent epitaxial growth is performed at a high temperature, there is an advantage that the state of the interface where the aluminum and the silicon substrate are in contact changes in the middle, and the crystallinity is not deteriorated.

  Here, the surface roughness Ra means the arithmetic average roughness, and when the surface roughness Ra of the surface 2a of the silicon substrate 2 in contact with the aluminum nitride single crystal layer 3 is less than 0.2 nm, the effect of reducing the dislocations is obtained. However, when the surface roughness Ra exceeds 1 nm, the quality of the group III nitride layer deteriorates due to the generation of pits, so the surface roughness Ra is 0.2. The range is ˜1 nm.

The aluminum diffusion region 5 preferably has a diffusion length in the depth direction to the silicon substrate 2 of 0.3 to 1.0 μm with reference to the surface 2 a of the silicon substrate 2 in contact with the aluminum nitride single crystal layer 3. If the diffusion length is less than 0.3 μm, the effect of reducing dislocations may not be sufficiently exhibited, or rather the dislocations may increase. If the diffusion length exceeds 1.0 μm, pits resulting from the aluminum diffusion region 5 are generated. This is because there is a risk of losing. The above diffusion length means that the Al concentration in the Si substrate measured by SIMS (secondary ion mass spectrometer) after forming the aluminum nitride single crystal layer on the silicon substrate is 1 × 10 ¹⁵ atoms / cm ³ or more. This is the depth from the interface between the Si substrate and the aluminum nitride single crystal layer.

The Al concentration in the aluminum diffusion region 5 is preferably 1 × 10 ²⁰ atoms / cm ³ or less. This is because if the concentration exceeds 1 × 10 ²⁰ atoms / cm ³ , pits may be generated from the diffusion region, or dislocations due to the diffusion region may be generated.

The buffer structure 4 can have insulating properties depending on the application. For example, when used in a device such as a high electron mobility transistor (HEMT) in which the horizontal direction is the main current conduction direction, the buffer structure 4 has an insulating property so that current does not flow in the vertical direction. Is preferred. At this time, the resistance value of the buffer structure 4 is preferably 10 ⁵ Ω · cm or more.

This buffer structure 4 has B _a1 Al _b1 Ga _c1 In _d1 N (0 ≦ a ₁ ≦ 1, 0 ≦ b ₁ ≦ 1, 0 ≦ c ₁ ≦ 1, 0 ≦ d ₁ ≦ 1, a ₁ + b ₁ + c ₁ + d ₁ = 1) The first superlattice layer 4a and the first superlattice layer 4a made of a material have different band gaps from B _a2 Al _b2 Ga _c2 In _d2 N (0 ≦ a ₂ ≦ 1, 0 ≦ b ₂ ≦ 1, 0 ≦ c ₂ ≦ 1, 0 ≦ d ₂ ≦ 1, a ₂ + b ₂ + c ₂ + d ₂ = 1) Super superposed by alternately laminating second superlattice layers 4b made of materials It is preferable to have a lattice laminate. By increasing the thickness of the insulating buffer structure, the breakdown voltage can be improved. By using the superlattice laminate, the stress in the group III nitride film can be effectively relieved and the thickness is increased. This is because the occurrence of cracks at the time can be suppressed. This exhibits a sufficient effect when the thickness of the buffer structure 4 is 2 μm or more.

The C concentration in the buffer structure 4 and the nitride semiconductor 6 on the buffer 4 side is preferably 1 × 10 ¹⁸ / cm ³ or more. By the C concentration of the buffer structure 4 and 1 × 10 ¹⁸ / cm ³ or more, longitudinally breakdown voltage can be improved, a nitride semiconductor 6 buffer 4 side portion of the C concentration 1 × 10 ¹⁸ / This is because the lateral breakdown voltage can be improved and the lateral leakage current can be suppressed by setting it to cm ³ or more. In order to prevent generation of pits due to excessive increase of impurities, the C concentration is preferably less than 1 × 10 ²⁰ / cm ³ . The amount of other impurities is not particularly specified, but it is preferable to suppress mixing of donor impurities (Si, Ge) having a shallow impurity level. The impurity concentration was identified by measuring the impurity concentration distribution in the depth direction while etching from the surface side using SIMS analysis.

  Next, an embodiment of a method for manufacturing the epitaxial substrate 1 for electronic devices according to the present invention will be described with reference to the drawings.

As shown in FIG. 1 as an example, a method for manufacturing an epitaxial substrate for an electronic device according to the present invention includes a step of forming an aluminum diffusion region 5 in a surface layer portion of a silicon substrate 2, and an aluminum nitride single crystal layer on the silicon substrate 2. 3 and the step of forming the buffer structure 4 on the aluminum nitride single crystal layer 3, and the step of forming the aluminum diffusion region 5, the silicon substrate 2 is heated at a substrate temperature of 950 ° C. or higher. Preferably, it includes exposure treatment (TMA preflow) at 1000 ° C. or higher in an Al (CH ₃ ) ₃ gas atmosphere, and by having such a configuration, the surface roughness on the silicon substrate 2 can be in an appropriate range, Since the dislocation can be reduced by inducing lateral growth during the growth of the aluminum nitride single crystal layer 3, the group III nitride grown thereabove It is capable of improving the crystallinity of the conductor 6.

  The plane orientation of the silicon substrate 2 is not particularly specified, and (111), (100), (110) planes, etc. can be used, but the (0001) plane of group III nitride is grown with good surface flatness. For this, it is desirable to use the (111) plane. Moreover, it may be p-type or n-type conductivity type. As for the conductivity of the Si single crystal substrate 2, a high resistivity substrate having a high insulation property of 10,000 Ω · cm or more and a low resistivity substrate having a resistivity of about 0.001 Ω · cm can be appropriately used depending on the application. As a method for manufacturing the Si single crystal substrate 2, various methods such as CZ method and FZ method can be used, and Si can be epitaxially grown on the substrate surface. It is also possible to use a substrate in which a thin film made of an oxide film, a nitride film, or a carbonized film is formed in a range that does not affect the aluminum diffusion of the present invention. The aluminum nitride single crystal layer 3 can also be grown at the same substrate temperature of 950 ° C. or more as in the exposure process.

The exposure treatment time is preferably 40 seconds or longer. This is because if the exposure processing time is less than 40 seconds, the surface 2a of the silicon substrate 2 cannot be sufficiently roughened. On the other hand, if the exposure treatment time exceeds 160 seconds, pits are generated. Therefore, the exposure treatment time is more preferably 160 seconds or less. Further, the flow rate of Al (CH ₃ ) ₃ gas in the above exposure treatment can be appropriately set by the manufacturing apparatus so that the surface roughness is in a predetermined range.

  FIG. 1 shows an example of a typical embodiment, and the present invention is not limited to this embodiment. For example, it is possible to insert an intermediate layer that does not adversely affect the effects of the present invention between layers, insert another superlattice layer, or incline the composition. In addition, a nitride film, a carbonized film, or the like can be formed on the surface of the Si substrate. Furthermore, the thickness of each layer can be appropriately set according to the application.

Example 1
An Al (CH ₃ ) ₃ gas atmosphere (carrier gas) with a specific resistance of 5000 Ω · cm and a supply rate of 4 μmol / min at a substrate temperature of 1025 ° C. and a pressure of 10 kPa at a substrate temperature of 1025 ° C. : Hydrogen and nitrogen) for 90 seconds to form an aluminum diffusion region on the surface layer of the substrate, and then at a substrate temperature of 1025 ° C and a pressure of 10 kPa, Al (CH ₃ ) with a supply of 120 μmol / min _An aluminum nitride single crystal layer (thickness: 0.1 μm) was epitaxially formed by flowing for 7 minutes in an NH ₃ gas atmosphere supplied with ₃ gases and 12 SLM.
On this aluminum nitride single crystal layer, a superlattice laminate (1025 ° C., 10 kPa, first superlattice layer: Al _0.15 GaN _0.85 N, film thickness 22.5 nm, second superlattice layer: AlN, film thickness 3 nm, total 120 An insulating buffer structure is formed on the superlattice laminate, and a pressure-resistant layer (1025 ° C., 10 kPa, GaN material, thickness: 0.2 μm), channel layer (1075 ° C., 100 kPa, A group III nitride semiconductor comprising a GaN material (thickness: 1.3 μm) and an electron supply layer (Al _0.25 Ga _0.75 N material, thickness: 25 nm) was epitaxially grown to form an epitaxial substrate for a group III nitride electronic device. MOCVD method is used as the growth method, TMA (trimethylaluminum: Al (CH ₃ ) ₃ ) · TMG (trimethylgallium: Al (CH ₃ ) ₃ ) is used as the group III material, ammonia is used as the group V material, Hydrogen and nitrogen gas were used as carrier gas.

(Comparative Example 1)
An epitaxial substrate for a group III nitride electronic device was formed by the same method as in Example 1 except that the silicon single crystal substrate was not exposed to the Al (CH ₃ ) ₃ gas atmosphere.

(Comparative Example 2)
An epitaxial substrate for a group III nitride electronic device was formed by the same method as in Example 1 except that the exposure time was 30 seconds.

(Comparative Example 3)
An epitaxial substrate for a group III nitride electronic device was formed by the same method as in Example 1 except that the exposure time was 180 seconds.

(Evaluation)
About the silicon substrate of Example 1 and Comparative Example 1, the Al concentration in the silicon substrate was analyzed using SIMS for the sample at the stage where the group III nitride semiconductor was epitaxially formed. These results are shown in FIGS. 2 and 3, respectively. In addition, the SIMS measurement of the Al concentration was performed by removing the silicon substrate to an appropriate thickness and measuring from the silicon substrate side to the aluminum nitride single crystal layer side. For easy comparison, the depth information on the horizontal axis is corrected so that the interface in contact with the aluminum nitride single crystal layer 3 is a reference (0 μm).

As is clear from the results shown in FIGS. 2 and 3, the silicon substrate of Comparative Example 1 has no aluminum diffusion region (FIG. 3), whereas the silicon substrate of Example 1 according to the present invention has An aluminum diffusion region having an Al concentration of 1 × 10 ¹⁵ atoms / cm ³ or more is formed in a range from the interface (0 μm) in contact with the aluminum nitride single crystal layer 3 of the silicon substrate 2 to a depth position of 0.7 μm. (Figure 2). That is, the diffusion length was 0.7 μm.

Although not shown in the figure, in the silicon substrate of Comparative Example 2, an aluminum diffusion region having an Al concentration of 1 × 10 ¹⁵ atoms / cm ³ or more is formed in a range up to a depth of 0.2 μm (diffusion length). In the silicon substrate of Comparative Example 3, an aluminum diffusion region having an Al concentration of 1 × 10 ¹⁵ atoms / cm ³ or more was formed in a range up to a depth of 1.2 μm (diffusion length 1.2 μm).

  Moreover, the nitrogen concentration was similarly analyzed using SIMS. Although it cannot be analyzed simultaneously with the Al concentration, it is not shown in the figure, but the nitrogen peak on the Si substrate side from the interface between the silicon substrate and the aluminum nitride single crystal layer 3 that is revealed by the behavior of the oxygen and hydrogen concentrations measured simultaneously with nitrogen A rise was observed, and it was confirmed that aluminum nitride exists beyond the interface. Thereby, it can be inferred that there is no Al layer and that nitrogen is mixed into the Si substrate surface by ammonia when forming the aluminum nitride single crystal layer. Furthermore, the aluminum nitride single crystal layer 3 was confirmed to be a single crystal by observing a diffraction pattern derived from different axis growth from a TEM diffraction image.

4 (a) to 4 (c) show an atomic force microscope (AFM) for the samples of Comparative Example 2, Example 1 and Comparative Example 3 at the stage of exposure in an Al (CH ₃ ) ₃ gas atmosphere. The results observed in are shown respectively. It can be seen that the surface roughness increases as the supply time increases. At this time, the surface roughness Ra was 0.17 m, 0.37 nm, and 1.30 nm, respectively. These changes in surface roughness are the result of Si and Al reacting and Al intruding into the silicon substrate, and an Al layer as a single layer was not formed. The surface roughness Ra of the silicon substrate not exposed to the Al (CH ₃ ) ₃ gas atmosphere of Comparative Example 1 is 0.10 nm.

  Further, the half-value widths of the X-ray rocking curves at the (002) plane and the (102) plane from the group III nitride semiconductor surface of the group III nitride electronic device epitaxial substrate of Example 1 and Comparative Examples 1 to 3 were measured. The results are shown in FIGS. 5 (a) and 5 (b). In the figure, it is shown whether each plot corresponds to any of the above-described FIGS. 4 (a) to 4 (c). Comparative Example 1 is a plot with a TMA preflow time of 0 sec in the figure. As can be seen from FIGS. 5 (a) and 5 (b), the Group III nitride semiconductor of Example 1 (shown by (b) in the graph) according to the present invention has a surface roughness Ra as small as 0.17 nm by TMA preflow. It can be seen that the crystallinity is better than that of Comparative Group 2 on the silicon substrate (indicated by (a) in the graph) and Group III nitride semiconductor of Comparative Example 1 that does not perform TMA preflow. In addition, although the Group III nitride semiconductor of Comparative Example 3 (shown by (c) in the graph) on the silicon substrate having a large surface roughness Ra by TMA preflow of 1.30 nm has good crystallinity, pits are observed on the surface. It was done. Furthermore, it can be seen that the Group III nitride semiconductor of Comparative Example 2 has worse crystallinity than Comparative Example 1 in which TMA preflow was not performed. This is presumably because the dislocation increase due to the lateral growth of the upper layer did not work effectively due to insufficient surface unevenness against the increase in dislocation due to surface unevenness.

  In the above examples and comparative examples, a silicon substrate manufactured by the FZ method having a specific resistance of 5000 Ω · cm is used, but a P-doped n manufactured by the CZ method having a specific resistance of 20 Ω · cm. Similar effects were obtained with the p-type silicon substrate and the B-doped p-type silicon substrate.

  According to the present invention, by providing an aluminum diffusion region in a silicon substrate and setting the surface roughness within an appropriate range, the crystallinity of a group III nitride semiconductor grown thereon can be improved. A substrate, a manufacturing method thereof, and an epitaxial substrate for a group III nitride electronic device can be provided.

DESCRIPTION OF SYMBOLS 1 Epitaxial substrate for electronic devices 2 Silicon substrate 3 Aluminum nitride single crystal layer 4 Buffer structure 4a First superlattice layer 4b Second superlattice layer 5 Aluminum diffusion region 6 Group III nitride semiconductor

Claims (8)

A silicon substrate;
An aluminum nitride single crystal layer formed on the silicon substrate;
An epitaxial substrate for an electronic device comprising a buffer structure including at least one set of superlattice layers formed on the aluminum nitride single crystal layer,
The surface layer portion of the silicon substrate is provided with an aluminum diffusion region extending in the substrate thickness direction from the surface in contact with the aluminum nitride single crystal layer,
An epitaxial substrate for an electronic device, wherein a surface roughness Ra of a surface of the silicon substrate in contact with the aluminum nitride single crystal layer is in a range of 0.2 to 1 nm.   2. The aluminum diffusion region according to claim 1, wherein a diffusion length of the aluminum diffusion region is in a range of 0.3 to 1.0 μm in a depth direction of the silicon substrate with reference to a surface of the silicon substrate in contact with the aluminum nitride single crystal layer. Epitaxial substrate for electronic devices. ^3. The epitaxial substrate for an electronic device according to claim 1, wherein an Al concentration in the aluminum diffusion region is in a range of 1 × 10 ¹⁵ to 1 × 10 ²⁰ atoms / cm ³ .   The epitaxial substrate for electronic devices according to claim 1, wherein the buffer structure has insulating properties. The buffer structure includes B _a1 Al _b1 Ga _c1 In _d1 N (0 ≦ a ₁ ≦ 1, 0 ≦ b ₁ ≦ 1, 0 ≦ c ₁ ≦ 1, 0 ≦ d ₁ ≦ 1, a ₁ + b ₁ + c ₁ + d ₁ = 1) The first superlattice layer made of a material and B _a2 Al _b2 Ga _c2 In _d2 N (0 ≦ a ₂ ≦ 1, 0 ≦ b ₂ ) different from the first superlattice layer ≦ 1, 0 ≦ c ₂ ≦ 1, 0 ≦ d ₂ ≦ 1, a ₂ + b ₂ + c ₂ + d ₂ = 1) Superlattice laminate formed by alternately laminating second superlattice layers made of materials The epitaxial substrate for electronic devices as described in any one of Claims 1-4 which has these.   An epitaxial substrate for a group III nitride electronic device, comprising a gallium nitride layer on the buffer structure according to claim 1. Forming an aluminum diffusion region in the surface layer of the silicon substrate;
Epitaxially forming an aluminum nitride single crystal layer on the silicon substrate;
A method of manufacturing an epitaxial substrate for an electronic device comprising a step of forming a buffer structure on the aluminum nitride single crystal layer,
The step of forming the aluminum diffusion region is a method for manufacturing an epitaxial substrate for an electronic device, comprising exposing the silicon substrate to an Al (CH ₃ ) ₃ gas atmosphere at a substrate temperature of 950 ° C. or higher.   The epitaxial substrate for electronic devices according to claim 7, wherein the aluminum nitride single crystal layer is grown at the same substrate temperature of 950 ° C. or more as in the exposure treatment.