JP2011044612A - Light emitting device - Google Patents

Light emitting device Download PDF

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Publication number
JP2011044612A
JP2011044612A JP2009192570A JP2009192570A JP2011044612A JP 2011044612 A JP2011044612 A JP 2011044612A JP 2009192570 A JP2009192570 A JP 2009192570A JP 2009192570 A JP2009192570 A JP 2009192570A JP 2011044612 A JP2011044612 A JP 2011044612A
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Prior art keywords
light emitting
peripheral
group
pattern
central
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Keiji Kiba
啓嗣 騎馬
Ryoji Yokoya
良二 横谷
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Panasonic Electric Works Co Ltd
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Panasonic Electric Works Co Ltd
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Priority to JP2009192570A priority Critical patent/JP2011044612A/en
Priority to CN2010102604421A priority patent/CN101997079B/en
Publication of JP2011044612A publication Critical patent/JP2011044612A/en
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item

Abstract

<P>PROBLEM TO BE SOLVED: To improve efficiency of light emission and reliability by equalizing temperature distribution of a light emitting element group, in a light emitting device including the light emitting element group provided by densely mounting a plurality of light emitting elements. <P>SOLUTION: The light emitting device 1 includes a mounting substrate 2 mounted with a plurality of light emitting elements 4, a wiring pattern 3 on an element-mounting surface 21 of the mounting substrate, thermal vias 7, and a heat dissipation pattern 8 crossing thereto. The light emitting element group 40 includes a center group 41 and a peripheral group 42, and the thermal vias 7 includes center vias 7a and peripheral vias 7b. The heat dissipation pattern 8 includes a center-side heat dissipation pattern 8a and a periphery-side heat dissipation pattern 8b connected to the center vias 7a and the peripheral vias 7b, respectively, and the center vias 7a and the center-side heat dissipation pattern 8a are prevented from getting contact with the peripheral vias 7b and the periphery-side heat dissipation pattern 8b. Thereby heat from the peripheral group 42 is not led to the center group 41, reaching high temperature of the center group 41 is prevented, temperature distribution of the light emitting element group 40 can be uniformized, and the efficiency of light emission and reliability are improved. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

本発明は、複数の発光素子が密集して実装された発光素子群を有する発光装置における発光素子群の放熱構成に関する。   The present invention relates to a heat dissipation structure of a light emitting element group in a light emitting device having a light emitting element group in which a plurality of light emitting elements are densely mounted.

従来から、複数の発光素子が直列接続され実装基板上に実装されることにより、高密度実装された発光装置が知られている(例えば、特許文献1参照)。このような発光装置においては、図10(a)(b)に示すように、複数の発光素子101は互いに接近して配置され、発光素子群の中央部の素子群Pは、周辺部の素子群Qから矢印で示すように熱の影響を受けるため、発光素子群の温度分布は、中央部で高温となる。このとき、図10(c)に示すように、実装基板100の温度分布も発光素子群の温度分布と類似する。このため、発光素子群の中央部の素子群は高温化により劣化し易くなり、発光効率、信頼性及び寿命が低下し、装置そのものの発光効率、信頼性も低下する。   2. Description of the Related Art Conventionally, a light-emitting device that is mounted at a high density by connecting a plurality of light-emitting elements in series and mounted on a mounting substrate is known (see, for example, Patent Document 1). In such a light-emitting device, as shown in FIGS. 10A and 10B, a plurality of light-emitting elements 101 are arranged close to each other, and an element group P in the central part of the light-emitting element group includes peripheral elements. Since it is affected by heat from the group Q as indicated by an arrow, the temperature distribution of the light emitting element group becomes high at the center. At this time, as shown in FIG. 10C, the temperature distribution of the mounting substrate 100 is similar to the temperature distribution of the light emitting element group. For this reason, the element group at the center of the light emitting element group is likely to be deteriorated due to a high temperature, the light emission efficiency, reliability, and lifetime are lowered, and the light emission efficiency and reliability of the device itself are also lowered.

ところで、発光素子からの熱の放熱を良くする実装基板として、図11に示すように、実装基板内に放熱用の伝熱部材を設けることが知られている(例えば、特許文献2参照)。この実装基板100は、複数の絶縁層103を積層してなる基板本体102の表面を開口して形成されたキャビティ110に1つの発光素子101を実装し、絶縁層103に平行な複数の伝熱導体層104と、この伝熱導体層104に接触する伝熱ビア導体105とを設け、この伝熱ビア導体105を介して、発光素子101からの熱を基板本体102の内部に放熱して、放熱性を良くしている。   Incidentally, as a mounting substrate that improves heat dissipation from the light emitting element, it is known to provide a heat transfer member for heat dissipation in the mounting substrate as shown in FIG. 11 (see, for example, Patent Document 2). In this mounting substrate 100, one light emitting element 101 is mounted in a cavity 110 formed by opening a surface of a substrate body 102 formed by laminating a plurality of insulating layers 103, and a plurality of heat transfer parallel to the insulating layer 103. A conductor layer 104 and a heat transfer via conductor 105 in contact with the heat transfer conductor layer 104 are provided, and heat from the light emitting element 101 is dissipated through the heat transfer via conductor 105 to the inside of the substrate body 102. Improved heat dissipation.

しかしながら、この実装基板100はキャビティ110内に発光素子101を1つ実装するものであり、個々の発光素子101の放熱は良くなるが、このような実装基板100を用いて複数の発光素子101を接近して配置した場合、発光素子群全体として見ると、前述と同様に、発光素子群の温度分布は均一にならず、中央部の発光素子が周辺部からの熱の影響で温度が高くなり、発光効率、信頼性、及び寿命が低下し易い。   However, the mounting substrate 100 mounts one light emitting element 101 in the cavity 110, and the heat dissipation of each light emitting element 101 is improved. However, using the mounting substrate 100, a plurality of light emitting elements 101 are mounted. When placed close to each other, when viewed as a whole of the light emitting element group, the temperature distribution of the light emitting element group is not uniform as described above, and the temperature of the light emitting element in the central part becomes high due to the heat from the peripheral part. Emission efficiency, reliability, and lifetime are likely to be reduced.

特開2007−311398号公報JP 2007-31398 A 特開2008−294253号公報JP 2008-294253 A

本発明は、上記の問題を解決するものであり、複数の発光素子を密集して実装した発光素子群を有する発光装置において、発光素子群の温度分布を均一化し、発光効率及び信頼性を高めることができる発光装置を提供することを目的とする。   The present invention solves the above problem, and in a light-emitting device having a light-emitting element group in which a plurality of light-emitting elements are densely mounted, the temperature distribution of the light-emitting element group is made uniform, and luminous efficiency and reliability are improved. An object of the present invention is to provide a light-emitting device that can be used.

上記目的を達成するために請求項1の発明は、実装基板と、この実装基板の表面又は内部に設けられる配線パターンと、この配線パターンに実装される複数の発光素子から成る発光素子群と、を備えた発光装置において、前記発光素子からの熱を放熱するための、少なくとも一部が前記実装基板の内部に素子実装面に対して垂直方向に設けられるサーマルビアと、前記実装基板の内部に素子実装面に対して平行方向に設けられ、前記サーマルビアと交差する放熱パターンと、を備え、前記発光素子群は、該発光素子群の中央部に位置する中央群と、この中央群の周辺に配置される周辺群とを有し、前記サーマルビアは、前記中央群に対応する中央側サーマルビアと、前記周辺群に対応する周辺側サーマルビアとを有し、前記放熱パターンは、前記中央側サーマルビアに接続される中央側放熱パターンと、前記周辺側サーマルビアに接続される周辺側放熱パターンとを有し、前記中央側サーマルビア及び中央側放熱パターンと、前記周辺側サーマルビア及び周辺側放熱パターンと、が互いに接触しないように構成されているものである。   In order to achieve the above object, the invention of claim 1 includes a mounting substrate, a wiring pattern provided on or inside the mounting substrate, and a light emitting element group composed of a plurality of light emitting elements mounted on the wiring pattern, A thermal via provided at least partially in the mounting substrate in a direction perpendicular to the device mounting surface for dissipating heat from the light emitting element, and in the mounting substrate. A heat dissipating pattern provided in a direction parallel to the element mounting surface and intersecting with the thermal via, and the light emitting element group includes a central group located in a central portion of the light emitting element group, and a periphery of the central group The thermal via has a central thermal via corresponding to the central group and a peripheral thermal via corresponding to the peripheral group, and the heat dissipation pattern is A central-side heat dissipation pattern connected to the central-side thermal via, and a peripheral-side heat dissipation pattern connected to the peripheral-side thermal via, the central-side thermal via and the central-side heat dissipation pattern, and the peripheral-side thermal via And the peripheral side heat radiation pattern are configured not to contact each other.

請求項2の発明は、請求項1に記載の発光装置において、前記実装基板内において、前記中央側放熱パターン及び中央側サーマルビアは、前記周辺側放熱パターン及び周辺側サーマルビアと隙間を有し、前記中央側放熱パターンは前記隙間を保持しつつ、前記実装基板の素子実装面に対して垂直方向に離れるほど、周辺側に延伸されてそのパターン面積が広くなるように設けられているものである。   According to a second aspect of the present invention, in the light emitting device according to the first aspect, in the mounting substrate, the central side heat radiation pattern and the central side thermal via have a gap with the peripheral side heat radiation pattern and the peripheral side thermal via. The center-side heat dissipation pattern is provided so as to extend toward the peripheral side and increase in pattern area as the distance from the element mounting surface of the mounting substrate increases in the vertical direction while maintaining the gap. is there.

請求項3の発明は、請求項1または請求項2に記載の発光装置おいて、前記配線パターンと接触しない位置にあるビアは、前記実装基板表面に向けて伸長され、前記実装基板の表面側に露出するものである。   According to a third aspect of the present invention, in the light emitting device according to the first or second aspect, the via located at a position not in contact with the wiring pattern is extended toward the surface of the mounting substrate, and the surface side of the mounting substrate It is exposed to.

請求項4の発明は、請求項1乃至請求項3のいずれか一項に記載の発光装置において、前記サーマルビアのうち、少なくとも2本を、それぞれ前記実装基板を貫通して前記発光素子に通電するための通電ビアとし、これら通電ビアは、前記発光素子の正、負電極がそれぞれ接続される前記配線パターンの正電極部及び負電極部にそれぞれ接続されるものである。   According to a fourth aspect of the present invention, in the light emitting device according to any one of the first to third aspects, at least two of the thermal vias are respectively energized to the light emitting element through the mounting substrate. The conduction vias are connected to the positive electrode portion and the negative electrode portion of the wiring pattern to which the positive and negative electrodes of the light emitting element are connected, respectively.

請求項5の発明は、前記発光素子群が密集して実装された実装基板が複数個互いに密集して配線基板に実装された構成において、全体の発光素子群における中央群と周辺群について請求項1乃至請求項4のいずれか一項を満たすサーマルビアと放熱パターンを有するものである。   According to a fifth aspect of the present invention, in a configuration in which a plurality of mounting boards on which the light emitting element groups are densely mounted are densely mounted on a wiring board, the central group and the peripheral group in the entire light emitting element group are claimed. The thermal via and the heat radiation pattern satisfying any one of claims 1 to 4 are provided.

請求項1の発明によれば、周辺側サーマルビア及び周辺側放熱パターンと、中央側サーマルビア及び中央側放熱パターンとは、互いの伝熱が抑制され、熱的に分断され易くなるので、発光素子群のうち、周辺群からの熱が中央群に導かれ難くなり、中央群の高温化が抑えられ、各素子群間の温度差を低減することができ、装置全体での放熱が促進される。このため、発光素子の高温化による劣化が抑えられ、発光効率及び信頼性を高めることができる。   According to the first aspect of the present invention, the peripheral-side thermal via and the peripheral-side heat dissipation pattern, and the central-side thermal via and the central-side heat dissipation pattern are suppressed from mutual heat transfer and easily separated from each other. Of the element groups, the heat from the peripheral group is less likely to be directed to the central group, the central group is prevented from becoming hot, the temperature difference between each element group can be reduced, and heat dissipation is promoted throughout the device. The For this reason, deterioration due to high temperature of the light emitting element can be suppressed, and light emission efficiency and reliability can be improved.

請求項2の発明によれば、中央側放熱パターンは実装基板の素子実装面に対して垂直方向に離れるほど平行方向に広く放熱するので、中央素子群からの熱の放熱がより促進される。   According to the second aspect of the present invention, the heat radiation from the central element group is further promoted because the center side heat radiation pattern radiates heat in the parallel direction as the distance from the element mounting surface of the mounting substrate increases in the vertical direction.

請求項3の発明によれば、配線パターンとの絶縁を維持したままサーマルビアを露出し、その長さをより長くできるので、放熱面が広くなり、発光素子の放熱を促進することができる。   According to the invention of claim 3, since the thermal via can be exposed while maintaining the insulation with the wiring pattern and the length thereof can be made longer, the heat radiation surface can be widened and the heat radiation of the light emitting element can be promoted.

請求項4の発明によれば、サーマルビアを通電ビアと兼用できると共に、通電ビアを介して実装基板の素子実装面とは反対面側から発光素子に通電することができるので、発光素子に配線基板を介して給電するとき、配線基板上の給電用パターンと実装基板の配線パターン上の各電極部とを、ワイヤボンディングを用いることなく、通電ビアを介して接続でき、構造が簡素化される。   According to the invention of claim 4, the thermal via can be used also as the energizing via, and the light emitting element can be energized from the side opposite to the element mounting surface of the mounting substrate via the energizing via. When power is supplied through the board, the power supply pattern on the wiring board and each electrode part on the wiring pattern on the mounting board can be connected via the current via without using wire bonding, and the structure is simplified. .

請求項5の発明によれば、複数個の実装基板に実装された全体の発光素子群の中央群の温度を低減して全体の温度を平均化することができるので、発光効率と信頼性を高めることができる。   According to the invention of claim 5, since the temperature of the central group of the whole light emitting element group mounted on a plurality of mounting boards can be reduced and the whole temperature can be averaged, the luminous efficiency and reliability can be improved. Can be increased.

本発明の第1の実施形態に係る発光装置の平面図。1 is a plan view of a light emitting device according to a first embodiment of the present invention. 同発光装置の発光素子群の配置を示す図。FIG. 6 shows an arrangement of light emitting element groups of the light emitting device. 同発光装置の実装基板の平面図。The top view of the mounting substrate of the light-emitting device. (a)は同発光装置の断面図、(b)は同実装基板内の放熱パターンの例を示す図。(A) is sectional drawing of the light-emitting device, (b) is a figure which shows the example of the thermal radiation pattern in the mounting substrate. 同発光装置の放熱パターンが変形された断面図。Sectional drawing with which the thermal radiation pattern of the light-emitting device was deform | transformed. 本発明の第2の実施形態に係る発光装置の断面図。Sectional drawing of the light-emitting device which concerns on the 2nd Embodiment of this invention. 本発明の第3の実施形態に係る発光装置の断面図。Sectional drawing of the light-emitting device which concerns on the 3rd Embodiment of this invention. 同発光装置の実装基板を直列配置する配線基板のパターン例を示す図。The figure which shows the example of a pattern of the wiring board which arranges the mounting substrate of the light-emitting device in series. 本発明の第4の実施形態に係る発光装置の平面図。The top view of the light-emitting device which concerns on the 4th Embodiment of this invention. (a)は従来の発光装置の実装基板の平面図、(b)は同実装基板上の発光素子群の温度分布を説明するための図、(c)は同実装基板の温度分布を説明するための図。(A) is a top view of the mounting board | substrate of the conventional light-emitting device, (b) is a figure for demonstrating the temperature distribution of the light emitting element group on the mounting board | substrate, (c) demonstrates the temperature distribution of the mounting board | substrate. Figure for. 従来の他の発光装置における実装基板の断面図。Sectional drawing of the mounting board | substrate in the other conventional light-emitting device.

以下、本発明の第1の実施形態に係る発光装置について図1乃至図4を参照して説明する。図1は本実施形態の発光装置1の構成を、図2は発光装置1の発光素子群40の配置構成を、図3は発光装置1の実装基板2上の配線パターン3を示す。本発光装置1は、絶縁性の実装基板2と、実装基板2の素子実装面21に実装される配線パターン3と、この配線パターン3に実装される複数(ここでは、18個)の発光素子4から成る発光素子群40と、発光素子4に給電するための枠状の配線基板5と、実装基板2及び配線基板5の熱を放熱する放熱板6と、を備える。実装基板2及び配線基板5は放熱板6上に搭載される。   Hereinafter, a light-emitting device according to a first embodiment of the present invention will be described with reference to FIGS. 1 shows the configuration of the light emitting device 1 of the present embodiment, FIG. 2 shows the arrangement configuration of the light emitting element group 40 of the light emitting device 1, and FIG. 3 shows the wiring pattern 3 on the mounting substrate 2 of the light emitting device 1. The light emitting device 1 includes an insulating mounting substrate 2, a wiring pattern 3 mounted on the element mounting surface 21 of the mounting substrate 2, and a plurality (18 in this case) of light emitting elements mounted on the wiring pattern 3. 4, a frame-like wiring board 5 for supplying power to the light emitting element 4, and a heat radiating plate 6 that radiates heat from the mounting board 2 and the wiring board 5. The mounting board 2 and the wiring board 5 are mounted on the heat sink 6.

実装基板2は、平面視が矩形のセラミックなどの絶縁性基板を有し、その表面の素子実装面21に発光素子4が実装され、基板内部に発光素子4からの熱を放熱するための、高熱伝導部材から成るサーマルビア7及び放熱パターン8(後述の図4参照)を有している。なお、実装基板2は、絶縁性の樹脂部材(エポキシ、ガラスエポキシなど)を用いてもよく、矩形以外の形状でもよい。   The mounting substrate 2 has an insulating substrate such as ceramic having a rectangular shape in plan view, the light emitting element 4 is mounted on the element mounting surface 21 on the surface, and the heat from the light emitting element 4 is dissipated inside the substrate. It has a thermal via 7 and a heat radiation pattern 8 (see FIG. 4 described later) made of a high heat conductive member. The mounting substrate 2 may use an insulating resin member (epoxy, glass epoxy, etc.) or may have a shape other than a rectangle.

配線パターン3は、複数の発光素子4を直列に繋ぐように配置されており、電源供給される正、負電極部31、32と、個々の発光素子4を直列に接続するための複数の台座パターン33と、これらを直列に接続するためのラインパターン34とを有する。正、負電極部31、32は台座パターン33とラインパターン34が直列に繋がれるパターンの先頭部と最後部となる。この正、負電極部31、32は、ボンディングワイヤL1で配線基板5の電源配線パターン51に接続され、電源配線パターン51は、配線ワイヤで電源部(不図示)に接続されている。なお、配線パターン3は、実装基板2内部に設けることができ、また、発光素子4を直列以外に、並列や、直列と並列を組み合わせて配置するパターンでもよい。   The wiring pattern 3 is arranged so as to connect a plurality of light emitting elements 4 in series, and a plurality of pedestals for connecting the positive and negative electrode portions 31 and 32 supplied with power and the individual light emitting elements 4 in series. A pattern 33 and a line pattern 34 for connecting them in series are provided. The positive and negative electrode portions 31 and 32 are the head portion and the rear portion of the pattern in which the base pattern 33 and the line pattern 34 are connected in series. The positive and negative electrode portions 31 and 32 are connected to the power supply wiring pattern 51 of the wiring board 5 by bonding wires L1, and the power supply wiring pattern 51 is connected to a power supply portion (not shown) by wiring wires. Note that the wiring pattern 3 can be provided inside the mounting substrate 2, and the light emitting element 4 may be arranged in parallel or in combination of series and parallel in addition to the series.

発光素子群40は、図2に示されるように、その中央部に位置する中央群41と、その周辺に配置される周辺群42とを有し、ここでは、中央部の2つの発光素子4が中央群41を成し、その周辺に位置する16個の発光素子4が周辺群42を成す。   As shown in FIG. 2, the light emitting element group 40 includes a central group 41 located in the central part thereof and a peripheral group 42 arranged in the periphery thereof. Here, the two light emitting elements 4 in the central part are provided. Constitutes a central group 41, and 16 light emitting elements 4 located in the periphery thereof constitute a peripheral group 42.

発光素子4は、LEDや有機ELなどを用いた約0.4〜1mm角の平面型発光素子から成り、その正、負電極となる接合端子部43を有する。この接合端子部43は、正電極部31から負電極部32に至る配線パターン3の配列に対して、極性が対応するように、正電極部31と台座パターン33との間、台座パターン33同士の間、台座パターン33とラインパターン34との間、台座パターン33と負電極部32との間に電気接続される。ここでは、発光素子4は金(Au)バンプ等によりフリップチップ実装されるが、素子表面においてワイヤボンディングを用いて接続するフェイスアップ実装としてもよい。また、中央群41は発光素子4を1つだけ含むものでもよい。   The light emitting element 4 is composed of a flat light emitting element of about 0.4 to 1 mm square using an LED, an organic EL, or the like, and has a junction terminal portion 43 serving as the positive and negative electrodes. The joint terminal portion 43 is arranged between the positive electrode portion 31 and the pedestal pattern 33 and between the pedestal patterns 33 so that the polarity corresponds to the arrangement of the wiring pattern 3 from the positive electrode portion 31 to the negative electrode portion 32. Between the pedestal pattern 33 and the line pattern 34, and between the pedestal pattern 33 and the negative electrode portion 32. Here, the light-emitting element 4 is flip-chip mounted with gold (Au) bumps or the like, but may be face-up mounted on the element surface using wire bonding. The central group 41 may include only one light emitting element 4.

図4(a)は、本発光装置1の断面構成を示し、図4(b)は実装基板2内部に形成される放熱パターン8の例(ここでは、図4(a)の絶縁層24上のパターン)を示す。実装基板2は、セラミック材質の複数の絶縁層22〜28を一体に積層して構成される絶縁性基板から成り、約0.3〜1.0mmの厚さを有する。なお、各絶縁層22〜28の厚みは、互いに同じでも、異なっていてもよい。また、セラミック部材としては、アルミナ系セラミックやガラス−アルミナ混合のガラス系セラミックなどを用いることができる。   4A shows a cross-sectional configuration of the light emitting device 1, and FIG. 4B shows an example of the heat radiation pattern 8 formed inside the mounting substrate 2 (here, on the insulating layer 24 in FIG. 4A). Pattern). The mounting substrate 2 is made of an insulating substrate formed by integrally laminating a plurality of ceramic insulating layers 22 to 28, and has a thickness of about 0.3 to 1.0 mm. The thicknesses of the insulating layers 22 to 28 may be the same as or different from each other. As the ceramic member, alumina ceramic, glass-alumina mixed glass ceramic, or the like can be used.

実装基板2は、素子実装面21に対して垂直方向に棒状に設けられる複数のサーマルビア7と、サーマルビア7と交差する面状の複数の放熱パターン8と、素子実装面21と反対側に設けられる基板接合部9とを備え、サーマルビア7と放熱パターン8とは熱的に接続される。サーマルビア7は、実装基板2の絶縁層22〜28のうちの複数層を貫通し、下端部が基板接合部9に接続される。放熱パターン8は、実装基板2の絶縁層23〜28の各層間に5層に形成され、実装基板2の素子実装面21に対して平行方向に設けられる。基板接合部9は、配線基板5又は放熱板6と接合される。なお、サーマルビア7および放熱パターン8は、それぞれ素子実装面21の垂直方向及び平行方向で部分的に連続していなくてもよい。   The mounting substrate 2 includes a plurality of thermal vias 7 that are provided in a bar shape in a direction perpendicular to the element mounting surface 21, a plurality of planar heat radiation patterns 8 that intersect with the thermal vias 7, and a side opposite to the element mounting surface 21. The board | substrate junction part 9 provided is provided, and the thermal via 7 and the thermal radiation pattern 8 are thermally connected. The thermal via 7 penetrates through a plurality of layers of the insulating layers 22 to 28 of the mounting substrate 2, and the lower end portion is connected to the substrate bonding portion 9. The heat dissipation pattern 8 is formed in five layers between the insulating layers 23 to 28 of the mounting substrate 2 and is provided in a direction parallel to the element mounting surface 21 of the mounting substrate 2. The substrate bonding portion 9 is bonded to the wiring substrate 5 or the heat sink 6. Note that the thermal via 7 and the heat dissipation pattern 8 may not be partially continuous in the vertical direction and the parallel direction of the element mounting surface 21, respectively.

サーマルビア7は、中央群41に対応する中央側サーマルビア(以下、中央ビアという)7aと、周辺群42に対応する周辺側サーマルビア(以下、周辺ビアという)7bとを有する。放熱パターン8は、中央ビア7aに接続される中央側放熱パターン8aと、周辺ビア7bに接続される周辺側放熱パターン8bとを有する。   The thermal via 7 includes a central thermal via (hereinafter referred to as a central via) 7 a corresponding to the central group 41 and a peripheral thermal via (hereinafter referred to as a peripheral via) 7 b corresponding to the peripheral group 42. The heat dissipation pattern 8 has a central heat dissipation pattern 8a connected to the central via 7a and a peripheral heat dissipation pattern 8b connected to the peripheral via 7b.

サーマルビア7は、実装基板2の素子実装面21の近くまで延出されるが、配線パターン3とは接触しないものとされている。また、サーマルビア7の上端は、最上位にある放熱パターン8より実装基板2の素子実装面21に近く設けられている。また、各サーマルビア7は、その下端がすべて基板接合部9に接続されていなくてもよい。   The thermal via 7 extends to the vicinity of the element mounting surface 21 of the mounting substrate 2, but is not in contact with the wiring pattern 3. Further, the upper end of the thermal via 7 is provided closer to the element mounting surface 21 of the mounting board 2 than the uppermost heat radiation pattern 8. Further, each thermal via 7 does not have to be connected at all to the substrate bonding portion 9 at its lower end.

サーマルビア7のうち、その上端部を伸長したとき、配線パターン3と接触しない位置にあるものは、素子実装面21に向けて伸長され、サーマルビア7a1、7b1のように、実装基板2の素子実装面21側に露出している。このように、配線パターン3と接触しない位置にあるサーマルビア7a1、7b1は、配線パターン3との絶縁を維持したまま露出され、その長さをより長くできるので、放熱面が広くなり、発光素子4の放熱を促進することができる。なお、上記サーマルビア7の上端部の全てを素子実装面21側に露出させなくてもよい。また、サーマルビア7の形状は棒状以外に板状でもよく、その太さ又は厚さが、互いに同じ、又は異なっていてもよい。   Among the thermal vias 7, those that are not in contact with the wiring pattern 3 when the upper end portion is extended are extended toward the element mounting surface 21, and the elements of the mounting substrate 2, like the thermal vias 7 a 1 and 7 b 1. It is exposed on the mounting surface 21 side. In this way, the thermal vias 7a1 and 7b1 that are not in contact with the wiring pattern 3 are exposed while maintaining insulation from the wiring pattern 3, and the length thereof can be made longer. 4 heat dissipation can be promoted. Note that it is not necessary to expose the entire upper end portion of the thermal via 7 to the element mounting surface 21 side. Further, the thermal via 7 may have a plate shape other than the rod shape, and the thickness or thickness thereof may be the same or different from each other.

中央ビア7a及び中央側放熱パターン8aと、周辺ビア7b及び周辺側放熱パターン8bとは互いに接触しないように構成される。このとき、中央ビア7a及び中央側放熱パターン8aと、周辺ビア7b及び周辺側放熱パターン8bとの間隔は、絶縁破壊しない程度の距離が保たれている。例えば、基板材質が、一般的なアルミナの場合は、絶縁破壊電圧が10V/μmであり、約5μm以上の距離があるとよい。   The central via 7a and the central side heat radiation pattern 8a, and the peripheral via 7b and the peripheral side heat radiation pattern 8b are configured not to contact each other. At this time, the distance between the central via 7a and the central side heat radiation pattern 8a and the peripheral via 7b and the peripheral side heat radiation pattern 8b is maintained at a distance that does not cause dielectric breakdown. For example, when the substrate material is general alumina, the dielectric breakdown voltage is 10 V / μm, and it is preferable that there is a distance of about 5 μm or more.

ここでは、図4(a)の紙面上において、中央ビア7aの左右における各周辺ビア7bは、中央ビア7aの中心位置に対して略対称に配置され、それら周辺ビア7bの中央ビア7aに与える温度の影響を同じようにしている。   Here, on the paper surface of FIG. 4A, the peripheral vias 7b on the left and right of the central via 7a are arranged substantially symmetrically with respect to the central position of the central via 7a, and are given to the central via 7a of the peripheral vias 7b. The effect of temperature is the same.

基板接合部9は、実装基板2の裏面配線パターン又は裏面放熱パターンを形成する金属パターンから成り、熱伝導性の良い接着剤等により放熱板6に接合される。また、配線基板5は放熱板6と接合するための放熱板接合パターン52を有し、この部分で放熱板6に接合される。放熱板6は放熱性の良い金属板を用いればよい。また、サーマルビア7、放熱パターン8、及び基板接合部9には、Agや、Au、Cu、及びNiなどの高熱伝導部材が用いられる。   The substrate bonding portion 9 is made of a metal pattern that forms the back surface wiring pattern or the back surface heat radiation pattern of the mounting substrate 2 and is bonded to the heat radiation plate 6 with an adhesive having good thermal conductivity. Further, the wiring board 5 has a heat radiation plate joining pattern 52 for joining to the heat sink 6, and is joined to the heat sink 6 at this portion. The heat sink 6 may be a metal plate with good heat dissipation. The thermal via 7, the heat radiation pattern 8, and the substrate bonding portion 9 are made of high thermal conductive members such as Ag, Au, Cu, and Ni.

上記実装基板2の製作方法を説明すると、例えば、セラミック部材による絶縁層として、低温焼成又は高温焼成用セラミックなどを用いてグリーンシート22〜28を形成し、これらグリーンシートに貫通孔を設け、この貫通孔にAg粉末を含む導電性ペーストを充填して未焼成のサーマルビア7を形成する。次に、グリーンシートの表面に導電性ペーストを印刷して未焼成の放熱パターン8を形成し、サーマルビア7及び放熱パターン8が形成された各グリーンシート22〜28を積層及び圧着し、この未焼成の積層体を焼成して実装基板2を形成する。その後、実装基板2の素子実装面21の配線パターン3をメッキ(例えば、Ag、Ni、Auメッキ)する。ここでは、サーマルビア7の導体の直径は約0.1〜0.3mmであり、放熱パターン8の厚みは約0.05〜0.3μmである。   The manufacturing method of the mounting substrate 2 will be described. For example, as an insulating layer made of a ceramic member, green sheets 22 to 28 are formed using low-temperature firing or high-temperature firing ceramics, and through holes are provided in these green sheets. An unfired thermal via 7 is formed by filling the through hole with a conductive paste containing Ag powder. Next, a conductive paste is printed on the surface of the green sheet to form an unfired heat dissipation pattern 8, and the green sheets 22 to 28 on which the thermal vias 7 and the heat dissipation pattern 8 are formed are stacked and pressure-bonded. The mounted substrate 2 is formed by firing the fired laminate. Thereafter, the wiring pattern 3 on the element mounting surface 21 of the mounting substrate 2 is plated (for example, Ag, Ni, Au plating). Here, the diameter of the conductor of the thermal via 7 is about 0.1 to 0.3 mm, and the thickness of the heat radiation pattern 8 is about 0.05 to 0.3 μm.

ここで、放熱パターン8の変形構成として、最上位にある放熱パターン8が、実装基板2内部でサーマルビア7の上端に配置された構成を図5に示す。この変形例においては、最上位の放熱パターン8は、実装基板2の素子実装面21に近接する領域に設けられるので、発光素子群40からの熱を広い範囲に亘って受けてサーマルビア7に伝熱することができる。   Here, as a modified configuration of the heat radiation pattern 8, a configuration in which the heat radiation pattern 8 at the top is arranged at the upper end of the thermal via 7 inside the mounting substrate 2 is shown in FIG. 5. In this modification, the uppermost heat radiation pattern 8 is provided in a region close to the element mounting surface 21 of the mounting substrate 2, so that heat from the light emitting element group 40 is received over a wide range to the thermal via 7. Heat can be transferred.

上記本実施形態の発光装置1によれば、周辺ビア7b及び周辺側放熱パターン8bと、中央ビア7a及び中央側放熱パターン8aとは、互いの伝熱が抑制され、熱的に分断され易くなるので、発光素子群40のうち、周辺群42からの熱が中央群41に導かれ難くなり、中央群41の高温化が抑えられ、各素子群間の温度差を低減することができ、装置全体での放熱が促進される。このため、発光素子4の高温化による劣化が抑えられ、発光効率及び信頼性を高めることができる。   According to the light emitting device 1 of the present embodiment, the peripheral via 7b and the peripheral heat dissipation pattern 8b, and the central via 7a and the central heat dissipation pattern 8a are suppressed from heat transfer to each other and easily separated thermally. Therefore, in the light emitting element group 40, the heat from the peripheral group 42 is difficult to be guided to the central group 41, the high temperature of the central group 41 can be suppressed, and the temperature difference between each element group can be reduced. Overall heat dissipation is promoted. For this reason, the deterioration by the high temperature of the light emitting element 4 is suppressed, and luminous efficiency and reliability can be improved.

次に、本発明の第2の実施形態に係る発光装置について図6を参照して説明する。本実施形態の発光装置1は、実装基板2において、中央側放熱パターン8a及び中央ビア7aと周辺側放熱パターン8b及び周辺ビア7bとの間に隙間71を設けたものである。中央側放熱パターン8aは、隙間71を保持しつつ、実装基板2の素子実装面21に対して垂直方向に離れるほど、周辺側に延伸されてそのパターン面積が広くなるように構成されている。また、中央側放熱パターン8aの拡大に合わせて、中央ビア7aの本数も増加される。   Next, a light emitting device according to a second embodiment of the present invention will be described with reference to FIG. In the light emitting device 1 of the present embodiment, a gap 71 is provided between the central side heat radiation pattern 8a and the central via 7a and the peripheral side heat radiation pattern 8b and the peripheral via 7b on the mounting substrate 2. The center-side heat radiation pattern 8a is configured to extend toward the peripheral side and increase in pattern area as the distance from the element mounting surface 21 of the mounting board 2 increases in the vertical direction while holding the gap 71. Further, the number of the central vias 7a is increased in accordance with the expansion of the central side heat radiation pattern 8a.

中央側放熱パターン8aは、その面積が実装基板2の素子実装面21から基板接合部9に向けて、階層的に素子実装面21と平行方向に順次拡がる。ここで、周辺側放熱パターン8b及び周辺ビア7bは、拡大される中央側放熱パターン8aとの接触を避けるため、順次周辺方向に移動され、周辺ビア7bはその一部が基板接合部9側で短くカットされ、隙間71は、略段々状の山形形状を成す。これにより、中央側放熱パターン8aからの熱がより広く基板接合部9に伝達されるので、中央群41からの熱の放熱がより促進され、発光効率、信頼性がより高まる。   The area of the center side heat radiation pattern 8a gradually expands in a hierarchy in a direction parallel to the element mounting surface 21 from the element mounting surface 21 of the mounting substrate 2 toward the substrate bonding portion 9. Here, the peripheral side heat radiation pattern 8b and the peripheral via 7b are sequentially moved in the peripheral direction in order to avoid contact with the enlarged central side heat radiation pattern 8a, and a part of the peripheral via 7b is on the substrate bonding portion 9 side. The gap 71 is cut short and has a substantially stepped mountain shape. Thereby, since the heat from the center side heat radiation pattern 8a is more widely transmitted to the board | substrate junction part 9, heat dissipation from the center group 41 is further accelerated | stimulated, and luminous efficiency and reliability improve more.

なお、周辺側放熱パターン8b及び周辺ビア7bは、周辺方向にパターン面積が広げられ、ビア本数が多くなるように構成されることにより、周辺群42からの熱の放熱が低下しないようにされている。ここでは、サーマルビア7b1は、基板接合部9に接続されない。   The peripheral side heat radiation pattern 8b and the peripheral via 7b are configured such that the pattern area is increased in the peripheral direction and the number of vias is increased, so that the heat radiation from the peripheral group 42 is not reduced. Yes. Here, the thermal via 7 b 1 is not connected to the substrate bonding portion 9.

次に、本発明の第3の実施形態に係る発光装置について図7を参照して説明する。本実施形態の発光装置1は、周辺ビア7bと周辺側放熱パターン8bの構成、実装基板2及び配線基板5の構成が前記実施形態と異なる。すなわち、周辺ビア7bのうち、少なくとも2本が、それぞれ実装基板2を貫通する通電ビア72、73とされ、これら通電ビア72、73は、配線パターン3の正電極部31及び負電極部32にそれぞれ接続される。   Next, a light-emitting device according to a third embodiment of the present invention will be described with reference to FIG. The light emitting device 1 of this embodiment is different from the above embodiment in the configuration of the peripheral via 7b and the peripheral heat radiation pattern 8b, and the configuration of the mounting substrate 2 and the wiring substrate 5. That is, at least two of the peripheral vias 7 b are energized vias 72 and 73 that respectively penetrate the mounting substrate 2, and these energized vias 72 and 73 are connected to the positive electrode portion 31 and the negative electrode portion 32 of the wiring pattern 3. Each is connected.

配線基板5は、放熱板6上に接合され、実装基板2は、配線基板5上に装着される。配線基板5の電源配線パターン51は、正負の電圧が供給される正電源配線パターン51aと、負電源配線パターン51bとを有する。また、基板接合部9の金属パターンは、正極接合パターン91と負極接合パターン92とに分離される。正極接合パターン91と負極接合パターン92は、配線基板5の正電源配線パターン51aと、負電源配線パターン51bとにそれぞれ接合される。正極接合パターン91と負極接合パターン92との間は、約20μm以上の距離をもたせている。   The wiring board 5 is bonded onto the heat sink 6, and the mounting board 2 is mounted on the wiring board 5. The power supply wiring pattern 51 of the wiring board 5 includes a positive power supply wiring pattern 51a to which positive and negative voltages are supplied, and a negative power supply wiring pattern 51b. Further, the metal pattern of the substrate bonding portion 9 is separated into a positive electrode bonding pattern 91 and a negative electrode bonding pattern 92. The positive electrode bonding pattern 91 and the negative electrode bonding pattern 92 are bonded to the positive power supply wiring pattern 51a and the negative power supply wiring pattern 51b of the wiring board 5, respectively. A distance of about 20 μm or more is provided between the positive electrode bonding pattern 91 and the negative electrode bonding pattern 92.

通電ビア72は、中央ビア7aの左右に位置する2つの周辺ビア7bのうち、最周辺側(ここでは、最左側)にあって正電極部31に近い基板接合部9上に形成された貫通ビアから成る。また、そのビアの両端はそれぞれ正電極部31及び正極接合パターン91に接続されている。   The current-carrying via 72 is a through-hole formed on the substrate junction 9 near the positive electrode portion 31 on the outermost peripheral side (here, the leftmost side) of the two peripheral vias 7b located on the left and right of the central via 7a. Consists of vias. In addition, both ends of the via are connected to the positive electrode portion 31 and the positive electrode bonding pattern 91, respectively.

通電ビア73は、周辺ビア7bの最周辺側(最右側)から離れ、かつ、周辺側放熱パターン8bと接触しないように、負電極部32に近い基板接合部9上に形成される貫通ビアから成る。そのビア両端はそれぞれ負電極部32及び負極接合パターン92に接続されている。周辺ビア7bは、配線パターン3及び基板接合部9に電気的に接続されているが、接触せずに浮いていてもよい。   The current-carrying via 73 is away from the most peripheral side (rightmost side) of the peripheral via 7b and is formed from a through via formed on the substrate bonding portion 9 close to the negative electrode portion 32 so as not to contact the peripheral-side heat radiation pattern 8b. Become. Both ends of the via are connected to the negative electrode portion 32 and the negative electrode bonding pattern 92, respectively. The peripheral via 7 b is electrically connected to the wiring pattern 3 and the substrate bonding portion 9, but may be floated without contact.

上記のような構成にあっては、複数の実装基板2を配線基板5上に並び設けて、それらを電気的に直列に接続する状態を採用することができる。その場合の配線基板5の構成の例を図8に示す。配線基板5は、複数の実装基板2を実装するように電源配線パターン51が構成され、電源配線パターン51は正、負電源配線パターン51a、51bが直列に交互に繰返して形成されたパターンとなっている。複数の実装基板2は、それらの正、負極接合パターン91、92が、配線基板5の各正、負電源配線パターン51a、51bに順次装着され、直列接続される。   In the configuration as described above, it is possible to employ a state in which a plurality of mounting boards 2 are provided side by side on the wiring board 5 and are electrically connected in series. An example of the configuration of the wiring board 5 in that case is shown in FIG. The wiring board 5 has a power wiring pattern 51 configured to mount a plurality of mounting boards 2, and the power wiring pattern 51 is a pattern in which positive and negative power wiring patterns 51a and 51b are alternately repeated in series. ing. The plurality of mounting boards 2 have their positive and negative electrode bonding patterns 91 and 92 sequentially attached to the positive and negative power supply wiring patterns 51 a and 51 b of the wiring board 5 and connected in series.

本実施形態の発光装置1によれば、通電ビア72、73により実装基板2の裏面側の基板接合部9から発光素子4に通電することができる。したがって、サーマルビア7を通電ビア72、73と兼用できる。すなわち、実装基板内で分離されたサーマルビア7及び放熱パターン8をそれぞれ放熱経路だけでなく、通電経路として用いる。これにより、発光素子4に配線基板5から電源供給するとき、配線基板5上の電源配線パターン51と配線パターン3上の各電極部31,32との電気的接続を、ワイヤボンディングを用いることなく、通電ビア72、73を介して接続でき、構造が簡素化される。   According to the light emitting device 1 of the present embodiment, the light emitting element 4 can be energized from the substrate bonding portion 9 on the back surface side of the mounting substrate 2 by the energization vias 72 and 73. Therefore, the thermal via 7 can also be used as the energizing vias 72 and 73. That is, the thermal via 7 and the heat radiation pattern 8 separated in the mounting substrate are used not only as a heat radiation path but also as an energization path. Thereby, when power is supplied to the light emitting element 4 from the wiring board 5, the electrical connection between the power supply wiring pattern 51 on the wiring board 5 and the electrode portions 31 and 32 on the wiring pattern 3 can be made without using wire bonding. And can be connected via the current-carrying vias 72 and 73, and the structure is simplified.

次に、本発明の第4の実施形態に係る発光装置について図9を参照して説明する。本実施形態の発光装置1は、発光素子群40が密集して実装された複数の実装基板2a、2b、2c及び2dが互いに密集し、配線基板5の中央部に密集して実装され、実装基板群を成す。この実装基板群における発光素子群40を集合したものを全発光素子群(請求項でいう全体の発光素子群に相当)と称し、この全発光素子群の実装基板群における中央部に位置する発光素子4の集合を全中央群(請求項でいう中央群に相当)Aとし、その周辺部に位置する発光素子4の集合を全周辺群(請求項でいう周辺群に相当)Bとする。本実施形態は、全発光素子群の全中央群Aと全周辺群Bについて前記実施形態で示される構成のサーマルビアと放熱パターンを備えたものとしている。   Next, a light emitting device according to a fourth embodiment of the present invention will be described with reference to FIG. In the light emitting device 1 of the present embodiment, a plurality of mounting boards 2a, 2b, 2c, and 2d on which the light emitting element groups 40 are densely mounted are densely mounted on each other, and are densely mounted on the central portion of the wiring board 5. A group of substrates is formed. A group of the light emitting element groups 40 in the mounting substrate group is referred to as an all light emitting element group (corresponding to the entire light emitting element group in the claims), and the light emission located at the center of the mounting substrate group of the all light emitting element groups. A set of elements 4 is referred to as an all-central group (corresponding to a central group in the claims) A, and a set of light-emitting elements 4 located in the periphery thereof is referred to as an all-peripheral group (corresponding to a peripheral group in the claims) B. In the present embodiment, all the central groups A and all peripheral groups B of all the light emitting element groups are provided with the thermal vias and the heat radiation patterns configured as described in the above embodiment.

各発光素子群40は4つの発光素子4を有する。ここでは、全発光素子群は、16個の発光素子4が4行×4列の正方形状に配列され、全中央群Aは、全発光素子群の中央部における2行×2列の4つの発光素子により成り、全周辺群Bは、全中央群Aの周辺に配置された12個の発光素子4により成る。この構成により全体の発光素子4が全中央群Aと全周辺群Bに再構築される。   Each light emitting element group 40 includes four light emitting elements 4. Here, in the entire light emitting element group, 16 light emitting elements 4 are arranged in a square shape of 4 rows × 4 columns, and the entire central group A includes 4 rows of 2 rows × 2 columns in the central portion of all the light emitting element groups. The entire peripheral group B is composed of twelve light emitting elements 4 arranged around the entire central group A. With this configuration, the entire light emitting element 4 is reconstructed into all central groups A and all peripheral groups B.

各実装基板2a、2b、2c、及び2dにおいては、全中央群Aに含まれる発光素子4が実装される素子実装面21の下方に中央ビア7a及び中央側放熱パターン8aが形成され、全周辺群Bに含まれる発光素子4が実装される素子実装面21の下方に周辺ビア7b及び周辺側放熱パターン8bが形成される。   In each of the mounting substrates 2a, 2b, 2c, and 2d, a central via 7a and a central side heat radiation pattern 8a are formed below the element mounting surface 21 on which the light emitting elements 4 included in the entire central group A are mounted, A peripheral via 7b and a peripheral heat dissipation pattern 8b are formed below the element mounting surface 21 on which the light emitting elements 4 included in the group B are mounted.

上記複数の実装基板2a〜2d間における配線は、各基板内で発光素子4が互いに直列に配線されると共に、各基板2a〜2dの各配線パターン3がボンディングワイヤL1で順に基板間で互いに直列接続される。この直列接続された実装基板群の入力端(ここでは、実装基板2a側)と出力端(ここでは、実装基板2d側)は、配線基板5の配線パターン51にそれぞれボンディング接続され、各発光素子4が電源供給される。これにより、全発光素子群は1つの発光体として動作される。なお、複数の実装基板2は、複数の配線基板5に分けて配置されてもよく、また、放熱板6上に直接配置されてもよい。   The wirings between the plurality of mounting substrates 2a to 2d are such that the light emitting elements 4 are wired in series in each substrate, and the wiring patterns 3 of the substrates 2a to 2d are serially connected in series between the substrates with bonding wires L1. Connected. The input terminal (here, the mounting board 2a side) and the output terminal (here, the mounting board 2d side) of the group of mounting boards connected in series are bonded to the wiring pattern 51 of the wiring board 5, respectively. 4 is powered. Thereby, all the light emitting element groups are operated as one light emitter. The plurality of mounting boards 2 may be arranged separately on the plurality of wiring boards 5 or may be arranged directly on the heat sink 6.

本実施形態においては、全発光素子群の全中央群A及び全周辺群Bに対応して、それぞれ中央ビア7a及び中央側放熱パターン8aと、周辺ビア7b及び周辺側放熱パターン8bとが形成されることにより、全中央群Aへの全周辺群Bからの熱の影響を防止することができる。これにより、実装基板2が複数密集して配置されている場合も、全体の発光素子群における全中央群Aの温度を低減して全体の温度を平均化することができ、発光効率と信頼性を高めることができる。   In the present embodiment, the central via 7a and the central side heat radiation pattern 8a, the peripheral via 7b and the peripheral side heat radiation pattern 8b are formed corresponding to the whole central group A and the whole peripheral group B of the whole light emitting element group, respectively. Thus, the influence of heat from all the peripheral groups B on all the central groups A can be prevented. As a result, even when a plurality of mounting substrates 2 are densely arranged, the temperature of all the central groups A in the entire light emitting element group can be reduced and the entire temperature can be averaged, and the luminous efficiency and reliability can be achieved. Can be increased.

なお、本発明は上記各種実施形態の構成に限定されるものではなく、発明の趣旨を変更しない範囲で適宜に種々の変形が可能である。例えば、上記実施形態において、サーマルビア7および放熱パターン8の分け方を、平面的に見て、中央部内と周辺部内をそれぞれ2つまたは3つ以上に分けて各部内で互いの熱的影響を避けるようにしてもよい。   In addition, this invention is not limited to the structure of the said various embodiment, A various deformation | transformation is possible suitably in the range which does not change the meaning of invention. For example, in the above-described embodiment, the thermal via 7 and the heat radiation pattern 8 are divided in two or more in the central part and in the peripheral part in a plan view, and the thermal influences in each part are obtained. It may be avoided.

1 発光装置
2 実装基板
21 素子実装面
3 配線パターン
31 正電極部
32 負電極部
4 発光素子
40 発光素子群
41 中央群
42 周辺群
5 配線基板
7 サーマルビア
7a 中央ビア(中央側サーマルビア)
7b 周辺ビア(周辺側サーマルビア)
71 隙間
72、73 通電ビア
8 放熱パターン
8a 中央側放熱パターン
8b 周辺側放熱パターン
A 全中央群(中央群)
B 全周辺群(周辺群)
DESCRIPTION OF SYMBOLS 1 Light emitting device 2 Mounting board 21 Element mounting surface 3 Wiring pattern 31 Positive electrode part 32 Negative electrode part 4 Light emitting element 40 Light emitting element group 41 Central group 42 Peripheral group 5 Wiring board 7 Thermal via 7a Central via (central thermal via)
7b Peripheral via (peripheral thermal via)
71 Gap 72, 73 Current-carrying via 8 Heat radiation pattern 8a Center side heat radiation pattern 8b Peripheral side heat radiation pattern A All central groups (central group)
B All peripheral groups (neighboring groups)

Claims (5)

実装基板と、この実装基板の表面又は内部に設けられる配線パターンと、この配線パターンに実装される複数の発光素子から成る発光素子群と、を備えた発光装置において、
前記発光素子からの熱を放熱するための、少なくとも一部が前記実装基板の内部に素子実装面に対して垂直方向に設けられるサーマルビアと、
前記実装基板の内部に素子実装面に対して平行方向に設けられ、前記サーマルビアと交差する放熱パターンと、を備え、
前記発光素子群は、該発光素子群の中央部に位置する中央群と、この中央群の周辺に配置される周辺群とを有し、
前記サーマルビアは、前記中央群に対応する中央側サーマルビアと、前記周辺群に対応する周辺側サーマルビアとを有し、
前記放熱パターンは、前記中央側サーマルビアに接続される中央側放熱パターンと、前記周辺側サーマルビアに接続される周辺側放熱パターンとを有し、
前記中央側サーマルビア及び中央側放熱パターンと、前記周辺側サーマルビア及び周辺側放熱パターンと、が互いに接触しないように構成されていることを特徴とする発光装置。
In a light-emitting device including a mounting substrate, a wiring pattern provided on or inside the mounting substrate, and a light-emitting element group including a plurality of light-emitting elements mounted on the wiring pattern,
A thermal via for dissipating heat from the light emitting element, at least part of which is provided in the mounting substrate in a direction perpendicular to the element mounting surface;
A heat dissipating pattern that is provided in the mounting substrate in a direction parallel to the element mounting surface and intersects the thermal via, and
The light emitting element group has a central group located in the central portion of the light emitting element group, and a peripheral group disposed around the central group,
The thermal via has a central thermal via corresponding to the central group and a peripheral thermal via corresponding to the peripheral group,
The heat dissipation pattern has a central heat dissipation pattern connected to the central thermal via and a peripheral heat dissipation pattern connected to the peripheral thermal via,
The light emitting device, wherein the central thermal via and the central heat dissipation pattern and the peripheral thermal via and the peripheral heat dissipation pattern are not in contact with each other.
前記実装基板内において、前記中央側放熱パターン及び中央側サーマルビアは、前記周辺側放熱パターン及び周辺側サーマルビアと隙間を有し、前記中央側放熱パターンは前記隙間を保持しつつ、前記実装基板の素子実装面に対して垂直方向に離れるほど、周辺側に延伸されてそのパターン面積が広くなるように設けられていることを特徴とする請求項1に記載の発光装置。   In the mounting substrate, the center side heat dissipation pattern and the center side thermal via have a gap with the peripheral side heat dissipation pattern and the peripheral side thermal via, and the center side heat dissipation pattern holds the gap while the mounting substrate. The light-emitting device according to claim 1, wherein the light-emitting device is provided so as to extend toward the peripheral side and increase in pattern area as the distance from the element mounting surface increases. 前記配線パターンと接触しない位置にあるビアは、前記実装基板表面に向けて伸長され、前記実装基板の表面側に露出することを特徴とする請求項1又は請求項2に記載の発光装置。   3. The light emitting device according to claim 1, wherein the via located at a position not in contact with the wiring pattern extends toward the surface of the mounting substrate and is exposed on the surface side of the mounting substrate. 前記サーマルビアのうち、少なくとも2本を、それぞれ前記実装基板を貫通して前記発光素子に通電するための通電ビアとし、これら通電ビアは、前記発光素子の正、負電極がそれぞれ接続される前記配線パターンの正電極部及び負電極部にそれぞれ接続されることを特徴とする請求項1乃至請求項3のいずれか一項に記載の発光装置。   At least two of the thermal vias are energized vias that pass through the mounting substrate and energize the light emitting element, and the energized vias are connected to the positive and negative electrodes of the light emitting element, respectively. 4. The light emitting device according to claim 1, wherein the light emitting device is connected to a positive electrode portion and a negative electrode portion of the wiring pattern, respectively. 前記発光素子群が密集して実装された実装基板が複数個互いに密集して配線基板に実装された構成において、全体の発光素子群における中央群と周辺群について請求項1乃至請求項4のいずれか一項を満たすサーマルビアと放熱パターンを有することを特徴とする記載の発光装置。   The center group and the peripheral group in the entire light emitting element group in a configuration in which a plurality of mounting boards on which the light emitting element group is densely mounted are densely mounted on the wiring board. The light-emitting device according to claim 1, further comprising a thermal via and a heat radiation pattern satisfying any one of the items.
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