JP2011024166A - Receiver of serial signal, receiving method of serial signal, serial transmission system, and image forming apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To achieve correction processing including jitters of a clock for transmitting a serial signal in a serial transmission system. <P>SOLUTION: A receiver 21 includes a receiving part 71, a detecting part 72, a sampling point determining part 73, and a sampling part 74. The detecting part 72 detects phase relation to a correction pattern signal RX_DATA received by the receiving part 71 at a plurality of duty ratios on a transmission clock RX_CLK received by the receiving part 71. The sampling point determining part 73 determines a sampling point to a serial signal received by the receiving part 71 based on the result of detection at the plurality of duty ratios by the detecting part 72. The sampling part 74 samples the serial signal received by the receiving part 71 at the sampling point determined by the sampling point determining part 73. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

The present invention relates to a serial signal receiving apparatus, a serial signal receiving method, a serial transmission system, and an image forming apparatus.

  As one of information transmission techniques, information is transmitted sequentially (serially) bit by bit (minimum unit of information) using one communication line, that is, a serial signal (serial signal) is transmitted in series. There is a transmission (serial transmission) technology.

  Further, due to variations in the wiring length between transmission cable lines (transmission wiring), a propagation delay difference (skew) occurs between the lines. As a method of correcting the delay difference, there is a technique of correcting the delay difference from the clock using a correction (test) pattern.

  In order to correct fluctuations in the rise and fall of the signal due to interference between serial signals to be transmitted in the transmission of serial signals, conventionally, a plurality of reference signals having multiple delay amounts are used as correction patterns as bits. Is adjusted (see, for example, Patent Document 1).

Also, in serial transmission, in order to extract the correct signal from the signal that includes jitter (variation on the time axis of the signal), conventionally, statistical processing is applied to the edges in the oversampled data sequence, which is most stable. A highly specific edge is selected, and data is sampled by the selected edge (see, for example, Patent Document 2).

JP 2006-041818 A JP 2004-088386 A

The present invention relates to a serial signal receiving apparatus, a serial signal receiving method, a serial transmission system, and an image forming apparatus capable of performing correction processing including jitter of a signal (clock) having a constant period for transmitting a serial signal. The purpose is to provide.

The serial signal receiving device according to claim 1,
A receiving unit that receives a serial signal including a signal serving as a reference in the correction process and a signal of a fixed period having a plurality of different logic ratios in one period;
A detection unit that detects a phase relationship with respect to the reference signal at a plurality of the ratios of the signal of the fixed period;
A determination unit that determines sampling points for the serial signal based on a plurality of detection results at the ratio by the detection unit.

  The serial signal receiver according to claim 2, wherein the determination unit obtains sampling points for each ratio from a plurality of detection results of the ratio by the detector. An intermediate point between the sampling points of each ratio is set as a sampling point for the serial signal.

The serial signal receiver according to claim 3 is the serial signal receiver according to claim 2, wherein the serial signal is a multiplied signal.
The determination unit converts the reference signal from a serial signal to a parallel signal by multiplying the signal of the fixed period by the multiplication number of the serial signal and shifting the phase by a predetermined angle. The sampling points for each ratio are obtained by comparing the obtained plurality of phase information with the expected value.

  The serial signal receiving device according to claim 4, wherein the determining unit collects the phase information that matches the expected value among the plurality of phase information. When there are a plurality of pieces of phase information that match the expected value, intermediate phase information among the plurality of pieces of matching phase information is adopted as phase information that determines the sampling point.

  The serial signal receiver according to claim 5, wherein the determination unit obtains sampling points for each ratio from a plurality of detection results of the ratio by the detector. When the phase difference between the sampling points at each ratio exceeds a predetermined phase difference, it is determined that the serial signal cannot be sampled.

  The serial signal receiver according to claim 6, wherein the determination unit determines that the serial signal cannot be collected, and transmits the serial signal. For the above, retransmission with a signal having a fixed period is required.

  The serial signal receiver according to claim 7, wherein the detection unit detects a phase relationship with respect to the reference signal of the signal having the fixed period. Repeat multiple times.

  The serial signal receiving device according to claim 8, wherein the detecting unit detects a phase relationship with respect to the reference signal of the signal having the fixed period by a plurality of the ratios. Repeat the same number of times.

The serial signal receiving method according to claim 9 comprises:
Receiving a serial signal including a signal serving as a reference during correction processing and a signal having a fixed period having a plurality of different logic ratios in one period;
Detecting a phase relationship with respect to the reference signal at a plurality of the ratios with respect to the signal of the fixed period;
A sampling point for the serial signal is determined based on the plurality of detection results at the ratio.

The serial transmission system according to claim 10,
A transmitter that converts a parallel signal into a serial signal including a signal serving as a reference in correction processing, and serially transmits a signal of a fixed period having a plurality of different logic ratios in one period together with the serial signal;
Receiving the serial signal serially transmitted from the transmission device, the signal of the fixed period and the signal serving as the reference, and receiving the serial signal converted into a parallel signal,
The receiving device is:
A receiving unit that receives a serial signal including a signal serving as a reference in the correction process and the signal of the fixed period;
A detection unit that detects a phase relationship with respect to the reference signal at a plurality of the ratios of the signal of the fixed period;
And a determination unit that determines sampling points for the serial signal based on a plurality of detection results at the ratio by the detection unit.

An image forming apparatus according to claim 11 is provided.
A receiving unit that receives a serial signal including a signal serving as a reference in the correction process and a signal of a fixed period having a plurality of different logic ratios in one period;
A detection unit that detects a phase relationship with respect to the reference signal at a plurality of the ratios of the signal of the fixed period;
And a determination unit that determines sampling points for the serial signal based on a plurality of detection results at the ratio by the detection unit.

  According to the first aspect of the present invention, the phase relationship with respect to the reference signal is detected at a plurality of the ratios with respect to a signal having a constant period, and the sampling points for the serial signal are determined based on the detection result, thereby Compared to the case where the phase relationship is not detected at the above ratio, correction processing including jitter of a signal having a constant period can be realized.

  According to the second aspect of the present invention, sampling points that can realize correction processing including jitter are determined for any ratio by setting the intermediate points of the sampling points for each ratio as sampling points for the serial signal. it can.

  According to the invention of claim 3, by obtaining a sampling point of each ratio by comparing a plurality of pieces of phase information obtained based on a signal having a fixed period and a reference signal with an expected value, a plurality of phases are obtained. The phase relationship can be detected using the angle between the information as the resolution. And the detection precision of the phase relationship with respect to the signal used as the reference | standard of the signal of a fixed period can be raised, so that the angle between several phase information is set small.

  According to the fourth aspect of the present invention, when there are a plurality of pieces of phase information that match the expected value, intermediate phase information among the plurality of pieces of matching phase information is employed as phase information that determines the sampling point. Compared with the case where intermediate phase information is not employed, the detection accuracy of the phase relationship with respect to a signal serving as a reference of a signal having a fixed period can be improved.

  According to the invention according to claim 5, when the phase difference between the sampling points of each previous ratio exceeds a predetermined phase difference, it is determined that sampling of the serial signal is impossible, thereby erroneously sampling the serial signal. It can be prevented beforehand.

  According to the invention of claim 6, when it is determined that sampling of a serial signal is impossible, the ratio is different in one cycle by requesting the transmitter to retransmit with a signal of one fixed cycle. Compared to the case where there are a plurality of logic ratios, it is possible to transmit a serial signal with a signal having a fixed period without fluctuation of the period of the ratio.

  According to the seventh aspect of the present invention, the accuracy of the correction process can be increased by performing the phase relationship detection a plurality of times as compared with the case of performing the phase relationship once.

  According to the eighth aspect of the present invention, the accuracy of the correction process can be improved by performing the phase relationship detection the same number of times for each of the plurality of ratios, compared to the case of performing the number of times different for each ratio. .

  According to the ninth aspect of the present invention, a plurality of phase ratios with respect to the reference signal are detected at a plurality of ratios with respect to a signal having a certain period, and a plurality of sampling points for the serial signal are determined based on the detection result. Compared to the case where the phase relationship is not detected at the above ratio, correction processing including jitter of a signal having a constant period can be realized.

  According to the invention of claim 10, in a serial transmission system, a phase relationship with respect to the reference signal is detected at a plurality of the ratios for a signal having a constant period, and a sampling point for the serial signal is determined based on the detection result. By doing so, even if the period of the ratio fluctuates due to the characteristics of the transmission apparatus, correction processing including jitter of a signal having a constant period can be realized.

According to the invention of claim 11, in the image forming apparatus, a phase relationship with respect to the reference signal is detected at a plurality of the ratios for a signal having a constant period, and a sampling point for the serial signal is determined based on the detection result. By doing so, since it is possible to realize a correction process including jitter of a signal having a constant period, it is possible to improve the image quality of an image to be formed as compared with the case where a plurality of the phase relationships are not detected.

1 is a system configuration diagram illustrating an example of a configuration of an image forming system to which the present invention is applied. It is explanatory drawing about the reason for giving a several duty ratio to the transmission clock multiplied by 7 and fluctuating the said duty ratio. It is a block diagram which shows the structural example of the principal part of the receiver which concerns on this embodiment. It is a block diagram which shows the specific structural example of the sampling part determination part which determines the sampling point with respect to the detection part and serial signal which detect the phase relationship with respect to a correction | amendment pattern signal with a several duty ratio about a transmission clock. 10 is a timing chart showing a timing relationship between a transmission clock RX_CLK, seven sample clocks Samp_CLK0 to Samp_CLK6, and a correction pattern signal RX_DATA. It is a flowchart which shows the flow of a series of processes for determining the sampling point in case transmission clock RX_CLK is a duty ratio of 2: 5, 5: 2. It is a wave form chart for explaining detection of phase relations (1) and (2) of transmission clock RX_CLK and correction pattern signal RX_DATA. It is a wave form diagram for demonstrating determination of an actual sampling point. It is a wave form diagram for demonstrating the case where the phase difference of the sampling points a and b exceeds 180 degrees. FIG. 11 is a block diagram illustrating a configuration example of a computer device when a function for determining a sampling point is realized by a software configuration.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

<Image Forming System to which the Present Invention is Applied>
[System configuration]
FIG. 1 is a system configuration diagram showing an example of the configuration of an image forming system to which the present invention is applied.

  As shown in FIG. 1, an image forming system 10 according to this configuration example includes an image forming apparatus 20 and a print control apparatus 30. The print control apparatus 30 includes at least one, for example, two client PCs (Personal Computer) 41 and 42 are connected via a network 50.

  The client PCs 41 and 42 transmit information such as a print instruction and an electronic document to be printed to the print control apparatus 30 via the network 50. As a connection form by the network 50, various connection forms such as a form using a LAN (Local Area Network), an intranet, the Internet, a telephone line network, a dedicated communication line, and a form directly connected to each other can be adopted.

  The image forming apparatus 20 and the print control apparatus 30 are connected by a transmission path, for example, a transmission cable 60 having a length of about 1 to 10 m.

  The print control device 30 includes a transmission device 31, and image data to be printed is a parallel signal (hereinafter referred to as “parallel signal”) based on information such as a print instruction or an electronic document given from the client PCs 41 and 42. The parallel signal is converted into a serial signal (hereinafter referred to as “serial signal”) and transmitted from the transmission device 31 to the image forming apparatus 20 through the transmission cable 60.

  The image forming apparatus 20 includes a receiving device 21, an image processing device 22, and a printing device (output device) 22. The serial signal transmitted in series from the print control device 30 is received by the receiving device 21 and converted into a parallel signal. . The image processing device 22 performs various image processing on the image data converted into the parallel signal, and then the image is formed (printed) on a sheet by the printing device 22 and output.

[Transmitter]
In the image forming system 10 having the above-described configuration, the transmission device 31 of the print control device 30 transmits a signal with a fixed period (hereinafter referred to as “clock”) transmitted together with image data at a frequency several times higher than the actual frequency. Perform oversampling to collect (hereinafter referred to as “sampling”).

  In this oversampling, as shown in FIG. 2, the frequency of the actual clock TX_CLOCK is multiplied by, for example, seven. The transmission device 31 has a parallel-serial conversion function, multiplies image data by 7 during oversampling, and converts a 6-bit parallel signal into a serial signal.

  In order to set the same frequency as the clock TX_CLOCK before oversampling to the serial transmission of the clock multiplied by 7, the transmission device 31 has a ratio of different logics (logic 1 / logic 0) in one cycle (hereinafter referred to as the clock TX_CLOCK before the oversampling). , Described as “duty ratio”). The plurality of duty ratios at this time are 4: 3, 3: 4, 5: 2, 2: 5, and the like. The clock having a plurality of duty ratios is a clock for serial transmission, and is hereinafter referred to as a transmission clock.

  The transmission apparatus 31 is an image forming apparatus through a transmission cable 60 together with a transmission clock for a plurality of channels (for example, 8 channels) as a total of 7-bit serial signals obtained by adding 1-bit transmission function bit X to 6-bit image data. 20 is transmitted. If 6-bit image data is for 8 channels, the original image data is 48-bit data.

  In image data (0, 1, 2, 3, 4, 5, 6, X) in units of 7 bits for serial transmission, logic 1 (high level state) continues, logic 0 (low level state) continues As described above, if the same logic continues, a delay may occur when the logic is inverted (switching), and erroneous data reading may occur on the receiving side.

  Therefore, a transmitter having the following function is used. The function is to prevent the serial data from continuing the same logic for a certain period by intentionally inverting the logic of the serial data for a certain period when the same logic of the data continues for a certain period. It is.

  The transmission device 31 is an example having the inversion function described above. The information for informing whether the logic is inverted or not is the 1-bit transmission function bit X described above.

  On the other hand, the transmission clock multiplied by 7 has a plurality of duty ratios and the duty ratios are changed to 4: 3, 3: 4, for the following reason.

  The serial signal does not include a dedicated signal for transmitting the mode setting information of the mode using / not using the logic inversion function described above to the receiving device 21 side. Therefore, the receiving device 21 side recognizes the setting mode that is set on the transmitting device 31 side based on the duty ratio of the transmission clock and that uses the inversion function and does not use the inversion function.

For example,
(1) When the transmission clock duty ratio continues at 4: 3, the inversion function is not used. (2) The transmission clock duty ratio is 4: 3, 3: 4, 4: 3, and so on. If it has changed, it is recognized as the reverse function use mode.

In addition, the duty ratio of the transmission clock can be used as a recognition of the correction mode. For example,
(1) When the transmission clock duty ratio is 5: 2, the transmission side transmits data in the correction mode. (2) The transmission clock duty ratio changes 5: 2, 2: 5, 5: 2,... If this is the case, the transmitting side transmits data as the correction mode and recognizes it as the reverse function use mode.

  In the serial transmission, the transmission device 31 of the print control device 30 first transmits a reference signal at the time of correction processing on the reception device 21 side as a serial signal, and then transmits image data. Here, the correction processing on the receiving device 21 side is a skew correction for correcting a delay difference between bits (hereinafter referred to as “skew”) caused by a wiring length difference between lines (transmission wirings) of the transmission cable 60. Say. A signal that serves as a reference in the correction process is a correction pattern signal (details will be described later) used for skew correction.

[Receiver]
The receiving device 21 of the image forming apparatus 20 receives a serial signal and a transmission clock transmitted from the transmitting device 31 of the print control device 30 through the transmission cable 60. When receiving the serial signal, the correction pattern signal is first received and then the image data is received.

  The receiving device 21 divides the received serial signal and transmission clock by 7 to return to the original frequency on the transmission side, and transmits from the change in the duty ratio of the transmission clock (for example, 4: 3, 3: 4). The mode set on the side is discriminated, and the same period as that of the parallel signal TX_DATA0 to TX_DATA5 on the transmission side is returned based on the discrimination result.

  The receiving device 21 further receives a skew between a plurality of transmission lines (between lines) of the transmission cable 60 based on a correction pattern signal that is received as a serial signal prior to image data and serves as a reference signal for skew correction. Make corrections. The present embodiment is characterized in that skew correction including jitter due to fluctuations in the duty ratio of the transmission clock is performed at the time of skew correction between lines using this correction pattern signal. Here, jitter refers to fluctuations on the time axis of a signal such as temporal deviation or fluctuation of the signal.

<Receiving device according to this embodiment>
[Configuration example of receiver]
FIG. 3 is a block diagram illustrating a configuration example of a main part of the receiving device 21 according to the present embodiment. As illustrated in FIG. 3, the reception device 21 according to this configuration example includes a reception unit 71, a detection unit 72, a sampling point (collection point) determination unit 73, and a sampling unit 74.

  The receiving unit 71 receives the serial signal RX_DATA and the transmission clock RX_CLK transmitted from the transmission device 31 of the print control device 30 through the transmission cable 60.

  The detection unit 72 detects a phase relationship with respect to a correction pattern signal (hereinafter referred to as “correction pattern signal RX_DATA”) received as the serial signal RX_DATA at a plurality of duty ratios with respect to the transmission clock RX_CLK received by the reception unit 71. The sampling point determination unit 73 determines a sampling point for the serial signal received by the reception unit 71 based on detection results at a plurality of duty ratios by the detection unit 72. The sampling unit 74 samples the serial signal received by the receiving unit 71 at the sampling point determined by the sampling point determining unit 73.

(Detection unit and sampling point determination unit)
FIG. 4 is a block diagram illustrating a specific configuration example of a detection unit 72 that detects a phase relationship with respect to the correction pattern signal RX_DATA at a plurality of duty ratios with respect to the transmission clock RX_CLK and a sampling point determination unit 73 that determines a sampling point for the serial signal. It is.

  As shown in FIG. 4, the detection unit 72 includes, for example, a PLL (Phase Locked Loop) circuit 721 as a signal generation unit and seven serial-to-parallel conversion circuits 722-0 to 722-6. . The sampling point determination unit 73 is configured by a comparison circuit 731. Note that the comparison circuit 731 also functions as a part of the detection unit 72 as described later.

  The transmission clock RX_CLK received by the receiving unit 71 is input to the PLL circuit 721 that is a signal generating unit. The PLL circuit 721 generates a plurality of signals, for example, seven sample clocks Samp_CLK0 to Samp_CLK6 by multiplying the transmission clock RX_CLK by 7 which is a multiplication number of the serial signal RX_DATA and shifting (shifting) the phase by, for example, 60 °. The signal generation unit is not limited to the PLL circuit 721, and any configuration may be used as long as it can generate a plurality of signals by multiplying the transmission clock RX_CLK and shifting the phase by a predetermined angle.

  The correction pattern signal RX_DATA received by the receiving unit 71 prior to the image data is input to the serial-to-parallel conversion circuits 722-0 to 722-6. The correction pattern signal RX_DATA has a waveform in which the 7 bits (Bit0 to Bit6) corresponding to the 6-bit image data of the serial signal and the 1-bit transmission function bit X are one cycle, and the duty ratio changes in each cycle. ing.

  As an example, the correction pattern signal RX_DATA has a waveform in which a duty ratio of 4: 3, 3: 4 is repeated every cycle. That is, Bit 0, 1, 2, 3, 4, 5, 6 of the correction pattern signal RX_DATA is a pattern example in which “1111000” and “1110000” are repeated. Here, the duty ratio of the correction pattern signal RX_DATA need not be the same as the duty ratio of the transmission clock RX_CLK, and it is important that the period is the same.

  The serial-to-parallel conversion circuits 722-0 to 722-6 convert the correction pattern signal RX_DATA from serial data to parallel data in synchronization with each of the seven sample clocks Samp_CLK0 to Samp_CLK6 generated by the PLL circuit 721. Parallel data output from the serial-to-parallel conversion circuits 722-0 to 722-6 is provided to the comparison circuit 731 as phase information of the sample clocks Samp_CLK0 to Samp_CLK6.

  The comparison circuit 731 performs pattern comparison between the phase information of the sample clocks Samp_CLK0 to Samp_CLK6 and the expected values Bit0, 1, 2, 3, 4, 5, and 6 for each duty ratio of the transmission clock RX_CLK. In this example, since the duty ratio of the correction pattern signal RX_DATA is a repetition of 4: 3, 3: 4, for example, when the duty ratio is 4: 3, the expected value Bit0, 1, 2, 3, 4, 5 , 6 is “1111000”.

  FIG. 5 shows a timing relationship between the transmission clock RX_CLK, the seven sample clocks Samp_CLK0 to Samp_CLK6, and the correction pattern signal RX_DATA. In the comparison processing by the comparison circuit 731, it is determined that the sample clock Samp_CLK * in which Bit 0 and Bit 1 are switched from logic 0 to logic 1 is the edge portion of the correction pattern signal RX_DATA.

Here, as an example for the expected value Bit 0, 1, 2, 3, 4, 5, 6 → 1111000,
Samp_CLK0: Bit 0, 1, 2, 3, 4, 5, 6 → 0111100
Samp_CLK1: Bit 0, 1, 2, 3, 4, 5, 6 → 0111100
Samp_CLK2: Bit 0, 1, 2, 3, 4, 5, 6 → 1111000
Samp_CLK3: Bit 0, 1, 2, 3, 4, 5, 6 → 1111000
Samp_CLK4: Bit 0, 1, 2, 3, 4, 5, 6 → 1111000
Samp_CLK5: Bit 0, 1, 2, 3, 4, 5, 6 → 1110001
Samp_CLK6: Bit0, 1, 2, 3, 4, 5, 6 → 1110001
Suppose that

  At this time, the comparison circuit 731 performs OK (match) determination on Samp_CLK2, Samp_CLK3, and Samp_CLK4 as a pattern comparison result with the expected values Bit0, 1, 2, 3, 4, 5, and 6, and Samp_CLK0, NG (non-coincidence) determination is performed on Samp_CLK1, Samp_CLK5, and Samp_CLK6.

  In addition to the comparison function between the sample clocks Samp_CLK0 to Samp_CLK6 and the expected value, the comparison circuit 731 also has a selection function for selecting any one of the sample clocks Samp_CLK0 to Samp_CLK6 based on the comparison result (determination result). Of the two functions of the comparison circuit 731, the comparison function is part of the function of the detection unit 72, and the selection function is part of the function of the sampling point determination unit 73.

  Any of the sample clocks Samp_CLK0 to Samp_CLK6 selected by the comparison circuit 731 determines a sampling point for the serial signal and becomes a clock for reading data (hereinafter referred to as “data reading clock”).

  When selecting the sample clock Samp_CLK, the comparison circuit 731 selects an intermediate (middle) sample clock among the plurality of sample clocks Samp_CLK when it is determined that the plurality of sample clocks Samp_CLK are OK in comparison with the expected value. To do. That is, it determines that an intermediate sample clock among a plurality of sample clocks Samp_CLK is an optimal sample clock as a data read clock, and selects the intermediate sample clock.

  In the above example, since the comparison circuit 731 determines that Samp_CLK2, Samp_CLK3, and Samp_CLK4 are OK, the intermediate Samp_CLK3 is selected as the optimum sample clock for the data read clock. Since Samp_CLK3 is the clock having the smallest phase difference with respect to the correction pattern signal RX_DATA among the sample clocks Samp_CLK0 to Samp_CLK6, it is an optimum sample clock for the data read clock.

  When there are a plurality of sample clocks Samp_CLK determined to be OK, the comparison circuit 731 selects one of them. For example, in the case of two, either one is selected, and in the case of four or more even numbers, one of the middle two is selected. The comparison circuit 731 executes the above comparison and selection processing for each duty ratio of the transmission clock RX_CLK.

  As is apparent from the above, the detection unit 72 includes a comparison function of a PLL circuit 721, serial-to-parallel conversion circuits 722-0 to 722-6, and a comparison circuit 731. The detection unit 72 performs oversampling of the transmission clock RX_CLK and detects whether or not the duty ratio of the transmission clock RX_CLK varies. When the duty ratio of the transmission clock RX_CLK varies, the detection unit 72 detects the phase relationship between the transmission clock RX_CLK and the correction pattern signal RX_DATA for each duty ratio.

  On the other hand, the sampling point determination unit 73 includes a selection function of the comparison circuit 731. The sampling point determination unit 73 determines the sampling point of the serial signal for each duty ratio from the result of the phase relationship of the transmission clock RX_CLK detected by the detection unit 72 for each duty ratio with respect to the correction pattern signal RX_DATA. This sampling point is determined by the data read clock selected by the selection function of the comparison circuit 731.

  As described above, when a plurality of sample clocks Samp_CLK are OK as a comparison result of the comparison circuit 731, the middle sample clock of the plurality of sample clocks Samp_CLK is set as an optimum sample clock as a data read clock. That is, when there are a plurality of sampling points obtained from the comparison result of the comparison circuit 731, the sampling point determination unit 73 sets an intermediate point between the plurality of sampling points as an actual sampling point.

  Here, as an example, as shown in FIG. 5, a series of processes for determining actual sampling points in the case where the transmission clock RX_CLK has a duty ratio of 2: 5, 5: 2 are shown in the flowchart of FIG. 6. Therefore, it explains.

  First, as shown in FIG. 7, the phase relationship (1) with respect to the correction pattern signal RX_DATA of the transmission clock RX_CLK at a duty ratio of 2: 5 is detected (step S11). Next, a sampling point a with a duty ratio of 2: 5 is determined based on the detected phase relationship (1) (step S12).

  Next, the phase relationship (2) with respect to the correction pattern signal RX_DATA of the transmission clock RX_CLK at a duty ratio of 5: 2 is detected (step S13). Next, a sampling point b at a duty ratio of 5: 2 is determined based on the detected phase relationship (2) (step S14).

  Here, the detection of the phase relationship of the transmission clock RX_CLK with respect to the correction pattern signal RX_DATA may be performed a plurality of times for each duty ratio. At this time, it is preferable to perform the same number of times for each duty ratio.

  As described above, the phase relationship of the transmission clock RX_CLK with respect to the correction pattern signal RX_DATA is detected using seven sample clocks Samp_CLK0 to Samp_CLK6 obtained by multiplying the transmission clock RX_CLK by 7 and shifting the phase by 60 °. By detecting this phase relationship, a change in the duty ratio of the transmission clock RX_CLK is detected.

  Subsequently, it is determined whether or not the phase difference between the sampling points a and b determined based on the phase relationships (1) and (2) is equal to or smaller than a preset phase difference (for example, 180 °) (step S15). ).

  If the phase difference between the sampling points a and b is 180 ° or less, the actual sampling point c is determined based on the sampling points a and b determined for each duty ratio of the transmission clock RX_CLK, as shown in FIG. Specifically, an intermediate point between sampling points a and b determined for each duty ratio is set as an actual sampling point c (step S16). This sampling point c is determined by the phase of the sample clock Samp_CLK obtained by multiplying the transmission clock RX_CLK by 7.

  On the other hand, as shown in FIG. 9, when the phase difference between the sampling points a and b exceeds 180 °, it is determined that sampling of the serial signal is impossible, and the transmission device 31 (see FIG. 1) of the print control device 30 is determined. In response to this, the serial signal is requested to be retransmitted (step S17). In response to the request for retransmission, the transmission apparatus 31 is requested to retransmit the serial signal with the transmission clock RX_CLK having a fixed duty ratio instead of the transmission clock RX_CLK having a plurality of duty ratios.

  In response to the retransmission request from the receiving device 21 side, the transmitting device 31 fixes the duty ratio of the transmission clock RX_CLK to one, and sends the serial signal to the receiving device 21 again using the transmission clock RX_CLK with the fixed duty ratio. Will be sent.

[Modification]
As described above, the present invention has been described using the embodiment. However, the technical scope of the present invention is not limited to the scope described in the embodiment, and various modifications can be made to the embodiment without departing from the gist of the invention. Various changes or improvements can be added, and forms to which such changes or improvements are added are also included in the technical scope of the present invention.

  For example, in the above embodiment, the case where the serial transmission system according to the present invention is applied to an image forming system has been described as an example. However, the present invention is not limited to application to an image forming system, and serial transmission is used as an information transmission technique. It can be applied to various systems.

  In the above embodiment, the PLL circuit 721 generates the seven sample clocks Samp_CLK0 to Samp_CLK6 in which the transmission clock RX_CLK is multiplied by 7 and the phase is shifted by 60 °. However, the phase to be shifted is limited to 60 °. It is not a thing.

  Furthermore, in the above embodiment, the case where the function for determining the sampling point is realized by the hardware configuration, that is, the case where it is realized by the detection unit 72 and the sampling point determination unit 73 is described as an example, but it is not limited to the hardware configuration. .

  In other words, the function for determining the sampling point is realized by a software configuration using a computer device that executes functions such as information storage processing, image processing, and arithmetic processing by executing a predetermined program. It is also possible to do. Also, it can be realized by a composite configuration of hardware and software.

  FIG. 10 is a block diagram illustrating a configuration example of a computer device having functions of the detection unit 72 and the sampling point determination unit 73 when realized by a software configuration.

  A computer device 100 that realizes a function for determining a sampling point includes a CPU (Central Processing Unit) 101, an I / O circuit 102, a ROM 103, a RAM 104, and an HDD (Hard Disk Drive Device) 105. The components are connected to each other via a bus line 106 so as to communicate with each other.

  In the computer device 100, the CPU 101 controls the overall processing including arithmetic processing. The I / O circuit 102 manages input / output with other components such as the receiving unit 71 and the sampling unit 74. The ROM 103 stores programs for various processes that are executed under the control of the CPU 101. The RAM 104 is a primary storage device used when executing the various processes. The HDD 105 stores data processed under the control of the CPU 101.

  Here, a case where the entire detection unit 72 and the sampling point determination unit 73 are realized by a software configuration has been described as an example. However, a part of them or a function of the sampling unit 74 may be realized by a software configuration. good.

  As described above, when the function for determining the sampling point is realized by a software configuration, a program that causes the computer device 100 to function as the detection unit 72 and the sampling point determination unit 73 is installed in the computer device 100 in advance. It is possible.

However, it may be provided by being stored in a storage medium that can be read by the computer device 100 instead of being installed in advance, or distributed via wired or wireless communication means. May be.

  DESCRIPTION OF SYMBOLS 10 ... Image forming system, 20 ... Image forming apparatus, 21 ... Reception apparatus, 22 ... Image processing apparatus, 23 ... Printing apparatus, 30 ... Print control apparatus, 31 ... Transmission apparatus, 41, 42 ... Client PC, 50 ... Network, 60 ... Transmission cable, 71 ... Reception unit, 72 ... Detection unit, 73 ... Sampling point determination unit, 74 ... Sampling unit

Claims (11)

A receiving unit that receives a serial signal including a signal serving as a reference in the correction process and a signal of a fixed period having a plurality of different logic ratios in one period;
A detection unit that detects a phase relationship with respect to the reference signal at a plurality of the ratios of the signal of the fixed period;
A serial signal receiving apparatus comprising: a determination unit that determines sampling points for the serial signal based on a plurality of detection results at the ratio by the detection unit. 2. The series according to claim 1, wherein the determination unit obtains sampling points of each ratio from detection results at a plurality of the ratios by the detection unit, and sets an intermediate point of the sampling points of each ratio as a sampling point for the serial signal. Signal receiving device. The serial signal is a multiplied signal;
The determination unit converts the reference signal from a serial signal to a parallel signal by multiplying the signal of the fixed period by the multiplication number of the serial signal and shifting the phase by a predetermined angle. The serial signal receiver according to claim 2, wherein the sampling points of each ratio are obtained by comparing a plurality of obtained phase information with an expected value. The determination unit uses phase information that matches the expected value among the plurality of phase information as information for determining the sampling points of each ratio, and when there are a plurality of the phase information that matches the expected value, the plurality of matches The serial signal receiver according to claim 3, wherein intermediate phase information among the phase information to be used is adopted as phase information for determining the sampling point. The determination unit obtains sampling points of each ratio from the detection results at the plurality of ratios by the detection unit, and when the phase difference of the sampling points of each ratio exceeds a predetermined phase difference, the serial signal The serial signal receiving device according to claim 1, wherein it is determined that sampling is impossible. The serial number according to claim 5, wherein when the determination unit determines that sampling of the serial signal is impossible, the transmission unit that transmits the serial signal requests retransmission with a signal having a fixed period. Signal receiving device. The serial signal receiving device according to claim 1, wherein the detection unit performs detection of a phase relationship of the signal of the fixed period with respect to the reference signal for a plurality of times at a plurality of the ratios. The serial signal receiving device according to claim 7, wherein the detection unit performs the same number of detections of a phase relationship with respect to the reference signal of the signal having the fixed period for each of the plurality of the ratios. Receiving a serial signal including a signal serving as a reference during correction processing and a signal having a fixed period having a plurality of different logic ratios in one period;
Detecting a phase relationship with respect to the reference signal at a plurality of the ratios with respect to the signal of the fixed period;
A method of receiving a serial signal, wherein a sampling point for the serial signal is determined based on the plurality of detection results at the ratio. A transmitter that converts a parallel signal into a serial signal including a signal serving as a reference in correction processing, and serially transmits a signal of a fixed period having a plurality of different logic ratios in one period together with the serial signal;
Receiving the serial signal transmitted in series from the transmission device and the signal of the fixed period, and comprising a receiving device that converts the received serial signal into a parallel signal,
The receiving device is:
A receiving unit that receives the serial signal including the reference signal and the signal of the constant period;
A detection unit that detects a phase relationship with respect to the reference signal at a plurality of the ratios of the signal of the fixed period;
A serial transmission system comprising: a determination unit that determines sampling points for the serial signal based on a plurality of detection results at the ratio by the detection unit. A receiving unit that receives a serial signal including a signal serving as a reference in the correction process and a signal of a fixed period having a plurality of different logic ratios in one period;
A detection unit that detects a phase relationship with respect to the reference signal at a plurality of the ratios of the signal of the fixed period;
An image forming apparatus comprising: a serial signal receiving device comprising: a determination unit that determines a sampling point for the serial signal based on a plurality of detection results at the ratio by the detection unit.

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