JP2011018138A5 - - Google Patents

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Publication number
JP2011018138A5
JP2011018138A5 JP2009161239A JP2009161239A JP2011018138A5 JP 2011018138 A5 JP2011018138 A5 JP 2011018138A5 JP 2009161239 A JP2009161239 A JP 2009161239A JP 2009161239 A JP2009161239 A JP 2009161239A JP 2011018138 A5 JP2011018138 A5 JP 2011018138A5
Authority
JP
Japan
Prior art keywords
control unit
information
operation mode
communication interface
memory control
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2009161239A
Other languages
English (en)
Japanese (ja)
Other versions
JP5390967B2 (ja
JP2011018138A (ja
Filing date
Publication date
Application filed filed Critical
Priority to JP2009161239A priority Critical patent/JP5390967B2/ja
Priority claimed from JP2009161239A external-priority patent/JP5390967B2/ja
Publication of JP2011018138A publication Critical patent/JP2011018138A/ja
Publication of JP2011018138A5 publication Critical patent/JP2011018138A5/ja
Application granted granted Critical
Publication of JP5390967B2 publication Critical patent/JP5390967B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

JP2009161239A 2009-07-07 2009-07-07 プロセッサシステム及びその制御方法 Expired - Fee Related JP5390967B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2009161239A JP5390967B2 (ja) 2009-07-07 2009-07-07 プロセッサシステム及びその制御方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009161239A JP5390967B2 (ja) 2009-07-07 2009-07-07 プロセッサシステム及びその制御方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2013213219A Division JP5715670B2 (ja) 2013-10-10 2013-10-10 通信装置

Publications (3)

Publication Number Publication Date
JP2011018138A JP2011018138A (ja) 2011-01-27
JP2011018138A5 true JP2011018138A5 (https=) 2012-08-16
JP5390967B2 JP5390967B2 (ja) 2014-01-15

Family

ID=43595893

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009161239A Expired - Fee Related JP5390967B2 (ja) 2009-07-07 2009-07-07 プロセッサシステム及びその制御方法

Country Status (1)

Country Link
JP (1) JP5390967B2 (https=)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6038699B2 (ja) 2013-03-22 2016-12-07 シャープ株式会社 電子機器

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02257249A (ja) * 1989-02-01 1990-10-18 Nec Corp 情報処理システム
JPH11161778A (ja) * 1997-11-26 1999-06-18 Ricoh Co Ltd デジタル画像処理システム
JP2002229692A (ja) * 2001-02-06 2002-08-16 Canon Inc 情報処理装置
JP4773693B2 (ja) * 2004-06-07 2011-09-14 キヤノン株式会社 メモリ制御システム
US7613941B2 (en) * 2005-12-29 2009-11-03 Intel Corporation Mechanism for self refresh during advanced configuration and power interface (ACPI) standard C0 power state

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