JP2011014863A - Semiconductor device - Google Patents

Semiconductor device Download PDF

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JP2011014863A
JP2011014863A JP2009286299A JP2009286299A JP2011014863A JP 2011014863 A JP2011014863 A JP 2011014863A JP 2009286299 A JP2009286299 A JP 2009286299A JP 2009286299 A JP2009286299 A JP 2009286299A JP 2011014863 A JP2011014863 A JP 2011014863A
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resin
semiconductor device
sealing resin
molded body
semiconductor element
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JP5072948B2 (en
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Seiki Hiramatsu
星紀 平松
Takashi Nishimura
隆 西村
Kazuhiro Tada
和弘 多田
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Abstract

PROBLEM TO BE SOLVED: To obtain a highly reliable semiconductor device that suppresses oxidation deterioration of a sealing resin even at a high temperature, can use the same sealing method and sealing resin as before, and has no decrease in breakdown voltage even during a heat cycle test and a reliability test of high-temperature operation etc.SOLUTION: The semiconductor device includes a semiconductor element which operates even above 150°C, a substrate, terminals, a sealing resin, wiring, a bonding material, and a case, wherein the sealing resin and parts of the case which are exposed to outside air are coated with a coating resin having a higher thermal decomposition temperature than that of the sealing resin.

Description

この発明は、１５０℃以上の高温でも動作できる半導体素子を搭載した半導体装置に関するものである。   The present invention relates to a semiconductor device including a semiconductor element that can operate even at a high temperature of 150 ° C. or higher.

産業機器や電鉄、自動車の進展に伴い、それらに使用される半導体素子の使用温度も向上している。近年、１５０℃以上の温度でも動作する半導体素子の開発が精力的に行われ、半導体素子の小型化や高耐圧化、高電流密度化が進んでいる。特に、ＳｉＣやＧａＮなどの化合物半導体は、シリコン半導体よりもバンドギャップが大きく、半導体装置の高耐圧化、小型化、高電流密度化、高温動作が期待されている。
このような特徴を持つ半導体素子を装置化するためには、１５０℃以上の温度でも長時間絶縁性を確保できる材料で半導体素子を埋設する必要がある。このような概念に基づいて、半導体素子の周辺をポリイミド樹脂またはポリアミドイミド樹脂で被覆する方法が提案されている（例えば、特許文献１参照）。 With the progress of industrial equipment, electric railways, and automobiles, the operating temperature of semiconductor elements used for them has also increased. In recent years, semiconductor devices that operate even at temperatures of 150 ° C. or higher have been energetically developed, and miniaturization, high breakdown voltage, and high current density of semiconductor devices have been advanced. In particular, compound semiconductors such as SiC and GaN have a larger band gap than silicon semiconductors, and semiconductor devices are expected to have higher breakdown voltage, smaller size, higher current density, and higher temperature operation.
In order to implement a semiconductor element having such characteristics, it is necessary to embed the semiconductor element with a material that can ensure long-term insulation even at a temperature of 150 ° C. or higher. Based on such a concept, a method of coating the periphery of a semiconductor element with a polyimide resin or a polyamideimide resin has been proposed (see, for example, Patent Document 1).

特開２００７−２５１０７６号公報JP 2007-251076 A

しかしながら、特許文献１に示す方法では、半導体素子の周囲しか耐熱性の樹脂で被覆していないため、半導体素子の発熱により半導体装置の全体が高温に曝されると、封止樹脂が外気と触れている箇所から酸化分解が進み、封止樹脂や被覆樹脂に亀裂や剥離が起こり、半導体装置の信頼性を著しく低下させる課題があった。
また、封止樹脂や被覆樹脂に亀裂や剥離が発生すると、電気的に導通を必要とする金属接合材にも亀裂や剥離を生じて、半導体装置が動作しなくなる課題があった。
また、金型を必要とする金型成形半導体装置では、被覆を行った部材が金型内に収まるようにしなければならず、半導体装置設計の自由度に制限が生じる課題があった。
また、樹脂で被覆した部材を金型で成形すると、封止樹脂の流動性や密着性が変化してしまうため、成形条件や封止樹脂の特性を変更しなければいけない課題があった。 However, in the method shown in Patent Document 1, since only the periphery of the semiconductor element is covered with a heat-resistant resin, when the entire semiconductor device is exposed to a high temperature due to heat generation of the semiconductor element, the sealing resin comes into contact with the outside air. Oxidation decomposition progresses from the location where the sealing resin or coating resin cracks and peels, and there is a problem that the reliability of the semiconductor device is significantly reduced.
Further, when a crack or peeling occurs in the sealing resin or the coating resin, there is a problem that the metal bonding material that requires electrical conduction also cracks or peels, and the semiconductor device does not operate.
Further, in a die-molded semiconductor device that requires a die, there is a problem in that the degree of freedom in designing the semiconductor device is limited because the coated member must be accommodated in the die.
In addition, when a resin-coated member is molded with a mold, the fluidity and adhesion of the sealing resin change, and there is a problem that the molding conditions and the characteristics of the sealing resin must be changed.

この発明は、前記のような課題を解決するためになされたものであり、封止樹脂が外気に触れている部分の酸化劣化が半導体装置の信頼性を左右していることが分かったため、高温下においても封止樹脂の酸化劣化を抑制し、封止方法および封止樹脂は従来通りのものを使用することができ、ヒートサイクル試験や高温動作などの信頼性試験でも、絶縁破壊電圧が低下しない、信頼性の高い半導体装置を得ることを目的とする。   The present invention has been made to solve the above-described problems, and it has been found that the oxidative deterioration of the portion where the sealing resin is in contact with the outside air affects the reliability of the semiconductor device. The oxidative degradation of the sealing resin can be suppressed even underneath, and the conventional sealing method and sealing resin can be used, and the dielectric breakdown voltage is reduced even in reliability tests such as heat cycle tests and high-temperature operations. An object is to obtain a highly reliable semiconductor device.

この発明に係る半導体装置は、１５０℃以上でも動作する半導体素子、基板、端子、封止樹脂、配線、接合材、ケースを有する半導体装置において、上記封止樹脂よりも熱分解温度の高い被覆樹脂を用いて上記封止樹脂または上記ケースが外気に触れる箇所を被覆する。   The semiconductor device according to the present invention is a semiconductor resin having a semiconductor element, a substrate, a terminal, a sealing resin, a wiring, a bonding material, and a case that operates even at 150 ° C. or higher. The portion where the sealing resin or the case comes into contact with the outside air is covered with.

この発明に係る半導体装置は、封止樹脂またはケースの外側に絶縁性の被覆樹脂を被覆することにより、内部の封止樹脂に進入する酸素の量を低下するので、高温時でも封止樹脂の酸化劣化を防止し、絶縁特性を確保できるという効果を奏する。   The semiconductor device according to the present invention reduces the amount of oxygen that enters the sealing resin inside by covering the sealing resin or the outside of the case with an insulating coating resin. There is an effect that oxidation deterioration can be prevented and insulation characteristics can be secured.

この発明の実施の形態１に係る半導体装置の断面図である。1 is a cross-sectional view of a semiconductor device according to Embodiment 1 of the present invention. この発明の実施の形態１に係る他の半導体装置の断面図である。It is sectional drawing of the other semiconductor device which concerns on Embodiment 1 of this invention. この発明の実施の形態２に係る半導体装置の断面図である。It is sectional drawing of the semiconductor device which concerns on Embodiment 2 of this invention. この発明の実施の形態２に係る他の半導体装置の断面図である。It is sectional drawing of the other semiconductor device which concerns on Embodiment 2 of this invention. この発明の実施の形態２に係る他の半導体装置の断面図である。It is sectional drawing of the other semiconductor device which concerns on Embodiment 2 of this invention. この発明の実施の形態２に係る他の半導体装置の断面図である。It is sectional drawing of the other semiconductor device which concerns on Embodiment 2 of this invention. 半導体素子の温度を１８０℃にして１０００時間動作した後の、この発明の実施の形態２に係る半導体装置の絶縁破壊電圧について測定した結果である。It is the result of having measured about the dielectric breakdown voltage of the semiconductor device which concerns on Embodiment 2 of this invention after operating for 1000 hours by setting the temperature of a semiconductor element to 180 degreeC. 半導体素子の温度を２００℃にして１０００時間動作した後の、この発明の実施の形態２に係る半導体装置の絶縁破壊電圧について測定した結果である。It is the result of having measured about the dielectric breakdown voltage of the semiconductor device which concerns on Embodiment 2 of this invention after operating the temperature of a semiconductor element at 200 degreeC for 1000 hours. 半導体素子の温度を２５０℃にして１０００時間動作した後の、この発明の実施の形態２に係る半導体装置の絶縁破壊電圧について測定した結果である。It is the result of having measured about the dielectric breakdown voltage of the semiconductor device which concerns on Embodiment 2 of this invention after operating for 1000 hours by setting the temperature of a semiconductor element to 250 degreeC. この発明の実施の形態２に係る他の半導体装置の断面図である。It is sectional drawing of the other semiconductor device which concerns on Embodiment 2 of this invention. 半導体素子の温度を１８０℃、２００℃、２５０℃にして１０００時間動作した後の、この発明の実施の形態３に係る半導体装置の絶縁破壊電圧について測定した結果である。It is the result of having measured the dielectric breakdown voltage of the semiconductor device which concerns on Embodiment 3 of this invention after operating the temperature of a semiconductor element for 180 degreeC, 200 degreeC, and 250 degreeC for 1000 hours. 半導体素子の温度を１８０℃、２００℃、２５０℃にして１０００時間動作した後の、この発明の実施の形態４に係る半導体装置の絶縁破壊電圧について測定した結果である。It is the result of having measured the dielectric breakdown voltage of the semiconductor device which concerns on Embodiment 4 of this invention after operating the temperature of a semiconductor element for 180 degreeC, 200 degreeC, and 250 degreeC for 1000 hours. 半導体素子の温度を１８０℃、２００℃、２５０℃にして１０００時間動作した後の、この発明の実施の形態５に係る半導体装置の絶縁破壊電圧について測定した結果である。It is the result of having measured the dielectric breakdown voltage of the semiconductor device which concerns on Embodiment 5 of this invention after operating the temperature of a semiconductor element for 180 degreeC, 200 degreeC, and 250 degreeC for 1000 hours. 半導体素子の温度を１８０℃、２００℃、２５０℃にして１０００時間動作した後の、この発明の実施の形態６に係る半導体装置の絶縁破壊電圧について測定した結果である。It is the result of having measured the dielectric breakdown voltage of the semiconductor device which concerns on Embodiment 6 of this invention after operating for 1000 hours by setting the temperature of a semiconductor element to 180 degreeC, 200 degreeC, and 250 degreeC. この発明の実施の形態７に係る半導体装置の透明斜視図である。It is a transparent perspective view of the semiconductor device concerning Embodiment 7 of this invention. この発明の実施の形態７に係る半導体装置の製造工程の一部である。It is a part of manufacturing process of the semiconductor device concerning Embodiment 7 of this invention. 半導体素子の温度を１８０℃、２００℃、２５０℃にして１０００時間動作した後の、この発明の実施の形態７に係る半導体装置の絶縁破壊電圧について測定した結果の一部である。7 is a part of the result of measuring the dielectric breakdown voltage of the semiconductor device according to the seventh embodiment of the present invention after operating the semiconductor element at 180 ° C., 200 ° C., and 250 ° C. for 1000 hours. 半導体素子の温度を１８０℃、２００℃、２５０℃にして１０００時間動作した後の、この発明の実施の形態７に係る半導体装置の絶縁破壊電圧について測定した結果の一部である。7 is a part of the result of measuring the dielectric breakdown voltage of the semiconductor device according to the seventh embodiment of the present invention after operating the semiconductor element at 180 ° C., 200 ° C., and 250 ° C. for 1000 hours. 半導体素子の温度を１８０℃、２００℃、２５０℃にして１０００時間動作した後の、この発明の実施の形態７に係る半導体装置の絶縁破壊電圧について測定した結果の一部である。7 is a part of the result of measuring the dielectric breakdown voltage of the semiconductor device according to the seventh embodiment of the present invention after operating the semiconductor element at 180 ° C., 200 ° C., and 250 ° C. for 1000 hours. 半導体素子の温度を１８０℃、２００℃、２５０℃にして１０００時間動作した後の、この発明の実施の形態７に係る半導体装置の絶縁破壊電圧について測定した結果の一部である。7 is a part of the result of measuring the dielectric breakdown voltage of the semiconductor device according to the seventh embodiment of the present invention after operating the semiconductor element at 180 ° C., 200 ° C., and 250 ° C. for 1000 hours. 半導体素子の温度を１８０℃、２００℃、２５０℃にして１０００時間動作した後の、この発明の実施の形態７に係る半導体装置の絶縁破壊電圧について測定した結果の一部である。7 is a part of the result of measuring the dielectric breakdown voltage of the semiconductor device according to the seventh embodiment of the present invention after operating the semiconductor element at 180 ° C., 200 ° C., and 250 ° C. for 1000 hours. 半導体素子の温度を１８０℃、２００℃、２５０℃にして１０００時間動作した後の、樹脂成形体の膜厚を変化させたこの発明の実施の形態７に係る半導体装置の絶縁破壊電圧について測定した結果である。The dielectric breakdown voltage of the semiconductor device according to the seventh embodiment of the present invention in which the film thickness of the resin molded body was changed after operating the semiconductor element at 180 ° C., 200 ° C., and 250 ° C. for 1000 hours was measured. It is a result. 半導体素子の温度を１８０℃、２００℃、２５０℃にして１０００時間動作した後の、樹脂成形体の膜厚を変化させたこの発明の実施の形態７に係る半導体装置の絶縁破壊電圧について測定した結果である。The dielectric breakdown voltage of the semiconductor device according to the seventh embodiment of the present invention in which the film thickness of the resin molded body was changed after operating the semiconductor element at 180 ° C., 200 ° C., and 250 ° C. for 1000 hours was measured. It is a result. 半導体素子の温度を１８０℃、２００℃、２５０℃にして１０００時間動作した後の、樹脂成形体の膜厚を変化させたこの発明の実施の形態７に係る半導体装置の絶縁破壊電圧について測定した結果である。The dielectric breakdown voltage of the semiconductor device according to the seventh embodiment of the present invention in which the film thickness of the resin molded body was changed after operating the semiconductor element at 180 ° C., 200 ° C., and 250 ° C. for 1000 hours was measured. It is a result. 半導体素子の温度を１８０℃、２００℃、２５０℃にして１０００時間動作した後の、樹脂成形体の膜厚を変化させたこの発明の実施の形態７に係る半導体装置の絶縁破壊電圧について測定した結果である。The dielectric breakdown voltage of the semiconductor device according to the seventh embodiment of the present invention in which the film thickness of the resin molded body was changed after operating the semiconductor element at 180 ° C., 200 ° C., and 250 ° C. for 1000 hours was measured. It is a result. この発明の実施の形態８に係る半導体装置の製造方法の一部を示す図である。It is a figure which shows a part of manufacturing method of the semiconductor device which concerns on Embodiment 8 of this invention. 金型に空けられた吸引孔の断面図である。It is sectional drawing of the suction hole vacated by the metal mold | die. 吸引孔が空けられた金型の斜視図である。It is a perspective view of the metal mold | die with which the suction hole was vacated. 吸引孔が空けられた金型の斜視図である。It is a perspective view of the metal mold | die with which the suction hole was vacated. 可動式の押さえピンを用いて樹脂成形体を金型の内面に配置固定する方法を示す図である。It is a figure which shows the method of arrange | positioning and fixing a resin molding to the inner surface of a metal mold | die using a movable pressing pin. リブ材を用いて樹脂成形体を金型の内面に配置固定する方法を示す図である。It is a figure which shows the method of arrange | positioning and fixing the resin molding to the inner surface of a metal mold | die using a rib material.

以下、本発明の半導体装置の好適な実施の形態につき図面を用いて説明する。
実施の形態１．
図１および図２は、この発明の実施の形態１に係る半導体装置の断面図である。
この発明に係る半導体素子２は、材質がシリコン（Ｓｉ）、炭化シリコン（ＳｉＣ）、窒化ガリウム（ＧａＮ）などの１５０℃以上で動作する半導体素子であり、これに限定するものではなく、１５０℃以上で動作するＰＮ接合を利用した半導体素子であれば構わない。
また、図中では、半導体素子２が１個しか搭載されていないが、これに限定するものではなく、使用される用途に応じて必要な個数の半導体素子２を搭載していても良い。 Hereinafter, preferred embodiments of a semiconductor device of the present invention will be described with reference to the drawings.
Embodiment 1 FIG.
1 and 2 are cross-sectional views of the semiconductor device according to the first embodiment of the present invention.
The semiconductor element 2 according to the present invention is a semiconductor element that operates at 150 ° C. or higher, such as silicon (Si), silicon carbide (SiC), gallium nitride (GaN), etc. Any semiconductor element using a PN junction that operates as described above may be used.
In the figure, only one semiconductor element 2 is mounted. However, the present invention is not limited to this, and a necessary number of semiconductor elements 2 may be mounted according to the intended use.

配線３は、材質がアルミニウムまたは金からなり、断面が円形の線体を用いるが、これに限定するものではなく、断面が方形の帯体を用いても良い。また図中では、半導体素子２に２本の配線３しか施されていないが、これに限定するものではなく、半導体素子２の電流密度などにより、必要な本数を設けても良い。また、配線３は、銅や錫などの金属片を溶融金属で接合しても良く、必要な電流と電圧を半導体素子２に供給できる構造であれば構わない。   The wiring 3 is made of aluminum or gold and has a circular cross section. However, the wiring 3 is not limited to this, and a strip having a square cross section may be used. In the figure, only two wirings 3 are provided on the semiconductor element 2, but the present invention is not limited to this, and a necessary number may be provided depending on the current density of the semiconductor element 2. In addition, the wiring 3 may be a structure in which metal pieces such as copper and tin may be joined with molten metal as long as a necessary current and voltage can be supplied to the semiconductor element 2.

端子４、ベース板５及び電極６は、材質として銅を用いるが、これに限定するものではなく、アルミニウムや鉄を用いても良く、これらを複合した材料を用いても良い。
また、端子４、ベース板５及び電極６の表面は、通常、ニッケルメッキを行うが、これに限定するものではなく、金メッキや錫メッキを行っても良く、必要な電流と電圧を半導体素子２に供給できる構造であれば構わない。 The terminal 4, the base plate 5, and the electrode 6 use copper as a material, but the material is not limited to this, and aluminum or iron may be used, or a composite material of these may be used.
The surfaces of the terminal 4, the base plate 5 and the electrode 6 are usually plated with nickel. However, the present invention is not limited to this, and gold plating or tin plating may be performed. Any structure can be used as long as it can be supplied.

また、銅／インバー／銅などの複合材料を用いても良く、ＳｉＣＡｌ、ＣｕＭｏなどの合金を用いても良い。図中では、半導体装置１に端子４が２本しか設けられていないが、これに限定するものではなく、回路構成上必要な本数の端子４を取出しても良い。
また、端子４及び電極６は、封止樹脂７に埋設されるため、封止樹脂７との密着性を向上させるための表面凹凸を設けても良く、化学的に結合するようにシランカップリング剤などで接着補助層を設けても良い。 Further, a composite material such as copper / invar / copper may be used, and an alloy such as SiCAl or CuMo may be used. Although only two terminals 4 are provided in the semiconductor device 1 in the drawing, the present invention is not limited to this, and the number of terminals 4 required for the circuit configuration may be taken out.
Further, since the terminals 4 and the electrodes 6 are embedded in the sealing resin 7, surface unevenness may be provided to improve the adhesion with the sealing resin 7, and silane coupling is performed so as to be chemically bonded. An adhesion auxiliary layer may be provided with an agent or the like.

基板８は、放熱性と絶縁性を備えるために、セラミック粉を分散させた樹脂硬化物を用いるが、これに限定するものではなく、セラミック板を埋め込んだ樹脂硬化物または、セラミック板でも良い。
また、使用するセラミック粉は、Ａｌ２Ｏ３、ＳｉＯ２、ＡｌＮ、ＢＮ、Ｓｉ３Ｎ４などが用いられるが、これに限定するものではなく、ダイアモンド、ＳｉＣ、Ｂ２Ｏ３などを用いても良い。
また、シリコーン樹脂やアクリル樹脂などの樹脂製の粉を用いても良い。 The substrate 8 uses a cured resin material in which ceramic powder is dispersed in order to provide heat dissipation and insulation, but is not limited to this, and may be a cured resin material in which a ceramic plate is embedded or a ceramic plate.
Moreover, although ceramic powder to be used is Al 2 O 3 , SiO 2 , AlN, BN, Si 3 N 4 or the like, it is not limited to this, and diamond, SiC, B 2 O 3 or the like is used. Also good.
Further, resin powder such as silicone resin and acrylic resin may be used.

粉形状は、球状を用いることが多いが、これに限定するものではなく、破砕状、粒状、リン片状、凝集体などを用いても良い。
粉体の充填量は、必要な放熱性と絶縁性が得られる量が充填されていれば良い。基板８に用いられる樹脂は、通常エポキシ樹脂が用いられるが、これに限定するものではなく、ポリイミド樹脂、シリコーン樹脂、アクリル樹脂などを用いても良く、絶縁性と接着性の兼ね備えた材料であれば構わない。 The powder shape is often spherical, but is not limited thereto, and a crushed shape, a granular shape, a flake shape, an aggregate, or the like may be used.
The filling amount of the powder is not limited as long as the necessary heat dissipation and insulation are obtained. The resin used for the substrate 8 is usually an epoxy resin, but is not limited to this. A polyimide resin, a silicone resin, an acrylic resin, or the like may be used, and any material having both insulating properties and adhesiveness may be used. It doesn't matter.

封止樹脂７は、通常、エポキシ樹脂を用いるが、これに限定するものではなく、シリコーン樹脂やポリイミド樹脂、アクリル樹脂などを用いることもできる。
また、通常はＡｌ２Ｏ３、ＳｉＯ２などのセラミック粉を添加して用いるが、これに限定するものではなく、ＡｌＮ、ＢＮ、Ｓｉ３Ｎ４、ダイアモンド、ＳｉＣ、Ｂ２Ｏ３などを添加しても良く、シリコーン樹脂やアクリル樹脂などの樹脂製の粉を添加しても良い。
粉形状は、球状を用いることが多いが、これに限定するものではなく、破砕状、粒状、リン片状、凝集体などを用いても良い。粉体の充填量は、必要な流動性や絶縁性や接着性が得られる量が充填されていれば良い。 The sealing resin 7 is usually an epoxy resin, but is not limited to this, and a silicone resin, a polyimide resin, an acrylic resin, or the like can also be used.
Usually, ceramic powders such as Al 2 O 3 and SiO 2 are added for use, but the present invention is not limited thereto, and AlN, BN, Si 3 N 4 , diamond, SiC, B 2 O 3 and the like are added. Alternatively, resin powder such as silicone resin or acrylic resin may be added.
The powder shape is often spherical, but is not limited thereto, and a crushed shape, a granular shape, a flake shape, an aggregate, or the like may be used. The filling amount of the powder is not limited as long as necessary fluidity, insulation and adhesiveness are obtained.

封止樹脂７の外側を被覆する被覆樹脂９は、封止樹脂７の熱分解温度をＴｍｏｌｄとし、被覆樹脂９の熱分解温度をＴｃｏａｔとすると、ＴｃｏａｔがＴｍｏｌｄ以上でなければならない。ここで、熱分解温度は、ＴＧＡ（Ｔｈｅｒｍｏｇｒａｖｉｍｅｔｒｙ ａｎａｌｙｓｙｓ）の５％重量減少時の温度として評価することができる。
また、熱分解温度は、電気規格調査会試験法（ＪＥＣ−６１５１）を用いても良く、小沢法を用いた耐熱寿命を用いても良いが、同一の評価方法において封止樹脂よりも熱分解温度の高い樹脂で被覆しなければならない。
被覆樹脂９として封止樹脂７より耐熱性の低い樹脂を使用すると、半導体素子２が発熱した際に、外気に曝されている被覆樹脂９が酸化分解して剥離や亀裂を発生させ、内部の封止樹脂７にも同様の破壊を生じさせるため、半導体装置１の信頼性を低下させてしまう。 The coating resin 9 that covers the outside of the sealing resin 7 must have Tcoat equal to or higher than Tmold, where the thermal decomposition temperature of the sealing resin 7 is Tmold and the thermal decomposition temperature of the coating resin 9 is Tcoat. Here, the thermal decomposition temperature can be evaluated as a temperature at the time of 5% weight loss of TGA (Thermogravimetry analysis).
In addition, the thermal decomposition temperature may be determined by using the electrical standard investigation committee test method (JEC-6151) or the heat resistant life using the Ozawa method, but in the same evaluation method, the thermal decomposition temperature is higher than that of the sealing resin. Must be coated with high temperature resin.
When a resin having a lower heat resistance than the sealing resin 7 is used as the coating resin 9, when the semiconductor element 2 generates heat, the coating resin 9 exposed to the outside air undergoes oxidative decomposition to cause peeling or cracking, Since the same destruction is caused in the sealing resin 7, the reliability of the semiconductor device 1 is lowered.

また、被覆樹脂９は、封止樹脂７と密着できる樹脂が良く、熱や光により硬化する樹脂が良い。好ましくは、ポリイミド樹脂、シリコーン樹脂、アミドイミド樹脂、マレイミド樹脂、エポキシ樹脂、およびそれらを使用した変性樹脂などが良いが、５％重量減少温度が、２５０℃以上の樹脂であれば良い。   The covering resin 9 is preferably a resin that can be in close contact with the sealing resin 7, and is preferably a resin that is cured by heat or light. Preferably, a polyimide resin, a silicone resin, an amideimide resin, a maleimide resin, an epoxy resin, and a modified resin using the same are used, but any resin having a 5% weight loss temperature of 250 ° C. or higher may be used.

また、被覆に使用する際、樹脂のみの硬化物を用いても良いが、Ａｌ２Ｏ３、ＳｉＯ２、ＡｌＮ、ＢＮ、Ｓｉ３Ｎ４、ダイアモンド、ＳｉＣ、Ｂ２Ｏ３などのセラミック粉を充填しても良く、樹脂製の粒子を充填しても良い。被覆に使用する樹脂に、これらの充填材を用いて、被覆樹脂９の弾性率と線膨張率を封止樹脂７の値に近づけると、更に好ましい。 Further, when used for coating, a cured product of only resin may be used, but ceramic powder such as Al 2 O 3 , SiO 2 , AlN, BN, Si 3 N 4 , diamond, SiC, B 2 O 3 is used. It may be filled, or resin particles may be filled. It is more preferable that these fillers are used for the resin used for coating, so that the modulus of elasticity and the linear expansion coefficient of the coating resin 9 are close to the value of the sealing resin 7.

また、被覆樹脂９には、カーボン、酸化鉄、ポリフェノールなど、還元作用を持つ充填材を添加しても良いが、これに限定するものではなく、被覆樹脂９および封止樹脂７の酸化劣化を軽減させるものであれば構わない。
また、充填材は、樹脂に相溶する方が好ましいが、これに限定するものではなく、非相溶の充填材を用いても構わない。 In addition, a filler having a reducing action such as carbon, iron oxide, polyphenol or the like may be added to the coating resin 9, but the present invention is not limited to this, and oxidative deterioration of the coating resin 9 and the sealing resin 7 is caused. It does not matter as long as it can be reduced.
The filler is preferably compatible with the resin, but is not limited thereto, and an incompatible filler may be used.

半導体装置１に被覆を行うには、硬化した封止樹脂７に未硬化の被覆樹脂９を塗布し、硬化させるのが良いが、この方法に限定するものではなく、スプレーコート、ディップコートやスクリーン印刷などの方法を用いても良い。
また、被覆樹脂９と封止樹脂７の密着性を向上させるために表面に凹凸を設けたり、シランカップリング剤処理などの化学的な処理を設けたりしても良い。 In order to coat the semiconductor device 1, it is preferable to apply an uncured coating resin 9 to the cured sealing resin 7 and cure it. However, the present invention is not limited to this method. A method such as printing may be used.
Further, in order to improve the adhesion between the coating resin 9 and the sealing resin 7, irregularities may be provided on the surface, or chemical treatment such as silane coupling agent treatment may be provided.

また、未硬化の被覆樹脂９は、必要な膜厚を得るために多数回塗布を行っても良い。また、１回の塗布毎に被覆樹脂９を硬化させても良く、複数回塗布を行った後に被覆樹脂９を硬化させても良い。   The uncured coating resin 9 may be applied many times in order to obtain a required film thickness. Moreover, the coating resin 9 may be cured for each application, or the coating resin 9 may be cured after being applied a plurality of times.

図１では、金型成形した半導体装置１について示すが、図２では、ケース型の半導体装置１Ｂについて説明する。端子４、配線３、電極６、基板８については前述したものと同様であるので、説明は省略する。
ケース１１は、ＰＰＳ（ポリフェニレンサルファイド）を用いるのが良いが、これに限定するものではなく、ＰＥＥＫ（ポリエーテルエーテルケトン）、ＰＢＴ（ポリブチレンテレフタレート）、ＰＥＳ（ポリエーテルサルフォン）、ＰＩ（ポリイミド）、ＰＥＩ（ポリエーテルイミド）などを用いても良く、液状の封止樹脂７を封止するためのケース形状を作製できる材料であれば構わない。 Although FIG. 1 shows the semiconductor device 1 molded with a mold, FIG. 2 illustrates a case-type semiconductor device 1B. Since the terminal 4, the wiring 3, the electrode 6, and the substrate 8 are the same as those described above, description thereof is omitted.
The case 11 may be made of PPS (polyphenylene sulfide), but is not limited thereto. PEEK (polyether ether ketone), PBT (polybutylene terephthalate), PES (polyether sulfone), PI (polyimide) ), PEI (polyetherimide) or the like may be used as long as the material can produce a case shape for sealing the liquid sealing resin 7.

また、ケース１１に使用する際、樹脂のみの硬化物を用いても良いが、Ａｌ２Ｏ３、ＳｉＯ２、ＡｌＮ、ＢＮ、Ｓｉ３Ｎ４、ダイアモンド、ＳｉＣ、Ｂ２Ｏ３などのセラミック粉を充填しても良く、樹脂製の粒子を充填しても良い。
また、粉形状は、球状を用いることが多いが、これに限定するものではなく、破砕状、粒状、リン片状、凝集体などを用いても良い。
また、ケース１１に使用する樹脂に、これらの充填材を用いて、ケース材料の弾性率と線膨張率を封止樹脂の値に近づけると、更に好ましい。 Further, when used in the case 11 may be used a cured product of the resin alone but, Al 2 O 3, SiO 2 , AlN, BN, Si 3 N 4, diamond, SiC, ceramic powders such as B 2 O 3 Or may be filled with resin particles.
The powder shape is often spherical, but is not limited thereto, and a crushed shape, a granular shape, a flake shape, an aggregate, or the like may be used.
Further, it is more preferable to use these fillers for the resin used for the case 11 so that the elastic modulus and the linear expansion coefficient of the case material are close to the value of the sealing resin.

ケース型の半導体装置１Ｂについても、金型成形を行う半導体装置１と同様に、硬化した封止樹脂７に未硬化の被覆樹脂９を塗布し、硬化させるのが良いが、この方法に限定するものではなく、スプレーコートやディップコート、転写などの方法を用いても良い。
また、被覆樹脂９と封止樹脂７の密着性を向上させるために表面に凹凸を設けたり、シランカップリング剤処理などの化学的な処理を設けたりしても良い。
また、未硬化の被覆樹脂９は、必要な膜厚を得るために多数回塗布を行っても良い。また、１回の塗布毎に被覆樹脂９を硬化させても良く、複数回塗布を行った後に被覆樹脂９を硬化させても良い。 As for the case type semiconductor device 1B, it is preferable to apply the uncured coating resin 9 to the cured sealing resin 7 and cure it, as in the case of the semiconductor device 1 that performs mold molding, but this method is limited. A method such as spray coating, dip coating, or transfer may be used instead.
Further, in order to improve the adhesion between the coating resin 9 and the sealing resin 7, irregularities may be provided on the surface, or chemical treatment such as silane coupling agent treatment may be provided.
The uncured coating resin 9 may be applied many times in order to obtain a required film thickness. Moreover, the coating resin 9 may be cured for each application, or the coating resin 9 may be cured after being applied a plurality of times.

この発明の実施の形態１に係る半導体装置１では、封止樹脂７またはケース１１の外側に絶縁性の被覆樹脂９を被覆することにより、内部の封止樹脂７に進入する酸素の量を低下するので、高温時でも封止樹脂の酸化劣化を防止し、絶縁特性を確保できる。   In the semiconductor device 1 according to Embodiment 1 of the present invention, the amount of oxygen entering the internal sealing resin 7 is reduced by coating the insulating resin 7 on the outside of the sealing resin 7 or the case 11. Therefore, it is possible to prevent the oxidative deterioration of the sealing resin even at high temperatures and to secure the insulating characteristics.

実施の形態２．
図３および図４は、この発明の実施の形態２に係る半導体装置の断面図である。
この発明の実施の形態２に係る半導体装置１Ｃは、図３に示すように、この発明の実施の形態１に係る半導体装置１と被覆樹脂９を被覆する範囲が異なっており、それ以外は同様であるので、同様な部分に同じ符号を付記し説明は省略する。
金型成形した半導体装置１Ｃの外面に被覆樹脂９を被覆するとき、半導体素子２の裏面を基準面として、半導体素子２の裏面の各辺を中心軸として基準面を半導体素子２の厚み方向の両方向に０度から２０度傾けた平面が交わる封止樹脂７の外壁には被覆樹脂９の被覆を行わず、外壁の残りには被覆樹脂９を被覆する。 Embodiment 2. FIG.
3 and 4 are sectional views of the semiconductor device according to the second embodiment of the present invention.
As shown in FIG. 3, the semiconductor device 1C according to the second embodiment of the present invention is different from the semiconductor device 1 according to the first embodiment of the present invention in the range in which the coating resin 9 is coated. Therefore, the same reference numerals are added to the same parts, and the description is omitted.
When the outer surface of the die-molded semiconductor device 1C is coated with the coating resin 9, the back surface of the semiconductor element 2 is used as a reference surface, and each side of the back surface of the semiconductor element 2 is the central axis, and the reference surface is the thickness direction of the semiconductor element 2 The outer wall of the sealing resin 7 where the planes inclined from 0 degrees to 20 degrees intersect in both directions is not coated with the coating resin 9, and the rest of the outer wall is coated with the coating resin 9.

この発明の実施の形態２に係る他の半導体装置１Ｄは、図４に示すように、この発明の実施の形態１に係る半導体装置１Ｂと被覆樹脂９を被覆する範囲が異なっており、それ以外は同様であるので、同様な部分に同じ符号を付記し説明は省略する。
ケース型半導体装置１Ｄの外面に被覆樹脂９を被覆するとき、半導体素子２の裏面を基準面として、半導体素子２の裏面の各辺を中心軸として基準面を半導体素子２の厚み方向の裏面から表面に向かう方向に０度から２０度の角度で傾いた平面が交わる封止樹脂７及びケース１１の外壁には被覆樹脂９の被覆を行わず、外壁の残りには被覆樹脂９を被覆する。 As shown in FIG. 4, another semiconductor device 1D according to the second embodiment of the present invention is different from the semiconductor device 1B according to the first embodiment of the present invention in the range in which the coating resin 9 is coated, and otherwise. Are the same, the same parts are denoted by the same reference numerals, and the description thereof is omitted.
When the coating resin 9 is coated on the outer surface of the case type semiconductor device 1D, the back surface of the semiconductor element 2 is used as a reference surface, and the reference surface is formed from the back surface in the thickness direction of the semiconductor element 2 with each side of the back surface of the semiconductor element 2 as the central axis The sealing resin 7 and the outer wall of the case 11 where the planes inclined at an angle of 0 to 20 degrees intersect in the direction toward the surface are not coated with the coating resin 9, and the remaining resin is coated with the coating resin 9.

なお、半導体素子２は通常、立方体であるため、裏面の形状は方形になる。従って、半導体素子２の裏面の交わる２つの辺を中心軸とした２つの平面と交わる封止樹脂７またはケース１１の外壁は、二重に被覆することは無く一重に被覆する。   Since the semiconductor element 2 is usually a cube, the shape of the back surface is a square. Therefore, the outer wall of the sealing resin 7 or the case 11 that intersects two planes with the two sides intersecting the back surface of the semiconductor element 2 as the central axis is covered in a single layer without being covered twice.

図５は、この発明の実施の形態２に係る他の半導体装置の透視斜視図である。
この発明の実施の形態２に係る他の半導体装置１Ｅは、図５に示すように、２個の半導体素子２が搭載されている。このように複数の半導体素子２が搭載されている場合、個々の半導体素子２による被覆領域が他の半導体素子２による被覆領域と重なるときがあるが、重なる被覆領域を２重に被覆樹脂９で被覆する必要は無く、複数の半導体素子２による全被覆領域が被覆されれば構わない。 FIG. 5 is a transparent perspective view of another semiconductor device according to the second embodiment of the present invention.
As shown in FIG. 5, another semiconductor device 1E according to the second embodiment of the present invention has two semiconductor elements 2 mounted thereon. When a plurality of semiconductor elements 2 are mounted in this way, the coverage area of each semiconductor element 2 may overlap with the coverage area of other semiconductor elements 2, but the overlapping coverage areas are doubly covered with the coating resin 9. It is not necessary to cover, and it is only necessary that the entire covered region by the plurality of semiconductor elements 2 is covered.

図６は、この発明の実施の形態２に係る他の半導体装置の断面図である。
この発明の実施の形態２に係る他の半導体装置１Ｆは、図６に示すように、この発明の実施の形態２に係る半導体装置１Ｃと被覆領域が異なり、それ以外は同様であるので、同様な部分に同じ符号を付記し説明は省略する。
この発明の実施の形態２に係る他の半導体装置１Ｆは、半導体素子２のサイズが１０×１２×０．３ｍｍ、半導体装置１のサイズが５９×７０×１５ｍｍ、電極６のサイズが４０×３０×２ｍｍ、封止樹脂７が日立化成製のＣＥＬ−１６２０ＨＦ１７、被覆樹脂９が信越化学製ＫＥ１８３３であり、被覆樹脂９の膜厚が０．２ｍｍである。 FIG. 6 is a cross-sectional view of another semiconductor device according to the second embodiment of the present invention.
Another semiconductor device 1F according to the second embodiment of the present invention is different from the semiconductor device 1C according to the second embodiment of the present invention in the covering region as shown in FIG. The same reference numerals are attached to the parts, and the description is omitted.
In another semiconductor device 1F according to the second embodiment of the present invention, the size of the semiconductor element 2 is 10 × 12 × 0.3 mm, the size of the semiconductor device 1 is 59 × 70 × 15 mm, and the size of the electrode 6 is 40 × 30. × 2 mm, the sealing resin 7 is CEL-1620HF17 manufactured by Hitachi Chemical, the coating resin 9 is KE1833 manufactured by Shin-Etsu Chemical, and the film thickness of the coating resin 9 is 0.2 mm.

そして、被覆樹脂９を被覆しない領域は、半導体素子２の裏面を基準面とし、半導体素子２の裏面の相対する２辺を中心軸として基準面を半導体素子２の厚み方向の両方向に０度からθＡ、θＢ、θＤ、θＥ度傾けた平面が交わる封止樹脂７の外壁である。なお、裏面の一辺を中心軸として傾けられた平面が交わる封止樹脂７の外壁だけ被覆樹脂９で被覆せずに、残りの外壁は全て被覆樹脂９で被覆する。 And the area | region which does not coat | cover the coating resin 9 makes the back surface of the semiconductor element 2 into a reference surface, and makes the reference surface from 0 degree | times into both directions of the thickness direction of the semiconductor element 2 centering on the 2 sides which the back surface of the semiconductor element 2 opposes. This is the outer wall of the sealing resin 7 where planes inclined by θ A , θ B , θ D , and θ E intersect. Note that only the outer wall of the sealing resin 7 intersecting with the inclined plane with one side of the back surface as the central axis is not covered with the coating resin 9, and the remaining outer walls are all covered with the coating resin 9.

図７、８、９は、それぞれ半導体素子の温度を１８０℃、２００℃、２５０℃にして１０００時間動作した後の、半導体装置の絶縁破壊電圧について測定した結果である。
この時に、θＡ、θＢ、θＤ、θＥの箇所を半導体装置の断面によって、Ａ領域、Ｂ領域、Ｄ領域、Ｅ領域の４箇所に区切り、それぞれの箇所について試験を行った。また、夫々の箇所についてθを検討する場合、他の３箇所にある封止樹脂が外気に触れるところは、全て被覆樹脂９で被覆を行った。 7, 8, and 9 show the results of measuring the breakdown voltage of the semiconductor device after operating for 1000 hours at temperatures of the semiconductor elements of 180 ° C., 200 ° C., and 250 ° C., respectively.
At this time, the locations of θ A , θ B , θ D , and θ E were divided into four locations of the A region, the B region, the D region, and the E region according to the cross section of the semiconductor device, and each portion was tested. Moreover, when examining (theta) about each location, all the places where sealing resin in other 3 locations touched external air were covered with coating resin 9.

これらの結果より、４箇所のどの部分についても、樹脂被覆を行わない開口部が２０度を超えると著しく半導体装置の絶縁特性が低下することがわかった。
しかしながら、図３に示すように、被覆樹脂９を被覆しない領域が中心軸を中心に基準面を０度から２０度傾ける平面に交わる封止樹脂７の外壁であっても、その領域内に端子４がある場合は、図１０に示すように、端子４の周囲の封止樹脂７を幅２ｍｍ以内で被覆樹脂９で被覆を行うと良く、０．０５ｍｍ以上、１ｍｍ以下であれば更に良い。 From these results, it was found that the insulation characteristics of the semiconductor device deteriorated remarkably when the opening where resin coating is not performed exceeds 20 degrees in any of the four portions.
However, as shown in FIG. 3, even if the region where the coating resin 9 is not covered is the outer wall of the sealing resin 7 intersecting with a plane in which the reference plane is inclined from 0 degrees to 20 degrees with the central axis as the center, the terminals are not included in the area. When 4 is present, as shown in FIG. 10, the sealing resin 7 around the terminal 4 may be coated with a coating resin 9 within a width of 2 mm, more preferably 0.05 mm or more and 1 mm or less.

実施の形態３．
図１１は、サイズが５０×７０×１５ｍｍ、被覆樹脂９がＴＳＥ３３３１である半導体装置を半導体素子が１８０℃、２００℃、２５０℃となるようにして１０００時間動作した後の、絶縁破壊電圧について測定した結果である。
この発明の実施の形態３に係る半導体装置は、この発明の実施の形態２に係る半導体装置１Ｇと被覆樹脂９がモメンティブ・パフォーマンス・マテリアルズ・インク製ＲＴＶゴムＴＳＥ３３３１と被覆する被覆樹脂９の厚みが０．０００５、０．００１、０．００１５、０．１、１、５、１５、１６ｍｍと可変したことが異なり、それ以外は同様であるので、同様な部分に同じ符号を付記し説明を省略する。 Embodiment 3 FIG.
FIG. 11 shows the measurement of breakdown voltage after operating a semiconductor device having a size of 50 × 70 × 15 mm and a coating resin 9 of TSE3331 for 1000 hours with semiconductor elements at 180 ° C., 200 ° C., and 250 ° C. It is the result.
In the semiconductor device according to the third embodiment of the present invention, the thickness of the coating resin 9 that the semiconductor device 1G and the coating resin 9 according to the second embodiment of the present invention coat with the RTV rubber TSE3331 made by Momentive Performance Materials, Inc. Is different from 0.0005, 0.001, 0.0015, 0.1, 1, 5, 15, 16 mm, and other than that is the same. Omitted.

この結果より、被覆する被覆樹脂９の膜厚が、０．００１ｍｍ以上、１５ｍｍ以下の時に半導体装置の絶縁信頼性が高いことが明らかになった。被覆樹脂９の膜厚が１５ｍｍを超えると、被覆樹脂９と封止樹脂７の界面に剥離が発生するために絶縁信頼性が低下したものと考えられる。   From this result, it became clear that the insulation reliability of the semiconductor device is high when the coating resin 9 to be coated has a film thickness of 0.001 mm or more and 15 mm or less. When the film thickness of the coating resin 9 exceeds 15 mm, it is considered that the insulation reliability is lowered because peeling occurs at the interface between the coating resin 9 and the sealing resin 7.

実施の形態４．
図１２は、サイズが５０×３０×１５ｍｍ、被覆樹脂９が信越化学製ＫＥ１８３３である半導体装置を半導体素子が１８０℃、２００℃、２５０℃となるようにして１０００時間動作した後の、絶縁破壊電圧について測定した結果である。
この発明の実施の形態４に係る半導体装置は、この発明の実施の形態２に係る半導体装置１Ｇと被覆樹脂９を被覆しない領域が０度から１５度の範囲であることと端子４の周囲を幅１ｍｍで被覆することと被覆する被覆樹脂９の厚みを０．０００５、０．００１、０．００１５、０．１、１、５、１５、１６ｍｍと可変したことが異なり、それ以外は同様であるので、同様な部分に同じ符号を付記し説明を省略する。 Embodiment 4 FIG.
FIG. 12 shows a dielectric breakdown after operating a semiconductor device having a size of 50 × 30 × 15 mm and a coating resin 9 of KE1833 made by Shin-Etsu Chemical for 1000 hours with the semiconductor elements at 180 ° C., 200 ° C., and 250 ° C. It is the result measured about voltage.
In the semiconductor device according to the fourth embodiment of the present invention, the region that does not cover the semiconductor device 1G and the coating resin 9 according to the second embodiment of the present invention is in the range of 0 to 15 degrees and the periphery of the terminal 4 is The difference is that the coating with a width of 1 mm and the thickness of the coating resin 9 to be coated are changed to 0.0005, 0.001, 0.0015, 0.1, 1, 5, 15, 16 mm, and the others are the same. Therefore, the same reference numerals are attached to the same parts, and the description is omitted.

この結果より、被覆する被覆樹脂９の膜厚が、０．００１ｍｍ以上、１５ｍｍ以下の時に半導体装置の絶縁信頼性が高いことが明らかになった。   From this result, it became clear that the insulation reliability of the semiconductor device is high when the coating resin 9 to be coated has a film thickness of 0.001 mm or more and 15 mm or less.

実施の形態５．
図１３は、サイズが５０×４５×１２ｍｍ、被覆樹脂９が信越化学製ＫＥ１８３３である半導体装置を半導体素子が１８０℃、２００℃、２５０℃となるようにして１０００時間動作した後の、絶縁破壊電圧について測定した結果である。
この発明の実施の形態５に係る半導体装置は、この発明の実施の形態２に係る半導体装置１Ｇと被覆樹脂９を被覆しない領域が０度から１０度の範囲であることと端子４の周囲を幅１ｍｍで被覆することと被覆する被覆樹脂９の厚みを０．０００５、０．００１、０．００１５、０．１、１、５、１５、１６ｍｍと可変したことが異なり、それ以外は同様であるので、同様な部分に同じ符号を付記し説明を省略する。 Embodiment 5 FIG.
FIG. 13 shows a dielectric breakdown after operating a semiconductor device having a size of 50 × 45 × 12 mm and a coating resin 9 of KE1833 made by Shin-Etsu Chemical for 1000 hours with the semiconductor elements at 180 ° C., 200 ° C. and 250 ° C. It is the result measured about voltage.
In the semiconductor device according to the fifth embodiment of the present invention, the area that does not cover the semiconductor device 1G and the coating resin 9 according to the second embodiment of the present invention is in the range of 0 to 10 degrees, and the periphery of the terminal 4 is The difference is that the coating with a width of 1 mm and the thickness of the coating resin 9 to be coated are changed to 0.0005, 0.001, 0.0015, 0.1, 1, 5, 15, 16 mm, and the others are the same. Therefore, the same reference numerals are attached to the same parts, and the description is omitted.

この結果より、被覆する被覆樹脂９の膜厚が、０．００１ｍｍ以上、１２ｍｍ以下の時に半導体装置の絶縁信頼性が高いことが明らかになった。   From this result, it became clear that the insulation reliability of the semiconductor device is high when the film thickness of the coating resin 9 to be coated is 0.001 mm or more and 12 mm or less.

実施の形態６．
図１４は、サイズが５０×７０×３０ｍｍ、被覆樹脂９が信越化学製ＫＥ１８３３である半導体装置を半導体素子が１８０℃、２００℃、２５０℃となるようにして１０００時間動作した後の、絶縁破壊電圧について測定した結果である。
この発明の実施の形態６に係る半導体装置は、この発明の実施の形態２に係る半導体装置１Ｇと被覆樹脂９を被覆しない領域が０度から１０度の範囲であることと端子４の周囲を幅１ｍｍで被覆することと被覆する被覆樹脂９の厚みを０．０００５、０．００１、０．００１５、０．１、１、２９、３０、３１ｍｍと可変したことが異なり、それ以外は同様であるので、同様な部分に同じ符号を付記し説明を省略する。 Embodiment 6 FIG.
FIG. 14 shows a dielectric breakdown after operating a semiconductor device having a size of 50 × 70 × 30 mm and a coating resin 9 of KE1833 made by Shin-Etsu Chemical for 1000 hours with the semiconductor elements at 180 ° C., 200 ° C., and 250 ° C. It is the result measured about voltage.
In the semiconductor device according to the sixth embodiment of the present invention, the region that does not cover the semiconductor device 1G and the coating resin 9 according to the second embodiment of the present invention is in the range of 0 to 10 degrees, and the periphery of the terminal 4 is The difference is that the coating with a width of 1 mm and the thickness of the coating resin 9 to be coated are changed to 0.0005, 0.001, 0.0015, 0.1, 1, 29, 30, 31 mm, and the others are the same. Therefore, the same reference numerals are attached to the same parts, and the description is omitted.

この結果より、被覆する被覆樹脂９の膜厚が、０．００１ｍｍ以上、３０ｍｍ以下の時に半導体装置の絶縁信頼性が高いことが明らかになった。   From this result, it became clear that the insulation reliability of the semiconductor device is high when the thickness of the coating resin 9 to be coated is 0.001 mm or more and 30 mm or less.

以上の結果より、半導体装置の厚さをＨ、幅をＷ、長さをＬとすると、Ｈ、Ｗ、Ｌのうち最も小さい値をＭとし、半導体装置に被覆する被覆樹脂９の膜厚が、０．００１ｍｍ以上、Ｍ以下であれば、良好な半導体装置の絶縁破壊特性が得られることが明らかになった。   From the above results, when the thickness of the semiconductor device is H, the width is W, and the length is L, the smallest value of H, W, and L is M, and the film thickness of the coating resin 9 covering the semiconductor device is It was revealed that good dielectric breakdown characteristics of the semiconductor device can be obtained when the thickness is 0.001 mm or more and M or less.

実施の形態７．
図１５は、この発明の実施の形態７に係る半導体装置の透明斜視図である。図１６は、この発明の実施の形態７に係る半導体装置の製造工程の一部である。
この発明の実施の形態７に係る半導体装置１Ｈは、予め作製した樹脂成形体１４を半導体素子２、端子４、電極６および基板８を金型１５内に配置し、封止樹脂７を注入することに、樹脂成形体１４が被覆樹脂９の代りを果たすことが異なり、それ以外は実施の形態１と同様である。 Embodiment 7 FIG.
FIG. 15 is a transparent perspective view of a semiconductor device according to Embodiment 7 of the present invention. FIG. 16 shows part of a manufacturing process of a semiconductor device according to the seventh embodiment of the present invention.
In a semiconductor device 1H according to Embodiment 7 of the present invention, a prefabricated resin molded body 14 is placed in a mold 15 with a semiconductor element 2, a terminal 4, an electrode 6 and a substrate 8, and a sealing resin 7 is injected. In particular, the resin molded body 14 is different from the covering resin 9 except that the rest is the same as in the first embodiment.

樹脂成形体１４は、ポリイミド樹脂（日立化成ディポン製ＰＩＸ−８１４４）にシリカ充填材を０〜５０ｗｔ％充填したワニスをガラスクロスに塗布し、溶剤を１２０℃で１５分間、続いて１５０℃で１５分間乾燥させ、続いて、面圧１９．６×１０５Ｐａで加圧成形しながら、１５０℃で１時間続いて２００℃で１時間、続いて２５０℃で３０分間加熱硬化して作製した。そして、樹脂成形体１４は、封止樹脂７の線膨張率をαとした時に、封止樹脂７の外壁と平行な方向における樹脂成形体１４の線膨張係数βが０．７α＜β＜３αとなるよう、シリカ充填材の量とガラスクロスにより調節した。 The resin molded body 14 is formed by applying a varnish obtained by filling a polyimide resin (PIX-8144 manufactured by Hitachi Chemical Dupont) with a silica filler in an amount of 0 to 50 wt% onto a glass cloth, and adding a solvent at 120 ° C. for 15 minutes, followed by 15 at 150 ° C. The film was dried for 1 minute, and then heat-cured at 150 ° C. for 1 hour, then at 200 ° C. for 1 hour, and then at 250 ° C. for 30 minutes while being molded at a surface pressure of 19.6 × 10 5 Pa. The resin molded body 14 has a linear expansion coefficient β of 0.7α <β <3α in the direction parallel to the outer wall of the sealing resin 7 when the linear expansion coefficient of the sealing resin 7 is α. The amount of silica filler and the glass cloth were adjusted so that

半導体装置１Ｈは、サイズが幅５０ｍｍ、長さ７０ｍｍ、厚さ１５ｍｍであり、樹脂成形体１４と、５．０ｍｍ□のＳｉＣ素子からなる半導体素子２を搭載した電極６や基板８などを金型１５内の所定の位置に設置した後、１７７７４Ｐａで金型１５内を減圧し、１７５℃に加熱したエポキシ樹脂（日立化成製ＣＥＬ−１６２０ＨＦ１７）を９．８×１０６Ｐａの圧力で注入し、５分以内の時間で樹脂硬化させてから、金型１５より取出し、１７５℃で６時間オーブン中で後硬化させて作製した。 The semiconductor device 1H has a width of 50 mm, a length of 70 mm, and a thickness of 15 mm. The resin molded body 14 and the electrode 6 and the substrate 8 on which the semiconductor element 2 made of a 5.0 mm □ SiC element is mounted are molded. After installing at a predetermined position in 15, the inside of the mold 15 is depressurized at 17774 Pa, and an epoxy resin (CEL-1620HF17 manufactured by Hitachi Chemical Co., Ltd.) heated to 175 ° C. is injected at a pressure of 9.8 × 10 6 Pa, After the resin was cured within 5 minutes, it was removed from the mold 15 and post-cured in an oven at 175 ° C. for 6 hours.

それから、半導体装置１を１８０℃、２００℃、２５０℃の雰囲気下で１０００時間動作した後に、半導体装置１の絶縁破壊電圧を測定した。絶縁破壊電圧は、３０秒間試験電圧を保持しながら、０．５ｋＶステップで昇圧し、短絡する電圧を求めた。   Then, after operating the semiconductor device 1 in an atmosphere of 180 ° C., 200 ° C., and 250 ° C. for 1000 hours, the breakdown voltage of the semiconductor device 1 was measured. The dielectric breakdown voltage was determined by increasing the voltage in steps of 0.5 kV while holding the test voltage for 30 seconds to short-circuit.

金型１５の内側に樹脂成形体１４を配置し、封止樹脂７を注入することで、樹脂成形体１４に押圧力を加えながら、硬化させることができ、樹脂成形体１４との密着性が向上する。
このとき、樹脂成形体１４の表面には封止樹脂７との密着性を向上させるために、シランカップリング剤などの表面処理剤を表面に塗布しても良い。
また、樹脂成形体１４の表面に凹凸を設けて、封止樹脂７との接着性を向上させても良い。 By placing the resin molded body 14 inside the mold 15 and injecting the sealing resin 7, the resin molded body 14 can be cured while applying a pressing force, and the adhesion to the resin molded body 14 is improved. improves.
At this time, a surface treatment agent such as a silane coupling agent may be applied to the surface of the resin molded body 14 in order to improve the adhesion with the sealing resin 7.
Further, unevenness may be provided on the surface of the resin molded body 14 to improve the adhesiveness with the sealing resin 7.

樹脂成形体１４は、封止樹脂７の外壁を形成する金型の面に密着するよう設置されるが、封止樹脂７を注入し、硬化させた後は、金型１５より離型されて半導体装置１Ｈと一体化する。   The resin molded body 14 is installed so as to be in close contact with the surface of the mold that forms the outer wall of the sealing resin 7, but after the sealing resin 7 is injected and cured, it is released from the mold 15. It is integrated with the semiconductor device 1H.

図１７〜図２１は、線膨張係数αが異なる封止樹脂７毎に厚さが１００μｍの樹脂成形体１４の線膨張係数βを変えた半導体装置１Ｈの１８０℃の雰囲気下で１０００時間動作させた後での絶縁破壊電圧の測定結果である。
この測定結果から分かるように、封止樹脂７の線膨張係数αが、８ｐｐｍ未満になると、樹脂成形体１４の線膨張係数βを変化させても絶縁破壊電圧は１ｋＶしか無い。
また、封止樹脂７の線膨張係数が５０ｐｐｍより大きくなっても、絶縁破壊電圧が低くなることが分かった。これは、電極材料に銅を用いているために、高温動作時に線膨張率差による熱応力が発生し、封止樹脂７と部材の間で剥離が発生するためと考えられる。 17 to 21 show an operation for 1000 hours in an atmosphere of 180 ° C. of the semiconductor device 1H in which the linear expansion coefficient β of the resin molded body 14 having a thickness of 100 μm is changed for each sealing resin 7 having a different linear expansion coefficient α. It is the measurement result of the dielectric breakdown voltage after a while.
As can be seen from this measurement result, when the linear expansion coefficient α of the sealing resin 7 is less than 8 ppm, the dielectric breakdown voltage is only 1 kV even if the linear expansion coefficient β of the resin molded body 14 is changed.
It was also found that the dielectric breakdown voltage was lowered even when the linear expansion coefficient of the sealing resin 7 was greater than 50 ppm. This is presumably because copper is used as the electrode material, so that thermal stress is generated due to a difference in linear expansion coefficient during high-temperature operation, and peeling occurs between the sealing resin 7 and the member.

そして、線膨張係数αが８〜５０ｐｐｍの間の封止樹脂７に対して樹脂成形体１４の線膨張係数βを変化させたところ、封止樹脂７の線膨張係数αに対して、樹脂成形体１４の線膨張係数βが０．７αを超え且つ３α未満であれば、高温動作後も７ｋＶという高い絶縁破壊電圧を得られる。同様の試験を２００℃と２５０℃で実施したが、封止樹脂７の線膨張係数αと樹脂成形体１４の線膨張係数βとの関係は１８０℃のときと同様であった。   And when linear expansion coefficient (beta) of the resin molding 14 was changed with respect to the sealing resin 7 whose linear expansion coefficient (alpha) is 8-50 ppm, resin molding is carried out with respect to the linear expansion coefficient (alpha) of the sealing resin 7. If the linear expansion coefficient β of the body 14 exceeds 0.7α and less than 3α, a high dielectric breakdown voltage of 7 kV can be obtained even after high temperature operation. A similar test was performed at 200 ° C. and 250 ° C., but the relationship between the linear expansion coefficient α of the sealing resin 7 and the linear expansion coefficient β of the resin molded body 14 was the same as that at 180 ° C.

次に、同じサイズの半導体装置１Ｈについて、樹脂成形体１４の膜厚を変化させた時の絶縁破壊電圧の測定結果を図２２に示す。この測定結果より、樹脂成形体１４の膜厚が、０．００１ｍｍ以上、１５ｍｍ以下の範囲に含まれているときには、半導体装置１Ｈの絶縁信頼性が高いことが明らかになった。樹脂成形体１４の膜厚が１５ｍｍを超えると、樹脂成形体１４と封止樹脂７の界面に剥離が発生するために絶縁信頼性が低下したものと考えられる。   Next, the measurement result of the dielectric breakdown voltage when the film thickness of the resin molded body 14 is changed for the semiconductor device 1H of the same size is shown in FIG. From this measurement result, it was revealed that the insulation reliability of the semiconductor device 1H is high when the film thickness of the resin molded body 14 is included in the range of 0.001 mm or more and 15 mm or less. When the film thickness of the resin molded body 14 exceeds 15 mm, it is considered that the insulation reliability is lowered because peeling occurs at the interface between the resin molded body 14 and the sealing resin 7.

図２３は、サイズが幅５０ｍｍ、長さ３０ｍｍ、厚さ１５ｍｍの半導体装置で、ポリアミドイミド（東洋紡製バイロマックス）で作製した樹脂成形体１４を使用し、１８０℃、２００℃、２５０℃の雰囲気下で１０００時間動作した後での絶縁破壊電圧の測定結果である。
この測定結果より、膜厚が０．００１ｍｍ以上且つ１５ｍｍ以下の樹脂成形体１４を使用した半導体装置の絶縁信頼性が高いことが明らかになった。 FIG. 23 is a semiconductor device having a size of 50 mm in width, 30 mm in length, and 15 mm in thickness, using a resin molded body 14 made of polyamideimide (Toyobo Viromax), and in an atmosphere of 180 ° C., 200 ° C., and 250 ° C. It is a measurement result of the breakdown voltage after operating for 1000 hours under.
From this measurement result, it became clear that the insulation reliability of the semiconductor device using the resin molded body 14 having a film thickness of 0.001 mm or more and 15 mm or less is high.

図２４は、サイズが幅５０ｍｍ、長さ３０ｍｍ、厚さ１５ｍｍの半導体装置で、ポリイミド（日立化成デュポン製ＰＩＸ−８１４４）で作製した樹脂成形体１４を使用し、１８０℃、２００℃、２５０℃の雰囲気下で１０００時間動作した後での絶縁破壊電圧の測定結果である。
この測定結果より、膜厚が０．００１ｍｍ以上且つ１２ｍｍ以下の樹脂成形体１４を使用した半導体装置の絶縁信頼性が高いことが明らかになった。 FIG. 24 shows a semiconductor device having a size of 50 mm in width, 30 mm in length, and 15 mm in thickness, using a resin molded body 14 made of polyimide (Hitachi Chemical DuPont PIX-8144), 180 ° C., 200 ° C., 250 ° C. It is a measurement result of the dielectric breakdown voltage after operating for 1000 hours in the atmosphere.
From this measurement result, it became clear that the insulation reliability of the semiconductor device using the resin molded body 14 having a film thickness of 0.001 mm or more and 12 mm or less is high.

図２５は、サイズが幅５０ｍｍ、長さ７０ｍｍ、厚さ３０ｍｍの半導体装置で、ポリイミド（日立化成デュポン製ＰＩＸ−８１４４）で作製した樹脂成形体１４を使用し、１８０℃、２００℃、２５０℃の雰囲気下で１０００時間動作した後での絶縁破壊電圧の測定結果である。
この測定結果より、膜厚が０．００１ｍｍ以上且つ３０ｍｍ以下の樹脂成形体１４を使用した半導体装置の絶縁信頼性が高いことが明らかになった。 FIG. 25 shows a semiconductor device having a width of 50 mm, a length of 70 mm, and a thickness of 30 mm, using a resin molded body 14 made of polyimide (PIX-8144 manufactured by Hitachi Chemical DuPont), 180 ° C., 200 ° C., 250 ° C. It is a measurement result of the dielectric breakdown voltage after operating for 1000 hours in the atmosphere.
From this measurement result, it became clear that the insulation reliability of the semiconductor device using the resin molded body 14 having a film thickness of 0.001 mm or more and 30 mm or less is high.

ゆえに、半導体装置の厚さをＨ、幅をＷ、長さをＬとすると、Ｈ、Ｗ、Ｌのうち最も小さい値をＭとし、半導体装置に使用する樹脂成形体１４の膜厚が、０．００１ｍｍ以上且つＭ以下であれば、良好な半導体装置の絶縁破壊特性が得られることが明らかになった。   Therefore, if the thickness of the semiconductor device is H, the width is W, and the length is L, the smallest value of H, W, and L is M, and the film thickness of the resin molded body 14 used in the semiconductor device is 0. It has been clarified that when the thickness is 0.001 mm or more and M or less, good dielectric breakdown characteristics of the semiconductor device can be obtained.

実施の形態８．
図２６は、この発明の実施の形態８に係る半導体装置の製造方法の一部を示す図である。図２７は、金型に空けられた吸引孔の断面図である。
この発明の実施の形態８に係る半導体装置は、予め吸引孔２１が空けられた金型１５の吸引口２３側に樹脂成形体１４を配置し、金型１５の吸引基２２側から樹脂成形体１４を吸引して、金型１５の内側に樹脂成形体１４が密着するように配置し、片方の金型１５には５．０ｍｍ□のＳｉＣ素子からなる半導体素子２を搭載した電極６や基板８などを金型１５内の所定の位置に設置する。その後、１７７７４Ｐａで金型１５内を減圧し、１７５℃に加熱したエポキシ樹脂（日立化成製ＣＥＬ−１６２０ＨＦ１７）を９．８×１０６Ｐａの圧力で注入し、５分以内の時間で樹脂硬化させてから、金型１５より取出し、１７５℃で６時間オーブン中で後硬化させて作製した。 Embodiment 8 FIG.
FIG. 26 is a diagram showing a part of the method of manufacturing a semiconductor device according to the eighth embodiment of the present invention. FIG. 27 is a cross-sectional view of the suction holes vacated in the mold.
In the semiconductor device according to the eighth embodiment of the present invention, the resin molded body 14 is disposed on the suction port 23 side of the mold 15 in which the suction holes 21 are previously formed, and the resin molded body is disposed from the suction base 22 side of the mold 15. 14 is disposed so that the resin molded body 14 is in close contact with the inside of the mold 15, and the electrode 6 or the substrate on which the semiconductor element 2 made of a 5.0 mm □ SiC element is mounted on one mold 15. 8 or the like is installed at a predetermined position in the mold 15. Thereafter, the inside of the mold 15 is depressurized at 17774 Pa, and an epoxy resin (CEL-1620HF17 manufactured by Hitachi Chemical Co., Ltd.) heated to 175 ° C. is injected at a pressure of 9.8 × 10 6 Pa, and the resin is cured within 5 minutes. Then, it was taken out from the mold 15 and post-cured in an oven at 175 ° C. for 6 hours.

なお、図２７に示す金型１５には、樹脂成形体１４を脱着できる様に固定するための吸引孔２１を４個設けた例を示しているが、これに限定するものではなく、吸引孔２１は、樹脂成形体１４を固定するのに必要な個数を設けて良い。
また、上述の例では吸引孔２１が半導体装置１のひとつの外壁面にしか設けられていないが、これに限定するものではなく、樹脂成形体１４を固定するのに必要な外壁面に設けて良い。
また、図２９に示す様に、吸引孔２１を複数の外壁面に跨っていても良い。
また、吸引孔２１は、円形であるのが良いが、これに限定するものではなく、矩形、三角形、楕円形などを用いても良く、樹脂成形体１４を固定するのに必要な形状であれば構わない。
また、吸引孔２１は、吸引基２２と同じサイズで形成されていてもよいが、拡幅して図２８のように吸引口２３を吸引基２２より大きくしても良い。
また、図２７に示す様に、拡幅されている部分を利用して、樹脂成形体の吸引面積を大きくすると、吸引固定の精度が高くなる。
なお、吸引孔２１から減圧する圧力をＡとし、金型１５内を減圧する圧力をＢとすると、Ｂ≦Ａでなければならない。また、吸引孔２１を使用する場合、樹脂成形体１４の金型１５と接触する面は、機密性を保つために平坦が好ましい。
また、樹脂成形体１４の金型１５への固定方法は、複数の手法を組み合わせても良い。 吸引孔を用いて吸着し、リブ材を用いて補強を行っても良い。 In addition, although the example which provided the four suction holes 21 for fixing so that the resin molding 14 can be attached or detached is shown in the metal mold | die 15 shown in FIG. 27, it is not limited to this, A suction hole is shown. 21 may be provided in the number necessary to fix the resin molded body 14.
In the above example, the suction hole 21 is provided only on one outer wall surface of the semiconductor device 1. However, the present invention is not limited to this, and the suction hole 21 is provided on the outer wall surface necessary for fixing the resin molded body 14. good.
Moreover, as shown in FIG. 29, the suction hole 21 may straddle a plurality of outer wall surfaces.
The suction hole 21 is preferably circular, but is not limited to this, and may be rectangular, triangular, elliptical, or the like, and may have a shape necessary for fixing the resin molded body 14. It doesn't matter.
The suction hole 21 may be formed in the same size as the suction base 22, but may be widened so that the suction port 23 is larger than the suction base 22 as shown in FIG.
In addition, as shown in FIG. 27, if the suction area of the resin molded body is increased by using the widened portion, the accuracy of suction fixation is increased.
It should be noted that B ≦ A, where A is the pressure at which the pressure is reduced from the suction hole 21 and B is the pressure at which the inside of the mold 15 is reduced. Moreover, when using the suction hole 21, the surface which contacts the metal mold | die 15 of the resin molding 14 is preferable flat in order to maintain confidentiality.
Moreover, the method for fixing the resin molded body 14 to the mold 15 may be a combination of a plurality of methods. Adsorption may be performed using a suction hole, and reinforcement may be performed using a rib material.

実施の形態９．
図３０には、可動式の押さえピン２６を用いて樹脂成形体１４を金型１５の内面に配置固定する方法を示す。なお、可動式の押さえピン２６は、樹脂成形体１４が金型１５に密着する位置に設けられていれば良く、図３１では２本の押さえピン２６が記載されているが、これに限定するものではなく、必要な本数だけ設けても良い。 Embodiment 9 FIG.
FIG. 30 shows a method of arranging and fixing the resin molded body 14 to the inner surface of the mold 15 using the movable pressing pin 26. The movable pressing pin 26 only needs to be provided at a position where the resin molded body 14 is in close contact with the mold 15, and although two pressing pins 26 are illustrated in FIG. 31, the present invention is limited to this. You may provide only the required number instead of a thing.

可動式の押さえピン２６は、ステンレスを用いるのが良いが、これに限定するものではなく、鉄、銅などでも良く、樹脂成形体１４を効果的に金型１５の内面に押圧できれば構わない。   The movable pressing pin 26 is preferably made of stainless steel, but is not limited to this, and may be iron, copper, or the like as long as the resin molded body 14 can be effectively pressed against the inner surface of the mold 15.

封止樹脂７を注入した後は、封止樹脂７が硬化する前に押さえピン２６を引き抜くことで、半導体装置の内部に押さえピン２６を残すことなく、また、押さえピン２６を抜いた後も封止樹脂７に空洞ができることがなく、半導体装置の絶縁性を確保することができる。   After the sealing resin 7 is injected, the pressing pin 26 is pulled out before the sealing resin 7 is cured, so that the pressing pin 26 is not left inside the semiconductor device, and also after the pressing pin 26 is pulled out. There is no void in the sealing resin 7, and the insulation of the semiconductor device can be ensured.

図３１には、リブ材２７を用いて樹脂成形体１４を金型１５の内面に配置固定する方法を示す。リブ材２７の端面は、金型１５の内面の壁面と平行になる様に形成されており、リブ材２７の伸縮力を利用して、樹脂成形体１４を配置固定することができる。
リブ材２７は、封止樹脂７注入後も半導体装置の内部に残るため、絶縁性の材料が良く、エポキシ樹脂、アクリル樹脂、ポリイミド、ポリフェニレンサルフェート（ＰＰＳ）、ポリエチレンテレフタラート（ＰＥＴ）などを用いるのが良いが、これに限定するものではなく、伸縮力を利用して、樹脂成形体１４を金型１５に押圧できるものであれば構わない。 FIG. 31 shows a method of arranging and fixing the resin molded body 14 on the inner surface of the mold 15 using the rib material 27. The end surface of the rib member 27 is formed so as to be parallel to the wall surface of the inner surface of the mold 15, and the resin molded body 14 can be arranged and fixed using the expansion / contraction force of the rib member 27.
Since the rib material 27 remains inside the semiconductor device even after the sealing resin 7 is injected, an insulating material is preferable, and epoxy resin, acrylic resin, polyimide, polyphenylene sulfate (PPS), polyethylene terephthalate (PET), or the like is used. However, the present invention is not limited to this, and any material can be used as long as it can press the resin molded body 14 against the mold 15 by using the stretching force.

なお、リブ材２７の表面は、封止樹脂７との密着性を向上させるために、シランカップリング剤などの表面処理剤を表面に塗布しても良い。
また、樹脂成形体１４の表面に凹凸を設けて、封止樹脂７との接着性を向上させても良い。 The surface of the rib member 27 may be coated with a surface treatment agent such as a silane coupling agent in order to improve adhesion with the sealing resin 7.
Further, unevenness may be provided on the surface of the resin molded body 14 to improve the adhesiveness with the sealing resin 7.

１、１Ｂ、１Ｃ、１Ｄ、１Ｅ、１Ｆ、１Ｇ、１Ｈ 半導体装置、２ 半導体素子、３ 配線、４ 端子、５ ベース板、６ 電極、７ 封止樹脂、８ 基板、９ 被覆樹脂、１１ ケース、１４ 樹脂成形体、１５ 金型、２１ 吸引孔、２２ 吸引基、２３ 吸引口、２６ 押さえピン、２７ リブ材。   1, 1B, 1C, 1D, 1E, 1F, 1G, 1H semiconductor device, 2 semiconductor element, 3 wiring, 4 terminal, 5 base plate, 6 electrode, 7 sealing resin, 8 substrate, 9 coating resin, 11 case, 14 resin moldings, 15 molds, 21 suction holes, 22 suction bases, 23 suction ports, 26 pressing pins, 27 rib materials.

Claims (5)

１５０℃以上でも動作する半導体素子、基板、端子、封止樹脂、配線、接合材、ケースを有する半導体装置において、
上記封止樹脂よりも熱分解温度の高い被覆樹脂を用いて上記封止樹脂または上記ケースが外気に触れる箇所を被覆することを特徴とする半導体装置。 In a semiconductor device having a semiconductor element, a substrate, a terminal, a sealing resin, a wiring, a bonding material, and a case that operate even at 150 ° C. or higher,
A semiconductor device characterized in that a coating resin having a higher thermal decomposition temperature than that of the sealing resin is used to cover a portion where the sealing resin or the case comes into contact with outside air. 上記半導体素子の裏面を基準面として、上記半導体素子の裏面の各辺を中心軸として上記基準面を上記半導体素子の厚み方向の少なくともいずれか一方方向に０度から２０度傾けた平面が交わる上記封止樹脂の外壁の部分を除く残りの部分に上記被覆樹脂を被覆することを特徴とする請求項１に記載の半導体装置。   A plane in which the back surface of the semiconductor element is used as a reference plane, and a plane in which the reference surface is inclined from 0 degree to 20 degrees in at least one of the thickness directions of the semiconductor element with each side of the back surface of the semiconductor element as a central axis is intersected. 2. The semiconductor device according to claim 1, wherein the coating resin is coated on a remaining portion excluding a portion of an outer wall of the sealing resin. 上記被覆樹脂の膜厚が０．００１ｍｍ以上且つ上記半導体装置の厚さ、幅、長さのうち最も小さい値以下であることを特徴とする請求項１に記載の半導体装置。   2. The semiconductor device according to claim 1, wherein the thickness of the coating resin is 0.001 mm or more and not more than the smallest value among the thickness, width, and length of the semiconductor device. 上記封止樹脂よりも熱分解温度の高い樹脂成形体を上記封止樹脂の外側に設け、
上記封止樹脂の外壁と平行な方向の上記樹脂成形体の線膨張係数βが、上記封止樹脂の線膨張係数をαとしたとき、０．７αを超え且つ３α未満であることを特徴とする請求項１に記載の半導体装置。 A resin molded body having a higher thermal decomposition temperature than the sealing resin is provided outside the sealing resin,
The linear expansion coefficient β of the resin molded body in a direction parallel to the outer wall of the sealing resin is more than 0.7α and less than 3α when the linear expansion coefficient of the sealing resin is α. The semiconductor device according to claim 1. 上記封止樹脂は上記樹脂成形体を脱着できるように固定された金型の内部に未硬化の状態で注入された後で硬化されたものであることを特徴とする請求項４に記載の半導体装置。   5. The semiconductor according to claim 4, wherein the sealing resin is hardened after being injected in an uncured state into a mold fixed so that the resin molded body can be detached. apparatus.
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