JP5328740B2 - Semiconductor device and manufacturing method of semiconductor device - Google Patents

Semiconductor device and manufacturing method of semiconductor device Download PDF

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JP5328740B2
JP5328740B2 JP2010224706A JP2010224706A JP5328740B2 JP 5328740 B2 JP5328740 B2 JP 5328740B2 JP 2010224706 A JP2010224706 A JP 2010224706A JP 2010224706 A JP2010224706 A JP 2010224706A JP 5328740 B2 JP5328740 B2 JP 5328740B2
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semiconductor element
wiring
pressing member
bonding material
semiconductor device
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JP2012079962A (en
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星紀 平松
隆 西村
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Mitsubishi Electric Corp
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    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
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    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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    • H01L2224/34—Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
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    • H01L2224/36—Structure, shape, material or disposition of the strap connectors prior to the connecting process
    • H01L2224/37—Structure, shape, material or disposition of the strap connectors prior to the connecting process of an individual strap connector
    • H01L2224/37001—Core members of the connector
    • H01L2224/37099—Material
    • H01L2224/371—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
    • H01L2224/37138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
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    • H01L2224/4805—Shape
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    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
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    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
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    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
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    • H01L2924/181—Encapsulation
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    • H01L2924/351—Thermal stress

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Description

この発明は、半導体装置、特に高温で動作する半導体装置の実装構造に関するものである。   The present invention relates to a mounting structure of a semiconductor device, particularly a semiconductor device that operates at a high temperature.

産業機器や電鉄、自動車の進展に伴い、それらに使用される半導体素子の使用温度も向上している。近年、高温でも動作する半導体素子の開発が精力的に行われ、半導体素子の小型化や高耐圧化、高電流密度化が進んでいる。特に、SiCやGaNなどのワイドバンドギャップ半導体は、Si半導体よりもバンドギャップが大きく、半導体装置の高耐圧化、小型化、高電流密度化、高温動作が期待されている。このような特徴を持つ半導体素子を装置化するためには、半導体素子が１５０℃以上の高温で動作する場合も、接合材のクラックや配線の劣化を抑えて半導体装置の安定な動作を確保する必要がある。   With the progress of industrial equipment, electric railways, and automobiles, the operating temperature of semiconductor elements used for them has also increased. In recent years, semiconductor devices that operate even at high temperatures have been energetically developed, and miniaturization, high breakdown voltage, and high current density of semiconductor devices have been advanced. In particular, wide bandgap semiconductors such as SiC and GaN have a larger bandgap than Si semiconductors, and semiconductor devices are expected to have higher breakdown voltage, smaller size, higher current density, and higher temperature operation. In order to implement a semiconductor element having such characteristics as an apparatus, even when the semiconductor element operates at a high temperature of 150 ° C. or higher, a stable operation of the semiconductor device is ensured by suppressing the crack of the bonding material and the deterioration of the wiring. There is a need.

このような概念に基づいて、例えば特許文献１では、ポリイミドまたは、ポリエーテルアミドを用いて半導体素子を２度コーティングする３層構造にし、半導体素子に近いコーティング材の弾性率が、その上のコーティング層の弾性率よりも大きくする方法が提案されている。また、特許文献２では、シリコーンゴムを用いて半導体素子をコーティングし、その上から封止樹脂で封止する方法が提案されている。   Based on such a concept, for example, in Patent Document 1, a semiconductor element is coated twice using polyimide or polyether amide, and the elastic modulus of the coating material close to the semiconductor element depends on the coating thereon. A method of making the elastic modulus larger than the elastic modulus of the layer has been proposed. Patent Document 2 proposes a method in which a semiconductor element is coated with silicone rubber and then sealed with a sealing resin.

特開平１０−２０９３４４号公報JP-A-10-209344 特開平８−３３０４７７号公報JP-A-8-330477

しかしながら、特許文献１に示された方法では、半導体素子に近いコーティング材の弾性率を高くしてあるが、半導体素子に近いコーティングの弾性率が高いと、半導体素子との間に発生する熱応力が高く、パワーサイクル試験やヒートサイクル試験などの信頼性試験で、コーティング樹脂の剥離やクラックが発生し、その結果、半導体素子の絶縁性や半導体素子を搭載する接合材にクラックや剥離が発生して半導体装置の信頼性を損ねるという課題があった。また、特許文献２に示された方法の様に半導体素子と配線を一体にコーティングすると、水分の浸入は防げるがコーティングの樹脂の膨張収縮により、配線を疲労破壊させてしまったり、半導体装置の信頼性を著しく損ねてしまったりする課題があった。   However, in the method disclosed in Patent Document 1, the elastic modulus of the coating material close to the semiconductor element is increased. However, if the elastic modulus of the coating close to the semiconductor element is high, thermal stress generated between the semiconductor element and the semiconductor element is high. In the reliability test such as power cycle test and heat cycle test, the coating resin peels off and cracks occur, and as a result, the insulation of the semiconductor element and the bonding material on which the semiconductor element is mounted crack and peel. Therefore, there is a problem that the reliability of the semiconductor device is impaired. In addition, when the semiconductor element and the wiring are integrally coated as in the method disclosed in Patent Document 2, the intrusion of moisture can be prevented, but the wiring can be fatigued and destroyed due to the expansion and contraction of the coating resin, and the reliability of the semiconductor device can be reduced. There was a problem that the performance was significantly impaired.

この発明は、上記のような問題点を解決するためになされたものであり、半導体素子が繰り返し高温で動作してヒートサイクルを受ける場合も、接合材のクラックや配線の劣化による動作不良を起こし難い信頼性の高い半導体装置を得ることを目的とする。   The present invention has been made to solve the above problems, and even when a semiconductor element repeatedly operates at a high temperature and undergoes a heat cycle, it causes a malfunction due to a crack in the bonding material or deterioration of the wiring. An object is to obtain a difficult and highly reliable semiconductor device.

この発明は、絶縁基板上に設けられた電極パターン上面に接合材を介して半導体素子が固着された半導体素子基板を金属のベース板上に配置し、少なくとも絶縁基板および半導体素子を封止樹脂により被覆した半導体装置において、半導体素子の電極パターンに接合された面とは逆の面の一部と接触するように、封止樹脂よりも線膨張率が大きい膨張押圧部材を封止樹脂で被覆されるように設けたものである。   According to the present invention, a semiconductor element substrate having a semiconductor element fixed to an upper surface of an electrode pattern provided on an insulating substrate via a bonding material is disposed on a metal base plate, and at least the insulating substrate and the semiconductor element are made of a sealing resin. In the coated semiconductor device, an expansion pressing member having a linear expansion coefficient larger than that of the sealing resin is coated with the sealing resin so as to contact a part of the surface opposite to the surface bonded to the electrode pattern of the semiconductor element. It is provided as follows.

この発明に係る半導体装置は上記のように構成されているため、高温動作時に膨張押圧部材が膨張しようとする圧力により、接合材に圧力が印加されるため、接合材の膨張が抑えられる結果、熱サイクルによる膨張収縮が抑えられて接合材のクラックや配線の劣化による動作不良を起こし難い信頼性の高い半導体装置を得ることができる。   Since the semiconductor device according to the present invention is configured as described above, pressure is applied to the bonding material due to the pressure at which the expansion pressing member is expanded during high-temperature operation, so that the expansion of the bonding material is suppressed. It is possible to obtain a highly reliable semiconductor device in which expansion and contraction due to thermal cycle is suppressed and operation failure due to cracking of the bonding material or deterioration of the wiring hardly occurs.

この発明の実施の形態１による半導体装置の概略構造を封止樹脂および配線を省略して示す上面図である。1 is a top view showing a schematic structure of a semiconductor device according to a first embodiment of the present invention with a sealing resin and wiring omitted. この発明の実施の形態１による半導体装置の、図１のＡ−Ａ位置での断面図である。2 is a cross-sectional view of the semiconductor device according to the first embodiment of the present invention at the position AA in FIG. この発明の実施の形態１による半導体装置の要部の一例を示す拡大断面図である。It is an expanded sectional view which shows an example of the principal part of the semiconductor device by Embodiment 1 of this invention. この発明の実施の形態２による半導体装置の、図１のＡ−Ａ位置に相当する位置での断面図である。It is sectional drawing in the position corresponded to the AA position of FIG. 1 of the semiconductor device by Embodiment 2 of this invention. この発明の実施の形態３による半導体装置の要部の一例を示す拡大断面図である。It is an expanded sectional view which shows an example of the principal part of the semiconductor device by Embodiment 3 of this invention. この発明の実施の形態４の実施例３による半導体装置の寿命試験結果を示す表である。It is a table | surface which shows the lifetime test result of the semiconductor device by Example 3 of Embodiment 4 of this invention. この発明の実施の形態４の実施例１による半導体装置のパワーサイクル試験結果を示す表である。It is a table | surface which shows the power cycle test result of the semiconductor device by Example 1 of Embodiment 4 of this invention. この発明の実施の形態４の実施例２による半導体装置のパワーサイクル試験結果を示す表である。It is a table | surface which shows the power cycle test result of the semiconductor device by Example 2 of Embodiment 4 of this invention. この発明の実施の形態４の実施例３による半導体装置パワーサイクル試験結果を示す表である。It is a table | surface which shows the semiconductor device power cycle test result by Example 3 of Embodiment 4 of this invention. この発明の実施の形態５による半導体装置の製造工程を示すフロー図である。It is a flowchart which shows the manufacturing process of the semiconductor device by Embodiment 5 of this invention.

実施の形態１．
図１は、本発明の実施の形態１による半導体装置の構造であって、封止樹脂と配線を省略して示す基本構造の上面図、図２は図１のＡ−Ａ位置に相当する位置で切断した断面図であり封止樹脂１２と配線１３を含めて示している。絶縁基板１の上面に電極パターン２、裏面に裏面電極３が貼られた半導体素子基板４の電極パターン２の表面に半導体素子５、６がはんだなどの接合材７、７０で固着されている。ここで、例えば半導体素子５は大電流を制御するＭＯＳＦＥＴのような電力用半導体素子であり、半導体素子６は例えば電力用半導体素子５に並列に設けられる還流用のダイオードである。半導体素子基板４は裏面電極３側がベース板１０に固着されており、ベース板１０が底板となり、このベース板１０とケース側板１１とでケースが形成され、このケース内に封止樹脂１２を注入してモールドする。各半導体素子には各半導体素子の電極などを外部に電気接続するための配線１３が接続され、配線１３が端子１４に接続されている。大電流を制御し発熱が大きい電力用半導体素子５の上面（電極パターン２に接合された面とは逆の面）には、この上面の一部と接触するように膨張押圧部材９が５箇所設けられている。また、膨張押圧部材９１が、接合材７が半導体素子５の周囲にはみ出した部分を覆うように設けられている。一方、発熱が小さい半導体素子６には膨張押圧部材を設けていない。 Embodiment 1 FIG.
1 is a top view of a basic structure showing a structure of a semiconductor device according to a first embodiment of the present invention, in which sealing resin and wiring are omitted, and FIG. 2 is a position corresponding to the position AA in FIG. It is sectional drawing cut | disconnected by (4), and is shown including the sealing resin 12 and the wiring 13. FIG. The semiconductor elements 5 and 6 are fixed to the surface of the electrode pattern 2 of the semiconductor element substrate 4 in which the electrode pattern 2 is pasted on the upper surface of the insulating substrate 1 and the back electrode 3 is pasted on the back surface with bonding materials 7 and 70 such as solder. Here, for example, the semiconductor element 5 is a power semiconductor element such as a MOSFET that controls a large current, and the semiconductor element 6 is, for example, a free-wheeling diode provided in parallel with the power semiconductor element 5. The semiconductor element substrate 4 is fixed to the base plate 10 on the back electrode 3 side, and the base plate 10 serves as a bottom plate. A case is formed by the base plate 10 and the case side plate 11, and a sealing resin 12 is injected into the case. And mold. Each semiconductor element is connected to a wiring 13 for electrically connecting an electrode of each semiconductor element to the outside, and the wiring 13 is connected to a terminal 14. On the upper surface (the surface opposite to the surface bonded to the electrode pattern 2) of the power semiconductor element 5 that controls a large current and generates a large amount of heat, five expansion pressing members 9 are in contact with a part of the upper surface. Is provided. Further, the expansion pressing member 91 is provided so as to cover a portion where the bonding material 7 protrudes around the semiconductor element 5. On the other hand, the expansion pressing member is not provided in the semiconductor element 6 that generates little heat.

本発明は、電力用半導体素子として、１５０℃以上で動作する半導体素子に適用すると効果が大きい。特に、炭化珪素（SiC）、窒化ガリウム（GaN）系材料またはダイヤモンドといった材料で形成された、珪素（Si）に比べてバンドギャップ大きい、いわゆるワイドバンドギャップ半導体に適用すると効果が大きい。また、図１では、一つのモールドされ
た半導体装置に半導体素子が４個しか搭載されていないが、これに限定するものではなく、使用される用途に応じて必要な個数の半導体素子を搭載することができる。 The present invention has a great effect when applied to a semiconductor element operating at 150 ° C. or more as a power semiconductor element. In particular, the present invention is highly effective when applied to a so-called wide band gap semiconductor made of a material such as silicon carbide (SiC), gallium nitride (GaN) -based material, or diamond and having a larger band gap than silicon (Si). Further, in FIG. 1, only four semiconductor elements are mounted on a single molded semiconductor device. However, the present invention is not limited to this, and a necessary number of semiconductor elements are mounted according to the intended use. be able to.

電極パターン２、裏面電極３、ベース板１０および端子１４は、通常銅を用いるが、これに限定するものではなく、アルミや鉄を用いても良く、これらを複合した材料を用いても良い。また表面は、通常、ニッケルメッキを行うが、これに限定するものではなく、金や錫メッキを行っても良く、必要な電流と電圧を半導体素子に供給できる構造であれば構わない。また、銅/インバー/銅などの複合材料を用いても良く、SiCAl、CuMoなどの合金
を用いても良い。また、端子１４及び電極パターン２は、封止樹脂１２に埋設されるため、樹脂との密着性を向上させるため表面に微小な凹凸を設けても良く、化学的に結合するようにシランカップリング剤などで接着補助層を設けても良い。 The electrode pattern 2, the back electrode 3, the base plate 10, and the terminal 14 are usually made of copper, but are not limited to this, and aluminum or iron may be used, or a composite material of these may be used. The surface is usually nickel-plated, but the present invention is not limited to this, and gold or tin-plating may be performed, as long as a necessary current and voltage can be supplied to the semiconductor element. Further, a composite material such as copper / invar / copper may be used, and an alloy such as SiCAl or CuMo may be used. In addition, since the terminal 14 and the electrode pattern 2 are embedded in the sealing resin 12, minute unevenness may be provided on the surface in order to improve adhesion with the resin, and silane coupling so as to be chemically bonded. An adhesion auxiliary layer may be provided with an agent or the like.

半導体素子基板４は、Al2O3、SiO2、AlN、BN、Si3N4などのセラミックの絶縁基板１に
銅やアルミの電極パターン２および裏面電極３を設けてあるものを指す。半導体素子基板４は、放熱性と絶縁性を備えることが必要であり、上記に限らず、セラミック粉を分散させた樹脂硬化物、あるいはセラミック板を埋め込んだ樹脂硬化物のような絶縁基板１に電極パターン２および裏面電極３を設けたものでも良い。また、絶縁基板１に使用するセラミック粉は、Al2O3、SiO2、AlN、BN、Si3N4などが用いられるが、これに限定するもので
はなく、ダイヤモンド、SiC、B2O3、などを用いても良い。また、シリコーン樹脂やアク
リル樹脂などの樹脂製の粉を用いても良い。粉形状は、球状を用いることが多いが、これに限定するものではなく、破砕状、粒状、リン片状、凝集体などを用いても良い。粉体の充填量は、必要な放熱性と絶縁性が得られる量が充填されていれば良い。絶縁基板１に用いる樹脂は、通常エポキシ樹脂が用いられるが、これに限定するものではなく、ポリイミド樹脂、シリコーン樹脂、アクリル樹脂などを用いても良く、絶縁性と接着性を兼ね備えた材料であれば構わない。 The semiconductor element substrate 4 refers to a substrate in which a copper or aluminum electrode pattern 2 and a back electrode 3 are provided on a ceramic insulating substrate 1 such as Al 2 O 3 , SiO 2 , AlN, BN, Si 3 N 4 or the like. The semiconductor element substrate 4 is required to have heat dissipation and insulating properties, and is not limited to the above, and the insulating substrate 1 such as a cured resin material in which ceramic powder is dispersed or a cured resin material in which a ceramic plate is embedded is used. An electrode pattern 2 and a back electrode 3 may be provided. The ceramic powder used for the insulating substrate 1 is Al 2 O 3 , SiO 2 , AlN, BN, Si 3 N 4, etc., but is not limited to this, and diamond, SiC, B 2 O 3 , Etc. may be used. Further, resin powder such as silicone resin and acrylic resin may be used. The powder shape is often spherical, but is not limited thereto, and a crushed shape, a granular shape, a flake shape, an aggregate, or the like may be used. The filling amount of the powder is not limited as long as the necessary heat dissipation and insulation are obtained. The resin used for the insulating substrate 1 is usually an epoxy resin, but is not limited to this, and a polyimide resin, a silicone resin, an acrylic resin, or the like may be used as long as the material has both insulating properties and adhesiveness. It doesn't matter.

配線１３は、アルミまたは金でできた断面が円形の線体を用いるが、これに限定するものではなく、例えば断面が方形の銅板を帯状にしたものを用いても良い。また図２では、半導体素子に３本の配線しか施されていないが、これに限定するものではなく、半導体素子の電流密度などにより、必要な本数を設けることができる。また、配線１３は、銅や錫などの金属片を溶融金属で接合しても良く、必要な電流と電圧を半導体素子に供給できる構造であれば構わない。   The wiring 13 uses a wire body having a circular cross section made of aluminum or gold, but is not limited to this, and for example, a copper plate having a rectangular cross section may be used. In FIG. 2, only three wirings are provided in the semiconductor element. However, the number is not limited to this, and a necessary number can be provided depending on the current density of the semiconductor element. The wiring 13 may be a structure in which metal pieces such as copper and tin may be joined with molten metal as long as a necessary current and voltage can be supplied to the semiconductor element.

封止樹脂１２および膨張押圧部材９は、通常、エポキシ樹脂を用いるが、これに限定するものではなく、シリコーン樹脂やポリイミド樹脂、アクリル樹脂などを用いることもできる。また、通常は熱膨張率などを調整するためAl2O3、SiO2などのセラミック粉を添加
して用いるが、これに限定するものではなく、AlN、BN、Si3N4、ダイヤモンド、SiC、B2O3などを添加しても良く、シリコーン樹脂やアクリル樹脂などの樹脂製の粉を添加しても
良い。粉形状は、球状を用いることが多いが、これに限定するものではなく、破砕状、粒状、リン片状、凝集体などを用いても良い。粉体の充填量は、必要な流動性や絶縁性や接着性が得られる量であれば良い。 The sealing resin 12 and the expansion pressing member 9 are usually made of epoxy resin, but are not limited to this, and silicone resin, polyimide resin, acrylic resin, or the like can also be used. In addition, ceramic powder such as Al 2 O 3 and SiO 2 is usually added to adjust the coefficient of thermal expansion, etc., but is not limited to this. AlN, BN, Si 3 N 4 , diamond, SiC B 2 O 3 or the like may be added, or resin powder such as silicone resin or acrylic resin may be added. The powder shape is often spherical, but is not limited thereto, and a crushed shape, a granular shape, a flake shape, an aggregate, or the like may be used. The filling amount of the powder may be an amount that can provide the necessary fluidity, insulation, and adhesiveness.

ここで、膨張押圧部材９および９１と封止樹脂１２は、添加物などが異なり、膨張押圧部材９および９１の線膨張率は封止樹脂１２の線膨張率よりも大きい材料となっている。膨張押圧部材９および９１が封止樹脂１２に密着して覆われるように設けられており、膨張押圧部材９および９１の線膨張率が封止樹脂１２の線膨張率よりも大きいため、半導体素子５の発熱により温度が上がった場合、膨張押圧部材９および９１が封止樹脂１２よりも膨張しようとするため圧力が発生する。このため、半導体素子５の上面に設けられた膨張押圧部材９により半導体素子５を電極パターン２側に押し付ける圧力がかかる。また、接合材７の周辺に設けられた膨張押圧部材９１により接合材７に直接圧力がかかる。以上
のようにして、接合材７の膨張を抑える力が働き、接合材７の剥離や亀裂を抑制することができる。 Here, the expansion pressing members 9 and 91 and the sealing resin 12 are different in additives and the like, and the linear expansion coefficient of the expansion pressing members 9 and 91 is a material larger than the linear expansion coefficient of the sealing resin 12. Since the expansion pressing members 9 and 91 are provided so as to be in close contact with the sealing resin 12 and the linear expansion coefficient of the expansion pressing members 9 and 91 is larger than the linear expansion coefficient of the sealing resin 12, the semiconductor element When the temperature rises due to the heat generation of 5, pressure is generated because the expansion pressing members 9 and 91 try to expand more than the sealing resin 12. For this reason, the pressure which presses the semiconductor element 5 to the electrode pattern 2 side by the expansion press member 9 provided in the upper surface of the semiconductor element 5 is applied. Further, pressure is directly applied to the bonding material 7 by the expansion pressing member 91 provided around the bonding material 7. As described above, the force for suppressing the expansion of the bonding material 7 works, and the peeling and cracking of the bonding material 7 can be suppressed.

図１に示す半導体装置では、膨張押圧部材は、半導体素子上に５箇所、接合材の周囲全面に設けたが、これに限定するものではなく、膨張押圧部材が膨張することにより半導体素子および接合材に圧力が印加される位置であれば、必要な箇所に設けて良い。ただし、配線１３の下部に接しないよう設けるのが好ましい。   In the semiconductor device shown in FIG. 1, the expansion pressing member is provided on the semiconductor element at five locations around the entire surface of the bonding material. However, the present invention is not limited to this. If it is a position where pressure is applied to the material, it may be provided at a necessary position. However, it is preferable not to contact the lower portion of the wiring 13.

図３に膨張押圧部材９が半導体素子５の上部に設けられた、封止樹脂１２で覆われる前の様子の一例の要部拡大図を示す。ここでは、膨張押圧部材９は、ディスペンサを用いて突起状に形成している。膨張押圧部材９を突起状に形成することで、温度が上昇して線膨張率がより小さい封止樹脂１２で覆われた状態で半導体素子５を抑える圧力を強くすることができる。ただし、膨張押圧部材９を、未硬化の樹脂溶液を多数の細孔から噴射して設けても良く、必要な形状の型を設けて成形しても良い。   FIG. 3 is an enlarged view of a main part of an example of a state before the expansion pressing member 9 is provided on the semiconductor element 5 and covered with the sealing resin 12. Here, the expansion pressing member 9 is formed in a protruding shape using a dispenser. By forming the expanding and pressing member 9 in a protruding shape, it is possible to increase the pressure for suppressing the semiconductor element 5 in the state where the temperature is increased and the sealing resin 12 is covered with a smaller linear expansion coefficient. However, the expansion pressing member 9 may be provided by spraying an uncured resin solution from a large number of pores, or may be formed by providing a mold having a necessary shape.

半導体素子が高温で動作すると、半導体素子の周囲にある封止樹脂、コーティングや接合材が熱膨張し、半導体素子が動作を止めると、熱収縮が起こる。従来の半導体装置では、この際に接合材に剥離や亀裂が発生し、半導体装置の信頼性を著しく低下させていた。しかしながら、上述したように、半導体素子の上部や接合材の周辺に封止樹脂１２より線膨張率の大きな膨張押圧部材９や９１が存在すると、半導体素子や接合材が膨張する際も線膨張率の高い膨張押圧部材９や９１が封止樹脂１２よりも膨張しようとするため圧力が発生して、接合材７の膨張を抑えるため、接合材の膨張・収縮の熱サイクルが抑制され接合材の剥離や亀裂を防止することができ、信頼性の高い半導体装置を得ることができる。   When the semiconductor element operates at a high temperature, the sealing resin, coating, and bonding material around the semiconductor element thermally expands, and when the semiconductor element stops operating, thermal contraction occurs. In the conventional semiconductor device, peeling or cracking occurs in the bonding material at this time, and the reliability of the semiconductor device is significantly reduced. However, as described above, when the expansion pressing members 9 and 91 having a linear expansion coefficient larger than that of the sealing resin 12 are present in the upper part of the semiconductor element and around the bonding material, the linear expansion coefficient is also increased when the semiconductor element and the bonding material expand. In order to suppress the expansion of the bonding material 7, the thermal expansion and contraction thermal cycle of the bonding material is suppressed and the bonding material 7 is suppressed. Separation and cracking can be prevented, and a highly reliable semiconductor device can be obtained.

なお、図１、図２では、膨張押圧部材を半導体素子５の上面５箇所および接合材７の周辺に設けたが、接合材７の周辺には必ずしも設ける必要は無い。膨張押圧部材は、少なくとも、半導体素子５の上面、すなわち半導体素子５の電極パターン２に接合された面とは逆の面の一部と接触するように設けることで、本発明の効果を奏する。また、膨張押圧部材９１を接合材７の周辺に設ける場合、半導体素子５と電極パターン２との間から外部に露出している接合材７を被覆するように設ければ良い。   In FIG. 1 and FIG. 2, the expansion pressing member is provided at five locations on the upper surface of the semiconductor element 5 and around the bonding material 7, but is not necessarily provided around the bonding material 7. The expansion pressing member is provided so as to be in contact with at least a part of the upper surface of the semiconductor element 5, that is, a surface opposite to the surface bonded to the electrode pattern 2 of the semiconductor element 5. Further, when the expansion pressing member 91 is provided around the bonding material 7, the expansion pressing member 91 may be provided so as to cover the bonding material 7 exposed to the outside from between the semiconductor element 5 and the electrode pattern 2.

実施の形態２．
図４は、本発明の実施の形態２による半導体装置の構造を示す断面図である。図４において、図２と同一符号は、同一または相当する部分を示す。本実施の形態２では、配線１３１、１３２として銅板を用いている。高温になる半導体素子５への配線１３１は接合材７１で接合されており、配線１３１の上部に膨張押圧部材９２を設けている。一方、半導体素子６と配線１３２が接合材７２で接合されているが、半導体素子６は発熱が少なく温度上昇が小さいため、接合材７２の膨張も小さいので膨張押圧部材は設けていない。 Embodiment 2. FIG.
FIG. 4 is a cross-sectional view showing the structure of the semiconductor device according to the second embodiment of the present invention. 4, the same reference numerals as those in FIG. 2 denote the same or corresponding parts. In the second embodiment, copper plates are used as the wirings 131 and 132. The wiring 131 to the semiconductor element 5 that is at a high temperature is bonded by a bonding material 71, and an expansion pressing member 92 is provided on the wiring 131. On the other hand, the semiconductor element 6 and the wiring 132 are bonded by the bonding material 72. However, since the semiconductor element 6 generates little heat and the temperature rise is small, the expansion of the bonding material 72 is small, so that no expansion pressing member is provided.

本実施の形態２では、半導体素子５の上部に設けた膨張押圧部材９や、半導体素子５と電極パターン２の接合材７の周辺に設けた膨張押圧部材９１に加えて、配線１３１の上部（半導体素子と接合された面とは反対の面）に膨張押圧部材９２を設けた。このため、半導体素子５が発熱して高温となった場合、半導体素子５と電極パターン２とを接合する接合材７だけでなく、半導体素子５と配線１３１とを接合する接合材７１にも圧力がかかり、接合材７１の膨張を抑える。このため、半導体素子５と電極パターン２とを接合する接合材７だけでなく、半導体素子５と配線１３１とを接合する接合材７１についても剥離や亀裂を防止することができ、信頼性の高い半導体装置を得ることができる。   In the second embodiment, in addition to the expansion pressing member 9 provided on the upper part of the semiconductor element 5 and the expansion pressing member 91 provided on the periphery of the bonding material 7 between the semiconductor element 5 and the electrode pattern 2, the upper part of the wiring 131 ( The expansion pressing member 92 is provided on the surface opposite to the surface bonded to the semiconductor element. For this reason, when the semiconductor element 5 generates heat and becomes high temperature, the pressure is applied not only to the bonding material 7 that bonds the semiconductor element 5 and the electrode pattern 2 but also to the bonding material 71 that bonds the semiconductor element 5 and the wiring 131. And the expansion of the bonding material 71 is suppressed. For this reason, not only the bonding material 7 for bonding the semiconductor element 5 and the electrode pattern 2 but also the bonding material 71 for bonding the semiconductor element 5 and the wiring 131 can be prevented from peeling and cracking, and has high reliability. A semiconductor device can be obtained.

実施の形態３．
図５は、本発明の実施の形態３による半導体装置の構造を示す要部断面図であり、封止
樹脂１２で覆われる前の様子を示している。図５において、図２と同一符号は、同一または相当する部分を示す。膨張押圧部材は配線と接触しない状態が望ましいが、本実施の形態３では、半導体素子５の上部に設けられた膨張押圧部材９が一部配線１３と接触している。ただし、配線１３の半導体素子５と接合された部分と、膨張押圧部材９が半導体素子５と接触する部分とが連続するように膨張押圧部材９と配線１３が接触しており、図５に示すように、半導体素子５の表面から膨張押圧部材９が配線１３に接触している高さＨが定義できる。また、配線１３の半導体素子５の表面からの高さ、すなわち配線１３の厚みをＬとする。種々実験した結果、接触部が増加して膨張押圧部材９が配線１３に接触している高さＨがＬよりも大きくなると、接合材７の剥離や亀裂を防止する効果が少なくなることが判った。 Embodiment 3 FIG.
FIG. 5 is a main part sectional view showing the structure of the semiconductor device according to the third embodiment of the present invention, and shows a state before being covered with the sealing resin 12. 5, the same reference numerals as those in FIG. 2 denote the same or corresponding parts. Although it is desirable that the expansion pressing member is not in contact with the wiring, in the third embodiment, the expansion pressing member 9 provided on the upper portion of the semiconductor element 5 is partially in contact with the wiring 13. However, the expansion pressing member 9 and the wiring 13 are in contact so that the portion of the wiring 13 joined to the semiconductor element 5 and the portion where the expansion pressing member 9 contacts the semiconductor element 5 are continuous, as shown in FIG. Thus, the height H at which the expansion pressing member 9 is in contact with the wiring 13 from the surface of the semiconductor element 5 can be defined. The height of the wiring 13 from the surface of the semiconductor element 5, that is, the thickness of the wiring 13 is L. As a result of various experiments, it has been found that when the contact portion increases and the height H at which the expansion pressing member 9 is in contact with the wiring 13 becomes larger than L, the effect of preventing the peeling and cracking of the bonding material 7 is reduced. It was.

これは、膨張押圧部材９が配線１３に接触していると、半導体素子５が発熱して膨張押圧部材９が膨張した場合、配線１３に図５の横方向の力が発生して、配線１３を押すことになる。一方、発熱が止まると膨張押圧部材９が収縮するため、配線１３に膨張とは逆の力が発生して、配線１３を引っ張る事になる。このため、パワーサイクル時の膨張、収縮により配線が疲労破壊するためと考えられる。よって、膨張押圧部材９が配線１３に接触している高さＨがＬよりも小さい状態が好ましく、より好ましいのは、膨張押圧部材９が配線１３に接触しない状態である。   This is because when the expansion pressing member 9 is in contact with the wiring 13, when the semiconductor element 5 generates heat and the expansion pressing member 9 expands, a lateral force in FIG. Will be pressed. On the other hand, when the heat generation stops, the expansion pressing member 9 contracts, so that a force opposite to the expansion is generated in the wiring 13 and the wiring 13 is pulled. For this reason, it is thought that wiring breaks down due to expansion and contraction during the power cycle. Therefore, a state in which the height H at which the expansion pressing member 9 is in contact with the wiring 13 is smaller than L is preferable, and a state in which the expansion pressing member 9 is not in contact with the wiring 13 is more preferable.

実施の形態４．
本実施の形態４では、パワーサイクル試験用の半導体装置モジュールを、種々の材料による膨張押圧部材を用いて作製し、パワーサイクル試験を行った結果を実施例として示す。図６は、パワーサイクル試験を行ったモジュールの上面図であり、配線および封止樹脂は省略して示しているが、試験を行ったモジュールは半導体素子５と端子１４との間には配線が設けられ、図２と同様、封止樹脂で覆われている。図６において図１と同一符号は同一または相当する部分を示す。モジュール内部には、SiC半導体素子５を１個搭載し、半導体素子５の上面に膨張押圧部材９を５箇所、接合材の周辺に膨張押圧部材９１を設けている。 Embodiment 4 FIG.
In this Embodiment 4, the result of having produced the semiconductor device module for power cycle tests using the expansion press member by various materials, and having performed the power cycle test is shown as an Example. FIG. 6 is a top view of a module that has been subjected to a power cycle test, in which wiring and sealing resin are omitted. In the module that has been tested, there is no wiring between the semiconductor element 5 and the terminal 14. It is provided and covered with a sealing resin as in FIG. 6, the same reference numerals as those in FIG. 1 denote the same or corresponding parts. One SiC semiconductor element 5 is mounted inside the module, and five expansion pressing members 9 are provided on the upper surface of the semiconductor element 5 and an expansion pressing member 91 is provided around the bonding material.

実施例１．
図７に、封止樹脂１２に線膨張率が24ppmのサンユレック製ＥＸ-550（エポキシ樹脂）
を用いて、膨張押圧部材の線膨張率を変えたときのパワーサイクル試験の結果を示す。パワーモジュールには、ベース板１０のサイズが50×92×3mm、AlNを用いた絶縁基板１のサイズが23.2×23.4×1.12mm、SiCを用いた半導体素子５のサイズが5×5×0.35mm、接合材
には千住金属製M731、ポリフェニレンサルファイド（PPS）を用いたケース側板１１、直
径が0.4mmのアルミを用いた配線１３を使用した。封止樹脂１２として線膨張率24ppmを用いるのは、銅のベース板１０の線膨張率と同程度とするためであり、通常、封止樹脂の線膨張率はほぼこの程度の線膨張率に設定される。 Example 1.
Fig. 7 shows that the sealing resin 12 has a linear expansion coefficient of 24 ppm and is manufactured by San-Yurek EX-550 (epoxy resin).
The result of the power cycle test when changing the linear expansion coefficient of an expansion press member using is shown. In the power module, the size of the base plate 10 is 50 × 92 × 3 mm, the size of the insulating substrate 1 using AlN is 23.2 × 23.4 × 1.12 mm, and the size of the semiconductor element 5 using SiC is 5 × 5 × 0.35 mm. As a bonding material, M731 made by Senju Metal, case side plate 11 using polyphenylene sulfide (PPS), and wiring 13 using aluminum having a diameter of 0.4 mm were used. The reason why the linear expansion coefficient of 24 ppm is used as the sealing resin 12 is to make it approximately the same as the linear expansion coefficient of the copper base plate 10. Usually, the linear expansion coefficient of the sealing resin is almost equal to this linear expansion coefficient. Is set.

パワーサイクル試験は、半導体素子５の温度が175℃になるまで通電し、その温度に達
したら通電を止め、半導体素子５の温度が85℃になるまで冷却し、これを１サイクルとして、通電、通電停止を繰り返し行った。 In the power cycle test, the semiconductor element 5 was energized until the temperature reached 175 ° C., and when that temperature was reached, the energization was stopped, and the semiconductor element 5 was cooled until the temperature reached 85 ° C. The energization was repeatedly stopped.

図７の例１について説明する。膨張押圧部材９および９１は、ソマール製E-530（エポ
キシ樹脂）にデンカ製の平均粒径5umのシリカフィラーを48vol%添加し、線膨張率を約30ppmに調整した。この時、パワーサイクル試験の結果は110000サイクルで配線が溶断することがわかった。また、半導体素子下の接合材にはクラックが発生していたことから、接合材のクラックにより、半導体素子５の熱が放熱できなくなり、配線が溶断したと考えられる。一方、膨張押圧部材を設けない構造であれば、パワーサイクル寿命は約100000サイクルであった。 An example 1 in FIG. 7 will be described. For the expansion pressing members 9 and 91, 48 vol% of silica filler having an average particle size of 5 μm made by Denka was added to E-530 (epoxy resin) manufactured by Somaar, and the linear expansion coefficient was adjusted to about 30 ppm. At this time, the result of the power cycle test showed that the wiring melted out after 110000 cycles. Further, since a crack was generated in the bonding material under the semiconductor element, it is considered that the heat of the semiconductor element 5 could not be dissipated due to the crack in the bonding material, and the wiring was blown out. On the other hand, the power cycle life was about 100,000 cycles in the case of the structure without the expansion pressing member.

次に、例２について説明する。膨張押圧部材９および９１は、ソマール製E-530にデン
カ製の平均粒径5umのシリカフィラーを35vol%添加し、線膨張率を約40ppmに調整した。この時、パワーサイクル試験の寿命は約180000サイクルに達することがわかった。 Next, Example 2 will be described. For the expansion pressing members 9 and 91, 35 vol% of silica filler having an average particle diameter of 5 μm made by Denka was added to E-530 made by Somaru, and the linear expansion coefficient was adjusted to about 40 ppm. At this time, it was found that the life of the power cycle test reached about 180,000 cycles.

次に、例３について説明する。膨張押圧部材９および９１に、線膨張率が300ppmの東レダウコーニング製JCR69101（シリコーン樹脂）を用いて、パワーサイクル試験した結果、寿命が約200000サイクルに達することがわかった。   Next, Example 3 will be described. As a result of a power cycle test using Toray Dow Corning JCR69101 (silicone resin) having a linear expansion coefficient of 300 ppm as the expansion pressing members 9 and 91, it was found that the life reached about 200,000 cycles.

次に、例４について説明する。膨張押圧部材９および９１に、線膨張率が1000ppmの東
レダウコーニング製SE1885M（シリコーン樹脂）を用いて、パワーサイクル試験した結果
、寿命が約190000サイクルに達することがわかった。 Next, Example 4 will be described. As a result of a power cycle test using SE1885M (silicone resin) manufactured by Toray Dow Corning having a linear expansion coefficient of 1000 ppm for the expansion pressing members 9 and 91, it was found that the life reached about 190,000 cycles.

以上のように、封止樹脂１２の線膨張率が24ppmのとき、膨張押圧部材９および９１と
して、線膨張率40ppm以上のものを用いるとパワーサイクル試験における長寿命化の効果
が大きいことが判った。また、線膨張率が1000ppmより大きい樹脂硬化物は架橋が少なく
、液体に近くなるため実用的ではない。このように、膨張押圧部材の線膨張率は40ppm以
上1000ppm以下が好ましい。 As described above, when the linear expansion coefficient of the sealing resin 12 is 24 ppm, it is understood that the use of the expansion pressing members 9 and 91 having a linear expansion coefficient of 40 ppm or more has a great effect of extending the life in the power cycle test. It was. Also, a resin cured product having a linear expansion coefficient greater than 1000 ppm is not practical because it has little cross-linking and is close to a liquid. Thus, the linear expansion coefficient of the expansion pressing member is preferably 40 ppm or more and 1000 ppm or less.

実施例２．
図８に、封止樹脂に線膨張率が19ppmのLOCTITE製FP-4450HF（エポキシ樹脂）を用いて
、膨張押圧部材の線膨張率を変えたときのパワーサイクル試験の結果を示す。パワーモジュールには、ベース板１０のサイズが85×120×3mm、Si3N4を用いた絶縁基板１のサイズが23.2×23.4×1.12mm、SiCを用いた半導体素子５のサイズが5×5×0.35mm、接合材には千住金属製M731、ポリフェニレンサルファイド（PPS）を用いたケース側板１１、直径が0.4mmのアルミを用いた配線１３を部材に使用した。 Example 2
FIG. 8 shows the results of a power cycle test when the linear expansion coefficient of the expansion pressing member was changed using FP-4450HF (epoxy resin) manufactured by LOCTITE having a linear expansion coefficient of 19 ppm as the sealing resin. In the power module, the size of the base plate 10 is 85 × 120 × 3 mm, the size of the insulating substrate 1 using Si 3 N 4 is 23.2 × 23.4 × 1.12 mm, and the size of the semiconductor element 5 using SiC is 5 × 5. X 0.35 mm, Senju Metal M731 as a bonding material, case side plate 11 using polyphenylene sulfide (PPS), and wiring 13 using aluminum having a diameter of 0.4 mm were used as members.

ソマール製E-530にデンカ製の平均粒径5umのシリカフィラーを48vol%添加し、線膨張率を約30ppmに調整した膨張押圧部材を用いると、図８の例５に示す様に、120000サイクル
で寿命に達する事がわかった。また、例６から例８に示す様に膨張押圧部材の線膨張率が40〜1000ppmの範囲であれば、膨張押圧部材を設けない時（パワーサイクル寿命：110000
サイクル）に比べて、半導体装置の信頼性が向上することがわかった。この実施例２においても、膨張押圧部材の線膨張率は40ppm以上1000ppm以下が好ましいことがわかった。 As shown in Example 5 in FIG. 8, 120,000 cycles were obtained by adding 48 vol% of Denka silica filler with an average particle size of 5 μm to Samar E-530 and adjusting the linear expansion coefficient to about 30 ppm. It was found that the life reached. Further, as shown in Examples 6 to 8, when the linear expansion coefficient of the expansion pressing member is in the range of 40 to 1000 ppm, when the expansion pressing member is not provided (power cycle life: 110000
It has been found that the reliability of the semiconductor device is improved as compared with the cycle. Also in Example 2, it was found that the linear expansion coefficient of the expansion pressing member is preferably 40 ppm or more and 1000 ppm or less.

実施例３．
図６に示した試験用モジュールの配線として図４と同様の銅板の配線を用いた構造でパワーサイクル試験した結果を図９に示す。封止樹脂に線膨張率が24ppmのサンユレック製
ＥＸ-550を用いて、膨張押圧部材の線膨張率を変えたときのパワーサイクル試験の結果を示す。パワーモジュールには、ベース板１０のサイズが50×92×3mm、AlNを用いた絶縁基板１のサイズが23.2×23.4×1.12mm、SiCを用いた半導体素子５のサイズが5×5×0.35mm
、接合材には千住金属製M731、ポリフェニレンサルファイド（PPS）を用いたケース側板
１１、厚さが0.5mmの銅板を用いた配線を部材に使用した。 Example 3
FIG. 9 shows the result of a power cycle test with a structure using the same copper plate wiring as in FIG. 4 as the wiring for the test module shown in FIG. The result of the power cycle test when changing the linear expansion coefficient of the expansion pressing member using EX-550 manufactured by Sanyu Rec with a linear expansion coefficient of 24 ppm as the sealing resin is shown. In the power module, the size of the base plate 10 is 50 × 92 × 3 mm, the size of the insulating substrate 1 using AlN is 23.2 × 23.4 × 1.12 mm, and the size of the semiconductor element 5 using SiC is 5 × 5 × 0.35 mm.
As a bonding material, M731, made by Senju Metal, case side plate 11 using polyphenylene sulfide (PPS), and wiring using a copper plate having a thickness of 0.5 mm were used as members.

ここでも、膨張押圧部材を設けないパワーモジュールのパワーサイクル試験の寿命は、約180000サイクルであるのに対し、図９の例１０から例１２に示す様に膨張押圧部材の線膨張率が40〜1000ppmであれば、半導体装置の信頼性が向上することがわかった。   Here, the life of the power cycle test of the power module without the expansion pressing member is about 180,000 cycles, whereas the linear expansion coefficient of the expansion pressing member is 40 to 40 as shown in Example 10 to Example 12 of FIG. It has been found that the reliability of the semiconductor device is improved at 1000 ppm.

以上、実施例１〜３で示したように、封止樹脂１２の線膨張率が20ppm前後のとき、膨
張押圧部材９および９１として、線膨張率40ppm以上のものを用いるとパワーサイクル試
験における長寿命化の効果が大きいことが判った。また、線膨張率が1000ppmより大きい
樹脂硬化物は、液体に近くなるため実用的ではない。封止樹脂１２の線膨張率は、モジュールに用いられる他の材料、特にベース板の線膨張率に近い線膨張率に設定されるため、通常20ppm前後に設定される。従って、膨張押圧部材の線膨張率は40ppm以上1000ppm以下が好ましい。 As described above in Examples 1 to 3, when the linear expansion coefficient of the sealing resin 12 is around 20 ppm, if the expansion pressing members 9 and 91 have a linear expansion coefficient of 40 ppm or more, the length in the power cycle test is long. It was found that the effect of extending the life was great. Also, a resin cured product having a linear expansion coefficient greater than 1000 ppm is not practical because it is close to a liquid. The linear expansion coefficient of the sealing resin 12 is normally set to about 20 ppm because it is set to a linear expansion coefficient close to that of other materials used in the module, particularly the base plate. Therefore, the linear expansion coefficient of the expansion pressing member is preferably 40 ppm or more and 1000 ppm or less.

実施の形態５．
本実施の形態５では、本発明の膨張押圧部材を設けた半導体装置の製造方法について説明する。図１０に半導体装置の製造工程のフロー図を示す。以下、実施の形態４で説明したパワーサイクル試験に用いたモジュールの作製を例にとって説明する。サイズが40×80×3mmの銅のベース板１０上に接合材（第一の接合材とも称する）である千住金属製M731
ペーストを塗布し、水素還元下で、290℃に加熱し、接合材が溶融したら、サイズが40×50×1.12mmのＡｌＮ絶縁基板１の表裏面に0.4mm厚の銅の電極パターン２、裏面電極３が設けられた半導体素子基板４を搭載してベース板１０と接合する（ＳＴ１）。接合後は、室温まで冷却し、半導体素子基板の表面に接合材（第二の接合材とも称する）である千住金属製M20ペーストを塗布する。この第二の接合材の融点は第一の接合材の融点より低い。
水素還元した後、260℃（第二の接合材の融点よりも高く第一の接合材の融点よりも低い
温度まで）に加熱し、接合材が溶融したら、SiC半導体素子５を搭載し、半導体素子基板
４に半導体素子５を接合する（ＳＴ２）。この時、接合材および金属表面の酸化膜を取り除くために蟻酸雰囲気で還元しても良く、フラックスを用いても良い。なお、第二の接合材が図２などで示す接合材７に相当する。 Embodiment 5 FIG.
In the fifth embodiment, a method for manufacturing a semiconductor device provided with the expansion pressing member of the present invention will be described. FIG. 10 shows a flowchart of the manufacturing process of the semiconductor device. Hereinafter, description will be made by taking as an example the production of a module used in the power cycle test described in the fourth embodiment. Senju Metal M731 which is a bonding material (also called the first bonding material) on a copper base plate 10 having a size of 40 × 80 × 3 mm
After applying the paste, heating to 290 ° C under hydrogen reduction, and melting the bonding material, 0.4 mm thick copper electrode pattern 2 on the front and back of the AlN insulating substrate 1 with a size of 40 x 50 x 1.12 mm, back The semiconductor element substrate 4 provided with the electrodes 3 is mounted and joined to the base plate 10 (ST1). After bonding, the substrate is cooled to room temperature, and Senju Metal M20 paste, which is a bonding material (also referred to as a second bonding material), is applied to the surface of the semiconductor element substrate. The melting point of the second bonding material is lower than the melting point of the first bonding material.
After hydrogen reduction, heating to 260 ° C. (to a temperature higher than the melting point of the second bonding material and lower than the melting point of the first bonding material), and when the bonding material melts, the SiC semiconductor element 5 is mounted and the semiconductor The semiconductor element 5 is bonded to the element substrate 4 (ST2). At this time, in order to remove the bonding material and the oxide film on the metal surface, it may be reduced in a formic acid atmosphere, or a flux may be used. The second bonding material corresponds to the bonding material 7 shown in FIG.

接合後は、室温まで冷却し、硬化後の線膨張率が封止樹脂１１の線膨張率よりも大きい高膨張性樹脂硬化材料である東レダウコーニング製JCR69101をディスペンサで、半導体素子上の５箇所および、接合材の上面部に塗布し、70℃×1時間 + 150℃×2時間樹脂硬化させて膨張押圧部材９および９１を形成する（ＳＴ３）。樹脂硬化後は、室温まで冷却し、端子が取り付けられたケース側板１１となる樹脂板の底面にＭＯＭＥＮＴＩＶＥ製TSE3295を塗布し、ベース板１０と貼り合わせて室温で16時間硬化させる（ＳＴ４）。   After bonding, it is cooled to room temperature, and JCR69101 made by Toray Dow Corning, which is a highly expansive resin cured material whose linear expansion coefficient after curing is larger than the linear expansion coefficient of the sealing resin 11, is dispensed at five locations on the semiconductor element. And it apply | coats to the upper surface part of a joining material, 70 degreeC * 1 hour +150 degreeC * 2 hours resin hardening is carried out, and the expansion press members 9 and 91 are formed (ST3). After the resin is cured, it is cooled to room temperature, and TSE3295 made by MOMENTIVE is applied to the bottom surface of the resin plate to be the case side plate 11 to which the terminals are attached, and is bonded to the base plate 10 and cured at room temperature for 16 hours (ST4).

膨張押圧部材の形成は、封止樹脂を注入する直前に行うのが良く、好ましくは、ケース側板をベース板に貼りあわせる前に行うのが良い。   The expansion pressing member may be formed immediately before the sealing resin is injected, and is preferably performed before the case side plate is bonded to the base plate.

その後、直径が400umのアルミワイヤを用いて、半導体素子５および端子１４の間を配
線する（ＳＴ５）。その後、ケース側板１１とベース板１０で形成されたケース内に封止樹脂材料であるサンユレック製EX-550を注入し、10torr×1時間脱泡した後、125℃×3時
間 + 150℃×3時間の樹脂硬化を行い（ＳＴ６）、パワーモジュールの作製が完了する。 Thereafter, the aluminum element having a diameter of 400 μm is used to wire between the semiconductor element 5 and the terminal 14 (ST5). After that, the sealing resin material EX-550 made by Sanyu Rec is injected into the case formed by the case side plate 11 and the base plate 10, defoamed for 10 torr × 1 hour, and then 125 ° C. × 3 hours + 150 ° C. × 3 The resin is cured for a time (ST6), and the production of the power module is completed.

高膨張性樹脂硬化材料が、ソマール製E-530であれば、150℃×3時間の樹脂硬化を行い
、東レダウコーニング製SE1885Mであれば、120℃×1時間の樹脂硬化を行う。また、封止
樹脂がＬＯＣＴＩＴＥ製FP4450HFの場合は、125℃×30分＋165℃×90分の樹脂硬化を行う。 If the highly expansive resin-curing material is E-530 made by Somar, the resin is cured at 150 ° C. for 3 hours, and if it is SE1885M made by Toray Dow Corning, the resin is cured at 120 ° C. for 1 hour. If the sealing resin is LOC4ITE FP4450HF, the resin is cured at 125 ° C. for 30 minutes + 165 ° C. for 90 minutes.

以上説明したように、本発明の半導体装置の製造工程は、通常の工程にわずかに膨張押圧部材の形成工程が付加されるだけで、複雑な工程を要することなく、信頼性の高い半導体装置を得ることができる。   As described above, the manufacturing process of the semiconductor device of the present invention is a process for forming a highly reliable semiconductor device without requiring a complicated process only by adding a step of forming an expansion pressing member to a normal process. Can be obtained.

１：絶縁基板 ２：電極パターン
３：裏面電極 ４：半導体素子基板
５、６：半導体素子 ７、７０〜７２：接合材
９、９１、９２：膨張押圧部材 １０：ベース板
１１：ケース側板 １２：封止樹脂
１３：配線 １４：端子 1: Insulating substrate 2: Electrode pattern
3: Back electrode 4: Semiconductor element substrate 5, 6: Semiconductor element 7, 70 to 72: Bonding materials 9, 91, 92: Expansion pressing member 10: Base plate 11: Case side plate 12: Sealing resin 13: Wiring 14: Terminal

Claims (9)

絶縁基板上に設けられた電極パターン上面に接合材を介して半導体素子が固着された半導体素子基板を金属のベース板上に配置し、少なくとも上記絶縁基板および上記半導体素子を封止樹脂により被覆した半導体装置において、上記半導体素子の上記電極パターンに接合された面とは逆の面の一部と接触するように、上記封止樹脂よりも線膨張率が大きい膨張押圧部材を上記封止樹脂で被覆されるように設けたことを特徴とする半導体装置。   A semiconductor element substrate having a semiconductor element fixed to an upper surface of an electrode pattern provided on an insulating substrate via a bonding material is disposed on a metal base plate, and at least the insulating substrate and the semiconductor element are covered with a sealing resin. In the semiconductor device, an expansion pressing member having a linear expansion coefficient larger than that of the sealing resin is made of the sealing resin so as to be in contact with a part of the surface opposite to the surface bonded to the electrode pattern of the semiconductor element. A semiconductor device provided to be covered. 膨張押圧部材の線膨張率は40ppm以上1000ppm以下であることを特徴とする請求項１に記載の半導体装置。   The semiconductor device according to claim 1, wherein a linear expansion coefficient of the expansion pressing member is 40 ppm or more and 1000 ppm or less. 半導体素子の電極パターンと接合された面とは逆の面に配線が接合され、膨張押圧部材が上記配線と接触していないことを特徴とする請求項１に記載の半導体装置。   The semiconductor device according to claim 1, wherein a wiring is bonded to a surface opposite to a surface bonded to the electrode pattern of the semiconductor element, and the expansion pressing member is not in contact with the wiring. 半導体素子の電極パターンと接合された面とは逆の面に配線が接合され、この配線の上記半導体素子と接合された部分と、膨張押圧部材が上記半導体素子と接触する部分とが連続するように上記膨張押圧部材と上記配線が接触しており、上記膨張押圧部材と上記配線が接触している部分の上記半導体素子からの高さが、上記配線の上記半導体素子へ接合されている部分の厚みよりも低いことを特徴とする請求項１に記載の半導体装置。   A wiring is bonded to a surface opposite to the surface bonded to the electrode pattern of the semiconductor element, and a portion of the wiring bonded to the semiconductor element and a portion where the expansion pressing member contacts the semiconductor element are continuous. The expansion pressing member and the wiring are in contact with each other, and the height from the semiconductor element of the portion where the expansion pressing member and the wiring are in contact is the portion of the wiring connected to the semiconductor element. The semiconductor device according to claim 1, wherein the semiconductor device is lower than the thickness. 半導体素子の電極パターンと接合された面とは逆の面に板状の配線が接合され、この配線の上記半導体素子と接合された面とは逆の面に、封止樹脂よりも線膨張率が大きい膨張押圧部材を設けたことを特徴とする請求項１に記載の半導体装置。   A plate-like wiring is bonded to the surface opposite to the surface bonded to the electrode pattern of the semiconductor element, and the linear expansion coefficient is higher than that of the sealing resin to the surface opposite to the surface bonded to the semiconductor element of the wiring. The semiconductor device according to claim 1, wherein an expansion pressing member having a large length is provided. 半導体素子を電極パターンに接合する接合材が上記半導体素子と上記電極パターンとの間から外部に露出しており、この露出した接合材を被覆するように、封止樹脂よりも線膨張率が大きい膨張押圧部材を設けたことを特徴とする請求項１に記載の半導体装置。   A bonding material for bonding the semiconductor element to the electrode pattern is exposed to the outside from between the semiconductor element and the electrode pattern, and the linear expansion coefficient is larger than that of the sealing resin so as to cover the exposed bonding material. The semiconductor device according to claim 1, further comprising an expansion pressing member. 半導体素子がワイドバンドギャップ半導体により形成されていることを特徴とする請求項１〜６いずれか１項に記載の半導体装置。   The semiconductor device according to claim 1, wherein the semiconductor element is formed of a wide band gap semiconductor. ワイドバンドギャップ半導体は、炭化珪素、窒化ガリウム系材料またはダイヤモンドの半導体であることを特徴とする請求項７に記載の半導体装置。   The semiconductor device according to claim 7, wherein the wide band gap semiconductor is a semiconductor of silicon carbide, a gallium nitride-based material, or diamond. 請求項１に記載の半導体装置の製造方法であって、
ベース板に第一の接合材を塗布し、このベース板を上記第一の接合材の融点よりも高い温度に加熱した後上記第一の接合材が塗布された上に半導体素子基板を搭載して、上記ベース板と上記半導体素子基板を接合する工程と、
上記半導体素子基板の表面に上記第一の接合材よりも融点が低い第二の接合材を塗布し、上記半導体素子基板を上記第二の接合材の融点よりも高く上記第一の接合材の融点よりも低い温度まで加熱した後上記第二の接合材が塗布された上記半導体素子基板の面に半導体素子を搭載して、上記半導体素子基板と上記半導体素子を接合する工程と、
上記半導体素子の上記半導体素子基板に接合された面とは逆の面の一部に高膨張性樹脂材料を塗布した後上記高膨張性樹脂材料を硬化させて膨張押圧部材を形成する工程と、
上記ベース板に端子が取り付けられたケース側板を接合する工程と、
上記半導体素子と上記端子との間を配線により接続する工程と、
上記ケース側板と上記ベース板とで囲まれた空間に、上記膨張押圧部材よりも線膨張率が小さい樹脂を注入してこの樹脂を硬化させて封止樹脂を形成する工程と
を有することを特徴とする半導体装置の製造方法。 A method of manufacturing a semiconductor device according to claim 1,
A first bonding material is applied to the base plate, and after heating the base plate to a temperature higher than the melting point of the first bonding material, the semiconductor element substrate is mounted on the first bonding material applied. Bonding the base plate and the semiconductor element substrate;
A second bonding material having a melting point lower than that of the first bonding material is applied to the surface of the semiconductor element substrate, and the semiconductor element substrate is made higher than the melting point of the second bonding material. Mounting the semiconductor element on the surface of the semiconductor element substrate coated with the second bonding material after heating to a temperature lower than the melting point, and bonding the semiconductor element substrate and the semiconductor element;
Applying a high expansion resin material to a part of the surface of the semiconductor element opposite to the surface bonded to the semiconductor element substrate and then curing the high expansion resin material to form an expansion pressing member;
Joining the case side plate with the terminal attached to the base plate;
Connecting the semiconductor element and the terminal by wiring;
A step of injecting a resin having a smaller linear expansion coefficient than the expansion pressing member into a space surrounded by the case side plate and the base plate and curing the resin to form a sealing resin. A method for manufacturing a semiconductor device.
JP2010224706A 2010-10-04 2010-10-04 Semiconductor device and manufacturing method of semiconductor device Expired - Fee Related JP5328740B2 (en)

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