JP2010273362A - Electronic component - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce stress to be applied to a function element in a sealed electronic component by mounting the function element such as a semiconductor element. <P>SOLUTION: An electronic component 100 includes the other substrate 1 in which a function element connected via a bump 20 is provided on one substrate P, the function element is disposed within a sealed space K formed between the one substrate P and the other substrate 1 and in order to maintain an environment inside the sealed space K, a sealing thin film 2 is provided which is formed over the other substrate 1 on the substrate P whereon the other substrate 1 is disposed. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to an electronic component.

In recent years, electronic components in which a functional element such as a semiconductor element is mounted with the active surface of the functional element facing the substrate side are used for various applications. Such an electronic component is formed between the substrate and the functional element by using the functional element itself as a substrate for forming a sealed space and disposing the active surface of the functional element toward the substrate side. An active surface is positioned in the sealed space. By the way, in such an electronic component, measures are taken to maintain the environment in the sealed space in order to ensure the normal operation of the electronic component.
For example, Patent Document 1 and Patent Document 2 attempt to seal between the functional element and the substrate with a resin or solder, and to maintain the environment in the sealed space with this resin.

Japanese Patent Laid-Open No. 11-87406 JP 11-97584 A JP 2000-77458 A JP 2003-92382 A

However, when the functional element and the substrate are sealed with resin or solder, stress may be applied to the functional element due to the difference between the thermal expansion coefficient of the resin or solder and the thermal expansion coefficient of the substrate. is there. When resin or solder is disposed on the substrate, heat is applied, and thus stress is particularly applied to the functional element in such a manufacturing process. When stress is applied to the functional element in this way, stress is also applied to the active surface, the characteristics of the functional element change, and the electronic component may not operate normally.
In recent years, electronic parts using functional elements including surface acoustic wave elements have been used. In electronic parts using functional elements including such surface acoustic wave elements, malfunctions are particularly caused by stress applied to the functional elements. May result.

  The present invention has been made in view of the above-described problems, and an object thereof is to reduce stress applied to a functional element.

  In order to achieve the above object, an electronic component of the present invention is an electronic component in which at least a part of a functional element is disposed in a sealed space formed between one substrate and the other substrate, A sealing thin film for maintaining an environment in the sealing space is provided.

According to the electronic component of the present invention having such characteristics, the environment in the sealed space is maintained by the sealing thin film.
Since such a sealing thin film is a very thin member, even if there is a difference between the thermal expansion coefficient of the sealing thin film and the expansion coefficient of the substrate, the thermal expansion coefficient of the sealing thin film and the heat of the substrate The stress applied to the functional element due to the difference from the expansion coefficient can be reduced as much as possible. In addition, since the technology for forming the thin film by a low-temperature process has been established, it is possible to prevent heat from being applied to each member in the manufacturing process, resulting from the difference between the thermal expansion coefficient of the sealing thin film and the thermal expansion coefficient of the substrate. As a result, the stress applied to the functional element can be further reduced.

In the electronic component of the present invention, a configuration in which the sealing thin film is formed so as to cover the one substrate or the other substrate can be employed.
By adopting such a configuration, it is not necessary to perform fine positioning when forming the sealing thin film, so that the sealing thin film can be easily formed.

Moreover, in the electronic component of this invention, the structure that the said sealing thin film is a metal thin film is employable.
Specifically, a metal thin film made of any material of chromium, titanium, copper, aluminum, and titanium tungsten can be used.

Moreover, in the electronic component of this invention, the structure that the said sealing thin film is an inorganic thin film is also employable.
Specifically, an inorganic thin film made of any material of silicon oxide, silicon nitride, alumina, and polysilazane can be used.

  Moreover, resin takes in moisture inside due to its properties. For this reason, the external water vapor (gas) is once absorbed by the resin, and then the moisture taken into the resin may evaporate due to an increase in the outside air temperature or the like, thereby destroying the environment in the sealed space. That is, the resin may result in water vapor permeation. In this regard, when a metal thin film or an inorganic thin film is used as the sealing thin film, the possibility of moisture being taken into the interior is low, so that malfunction of the electronic component can be further suppressed.

However, the present invention does not exclude that the sealing thin film is formed of resin, and even when the sealing thin film is formed of resin, it is possible to reduce the stress applied to the functional element. .
In addition, when forming a sealing thin film with resin, it is preferable to use resin which can be formed at least below the transition temperature of another member. This makes it possible to form a sealing thin film without changing the characteristics of other members.
Specifically, a resin made of any material of high density polyethylene, vinylidene chloride, polyvinyl alcohol, nylon, and ethylene vinyl alcohol can be used.

  Moreover, in the electronic component of this invention, the structure that the said sealing thin film is a laminated body of an organic thin film and an inorganic thin film is also employable.

Next, an electronic apparatus according to the present invention includes the electronic component according to the present invention.
According to the electronic component of the present invention, it is possible to reduce the stress applied to the functional element. Therefore, the electronic device of the present invention including such an electronic component of the present invention has excellent reliability.

  Next, a method for manufacturing an electronic component according to the present invention is a method for manufacturing an electronic component in which at least a part of a functional element is arranged in a sealed space formed between one substrate and the other substrate. A step of disposing at least a part of the functional element in a sealing space formed between the one substrate and the other substrate, and a sealing thin film for maintaining an environment in the sealing space Forming the step.

According to the method for manufacturing an electronic component of the present invention having such characteristics, a sealing thin film for maintaining the environment in the sealing space is formed.
Since such a sealing thin film is a very thin member, even if there is a difference between the thermal expansion coefficient of the sealing thin film and the expansion coefficient of the substrate, the thermal expansion coefficient of the sealing thin film and the heat of the substrate The stress applied to the functional element due to the difference from the expansion coefficient can be reduced as much as possible. In addition, since the technology for forming the thin film by a low-temperature process has been established, it is possible to prevent heat from being applied to each member in the manufacturing process, resulting from the difference between the thermal expansion coefficient of the sealing thin film and the thermal expansion coefficient of the substrate. As a result, the stress applied to the functional element can be further reduced.

It is the schematic diagram which showed schematic structure of the electronic component which is 1st Embodiment of this invention. It is sectional drawing of the electronic component which is 1st Embodiment of this invention. It is explanatory drawing for demonstrating the manufacturing method of the electronic component which is 1st Embodiment of this invention. It is explanatory drawing for demonstrating the manufacturing method of the electronic component which is 1st Embodiment of this invention. It is explanatory drawing for demonstrating the manufacturing method of the electronic component which is 1st Embodiment of this invention. It is explanatory drawing for demonstrating the manufacturing method of the electronic component which is 1st Embodiment of this invention. It is explanatory drawing for demonstrating the manufacturing method of the electronic component which is 1st Embodiment of this invention. It is explanatory drawing for demonstrating the manufacturing method of the electronic component which is 1st Embodiment of this invention. It is explanatory drawing for demonstrating the manufacturing method of the electronic component which is 1st Embodiment of this invention. It is explanatory drawing for demonstrating the manufacturing method of the electronic component which is 1st Embodiment of this invention. It is explanatory drawing for demonstrating the manufacturing method of the electronic component which is 1st Embodiment of this invention. It is explanatory drawing for demonstrating the manufacturing method of the electronic component which is 1st Embodiment of this invention. It is explanatory drawing for demonstrating the manufacturing method of the electronic component which is 1st Embodiment of this invention. It is explanatory drawing for demonstrating the manufacturing method of the electronic component which is 1st Embodiment of this invention. It is sectional drawing of the electronic component which is 2nd Embodiment of this invention. It is sectional drawing of the electronic component which is 3rd Embodiment of this invention. It is the schematic diagram which showed schematic structure of the electronic component which is 4th Embodiment of this invention. It is a figure which shows the electronic device which is 5th Embodiment of this invention.

Hereinafter, an embodiment of an electronic component, a manufacturing method thereof, and an electronic device according to the present invention will be described with reference to the drawings. In the following drawings, the scale of each member is appropriately changed in order to make each member a recognizable size.

(First embodiment)
FIG. 1 is a schematic diagram illustrating a schematic configuration of an electronic component 100 according to the first embodiment. As shown in this figure, the electronic component 100 of the present embodiment is configured to include a functional element 1 connected via a bump 20 on a substrate P (one substrate). Further, the electronic component 100 of the present embodiment includes a sealing thin film 2 formed so as to cover the functional element 1 on the substrate P on which the functional element 1 is arranged.

FIG. 2 is a cross-sectional view showing the electronic component 100 of the present embodiment in more detail.
As shown in this figure, the functional element 1 includes a semiconductor substrate 10 made of a silicon substrate, and a surface acoustic wave element (hereinafter referred to as a SAW (Surface Acoustic Wave) element) provided on the first surface 10A side of the semiconductor substrate 10. ) 50 and a through electrode 12 that penetrates the first surface 10A and the second surface 10B opposite to the first surface 10A. The SAW element 50 is configured to include a piezoelectric thin film and a comb electrode in contact with the piezoelectric thin film, and is formed on the first surface 10 </ b> A of the semiconductor substrate 10. Although not shown, an integrated circuit including, for example, a transistor, a memory element, and other electronic elements is formed on the second surface 10B of the semiconductor substrate 10, and the second surface 10B of the semiconductor substrate 10 is an active surface. It is configured as. One end portion of the through electrode 12 is electrically connected to the SAW element 50 provided on the first surface 10A, and the other end portion of the through electrode 12 is provided on the second surface 10B. The circuit and the electrode 15 are electrically connected. Accordingly, the SAW element 50 provided on the first surface 10A of the semiconductor substrate 10 and the integrated circuit provided on the second surface 10B of the semiconductor substrate 10 are electrically connected via the through electrode 12. . Further, an insulating film 13 is provided between the through electrode 12 and the semiconductor substrate 10, and the through electrode 12 and the semiconductor substrate 10 are electrically insulated.

  Further, the functional element 1 includes a sealing member 40 that seals the SAW element 50 between the first surface 10A and the first surface 10A. The sealing member 40 is formed of a glass substrate. The sealing member 40 may be a silicon substrate. A third surface 40A of the sealing member 40 facing the first surface 10A of the semiconductor substrate 10 is provided at a position away from the first surface 10A. The peripheral portion of the first surface 10 </ b> A of the semiconductor substrate 10 and the peripheral portion of the third surface 40 </ b> A of the sealing member 40 are bonded by the adhesive layer 30. The adhesive layer 30 is made of a synthetic resin such as a polyimide resin. The internal space 60 surrounded by the first surface 10A of the semiconductor substrate 10, the third surface 40A of the sealing member 40, and the adhesive layer 30 is substantially sealed (air-tightly sealed), and the internal space The SAW element 50 is arranged at 60.

An underlayer 11 is provided on the second surface 10 </ b> B of the semiconductor substrate 10. The underlayer 11 is formed of an insulating material such as silicon oxide (SiO2). In addition, an electrode 15 is provided in each of a plurality of predetermined regions on the base layer 11, and a first insulating layer 14 is provided in a region other than the region where the electrode 15 is provided. In addition, a plurality of first wirings 16 are provided on the first insulating layer 14, and the specific first wiring 16 among the plurality of first wirings 16 is a part of the plurality of electrodes 15. And are electrically connected. In addition, a specific electrode 15 among the plurality of electrodes 15 is electrically connected to the other end portion of the through electrode 12. A second insulating layer 18 is provided on the first insulating layer 14 so as to cover part of the through electrode 12 and the first wiring 16. A part of the first wiring 16 is exposed from a part of the second insulating layer 18 to form a land part 17. A second wiring 19 is provided on the land portion 17, and the land portion 17 (first wiring 16) and the second wiring 19 are electrically connected. A bump 20 is provided on the second wiring 19 as a connection terminal with an external device. The bump 20 is provided on the second surface 10 </ b> B of the semiconductor substrate 10, and the functional element 1 is electrically connected to the wiring P <b> 1 formed on the substrate P through the bump 20.
That is, in the electronic component 100 of the present embodiment, the functional element 1 also has a function as the other substrate of the present invention, and the functional element 1 and the substrate P form a space K that is a sealed space. Yes. And the 2nd surface 10B is arrange | positioned in the space K by arrange | positioning the 2nd surface 10B which the functional element 1 is an active surface toward the board | substrate P side.

As a material for forming the bump 20, any conductive member can be used, but generally lead-free solder, gold, or the like is used.
Moreover, the board | substrate P is equipped with the wiring pattern. The wiring pattern and the functional element 1 are electrically connected via the bump 20. As the substrate P, a printed wiring board on which a wiring pattern is formed on a resin, a silicon substrate on which a wiring pattern is formed, a glass substrate on which a wiring pattern is formed, or the like can be used.

The sealing resin 3 is disposed and formed outside the bump 20 so as to surround a space K (sealing space) between the functional element 1 and the substrate P. With this sealing resin 3, the environment in the space K can be easily maintained.
As the sealing resin 3, a known sealing resin can be used. For example, an epoxy resin, a polyimide resin, or the like can be used.

The sealing thin film 2 is for maintaining the environment in the space K, and is formed so as to cover the functional element 1 on the substrate P on which the functional element 1 is arranged as described above. By providing such a sealing thin film 2, it is possible to more reliably prevent gas from entering the space K between the functional element 1 and the substrate P from the outside, and maintain the environment in the space K. be able to.
And since such a sealing thin film 2 is a very thin film, even if there is a difference between the thermal expansion coefficient of the sealing thin film 2 and the expansion coefficient of the substrate P, the heat of the sealing thin film 2 Due to the difference between the expansion coefficient and the thermal expansion coefficient of the substrate P, the stress applied to the functional element 1 can be reduced as much as possible.
Therefore, according to the electronic component 100 of the present embodiment, the environment in the space K between the functional element 1 and the substrate P can be maintained, and stress applied to the functional element 1 can be reduced. The normal operation of the component 100 can be further ensured.

As the sealing thin film 2, a metal thin film or an inorganic thin film can be used. Specifically, a metal thin film made of any one of chromium (Cr), titanium (Ti), copper (Cu), aluminum (Al), and titanium tungsten (TiW) can be used as the metal thin film. As the inorganic thin film, an inorganic thin film made of any material of silicon oxide (SiO 2), silicon nitride (SiN), alumina (Al 3 O 2), and polysilazane can be used.
Moreover, it is also possible to use a laminate of an organic thin film and an inorganic thin film as the sealing thin film 2.

  Further, if only for reducing the stress applied to the functional element 1, a thin film made of a resin can be used as the sealing thin film 2. However, as described above, the resin may transmit water vapor as a result. Therefore, it is preferable to use a metal thin film or an inorganic thin film as the sealing thin film 2. However, when a thin film made of a resin is used as the sealing thin film 2, it is preferable to use a resin that can be formed below the transition temperature of other members. Thereby, the sealing thin film 2 can be formed without changing the characteristics of other members. Specifically, the sealing thin film 2 can be formed using a resin made of any material of high density polyethylene, vinylidene chloride, polyvinyl alcohol (PVA), nylon, and ethylene vinyl alcohol.

  Next, a method for manufacturing the electronic component 100 of the present embodiment configured as described above will be described.

First, as shown in FIG. 3, the base layer 11 is formed on the second surface 10 </ b> B of the semiconductor substrate 10, and the electrode 15 is formed on the base layer 11. Here, an integrated circuit (not shown) including, for example, a transistor, a memory element, and other electronic elements is formed on the second surface 10B of the semiconductor substrate 10. The underlayer 11 is an insulating layer and is formed of a silicon (Si) oxide film (SiO 2). The electrode 15 is electrically connected to the integrated circuit and is formed of titanium (Ti), titanium nitride (TiN), aluminum (Al), copper (Cu), or the like. A first insulating layer 14 is provided so as to cover the base layer 11 and the electrode 15.
The first insulating layer 14 can be formed of polyimide resin, silicon-modified polyimide resin, epoxy resin, silicon-modified epoxy resin, acrylic resin, phenol resin, benzocyclobutene (BCB), polybenzoxazole (PBO), or the like. Alternatively, the first insulating layer 14 may be formed of other materials such as silicon oxide (SiO 2) and silicon nitride (SiN) as long as they have insulating properties.

Next, a photoresist (not shown) is applied on the entire surface of the first insulating layer 14 by spin coating or the like. Then, after an exposure process is performed using a mask on which a predetermined pattern is formed, a development process is performed. As a result, the photoresist is patterned into a predetermined shape.
Then, an etching process is performed, and in the drawing, a part of the first insulating layer 14 covering the right electrode 15 is removed to form an opening. Next, using the photoresist on the first insulating layer 14 in which the opening is formed as a mask, a part of the right electrode 15 in the drawing among the plurality of electrodes 15 is opened by dry etching. Further, the underlying layer 11 corresponding to the opening and the semiconductor substrate 10 are partially removed by etching. As a result, as shown in FIG. 4, a hole 12H is formed in a part of the semiconductor substrate 10 on the second surface 10B side.

  Next, the insulating film 13 is formed on the first insulating layer 14 and on the inner wall and bottom surface of the hole 12H. The insulating film 13 is provided to prevent the occurrence of current leakage, erosion of the semiconductor substrate 10 due to oxygen, moisture, etc., and is formed by using tetraethyl silicate (Tetra Ethyl Ortho) formed by PECVD (Plasma Enhanced Chemical Vapor Deposition). Silicate: Si (OC2H5) 4: hereinafter referred to as TEOS), that is, PE-TEOS and TEOS formed using ozone CVD, that is, O3-TEOS, or silicon oxide (SiO2) formed using CVD are used. Can do. The insulating film 13 may be other material or resin as long as it has insulating properties. For the sake of simplicity, the illustration of the insulating film 13 provided on the first insulating layer 14 is omitted. Then, by removing the insulating film 13 and the first insulating layer 14 provided on the electrode 15 by etching, a form as shown in FIG. 5 is obtained.

  Next, using an electrochemical plating (ECP) method, a plating process is performed on the inside of the hole 12H and on the electrode 15, and a conductive material for forming the through electrode 12 inside the hole 12H is formed. Be placed. As a conductive material for forming the through electrode 12, for example, copper (Cu) can be used, and copper (Cu) is embedded in the hole 12H. Thereby, the penetrating electrode 12 having a shape protruding on the electrode 15 is formed, and a form as shown in FIG. 6 is obtained. The step of forming the through electrode 12 in the present embodiment includes a step of forming (stacking) TiN and Cu by a sputtering method and a step of forming Cu by a plating method. In addition, the process of forming (stacking) TiW and Cu by a sputtering method and the process of forming Cu by a plating method may be included. The method for forming the through electrode 12 is not limited to the above-described method, and a conductive paste, molten metal, metal wire, or the like may be embedded.

  Next, as shown in FIG. 7, a plurality of first wirings 16 are formed on the first insulating layer 14. Among the plurality of first wirings 16, some of the first wirings 16 are formed so as to be electrically connected to the left electrode 15 in the drawing. The first wiring 16 includes copper (Cu), chromium (Cr), titanium (Ti), nickel (Ni), titanium tungsten (TiW), gold (Au), silver (Ag), aluminum (Al), nickel vanadium ( It is made of a material containing at least one of NiV), tungsten (W), titanium nitride (TiN), and Pb (lead). Further, the first wiring may be formed by stacking at least two of these materials. The step of forming the first wiring 16 in the present embodiment includes a step of forming by the sputtering method in the order of TiW, Cu, and TiW. In addition, the process of forming by the sputtering method in order of TiW and Cu and the process of forming Cu by the plating method may be included.

  Next, as shown in FIG. 8, a second insulating layer 18 is provided so as to cover the through electrode 12, the first wiring 16, and the first insulating layer 14. The second insulating layer 18 can be formed of polyimide resin, silicon-modified polyimide resin, epoxy resin, silicon-modified epoxy resin, acrylic resin, phenol resin, benzocyclobutene (BCB), polybenzoxazole (PBO), or the like. Alternatively, the second insulating layer 18 may be formed of silicon oxide (SiO 2), silicon nitride (SiN), or the like. The second insulating layer 18 may be another material as long as it has insulating properties.

  Next, a region of the second insulating layer 18 corresponding to the land portion 17 is removed, and a part of the first wiring 16 is exposed to form the land portion 17. Note that, when the region corresponding to the land portion 17 in the second insulating layer 18 is removed, a photolithography method including an exposure process and a development process can be used. And the 2nd wiring 19 is formed on the 2nd insulating layer 18 so that it may connect with the land part 17, and a form as shown in FIG. 9 is obtained.

Next, a glass plate (not shown) is attached to the second surface 10B side of the semiconductor substrate 10 with an adhesive that can be peeled off by irradiation with ultraviolet light (UV light). This glass plate is a part of what is called WSS (Wafer Support System), and the semiconductor substrate 10 is supported by the glass plate. Then, a predetermined process such as a polishing process, a dry etching process, or a wet etching process is performed on the first surface 10A of the semiconductor substrate 10 with the glass plate attached.
As a result, as shown in FIG. 10, the semiconductor substrate 10 is thinned, and one end portion of the through electrode 12 is exposed from the first surface 10A.

  Next, as shown in FIG. 11, the SAW element 50 is formed on the first surface 10 </ b> A side of the semiconductor substrate 10. The step of forming the SAW element 50 includes a step of forming a piezoelectric thin film, a step of forming a comb electrode in contact with the piezoelectric thin film, and a step of forming a protective film. Further, the step of forming the SAW element 50 includes a step of adjusting the frequency by irradiating the SAW element 50 with plasma or the like. Examples of the material for forming the piezoelectric thin film include zinc oxide (ZnO), aluminum nitride (AlN), lithium niobate (LiNbO3), lithium tantalate (LiTaO3), and potassium niobate (KNbO3). Examples of the material for forming the comb electrode include metals including aluminum. Examples of the material for forming the protective film include silicon oxide (SiO2), silicon nitride (Si3N4), and titanium nitride (TiN). The formed SAW element 50 is electrically connected to one end of the through electrode 12 exposed on the first surface 10A side.

  Next, an adhesive for forming the adhesive layer 30 is provided on at least one of the first surface 10A of the semiconductor substrate 10 and the third surface 40A of the sealing member 40. As the adhesive layer 30, for example, a photosensitive polyimide adhesive or the like can be used. Then, the semiconductor substrate 10 and the sealing member 40 are bonded via the adhesive layer 30 so that the first surface 10A of the semiconductor substrate 10 and the third surface 40A of the sealing member 40 face each other. . Thereby, the functional element 1 as shown in FIG. 12 is obtained. Here, the sealing may be a vacuum sealing that evacuates the internal space 60, a gas replacement sealing that replaces the internal space 60 with a predetermined gas such as N 2, Ar, or He. When the semiconductor substrate 10 and the sealing member 40 are bonded, a metal protrusion is provided along the peripheral edge of the first surface 10A of the semiconductor substrate 10, and the metal protrusion and the third surface 40A of the sealing member 40 are provided. A metal layer for bonding may be provided, and the semiconductor substrate 10 and the sealing member 40 may be bonded via the metal protrusion and the metal layer. When glass is used for the sealing member 40, the SAW frequency can be adjusted with a laser or the like after sealing.

  Next, as shown in FIG. 13, the functional element 1 is connected to the wiring P <b> 1 of the substrate P via the bumps 20. In addition, the area | region which installs the functional element 1 in advance is formed in the wiring P1, and the functional element 1 is connected to the predetermined area | region of the wiring P1 via the bump 20. As shown in FIG. Specifically, after the glass plate constituting the WSS is peeled from the semiconductor substrate 10, lead, for example, is formed on the second wiring 19 provided on the second surface 10 </ b> B side of the semiconductor substrate 10 or on a predetermined region of the wiring P <b> 1. A bump 20 made of free solder is mounted, and the functional element 1 and the substrate P are connected via the bump 20. When the bump 20 is provided, the solder ball may be mounted on the second wiring 19 or a predetermined area of the wiring P1, or the solder paste may be printed on the second wiring 19 or the predetermined area of the wiring P1. The form to do may be sufficient.

  Next, as shown in FIG. 14, the sealing resin 3 is formed outside the bumps 20 so as to surround a space K between the functional element 1 and the substrate P. Specifically, a resin is applied to the outside of the bump 20 by a dispenser or the like so as to surround the space K between the functional element 1 and the substrate P. Here, the viscosity and thixotropy of the resin applied from a dispenser or the like are appropriately adjusted so that the resin does not flow into the space K between the functional element 1 and the substrate P. The viscosity and thixotropy of the resin can be adjusted by adjusting the content of the inorganic material relative to the resin, the composition ratio of the resin, and the like. When the resin applied by a dispenser or the like is a thermosetting resin, the sealing resin 3 is formed by applying heat to the applied resin. Further, when the resin applied by a dispenser or the like is a photocurable resin, the sealing resin 3 is formed by irradiating the applied ink with light.

Next, the sealing thin film 2 is formed so as to cover the functional element 1 on the substrate P on which the functional element 1 is disposed.
Specifically, when the sealing thin film 2 is formed as a metal thin film, it can be formed by vapor deposition, sputtering, CVD (chemical vapor deposition), plating, or the like. Further, when the sealing thin film 2 is formed as an inorganic thin film, it can be formed by a vapor deposition method, a sputtering method, a CVD method, a wet method (for example, a spin coating method, a dip method, a spray method, or the like).
The step of forming such a sealing thin film 2 can be performed at a lower temperature than the step of forming a sealing resin member so as to cover the functional element 1. For example, the sealing thin film 2 can be formed at room temperature by dissolving the material of the sealing thin film 2 in a solvent, applying the liquid, and evaporating the solvent by natural drying. For this reason, it is possible to prevent the functional element 1 from being thermally damaged in the step of forming the sealing thin film 2. In addition, it is possible to prevent heat from being applied to each member in the formation process of the sealing thin film 2, and stress applied to the functional element 1 due to the difference between the thermal expansion coefficient of the sealing thin film 2 and the thermal expansion coefficient of the substrate P. This can be further reduced. Accordingly, for example, it is possible to prevent a characteristic change such as a frequency fluctuation of the SAW element 50 from occurring.

  And the electronic component 100 of this embodiment shown in FIG.1 and FIG.2 is manufactured according to the above process. According to the electronic component 100 manufactured in this manner, the sealing thin film 2 can more reliably prevent gas from entering the space K between the functional element 1 and the substrate P from the outside. It becomes. Further, as described above, the stress applied to the functional element 1 due to the difference between the thermal expansion coefficient of the sealing thin film 2 and the thermal expansion coefficient of the substrate P can be further reduced. Therefore, according to the method for manufacturing the electronic component 100 of the present embodiment, it is possible to manufacture an electronic component with higher reliability.

(Second Embodiment)
Next, a second embodiment of the present invention will be described. In the description of the second embodiment, the description of the same parts as in the first embodiment will be omitted or simplified.

  FIG. 15 is a cross-sectional view of the electronic component 200 of the second embodiment. As shown in this figure, in the electronic component 200 of the second embodiment, the SAW element 50 is not formed on the first surface 10A of the semiconductor substrate 10, and the sealing member facing the first surface 10A. On the 40th 3rd surface 40A, it provided apart from the 1st surface 10A. In this embodiment, by providing the SAW on a member different from the semiconductor substrate 10, it is difficult to be affected by thermal stress and film stress applied to the semiconductor substrate 10, so that favorable characteristics can be obtained. In this case, the sealing member 40 is composed of a silicon substrate, a quartz substrate, a substrate including silicon and diamond. Then, the SAW element 50 is formed in advance on the third surface 40A of the sealing member 40, and then one end portion of the through electrode 12 provided so as to protrude from the first surface 10A of the semiconductor substrate 10, The semiconductor substrate 10 and the sealing member 40 are bonded via the adhesive layer 30 so that the terminal 51 of the SAW element 50 formed on the third surface 40A of the sealing member 40 is electrically connected. The One end portion of the through electrode 12 and the terminal 51 are preferably provided with a surface treatment such as gold or a brazing material on the surface so as to facilitate metal connection. Alternatively, the one end portion of the through electrode 12 and the terminal 51 may be pressed by contraction of the adhesive layer 30.

(Third embodiment)
Next, a third embodiment of the present invention will be described. In the description of the third embodiment, the description of the same parts as those of the first embodiment will be omitted or simplified.

FIG. 16 is a cross-sectional view of the electronic component 300 of the third embodiment. As shown in this figure, in the electronic component 300 of the third embodiment, the SAW element 50 is provided on the second substrate 80 provided between the first surface 10A of the semiconductor substrate 10 and the sealing member 40. ing. Also in the present embodiment, by providing the SAW on a member different from the semiconductor substrate 10, it is difficult to be affected by the thermal stress and film stress applied to the semiconductor substrate 10 as in the second embodiment, so that excellent characteristics are obtained. Can be obtained. The SAW element 50 is provided on the surface 80A of the second substrate 80 that faces the first surface 10A of the semiconductor substrate 10. The second substrate 80 is constituted by a silicon substrate, a quartz substrate, and a substrate including silicon and diamond.
Then, one end of the through electrode 12 provided so as to protrude from the first surface 10A of the semiconductor substrate 10 and the terminal 51 of the SAW element 50 formed on the surface 80A of the second substrate 80 are electrically connected. Connected. Also in the present embodiment, it is preferable that the one end portion of the through electrode 12 and the terminal 51 are provided with a surface treatment such as gold or a brazing material on the surface so that metal connection is easy.
Alternatively, the one end portion of the through electrode 12 and the terminal 51 may be pressed by contraction of the adhesive layer 30. Thereafter, the semiconductor substrate 10 and the sealing member 40 are joined via the adhesive layer 30, and the SAW element 50 is provided in the internal space 60 surrounded by the semiconductor substrate 10, the sealing member 40, and the adhesive layer 30. A second substrate 80 is disposed.

(Fourth embodiment)
Next, a fourth embodiment of the present invention will be described. In the description of the fourth embodiment, the description of the same parts as those of the first embodiment will be omitted or simplified.

  FIG. 17 is a schematic diagram illustrating a schematic configuration of an electronic component 400 according to the fourth embodiment. As shown in this figure, in the electronic component 400 of the fourth embodiment, the space K between the functional element 1 and the substrate P is filled with the underfill resin 401.

  Also in the electronic component 400 of the present embodiment having such a structure, the external thin film (gas) is absorbed by the underfill resin 401 by the sealing thin film 2 and diffuses in the underfill resin 401 to form the functional element 1. Reaching can be prevented. Therefore, the electronic component 400 of the fourth embodiment is also a highly reliable electronic component, like the electronic component 100 of the first embodiment.

(Fifth embodiment)
Next, an electronic apparatus including the electronic components 100 to 400 according to any one of the first to fourth embodiments will be described as a fifth embodiment of the present invention.

  FIG. 18 is a diagram illustrating an example of an electronic apparatus according to the present embodiment, and is a diagram illustrating a mobile phone 500. And since the mobile telephone 500 which is an electronic device of this embodiment is provided with the electronic components 100-400 of any one of the said 1st-4th embodiment, it becomes the thing excellent in reliability.

  As mentioned above, although preferred embodiment of the electronic component which concerns on this invention, its manufacturing method, and an electronic device was described referring an accompanying drawing, it cannot be overemphasized that this invention is not limited to the said embodiment. Various shapes, combinations, and the like of the constituent members shown in the above-described embodiments are examples, and various modifications can be made based on design requirements and the like without departing from the gist of the present invention.

  For example, in the first to fourth embodiments described above, the functional element 1 of the present invention includes the SAW element 50. However, the present invention is not limited to this, and may be an element that requires sealing, for example, a functional element including a crystal resonator, a piezoelectric resonator, a piezoelectric tuning fork, and the like.

  Further, for example, by forming the sealing thin film 2 in the electronic component of the above embodiment with a material having a light shielding property, it is possible to prevent malfunction of the functional element 1 due to light irradiation.

  Further, for example, the sealing thin film 2 in the electronic component of the above embodiment may be formed as a multilayer film formed from different materials.

  Moreover, in the electronic component of the said embodiment, one board | substrate in this invention was demonstrated as the board | substrate P, and the other board | substrate was demonstrated as the functional element 1. FIG. However, the present invention is not limited to this, and one substrate in the present invention can be associated with the semiconductor substrate 10, the other substrate with the sealing member 40, and the functional element with the SAW element 50. In this case, the environment in the internal space 60 can be maintained by the sealing thin film 2.

  DESCRIPTION OF SYMBOLS 1 ... Functional element (other substrate), 2 ... Sealing thin film, 10B ... 2nd surface (active surface), 20 ... Bump, P ... Substrate (one substrate), 100-400 ... Electron Parts, 500 …… Electronic equipment

Claims (8)

One substrate,
Provided on the one substrate, the other substrate including a semiconductor substrate, a through electrode penetrating the semiconductor substrate, and a sealing member bonded to the semiconductor substrate;
A sealing thin film provided on the one substrate and covering the other substrate;
With
The sealing member has a crystal resonator on a surface facing the semiconductor substrate,
The semiconductor substrate has an integrated circuit on a surface opposite to the surface facing the sealing member;
The through electrode electrically connects the crystal resonator and the integrated circuit,
The crystal resonator is sealed in a first space between the semiconductor substrate and the sealing member,
The surface of the semiconductor substrate having the integrated circuit faces a second space between the one substrate and the other substrate.   The electronic component according to claim 1, wherein the crystal unit and the through electrode are metal-connected.   The electronic component according to claim 1, wherein the sealing thin film is made of any one of chromium, titanium, copper, aluminum, and titanium tungsten.   The electronic component according to claim 1, wherein the sealing thin film is made of any material of silicon oxide, silicon nitride, alumina, and polysilazane.     3. The electronic component according to claim 1, wherein the sealing thin film is made of any material of high density polyethylene, vinylidene chloride, polyvinyl alcohol, nylon, and ethylene vinyl alcohol.   The electronic component according to claim 1, wherein the sealing thin film is a laminate of an organic thin film and an inorganic thin film. The other substrate has an adhesive layer that bonds the semiconductor substrate and the sealing member;
The electronic component according to any one of claims 1 to 6, wherein the first space is formed by the semiconductor substrate, the sealing member, and the adhesive layer. Having a sealing resin between the one substrate and the other substrate;
The electronic component according to any one of claims 1 to 7, wherein the second space is formed by the one substrate, the other substrate, and the sealing resin.

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