JP2009088865A - Piezoelectric oscillator - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a piezoelectric oscillator capable of satisfactorily mounting a piezoelectric element package onto a semiconductor device by solving a defect in terminal arrangement. <P>SOLUTION: The piezoelectric oscillator 100 has an oscillator package 30 and a semiconductor device 1. The semiconductor device 1 has: first and second electrodes 120, 123 provided at the side of an active surface 10a of a semiconductor substrate 10; first and second through electrodes 112a, 112b that are continuous to the first and second electrodes 120, 123, respectively; and first and second back surface electrodes 115a, 115b connected to the first and second through electrodes 112a, 112b, respectively. At least one of the first and second back surface electrodes 115a, 115b is electrically connected to the corresponding one of the electrodes 112a, 112b via routing wiring 150 routed at the side of a back surface 10b. The semiconductor device 1 is electrically connected to the oscillator package 30 via the first and second back surface electrodes 115a, 115b. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a piezoelectric oscillator.

A piezoelectric oscillator in which a piezoelectric element package (vibrator package) including a crystal resonator (piezoelectric vibrating piece) and an IC chip (semiconductor device) are integrated is known.
In recent years, mobile devices such as mobile phones have been reduced in size and thickness, and the piezoelectric oscillators mounted on the mobile devices are also required to be downsized. In the semiconductor device, terminals are formed on both surfaces of a semiconductor substrate such as silicon. A piezoelectric vibrator is directly mounted on a terminal provided on one surface of the semiconductor substrate, and a terminal provided on the other surface of the semiconductor substrate is an external terminal (see, for example, Patent Document 1).
JP 2004-15444 A

By the way, the IC chip that constitutes the piezoelectric oscillator generally has a terminal arrangement corresponding to the piezoelectric element package as disclosed in the above-mentioned patent document due to problems such as manufacturing cost, and uses a general-purpose chip. Is desirable. Therefore, it is conceivable to pull out the vibrator connection terminal of such a general-purpose chip to the back surface side using the through electrode as in the prior art.
However, in such a general-purpose chip, there are cases where the vibrator terminals are arranged side by side on one end of the chip, and in this case, the through electrode drawn out from the vibrator terminal to the back side is formed on the back face of the chip. There is a possibility that a short circuit may occur due to contact with the same terminal of the mounted piezoelectric element package.

  The present invention has been made in view of such circumstances, and an object of the present invention is to provide a piezoelectric oscillator that can solve a problem in terminal arrangement and can favorably mount a piezoelectric element package on a semiconductor device. It is said.

  In order to solve the above-described problems, a piezoelectric oscillator according to the present invention includes a vibrator package formed by enclosing a piezoelectric vibrating piece therein and sealed, and a semiconductor substrate, which is electrically connected to the vibrator package. In the piezoelectric oscillator comprising the semiconductor device, the semiconductor device includes a first electrode and a second electrode provided on an active surface side of the semiconductor substrate, and an active surface side opposite to the active surface from the semiconductor substrate. A first penetrating electrode and a second penetrating electrode which are provided in a state penetrating to the back side and are respectively conducted to the first electrode and the second electrode; and a first penetrating electrode provided on the back side. A first back electrode electrically connected to the electrode, and a second back electrode provided on the back side and electrically connected to the second through electrode, the first back electrode At least one of the back electrode or the second back electrode is The semiconductor device and the vibrator package are electrically connected to the corresponding through electrode via a routing wiring routed on the back surface side, and the semiconductor device and the vibrator package are connected via the first back surface electrode and the second back surface electrode. And electrically connected.

  According to the piezoelectric oscillator of the present invention, the first and second back electrodes can be placed at arbitrary positions by forming the lead-out wiring at desired positions regardless of the positions where the first and second electrodes are formed on the active surface side. Can be arranged. Therefore, the vibrator package can be mounted on a semiconductor device having an arbitrary electrode arrangement (first and second electrodes).

In the piezoelectric oscillator, it is preferable that the routing wiring is routed along an outer peripheral portion of the semiconductor substrate.
According to this configuration, since the lead wiring is formed along the outer periphery of the substrate, it is possible to secure a large area for forming the first and second back surface electrodes.

In the piezoelectric oscillator, it is preferable that the routing wiring is covered with an insulating layer.
According to this configuration, for example, even when the routing wiring is formed in a region overlapping with the connection terminal of the vibrator package in plan view, the routing wiring is covered with the insulating layer, so that a short circuit does not occur. Therefore, the wiring can be routed to a desired position, and the degree of freedom of wiring can be improved.
Further, in the piezoelectric oscillator, a dummy wiring extending from at least one of the first back electrode or the second back electrode is provided on the back surface side of the semiconductor substrate, and the dummy wire is insulated from the insulating substrate. More preferably, it is covered by a layer.
According to this configuration, the thickness of the insulating layer on the back surface side of the semiconductor substrate can be made uniform by drawing the dummy wiring. Therefore, it is possible to prevent a problem that the vibrator package mounted on the back surface is inclined by suppressing unevenness of the surface shape on the back surface of the semiconductor substrate.

In the piezoelectric oscillator, it is preferable that the dummy wiring is formed along an outer peripheral portion of the semiconductor substrate.
According to this configuration, since the dummy wiring is formed along the outer periphery of the substrate, it is possible to secure a large area for forming the first and second back surface electrodes.

In the piezoelectric oscillator, the length of the dummy wiring is based on a total value of the lengths of the routing wiring and the dummy wiring provided in the first back surface electrode and the second back surface electrode, respectively. Preferably it is set.
According to this configuration, for example, by setting the lengths of the wirings (leading wirings and dummy wirings) connected to the first back surface electrode and the second back surface electrode substantially equal to each other, The generated stray capacitance can be reduced.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings, but the technical scope of the present invention is not limited to the following embodiments. In the drawings used for the following description, the scale of each member is appropriately changed in order to make each member a recognizable size.

(First embodiment)
FIG. 1 is a front view showing the configuration of the piezoelectric oscillator according to the first embodiment, as viewed from the active surface side of the semiconductor device constituting the piezoelectric oscillator. 2 shows a cross-sectional structure of the piezoelectric oscillator 100 shown in FIG. 1, and specifically, FIG. 2 is a view corresponding to the cross-sectional structure taken along line AA ′ in FIG. FIG. 3 is a plan configuration diagram of the semiconductor device 1 viewed from the back side, and FIG. 4 is a diagram illustrating a schematic configuration of a package mounted on the piezoelectric oscillator.

  As shown in FIG. 2, the piezoelectric oscillator 100 is electrically connected to the vibrator package 30 in which a crystal vibrator (piezoelectric vibratory piece) is housed and sealed, and the vibrator package 30. And a semiconductor device 1.

  The semiconductor device 1 is composed mainly of the element substrate 10. The element substrate 10 is separated into pieces by dicing a silicon wafer as will be described later, and an IC chip can be exemplified as the semiconductor device 1. Here, the surface of the element substrate 10 on which an integrated circuit portion (not shown) having, for example, transistors and memory elements is formed is referred to as an active surface 10a, and the opposite surface is referred to as a back surface 10b.

  The element substrate 10 is formed in a rectangular shape, and the package connection first electrode (first electrode) 120, the package connection second electrode (second electrode) 123, the external connection electrode 122 on the active surface 10a side, In addition, an electrode 121 that does not contribute to connection with the outside is provided. The package connection first electrode 120 and the package connection second electrode 123 are arranged along one short side direction of the element substrate 10. Further, the electrodes 121 that do not contribute to the connection with the outside are disposed along the short side direction opposite to the side on which the package connection electrodes 120 and 123 are disposed on the element substrate 10. The external connection electrode 122 is disposed along the long side direction of the element substrate 10. The electrode 121 that does not contribute to connection with the outside is, for example, an inspection electrode, a write electrode for frequency adjustment, or a dummy electrode.

  A part of the external connection electrode 122 is routed to a predetermined position on the active surface 10a by a rearrangement wiring layer to be described later, and electrically connected to an external connection device to supply drive power, a drive signal, and the like. It is what is done. The semiconductor device 1 can drive the vibrator package 30.

  In addition, the element substrate 10 is provided in a state of penetrating from the active surface 10a side to the back surface 10b side, and is electrically connected to the package connection first electrode 120 and the package connection second electrode 123, respectively. An electrode 112a and a second through electrode 112b are provided.

  Further, on the back surface 10 b side of the element substrate 10, the first back electrode 115 a that is electrically connected to the first electrode 120 for package connection and the second electrode 123 for package connection are electrically connected. A second back electrode 115b.

  Specifically, one end side of the first through electrode 112a is connected to the back surface of the package connection first electrode 120, and the other end side is provided on the back surface 10b of the element substrate 10 via the back surface insulating film 114. Are connected to a wiring (leading wiring) 150. The wiring 150 is connected to the first back electrode 115a. That is, the wiring 150 is routed from the first through electrode 112a to the first back electrode 115a.

The second through electrode 112b has one end connected to the back surface of the package connecting second electrode 123, and the other end provided to the back surface 10b of the element substrate 10 via the back insulating film 114. It is formed in contact with the back electrode 115b.
With this configuration, in this embodiment, as shown in FIG. 3, the first and second back electrodes 115 a and 115 b are arranged along the short sides of the element substrate 10.

  Thus, the lead-out position of the package connection first electrode 120 on the active surface 10 a is moved to the reverse side of the package connection second electrode 123 by the wiring 150 to the opposite short side.

  The wiring 150 is covered with an insulating layer 180. As shown in FIG. 3, the insulating layer 180 is formed in a frame shape on the back surface 10b of the element substrate 10 so as to cover the wiring 150 and a part of the first and second back surface electrodes 115a and 115b. Is formed. The first and second back electrodes 115a and 115b exposed from the insulating layer 180 correspond to the connection terminals 35 of the transducer package 30 and have substantially the same area.

  By providing such an insulating layer 180, for example, even when the wiring 150 is arranged in a region overlapping the connection terminal 35 of the vibrator package 30 in a plan view, there is no problem because the insulating layer 180 is provided between the wiring 150. Will not occur. Therefore, the wiring 150 can be routed to a desired position, and the degree of freedom in routing the wiring 150 can be improved.

  In the present embodiment, the wiring 150 is routed along the outer periphery of the element substrate 10. By forming the wiring 150 along the outer periphery of the element substrate 10 in this way, it is possible to secure a large formation region for the first and second back surface electrodes 115a and 115b.

On the other hand, a rearrangement wiring layer 130 is formed on the active surface 10 a side of the element substrate 10.
Specifically, the rearrangement wiring layer 130 exposes the external connection electrode 122 provided on the base film 139 and the upper surface of the external connection electrode 122 as shown in FIGS. The passivation film 138 provided on the base film 139, the first wiring 131 electrically connected to the external connection electrode 122, and the first insulating layer 133 provided on the first wiring 131. A second wiring 134 formed on the first insulating layer 133 and electrically connected to the first wiring 131, and a second insulating layer covering the second wiring 134 and the first insulating layer 133. 135. Note that the first insulating layer 133 functions as a stress relaxation layer.

  Further, bumps 137 for connecting to an external substrate P such as a printed circuit board are provided on the second wiring 134. A part of the first wiring 131 is exposed from the first insulating layer 133 to form a land portion 136, and the land portion 136 and the second wiring 134 are electrically connected.

  The rearrangement wiring layer 130 is formed so that the second wiring 134 is folded back with respect to the first wiring 131, and a part of the bump 137 is arranged at a position overlapping the external connection electrode 122 in plan view. ing. According to this configuration, since the rearrangement wiring layer 130 is formed of two layers of wiring, the bump 137 can be disposed at various positions, for example, immediately above the external connection electrode 122. Therefore, the area where the bumps 137 can be arranged can be enlarged, and the pitch between the external connection electrodes 122 can be substantially enlarged. Therefore, the piezoelectric oscillator 100 can be mounted on the external substrate P having various terminal shapes, and the substrate mountability can be improved.

  The electrodes 120, 121, 122, and 123 are provided on the base film 139 on the active surface 10 a side of the element substrate 10, and a passivation film 138 is provided to cover the electrodes 120, 121, 122, and 123. It has been. The passivation film 138 is formed in a state in which a part of the upper surface of the first electrode for package connection 120, the second electrode for package connection 123, and the electrode 121 that does not contribute to the connection to the outside is exposed. A metal film 124 is provided so as to cover the portion.

  In the piezoelectric oscillator 100 according to the present embodiment, the first and second back electrodes 115a and 115b in the semiconductor device 1 and the connection terminal 35 in the vibrator package 30 are bonded to each other by solder (not shown) or the like. Are electrically connected.

  In the resonator package 30, for example, as shown in FIG. 4, a crystal resonator 32 is sandwiched between a first lid member 31 and a second lid member 33, and the crystal resonator 32 is sealed in this state. It may be a thing. The first lid member 31 is formed of a light-transmitting base material such as glass or quartz, and a glass-made one is used in this embodiment. Similar to the first lid member 31, the second lid member 33 is formed of a translucent substrate such as glass or quartz.

The first lid member 31 and the second lid member 33 are bonded together by anodic bonding, gold-tin alloy bonding, or covalent bonding by plasma irradiation in a state where the crystal resonator 32 is sandwiched, and are hermetically sealed. ing.
Further, the resonator package 30 may be a resonator package in which a crystal resonator is mounted in a digging ceramic substrate and sealed with a glass lid.

  As the crystal unit 32, for example, a tuning fork type crystal unit was used. The tuning fork type crystal resonator 32 is made of a thin plate-shaped crystal piece having a tuning fork type planar shape in which two arms extend in parallel in the same direction from the base. An internal terminal is formed at the base, and a connection terminal 35 that is electrically connected to the internal terminal is formed on the first lid member 31 side.

  Examples of the material of the electrodes 120, 121, 122, and 123 include titanium (Ti), titanium nitride (TiN), aluminum (Al), copper (Cu), and alloys containing these.

  Further, as materials for the first and second wirings 131 and 134 and the wiring 150, gold (Au), copper (Cu), silver (Ag), titanium (Ti), tungsten (W), titanium tungsten ( TiW), titanium nitride (TiN), nickel (Ni), nickel vanadium (NiV), chromium (Cr), aluminum (Al), palladium (Pd), and the like. These wirings 131, 134, and 150 may have a single-layer structure made of the above-described materials, or may be combined to form a laminated structure.

  The material of the metal film 124 is preferably the same as the wiring forming material. Note that the metal film (at least one layer in the case of a laminated structure) 124 is preferably formed using a material having higher corrosion resistance than the electrodes 120, 121, 122, and 123, thereby preventing electrode corrosion. Thus, the occurrence of electrical failure can be prevented.

The passivation film 138 is formed of an insulating material such as silicon oxide (SiO ₂ ) or silicon nitride (Si ₃ N ₄ ), like the base film 139. The first and second insulating layers 133 and 135 and the insulating layer 180 are made of resin (synthetic resin). The first and second insulating layers 133 and 135 and the insulating layer 180 may be made of polyimide resin, silicone-modified polyimide resin, epoxy resin, silicone-modified epoxy resin, acrylic resin, phenol resin, BCB (benzocyclobutene) and PBO. Any insulating material such as (polybenzoxazole) may be used. Note that an insulating material such as silicon oxide (SiO ₂ ) or silicon nitride (Si ₃ N ₄ ) may be used as a material for forming the first and second insulating layers 133 and 135.

  By the way, generally, the connection terminals of the package are positioned at both ends along the short side direction of the semiconductor device during mounting. Therefore, in a plan view, the first electrode for package connection 120 and the second electrode for package connection 123 are included in the same connection terminal, and the back surface electrode 115a that can be electrically connected to the package connection electrodes 120 and 121. , 115b is important.

  Therefore, in the present embodiment, the back electrodes 115a and 115b that can be electrically connected to the package connection electrodes 120 and 123 when viewed from the back surface 10b side by routing the wiring 150 are short sides of the element substrate 10 as shown in FIG. Are spaced apart at both ends.

Therefore, the through electrode 112 that is electrically connected to the package connection electrodes 120 and 123 and the back electrode 115 that is connected to the through electrode 112 are connected to the same connection terminal 35 in the vibrator package 30 when the vibrator package 30 is mounted. It is possible to prevent problems such as contact and leading to poor mounting. That is, the first and second back-side electrodes 115a and 115b are arranged at arbitrary positions by forming the lead wiring at a desired position regardless of the formation position of the package connection electrodes 120 and 123 on the active surface 10a side. be able to.
Therefore, the vibrator package 30 can be satisfactorily mounted on the semiconductor device 1 formed of a general-purpose semiconductor chip having an arbitrary electrode arrangement (package connection electrodes 120 and 123).

(Piezoelectric oscillator manufacturing method)
Next, a process for manufacturing the piezoelectric oscillator 100 will be described with reference to FIGS. In the present embodiment, a plurality of semiconductor devices 1 are simultaneously formed on the same silicon wafer 250 (see FIG. 7). However, for simplicity, one semiconductor device 1 is formed in FIGS. Shows when to do.

  First, as shown in FIG. 5A, after forming a base film 139 on the surface (active surface) 10 a of the element substrate 10, electrodes 120, 121, 122, and 123 are formed on the base film 139. Then, a passivation film 138 is formed on the electrodes 120, 121, 122, and 123, and the base film 139 covering the electrodes 120, 121, 122, and 123 is removed by a known photolithography method and etching method.

  Next, a metal film 124 connected to the package connection first electrode 120 exposed from the passivation film 138, the package connection second electrode 123, and the electrode 121 that does not contribute to the connection to the outside is formed. Further, the first wiring 131 connected to the external connection electrode 122 exposed from the passivation film 138 is formed.

  Next, a first insulating layer 133 is formed so as to cover the metal film 124 and the first wiring 131. Then, the first insulating layer 133 covering the first wiring 131 is selectively removed by a known photolithography method, and the land portion 136 is exposed. Then, the second wiring 134 is formed on the first insulating layer 133 so as to be electrically connected to the land portion 136.

  Here, as a method of forming the first and second wirings 131 and 134, for example, TiW and Cu are formed in this order by a sputtering method, and then Cu is formed by a plating method.

  Next, the second insulating layer 135 is formed so as to cover the first wiring 131 and the first insulating layer 133. Here, the second insulating layer 135 is formed so as to cover a region other than the region where the bump 137 is formed on the second wiring 134. Thereby, the rearrangement wiring layer 130 as shown in FIG. 2 can be formed on the active surface 10 a side of the element substrate 10.

  Thereafter, as shown by a two-dot chain line in FIG. 5A, the active surface 10 a side of the element substrate 10 is supported by the support member 200 made of a glass wafer through the adhesive layer 160. In addition, as this support member, the thing of the substantially same magnitude | size as the silicon wafer 250 (refer FIG. 7) is used. Thereby, when thinly processing the element substrate 10 from the back surface 10b side, it is possible to prevent the element substrate 10 from being cracked.

  The adhesive layer 160 is preferably a curable adhesive such as a thermosetting adhesive or a photocurable adhesive. Thereby, it is possible to firmly attach the support member 200 while absorbing irregularities on the active surface 10a of the element substrate 10. Further, when a photocurable adhesive such as an ultraviolet curable adhesive is used as the adhesive, it is preferable to employ a light transmissive material such as glass as the support member 200 as described above. In this case, the adhesive can be easily cured by irradiating light from the outside of the support member 200.

  After the element substrate 10 is attached to the support member 200 in this way, the element substrate 10 is ground (back grind) from the back surface 10b side of the element substrate 10 using a grinding member such as a grindstone, and has a thickness of about 100 μm, for example. Until it is thinner. Thereafter, the crushed layer formed on the surface of the substrate by grinding by spin etching or dry polishing is removed. Thereby, the malfunction that a crack enters into the element substrate 10 from a crushing layer, or a crack arises is prevented. Note that CMP (chemical mechanical polishing) can also be used as a method for thinning the substrate.

  Subsequently, after the element substrate 10 is formed to a predetermined thickness, the photoresist 170 is masked on the back surface 10b of the element substrate 10 with the back surface 10b side of the element substrate 10 facing up, as shown in FIG. Form as. Then, the element substrate 10 and the base film 139 corresponding to the package connection first electrode 120 and the package connection second electrode 123 forming the through electrode 112 are removed by dry etching using the photoresist 170 as a mask. As a result, as shown in FIG. 6A, the back surfaces of the package connection first electrode 120 and the package connection second electrode 123 provided on the active surface 10 a are exposed from the back surface 10 b of the element substrate 10.

Although the photoresist 170 is used as a mask, the present invention is not limited to this. For example, a SiO ₂ film may be used as a hard mask, or a photoresist mask and a hard mask may be used in combination. Further, the etching method is not limited to dry etching, and wet etching, laser processing, or a combination thereof may be used.

Next, a back insulating film 114 extending from the inner wall of the opening of the element substrate 10 to the back surface 10b is formed. This insulating film is provided to prevent the occurrence of current leakage, erosion of the element substrate 10 due to oxygen, moisture, etc., and is formed by using tetraethyl silicate (Tetra Ethyl Ortho) formed by PECVD (Plasma Enhanced Chemical Vapor Deposition). Silicate: Si (OC ₂ H ₅ ) ₄ : hereinafter referred to as TEOS), that is, PE-TEOS, and TEOS formed using ozone CVD, that is, silicon oxide (SiO ₂ ) formed using O 3 -TEOS or CVD. Can be used. The insulating film may be other material or resin as long as it has insulating properties. Then, by removing the insulating films provided on the back surfaces of the package connection first electrode 120 and the package connection second electrode 123 by dry etching or laser processing, an element as shown in FIG. 6B is obtained. A back insulating film 114 is formed to cover the opening side wall of the substrate 10 and the back surface 10b.

  Next, using an electrochemical plating (ECP) method, the opening is plated as shown in FIG. 7A, and the first and second through electrodes 112a and 112b are formed in the opening. A conductive material for forming is disposed. Thus, the lower ends of the first and second through electrodes 112a and 112b and the exposed first electrode 120 for package connection and the second electrode 123 for package connection are connected to the first electrode 120 for package connection and the second electrode for package connection. Electrical connection is made on the back surface of the electrode 123.

  As the conductive material for forming these through electrodes 112a and 112b, for example, copper (Cu) can be used, and these through electrodes 112a and 112b have copper (Cu) in the openings provided in the element substrate 10. It is formed by being buried.

  The step of forming the through electrodes 112a and 112b in the present embodiment includes, for example, a step of forming (stacking) TiN and Cu by a sputtering method and a step of forming Cu by a plating method. In addition, the process of forming (stacking) TiW and Cu by a sputtering method and the process of forming Cu by a plating method may be included. Note that the method of forming the through electrodes 112a and 112b is not limited to the above-described method, and a conductive paste, molten metal, metal wire, or the like may be embedded.

  In this embodiment, the through electrodes 112a and 112b are formed by embedding the conductive material in the opening, but the conductive material is deposited on the inner wall of the opening without being completely embedded. It can also be set as the form electrically connected by the back surface of 120,123.

  After the through electrodes 112a and 112b are formed, a wiring 150 that is electrically connected to the second through electrode 112b is formed on the back surface 10b of the element substrate 10. The wiring 150 is formed by, for example, forming TiW and Cu in this order by a sputtering method and then forming Cu by a plating method.

Subsequently, the first back electrode 115a electrically connected to the first through electrode 112a and the second back electrode 115b electrically connected to the wiring 150 are plated on the back surface 10b of the element substrate 10. By forming by the method, a form as shown in FIG.
When the wiring 150 is formed using a plating method (Cu), the first and second back electrodes 115a and 115b can be formed in the same process.

  As described above, the back electrodes 115a and 115b are formed at the same position as the connection terminal 35 in the vibrator package 30 and the size of the opposing region is substantially the same. Further, the back electrodes 115a and 115b are in contact with the through electrodes 112a and 112b on the back surface side, and are formed in a concave shape in which the central portion is recessed with respect to the edge portion by being formed by plating. Solder (not shown) made of, for example, lead-free solder is mounted on the back electrodes 115a and 115b having such a concave shape.

  Then, a dicing tape is attached to the back surface 10b side of the silicon wafer, and the support member 200 attached to the opposite surface is removed. Further, the adhesive layer 160 holding the support member 200 is removed. Note that the support member 200 and the adhesive layer 160 may be removed simultaneously by softening or dissolving the adhesive layer 160 with a solvent or the like. Thereafter, as shown in FIG. 8, the silicon wafer 250 is diced (cut) for each semiconductor device 1 by the dicing device 210. Thereby, each semiconductor device 1 can be separated from the silicon wafer 250.

Subsequently, the second wiring 134 provided on the active surface 10a side of the semiconductor device 1 is made of, for example, lead-free solder as shown in FIG. 1 on the land formed by being exposed from the second insulating layer 135. A bump 137 is mounted. In addition, when providing the bump 137, the form which prints a solder ball on the 2nd wiring 134, or the solder coat formed by application | coating may be sufficient.
Note that the bump forming step may be formed after the rearrangement wiring formation in FIG. 5 is completed and before the adhesive layer 160 for attaching the support member 200 is provided. In that case, it is desirable to form the adhesive layer 160 to a thickness that covers the height of the formed terminal. As a method for forming the bump, a solder ball can be mounted, or a solder paste can be supplied by printing and formed by heating such as a reflow method. In that case, it is desirable to wash in order to remove the remaining flux.
The semiconductor device 1 is manufactured through the above steps.

Subsequently, a vibrator package 30 formed by a conventionally known method is prepared and mounted on each of the semiconductor devices 1. Then, by heating the vibrator package 30 and the semiconductor device 1 by a heating means such as a reflow furnace or a plate, the solder provided on the back electrodes 115a and 115b is melted and then cured to cure the back electrodes 115a, 115b and the connection terminal 35 are connected.
Through the above process, the piezoelectric oscillator 100 in which the semiconductor device 1 and the vibrator package 30 are electrically connected through the through electrodes 112a and 112b can be manufactured.

  As described above, in the present embodiment, the wiring 150 is routed to a desired position on the back surface 10b side of the element substrate 10, so that the first connection is possible regardless of the formation position of the package connection electrodes 120 and 123 on the active surface 10a side. The second back electrodes 115a and 115b can be arranged at arbitrary positions. Therefore, even when a general-purpose semiconductor chip having an arbitrary electrode arrangement (package connection electrodes 120 and 123) is used as the semiconductor device 1, the vibrator package 30 can be satisfactorily mounted on the semiconductor device 1.

(Second Embodiment)
Next, another embodiment of the piezoelectric oscillator of the present invention will be described. The configuration of the piezoelectric oscillator according to the present embodiment on the back surface 10b side of the semiconductor device 1 is different from the above-described embodiment, and other configurations are the same. Therefore, in the following description, the same components as those in the above embodiment are given the same reference numerals, and the description thereof is omitted or simplified.

  In the present embodiment, dummy wirings 116 a and 116 b extending from the first back electrode 115 a and the second back electrode 115 b are provided on the back surface 10 b side of the element substrate 10 in the semiconductor device 1. Here, the dummy wirings 116a and 116b are wirings that do not contribute to electrical connection.

  As shown in FIG. 9, the wiring 150 routed from the first through electrode 112a to the first back electrode 115a is formed along the outer periphery of the semiconductor substrate. Further, the dummy wirings 116a and 116b are also formed along the outer periphery of the semiconductor substrate.

  An insulating layer 180 is provided in a frame shape on the back surface 10b of the element substrate 10 so as to cover the wiring 150 and the dummy wirings 116a and 116b. Therefore, according to the present embodiment, the wiring 150, the dummy wirings 116a and 116b, and the back electrodes 115a and 115b are provided under the insulating layer 180. Therefore, the insulating layer 180 is formed on the back surface 10b of the element substrate 10. The surface shape is substantially uniform.

  With such a configuration in which the dummy wirings 116a and 116b are routed, it is possible to make the film thickness uniform in the insulating layer 180 on the back surface 10b side of the element substrate 10, and to suppress unevenness of the surface shape of the back surface 10b, thereby suppressing the element substrate. 10 can be prevented from being tilted when the vibrator package 30 is mounted on the back surface 10b of the ten. Furthermore, by forming the dummy wirings 116a and 116b, the wiring 150, and the insulating layer 180 covering them along the outer periphery of the element substrate 10, the formation region of the first and second backside electrodes 115a and 115b is impaired. There is no.

(Third embodiment)
Next, another embodiment of the piezoelectric oscillator of the present invention will be described. The piezoelectric oscillator according to this embodiment is different from the above-described second embodiment in dummy wiring, and the other configurations are the same. Therefore, in the following description, the same components as those in the above embodiment are given the same reference numerals, and the description thereof is omitted or simplified.

  The length of the dummy wiring is preferably set based on the total length of the wiring 150 provided on the first back electrode 115a and the second back electrode 115b and the length of the dummy wiring, respectively. Specifically, it is preferable to set the total lengths of the first and second back electrodes 115a and 115b to be substantially equal.

  In the present embodiment, as shown in FIG. 10, the dummy wiring 116b is provided only on the second back electrode 115b. With this configuration, the total wiring length (dummy wiring 116b and wiring 150) is adjusted for the first through electrode 112a provided with the wiring 150 having a long wiring length. Therefore, stray capacitance generated due to the total wiring length can be reduced.

(Fourth embodiment)
Next, another embodiment of the piezoelectric oscillator of the present invention will be described. The piezoelectric oscillator according to the present embodiment is different from the above-described third embodiment in the routing pattern of the dummy wiring, and the other configurations are the same. Therefore, in the following description, the same components as those in the above embodiment are given the same reference numerals, and the description thereof is omitted or simplified.

  In the present embodiment, as shown in FIG. 11, the first through electrode 112 a and the second through electrode 112 b (the package connection first electrode 120 and the package connection second electrode 123) are in the center of the long side of the element substrate 10. It is arranged in the part.

  A wiring 150 extends along the long side of the element substrate 10 from the first through electrode 112a and the second through electrode 112b. These wirings 150 and 150 are connected to the first back electrode 115a and the second back electrode 115b, respectively. Note that the length of the wiring 150 that connects the first through electrode 112a and the first back electrode 115a is longer than the length of the wiring 150 that connects the second through electrode 112b and the second back electrode 115b. Is getting shorter.

  In the present embodiment, dummy wirings 116a and 116b extend from the first back electrode 115a and the second back electrode 115b, respectively. An insulating layer 180 is provided along the long side of the element substrate 10 so as to cover the first and second back electrodes 115a and 115b and the first and second through electrodes 112a and 112b.

  As described above, the length of the dummy wiring is set so that the total value of the lengths of the wiring 150 and the dummy wiring provided on the first back electrode 115a and the second back electrode 115b, respectively, is substantially equal. Is desirable.

  In the present embodiment, the length of the dummy wiring 116a extending from the first back electrode 115a is longer than the length of the dummy wiring 116b extending from the second back electrode 115b. That is, as shown in FIG. 11, the total lengths of the wirings in the first back electrode 115a and the second back electrode 115b are substantially equal. Therefore, according to the configuration according to the present embodiment, stray capacitance can be further reduced as compared with the configuration according to the third embodiment.

(Electronics)
The electronic apparatus according to the present invention is configured by including the piezoelectric oscillator 100 mounted on an external substrate P such as a printed wiring board. Specifically, as an example of an electronic apparatus provided with the piezoelectric oscillator 100, a mobile phone 300 as shown in FIG.
The mobile phone 300 also has an external substrate P on which the piezoelectric oscillator 100 in which the vibrator package 30 is satisfactorily mounted is mounted on the semiconductor device 1 made of the general-purpose semiconductor chip as described above. Therefore, it becomes a low-cost and highly reliable one.

  In addition, examples of electronic devices to which the present invention is applied include various devices such as a remote controller such as a television and a digital camera.

  As described above, the preferred embodiments according to the present invention have been described with reference to the accompanying drawings, but the present invention is not limited to the examples. Various shapes, combinations, and the like of the constituent members shown in the above-described examples are examples, and various modifications can be made based on design requirements and the like without departing from the gist of the present invention.

It is a front view which shows the structure of the piezoelectric oscillator which concerns on 1st Embodiment. It is a figure which shows the cross-section in a piezoelectric oscillator. It is the plane block diagram which looked at the semiconductor device from the back side. It is a figure which shows schematic structure of the package mounted in a piezoelectric oscillator. It is a figure for demonstrating the manufacturing process of a piezoelectric oscillator. FIG. 6 is a diagram for explaining a manufacturing process of the piezoelectric oscillator subsequent to FIG. 5. FIG. 7 is a diagram for explaining a manufacturing process of the piezoelectric oscillator subsequent to FIG. 6. It is a figure explaining the dicing process of a silicon wafer. It is a figure which shows the structure of the piezoelectric oscillator which concerns on 2nd Embodiment. It is a figure which shows the structure of the piezoelectric oscillator which concerns on 3rd Embodiment. It is a figure which shows the structure of the piezoelectric oscillator which concerns on 4th Embodiment. It is a figure which shows schematic structure of the mobile telephone which is one Embodiment of an electronic device.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 ... Semiconductor device, 10 ... Element board | substrate (semiconductor substrate), 10a ... Active surface, 10b ... Back surface, 30 ... Vibrator package, 32 ... Quartz crystal vibrator (piezoelectric vibrating piece), 100 ... Piezoelectric oscillator, 112a ... 1st Through electrode, 112b ... second through electrode, 115a ... first back electrode, 115b ... second back electrode, 116a ... dummy wiring, 116b ... dummy wiring, 120 ... first electrode for package connection (first electrode) , 122 ... External connection electrode, 123 ... Package connection second electrode (second electrode), 130B ... Rearrangement wiring layer, 137 ... Bump (external connection terminal), 150 ... First wiring (leading wiring), 180 ... insulating layer

Claims (6)

In a piezoelectric oscillator comprising: a vibrator package formed by accommodating a piezoelectric vibrating piece therein and sealed; and a semiconductor device having a semiconductor substrate and electrically connected to the vibrator package.
The semiconductor device includes a first electrode and a second electrode provided on the active surface side of the semiconductor substrate;
A first through electrode and a second through electrode, which are provided so as to penetrate from the active surface side of the semiconductor substrate to the back surface side opposite to the active surface and are electrically connected to the first electrode and the second electrode, respectively. When,
A first back electrode provided on the back side and electrically connected to the first through electrode;
A second back surface electrode provided on the back surface side and electrically connected to the second through electrode,
At least one of the first back electrode or the second back electrode is electrically connected to a corresponding through electrode via a routing wiring routed on the back side,
The piezoelectric oscillator, wherein the semiconductor device and the vibrator package are electrically connected via the first back electrode and the second back electrode.   The piezoelectric oscillator according to claim 1, wherein the routing wiring is routed along an outer peripheral portion of the semiconductor substrate.   The piezoelectric oscillator according to claim 1 or 2, wherein the routing wiring is covered with an insulating layer.   A dummy wiring extending from at least one of the first back electrode or the second back electrode is provided on the back surface side of the semiconductor substrate, and the dummy wire is covered with the insulating layer. The piezoelectric oscillator according to claim 3.   The piezoelectric oscillator according to claim 4, wherein the dummy wiring is formed along an outer peripheral portion of the semiconductor substrate.   The length of the dummy wiring is set based on a total value of the lengths of the routing wiring and the dummy wiring provided on the first back electrode and the second back electrode, respectively. The piezoelectric oscillator according to claim 4 or 5.

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