JP2010273185A - デジタルフェーズロックドループ回路 - Google Patents

デジタルフェーズロックドループ回路 Download PDF

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Publication number
JP2010273185A
JP2010273185A JP2009124157A JP2009124157A JP2010273185A JP 2010273185 A JP2010273185 A JP 2010273185A JP 2009124157 A JP2009124157 A JP 2009124157A JP 2009124157 A JP2009124157 A JP 2009124157A JP 2010273185 A JP2010273185 A JP 2010273185A
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Japan
Prior art keywords
clock signal
circuit
phase
signal
value
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JP2009124157A
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Japanese (ja)
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JP2010273185A5 (enrdf_load_stackoverflow
Inventor
Satoshi Fujino
藤野　　聡
Masafumi Watanabe
雅史 渡邉
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Renesas Electronics Corp
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Renesas Electronics Corp
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Priority to JP2009124157A priority Critical patent/JP2010273185A/ja
Publication of JP2010273185A publication Critical patent/JP2010273185A/ja
Publication of JP2010273185A5 publication Critical patent/JP2010273185A5/ja
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  • Manipulation Of Pulses (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
JP2009124157A 2009-05-22 2009-05-22 デジタルフェーズロックドループ回路 Pending JP2010273185A (ja)

Priority Applications (1)

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JP2009124157A JP2010273185A (ja) 2009-05-22 2009-05-22 デジタルフェーズロックドループ回路

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JP2009124157A JP2010273185A (ja) 2009-05-22 2009-05-22 デジタルフェーズロックドループ回路

Publications (2)

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JP2010273185A true JP2010273185A (ja) 2010-12-02
JP2010273185A5 JP2010273185A5 (enrdf_load_stackoverflow) 2012-05-17

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JP2009124157A Pending JP2010273185A (ja) 2009-05-22 2009-05-22 デジタルフェーズロックドループ回路

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013081084A (ja) * 2011-10-04 2013-05-02 Renesas Electronics Corp デジタルｐｌｌ回路、半導体集積回路装置
CN105356896A (zh) * 2015-09-29 2016-02-24 西安空间无线电技术研究所 一种用于小型化Ka双频发射机的多频切换系统及方法
US10686457B2 (en) 2018-05-16 2020-06-16 Seiko Epson Corporation Circuit device, oscillator, electronic apparatus and vehicle
CN112834822A (zh) * 2020-04-30 2021-05-25 神亚科技股份有限公司 时序误差的检测电路

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06120812A (ja) * 1992-10-01 1994-04-28 Mitsubishi Denki Eng Kk 半導体集積回路
JPH08288798A (ja) * 1995-04-18 1996-11-01 Mitsubishi Electric Corp 入力信号ラッチ回路
JP2002076886A (ja) * 2000-06-30 2002-03-15 Texas Instruments Inc デジタル小位相検出器
US20020131538A1 (en) * 2000-10-23 2002-09-19 Staszewski Robert B. Method and apparatus for asynchronous clock retiming
JP2003283476A (ja) * 2002-03-22 2003-10-03 Nec Engineering Ltd バーストデータ受信装置

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06120812A (ja) * 1992-10-01 1994-04-28 Mitsubishi Denki Eng Kk 半導体集積回路
JPH08288798A (ja) * 1995-04-18 1996-11-01 Mitsubishi Electric Corp 入力信号ラッチ回路
JP2002076886A (ja) * 2000-06-30 2002-03-15 Texas Instruments Inc デジタル小位相検出器
US20020131538A1 (en) * 2000-10-23 2002-09-19 Staszewski Robert B. Method and apparatus for asynchronous clock retiming
JP2003283476A (ja) * 2002-03-22 2003-10-03 Nec Engineering Ltd バーストデータ受信装置

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013081084A (ja) * 2011-10-04 2013-05-02 Renesas Electronics Corp デジタルｐｌｌ回路、半導体集積回路装置
CN105356896A (zh) * 2015-09-29 2016-02-24 西安空间无线电技术研究所 一种用于小型化Ka双频发射机的多频切换系统及方法
CN105356896B (zh) * 2015-09-29 2018-02-09 西安空间无线电技术研究所 一种用于小型化Ka双频发射机的多频切换系统及方法
US10686457B2 (en) 2018-05-16 2020-06-16 Seiko Epson Corporation Circuit device, oscillator, electronic apparatus and vehicle
CN112834822A (zh) * 2020-04-30 2021-05-25 神亚科技股份有限公司 时序误差的检测电路

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