JP2010261900A - Semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To generate a clock signal (CLK) supplied to a logic circuit or the like loaded on a sensor control circuit, without loading an exclusive oscillation circuit. <P>SOLUTION: In the sensor control circuit, a waveform shaping part for shaping a loop oscillation signal into a pulse waveform and generating the clock signal (CLK) is loaded between a sensor driving part and a logic part, without loading the exclusive OSC (oscillation circuit) for generating the clock signal, and a boosting part for supplying a high-voltage power source (VPPH) for EEPROM rewriting is added. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a semiconductor device, and more particularly to a semiconductor device having a sensor control circuit that drives a sensor element, detects a signal from the sensor element, converts the signal to a desired level, and outputs the signal.

  In recent years, with the development of MEMS (Micro Electro Mechanical Systems), sensors have been used in various fields and applications.

  Since such a sensor may be used in small portable devices such as camera shake correction and notebook PC drop detection, for example, downsizing of the sensor system and low current consumption are particularly important. .

FIG. 1 shows a configuration example of a conventional semiconductor device.
The conventional semiconductor device includes a sensor control circuit 10 and a sensor element 20. The sensor control circuit 10 generates a loop oscillation signal. The sensor element 20 is driven according to a loop oscillation signal from the sensor control circuit 10, converts the detected physical quantity into an electric quantity, and outputs it as a sensed signal. In addition, the sensor element 20 feeds back (feeds back) the loop oscillation signal to the sensor control circuit 10.

  The sensor control circuit 10 includes a sensor drive unit 11, a sense signal detection unit 12, a logic unit 13, an EEPROM (Electrically Erasable and Programmable Read Only Memory) unit 14, a POC (Power On Clear Circuit) unit 15, OSC (oscillation circuit) unit 16.

  The sensor driving unit 11 is a circuit for exciting the sensor element 20 connected to the sensor control circuit 10, and feedback (feedback) is applied via the sensor element 20, and loop oscillation is performed at a constant frequency. The sense signal detector 12 detects a sensed signal from the sensor element 20, converts it to a desired signal level, and outputs it. The logic unit 13 is a logic circuit mounted on the sensor control circuit 10. The EEPROM unit 14 is a storage device that can electrically rewrite the contents. Here, the EEPROM unit 14 receives write (WRITE), read (READ), and add (ADD) commands from the logic unit 13, and exchanges data (DATA) with the logic unit 13. The POC unit 15 monitors the power supply voltage, and inputs a clear signal to the logic unit 13 when the power supply voltage satisfies a predetermined condition. The OSC (oscillation circuit) unit 16 inputs a clock signal (CLK) to the logic unit 13.

  As specific examples of the sensor control circuit having such a sensor driving unit and a sense signal detecting unit, Japanese Patent Application Laid-Open No. 2008-261585 (Patent Document 1), Japanese Patent Application Laid-Open No. 2008-170294 (Patent Document 2), An angular velocity sensor is disclosed in Japanese Unexamined Patent Application Publication No. 2007-57340 (Patent Document 3), Japanese Unexamined Patent Application Publication No. 2006-112949 (Patent Document 4), and Japanese Unexamined Patent Application Publication No. 2005-265724 (Patent Document 5).

  In the sensor control circuit as shown in each of the related arts described above, for example, a piezoelectric vibrator formed of a piezoelectric element such as crystal is driven by a drive signal VD of a drive circuit and receives a feedback current IFD from the vibrator. An oscillation loop is formed and the vibrator is excited. When a physical quantity such as angular velocity is applied to such a vibrator, a Coriolis force is applied in a direction perpendicular to the vibration direction of the vibrator, and detection signals ISP and ISM are generated from the vibrator. A sense signal converted to a desired level is obtained by amplifying, synchronous detection, and filtering the detection signal by a sense signal detection unit.

  Such a sensor control circuit needs to correct variations such as sensitivity, gain, offset, temperature characteristics (temperature characteristics) of the oscillator and the control circuit, and stores correction data in the EEPROM unit 14 as shown in FIG. ing. The logic unit 13 reads data from the EEPROM unit 14 by the control signal and sets the data in the register (TRIM_REG). The sensor drive unit 11 and the sense signal detection unit 12 operate by being corrected to an optimum value by data set in the register. The logic unit 13 that controls the reading of the EEPROM unit 14 starts operation with a clear signal from the POC unit 15 as a trigger when the power is turned on, and the clock signal (CLK) supplied to the logic unit 13 is an OSC (oscillation circuit) unit. 16 is input.

  As described above, in the sensor control circuit of the conventional semiconductor device as shown in FIG. 1, the clock signal (CLK) of the control logic for reading the correction data from the EEPROM is supplied from the transmission circuit. Examples of such an oscillation circuit include a CR oscillation circuit and a ring oscillation circuit. At this time, the oscillation circuit is provided as a dedicated oscillation circuit for supplying a clock signal (CLK) to a logic for reading data stored in the EEPROM.

  However, when the oscillation circuit is mounted on the sensor control circuit, there are problems that the chip size increases and power consumption increases.

Japanese Patent Laid-Open No. 2008-261685 JP 2008-170294 A JP 2007-57340 A JP 2006-112949 A JP 2005-265724 A

  An object of the present invention is to provide a sensor control circuit that generates a clock signal (CLK) supplied to a logic circuit or the like mounted on the sensor control circuit without mounting a dedicated oscillation circuit.

  The semiconductor device of the present invention outputs a loop oscillation signal at a constant frequency, excites a sensor element, and a sensor drive unit that receives feedback via the sensor element, and shapes the loop oscillation signal into a pulse waveform and clocks it. A waveform shaping unit that generates a signal and a logic unit that inputs a clock signal are provided.

  Furthermore, the semiconductor device of the present invention receives at least one command from the logic unit among write (WRITE), read (READ), and add (ADD), and exchanges data (DATA) with the logic unit. An (Electrically Erasable and Programmable Read Only Memory) unit and a booster unit that supplies a high voltage power source (VPPH) for data rewriting to the EEPROM unit according to a clock signal are provided.

  Realize downsizing and cost reduction of sensor control circuit.

It is a block diagram which shows the structural example of the conventional semiconductor device. It is a block diagram which shows the structural example of the semiconductor device of this invention. It is a figure which shows the example of the waveform of the internal signal of the semiconductor device of this invention.

Embodiments of the present invention will be described below with reference to the accompanying drawings.
FIG. 2 shows a configuration example of the semiconductor device of the present invention.
The semiconductor device of the present invention includes a sensor control circuit 10 and a sensor element 20.

  The sensor control circuit 10 includes a sensor drive unit 11, a sense signal detection unit 12, a logic unit 13, an EEPROM (Electrically Erasable and Programmable Read Only Memory) unit 14, a waveform shaping unit 17, and a boosting unit 18.

  The sensor driving unit 11 is a circuit for exciting the sensor element 20 connected to the sensor control circuit 10. Here, the sensor drive unit 11 oscillates at a constant frequency, excites the sensor element 20, and feedback (feedback) is applied via the sensor element 20. That is, the sensor driving unit 11 oscillates at a constant frequency.

  The sense signal detector 12 detects a sensed signal from the sensor element 20, converts it to a desired signal level, and outputs it. In addition, the sense signal detection unit 12 operates by being corrected to an optimum value by data set in the register (TRIM_REG) of the logic unit 13.

  The logic unit 13 is a logic circuit mounted on the sensor control circuit 10. The logic unit 13 reads data from the EEPROM unit 14 and sets the data in a register (TRIM_REG).

  The EEPROM unit 14 is a storage device that can electrically rewrite the contents. Here, the EEPROM unit 14 receives write (WRITE), read (READ), and add (ADD) commands from the logic unit 13, and receives data (DATA) from the logic unit 13 via a data bus or the like. Send and receive.

  The POC unit 15 monitors the power supply voltage, and inputs a clear signal to the logic unit 13 when the power supply voltage satisfies a predetermined condition.

  The waveform shaping unit 17 is disposed between the sensor driving unit 11 and the logic unit 13, and receives a loop oscillation signal from the sensor driving unit 11 as an input, shapes the loop oscillation signal into a pulse waveform, and generates a clock signal (CLK). The clock signal (CLK) is supplied to the logic unit 13 and the boosting unit 18. That is, the waveform shaping unit 17 inputs the loop oscillation signal shaped into a pulse waveform to the CLK port of the logic unit 13 or the boosting unit 18 as a clock signal (CLK).

  The boosting unit 18 supplies a high-voltage power supply (VPPH) for rewriting data stored in the EEPROM unit 14 in accordance with the clock signal (CLK) supplied from the waveform shaping unit 17. Here, the boosting unit 18 boosts the input power supply voltage in accordance with the clock signal (CLK) supplied from the waveform shaping unit 17 and supplies the boosted voltage to the EEPROM unit 14.

  The sensor element 20 is driven according to a loop oscillation signal from the sensor control circuit 10, converts the detected physical quantity into an electric quantity, and outputs it as a sensed signal. In addition, the sensor element 20 feeds back (feeds back) the loop oscillation signal to the sensor control circuit 10.

  In the present invention, the sensor control circuit includes a waveform shaping unit that shapes a loop oscillation signal into a pulse waveform to generate a clock signal (CLK) between the sensor driving unit and the logic unit. Therefore, in the present invention, it is not necessary to mount a dedicated OSC (oscillation circuit) unit for generating a clock signal separately in the sensor control circuit.

  Further, in the present invention, in the sensor control circuit, the above-described waveform shaping unit is configured by a relatively small-scale, low current consumption circuit such as a comparator or a Schmitt circuit, thereby comparing with a conventional sensor control circuit, The chip size can be reduced and the current consumption can be reduced.

  Furthermore, in the present invention, a booster is added to the sensor control circuit for supplying a high voltage power supply (VPPH) for rewriting EEPROM. Usually, rewriting of EEPROM requires a high voltage of about several tens of volts, and it is generally applied from the outside at the time of rewriting or a booster circuit such as a charge pump circuit is mounted. To obtain the clock signal (CLK).

Below, the detailed structure of the sensor drive part 11 and the waveform shaping part 17 is demonstrated.
The sensor drive unit 11 includes an IV converter 111, a BPF (Band-Pass Filter) 112, a rectifier 113, a smoother 114, an AGC (Automatic Gain Control) 115, and a drive amplifier 116.

  The IV converter 111 is a current-voltage conversion circuit that generates a predetermined voltage based on an input current. Here, the IV converter 111 is connected to the sensor element 20, uses a signal fed back (feedback) from the sensor element 20 as an input current, and generates and outputs a predetermined voltage based on the input current.

  The BPF 112 is a filter (band pass filter) that passes only signals having a frequency in a certain frequency range and attenuates signals having other frequencies. Here, the BPF 112 receives a signal related to the output voltage of the IV converter 111 and passes only a signal having a predetermined frequency.

  The rectifier 113 is a power converter that converts AC power into DC power (rectification and forward conversion). Here, the rectifier 113 rectifies and outputs a signal having a predetermined frequency that has passed through the BPF 112 to DC power.

  The smoother 114 is a circuit for smoothing the pulsating current contained in the rectified current to a state closer to direct current. The pulsating current is a current having a property that the direction of current flow is constant and the magnitude of the current changes periodically. The current rectified by the rectifier 113 draws a waveform like a continuum of peaks on either the positive or negative side, which is called a pulsating flow. Since the pulsating current cannot be handled as a direct current as it is, it is necessary to make the voltage uniform by using the smoother 114. Here, the smoother 114 smoothes and outputs the pulsating current included in the current input from the rectifier 113.

  The AGC 115 is a circuit that automatically adjusts the amplification factor (gain) of an amplifier circuit (such as an amplifier) so that a constant output can be obtained even when the amplitude of an input electrical signal varies. Here, the AGC 115 receives the output signal of the BPF 112 and the output signal of the smoother 114 as inputs, and automatically adjusts and outputs the amplification factor (gain) of the drive amplifier 116.

  The drive amplifier 116 is a current drive circuit that outputs a current corresponding to an input waveform. Here, the drive amplifier 116 receives the output signal of the AGC 115 and outputs a current corresponding to the input waveform. The drive amplifier 116 supplies a current corresponding to the input waveform to the waveform shaping unit 17 and the sensor element 20 as a loop oscillation signal.

  The waveform shaping unit 17 includes a first binarization circuit 171, a second binarization circuit 172, and an AND circuit 173.

  The first binarization circuit 171 and the second binarization circuit 172 define a predetermined threshold for the potential of the input signal, and “1 (High)” if the potential of the input signal exceeds the threshold. If it is lower, it is shaped into a pulse waveform and output as “0 (Low)”.

  The first binarization circuit 171 receives the loop oscillation signal from the drive amplifier 116, shapes the loop oscillation signal into a pulse waveform, and sends this pulse waveform signal (first pulse waveform signal) to the AND circuit 173. Supply.

  The second binarization circuit 172 receives the output signal of the smoother 114, shapes the output signal of the smoother 114 into a pulse waveform, and converts the pulse waveform signal (second pulse waveform signal) into an AND circuit 173. To supply. The second binarization circuit 172 supplies the pulse waveform signal to the logic unit 13 as a reset (RST) signal.

  The AND circuit 173 receives the output signal (first pulse waveform signal) of the first binarization circuit 171 and the output signal (second pulse waveform signal) of the second binarization circuit 172 as input. The logical product of the two input signals is supplied to the logic unit 13 and the booster unit 18 as a clock signal (CLK).

  In the present invention, the logical product of the output of the smoother in the driver circuit and the waveform-shaped clock signal (CLK) is supplied to the logic unit as the clock signal (CLK). A clock signal (CLK) is supplied to the unit.

  In the present invention, since the output of the smoother is used as a reset (RST) signal of the logic unit, it is not necessary to mount a POC (power-on-clear circuit) unit.

FIG. 3 shows an example of the waveform of the internal signal of the sensor control circuit.
Here, the “drive unit oscillation unstable region” indicates a region where the loop oscillation signal that is the output signal of the sensor drive unit 11 is unstable. The “drive unit oscillation stable region” indicates a region where the loop oscillation signal that is the output signal of the sensor drive unit 11 is stable. “BPF output” indicates an output signal of the BPF 112. “Rectifier output” indicates an output signal of the rectifier 113. “Smoother output” indicates an output signal of the smoother 114. “AGC output” indicates an output signal of the AGC 115. “First binarization circuit output” indicates an output signal (first pulse waveform signal) of the first binarization circuit 171. “Second binarization circuit output” indicates an output signal (second pulse waveform signal) of the second binarization circuit 172. “Logic unit CLK input” indicates a clock signal (CLK) input to the logic unit 13. That is, “logic portion CLK input” indicates an output signal of the AND circuit 173.

  The “BPF output” and the “rectifier output” have weak analog waveforms in the “driving unit oscillation unstable region”, and regular analog waveforms of a certain size in the “driving unit oscillation stable region”.

  In the “smoothing device output”, the output potential is increasing in the “driving unit oscillation unstable region”, and a constant output is maintained in the “driving unit oscillation stable region”. For example, in the smoother 114 using a capacitor, the capacitor is charged until the voltage exceeds a certain value, and conversely, smoothing is performed by the property of the capacitor that discharges when the voltage falls below a certain value. In this case, when the capacitor is sufficiently charged, the output of the smoother 114 is stabilized.

  The “AGC output” has an irregular analog waveform in the “drive unit oscillation unstable region” and a regular analog waveform in the “drive unit oscillation stable region”.

  The “first binarized circuit output” has an irregular pulse waveform in the “driving unit oscillation unstable region” and a regular pulse waveform in the “driving unit oscillation stable region”.

  The “second binarization circuit output” and the “logic unit CLK input” rise when switching from the “drive unit oscillation unstable region” to the “drive unit oscillation stable region”. The "logic circuit output" maintains that state, and the "logic unit CLK input" has a regular pulse waveform as in the "first binary circuit output".

  In the semiconductor device manufacturing method of the present invention, each circuit is arranged so as to form the semiconductor device of the present invention.

  That is, in the semiconductor device manufacturing method of the present invention, the sensor control circuit does not include a dedicated OSC (oscillation circuit) unit for generating a clock signal, and a loop oscillation signal is provided between the sensor driving unit and the logic unit. A waveform shaping unit for shaping the signal into a pulse waveform to generate a clock signal (CLK) is mounted, and a boosting unit is added to supply a high voltage power supply (VPPH) for rewriting EEPROM.

  As described above, the semiconductor device of the present invention includes a sensor control circuit and a sensor element that converts a physical quantity into an electrical quantity. The sensor control circuit is connected to the sensor element, detects a change in the amount of electricity from the sensor element, and a sensor driving unit that outputs a driving signal for exciting the sensor element by performing loop oscillation via the sensor element. Sense signal detection unit for converting to a desired electric signal level, EEPROM unit for storing data (initial setting data) for setting the initial value of the sensor control circuit, and logic unit for reading the initial setting data from the EEPROM unit And a waveform shaping unit that outputs a pulse-shaped clock signal (CLK) using the signal of the sensor driving unit as an input.

  The present invention is characterized in that the logic unit operates by a clock signal (CLK) from the waveform shaping unit.

  Further, the present invention is characterized in that the waveform shaping unit supplies a clock signal (CLK) to the booster circuit for EEPROM rewriting of the sensor control circuit.

  As mentioned above, although embodiment of this invention was explained in full detail, actually, it is not restricted to said embodiment, Even if there is a change of the range which does not deviate from the summary of this invention, it is included in this invention.

DESCRIPTION OF SYMBOLS 10 ... Sensor control circuit 11 ... Sensor drive part 111 ... IV converter 112 ... BPF (Band-Pass Filter)
113 ... Rectifier 114 ... Smoother 115 ... AGC (Automatic Gain Control)
DESCRIPTION OF SYMBOLS 116 ... Drive amplifier 12 ... Sense signal detection part 13 ... Logic part 14 ... EEPROM (Electrically Erasable and Programmable Read Only Memory) part 15 ... POC (power on clear circuit) part 16 ... OSC (oscillation circuit) part 17 ... Waveform Shaping unit 171 ... First binarization circuit 172 ... Second binarization circuit 173 ... AND circuit 18 ... Boosting unit 20 ... Sensor element

Claims (8)

A sensor driving unit that outputs a loop oscillation signal at a constant frequency, excites the sensor element, and receives feedback via the sensor element;
A waveform shaping unit for shaping the loop oscillation signal into a pulse waveform to generate a clock signal;
A semiconductor device comprising: a logic unit for inputting the clock signal. The semiconductor device according to claim 1,
An EEPROM (Electrically Erasable and Programmable Read Only) that receives at least one instruction of writing (WRITE), reading (READ), and adding (ADD) from the logic unit and exchanges data (DATA) with the logic unit. Memory) part,
A semiconductor device further comprising: a boosting unit that supplies a high-voltage power supply (VPPH) for rewriting the data to the EEPROM unit in accordance with the clock signal. The semiconductor device according to claim 2,
The sensor driving unit is
An IV converter that generates a predetermined voltage based on an input current from the sensor element;
Of the output voltage of the IV converter, a BPF (Band-Pass Filter) that passes a signal of a predetermined frequency;
A rectifier that rectifies AC power into DC power for the signal that has passed through the BPF;
A smoother for smoothing and outputting a pulsating flow included in the output signal of the rectifier;
An AGC (Automatic Gain Control) that receives the output signal of the BPF and the output signal of the smoother, and automatically adjusts and outputs the amplification factor (gain) of the amplifier circuit;
A drive amplifier for supplying a current corresponding to an input waveform to the sensor element and the waveform shaping unit as the loop oscillation signal;
The waveform shaping unit
A first binarization circuit that shapes the loop oscillation signal into a pulse waveform and outputs a first pulse waveform signal;
A second binarization circuit for shaping the output signal of the smoother into a pulse waveform and outputting a second pulse waveform signal;
A semiconductor device comprising: an AND circuit that supplies a logical product of the first pulse waveform signal and the output signal of the second pulse waveform signal to the logic unit and the boost unit as the clock signal. The semiconductor device according to claim 3,
The second binarization circuit supplies the second pulse waveform signal to the logic unit as a reset signal. Semiconductor device. A sensor oscillation unit that outputs a loop oscillation signal at a constant frequency, excites the sensor element, and receives feedback (feedback) through the sensor element is arranged,
A waveform shaping unit that shapes the loop oscillation signal into a pulse waveform to generate a clock signal,
A method for manufacturing a semiconductor device, wherein a logic unit for inputting the clock signal is arranged. A method of manufacturing a semiconductor device according to claim 5,
An EEPROM (Electrically Erasable and Programmable Read Only) that receives at least one instruction of writing (WRITE), reading (READ), and adding (ADD) from the logic unit and exchanges data (DATA) with the logic unit. Memory) part,
A method of manufacturing a semiconductor device, comprising: a step-up unit that supplies a high-voltage power supply (VPPH) for rewriting the data to the EEPROM unit in accordance with the clock signal. A method of manufacturing a semiconductor device according to claim 6,
In the sensor drive unit,
An IV converter that generates a predetermined voltage based on an input current from the sensor element is disposed,
Among the output voltages of the IV converter, a BPF (Band-Pass Filter) that passes a signal of a predetermined frequency is disposed,
A rectifier that rectifies AC power into DC power is arranged for the signal that has passed through the BPF,
Arranging a smoother for smoothing and outputting the pulsating current contained in the output signal of the rectifier;
An AGC (Automatic Gain Control) that automatically adjusts the amplification factor (gain) of the amplifier circuit and outputs the BPF output signal and the output signal of the smoother is input,
A drive amplifier that supplies a current according to an input waveform to the sensor element and the waveform shaping unit as the loop oscillation signal is disposed,
In the waveform shaping section,
Arranging the first binarization circuit for shaping the loop oscillation signal into a pulse waveform and outputting the first pulse waveform signal;
Arranging a second binarization circuit for shaping the output signal of the smoother into a pulse waveform and outputting a second pulse waveform signal;
An AND circuit for supplying a logical product of the first pulse waveform signal and the output signal of the second pulse waveform signal to the logic unit and the boost unit as the clock signal. A method of manufacturing a semiconductor device according to claim 7,
A method of manufacturing a semiconductor device, wherein the second binarization circuit is arranged in a layout in which the second pulse waveform signal is supplied from the second binarization circuit to the logic unit as a reset signal.

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