JP2010251738A - Nitride semiconductor epitaxial substrate - Google Patents

Nitride semiconductor epitaxial substrate Download PDF

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JP2010251738A
JP2010251738A JP2010071381A JP2010071381A JP2010251738A JP 2010251738 A JP2010251738 A JP 2010251738A JP 2010071381 A JP2010071381 A JP 2010071381A JP 2010071381 A JP2010071381 A JP 2010071381A JP 2010251738 A JP2010251738 A JP 2010251738A
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single crystal
crystal layer
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buffer region
nitride semiconductor
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JP5631034B2 (en
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Koji Oishi
浩司 大石
Jun Komiyama
純 小宮山
Kenichi Eriguchi
健一 江里口
Yoshihisa Abe
芳久 阿部
Akira Yoshida
晃 吉田
Shunichi Suzuki
俊一 鈴木
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Coorstek KK
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Abstract

<P>PROBLEM TO BE SOLVED: To provide a nitride semiconductor epitaxial substrate having a buffer structure with excellent manufacturing efficiency, wherein cracking of a device active layer is suppressed and while improvement in crystallinity such as reduction in dislocation density is achieved, warpage accompanying film thickening of a nitride semiconductor is suppressed. <P>SOLUTION: The nitride semiconductor epitaxial substrate includes: an Si substrate 1; a first multilayer buffer region 3, wherein an Al<SB>a</SB>Ga<SB>1-a</SB>N (0.9≤a≤1.0) single-crystal layer 31 of 2 to 10 nm in thickness and an Al<SB>b</SB>Ga<SB>1-b</SB>N (0≤b≤0.1) single-crystal layer 32 of 10 to 30 nm in thickness are alternately and repeatedly laminated; a second multilayer buffer region 4, wherein an Al<SB>c</SB>Ga<SB>1-c</SB>N (0.9≤c≤1.0) single-crystal layer 41 of 2 to 10 nm in thickness and an Al<SB>d</SB>Ga<SB>1-d</SB>N (0≤d≤0.1) single-crystal layer 42 of 200 to 500 nm in thickness are alternately and repeatedly laminated; a GaN single-crystal layer 5; and an Al<SB>x</SB>Ga<SB>1-x</SB>N (0≤x≤1) single-crystal layer 6. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

本発明は、発光ダイオード、レーザ発光素子、また、高速・高温での動作可能な電子素子等に好適に用いられるHEMT(High Electron Mobility Transistor;高電子移動度トランジスタ)構造を有する窒化物半導体エピタキシャル基板に関する。   The present invention relates to a nitride semiconductor epitaxial substrate having a HEMT (High Electron Mobility Transistor) structure suitably used for a light emitting diode, a laser light emitting element, an electronic element operable at a high speed and a high temperature, and the like. About.

窒化ガリウム(GaN)や窒化アルミニウム(AlN)等に代表される窒化物半導体は、広いバンドキャップを有しており、高い電子移動度、高い耐熱性等の優れた特性を備えているため、発光デバイスや、高速・高温での動作が可能な電子デバイス等への応用が期待されている。   Nitride semiconductors typified by gallium nitride (GaN) and aluminum nitride (AlN) have a wide band cap, and have excellent characteristics such as high electron mobility and high heat resistance. Applications to devices and electronic devices that can operate at high speed and high temperature are expected.

前記窒化物半導体は、融点が高く、窒素の平衡蒸気圧が非常に高いため、融液からのバルク結晶成長は容易ではない。このため、実用化レベルにある単結晶は、異種基板上へのヘテロエピタキシャル成長により作製されている。
従来、GaNまたはAlN単結晶層をエピタキシャル成長させるための基板には、サファイア、6H−SiC、Si等が用いられていた。
Since the nitride semiconductor has a high melting point and a very high equilibrium vapor pressure of nitrogen, bulk crystal growth from the melt is not easy. For this reason, a single crystal at a practical level is produced by heteroepitaxial growth on a heterogeneous substrate.
Conventionally, sapphire, 6H—SiC, Si, or the like has been used as a substrate for epitaxially growing a GaN or AlN single crystal layer.

これらの基板の中でも、Si基板は、他の基板と比べて、結晶性に優れ、大面積で、低価格で得られることから、窒化物半導体の製造コストを低減させることができ、好適である。また、成熟したSi単結晶製造技術により、高品質な結晶を安定供給することができる。
さらに、Si基板上への窒化物半導体単結晶層の形成は、その後のデバイス工程が、現在のデバイス工程をそのまま使用することができるため、開発コスト面においても優位であり、実用化が求められている。
Among these substrates, the Si substrate is excellent in crystallinity as compared with other substrates, has a large area, and can be obtained at a low price. Therefore, the manufacturing cost of the nitride semiconductor can be reduced, which is preferable. . Moreover, high-quality crystals can be stably supplied by mature Si single crystal manufacturing technology.
Furthermore, the formation of the nitride semiconductor single crystal layer on the Si substrate is advantageous in terms of development cost because the subsequent device process can use the current device process as it is, and practical application is required. ing.

しかしながら、Si基板上に窒化物半導体結晶を成膜する場合、Siと窒化物半導体との熱膨張係数の相違により、窒化物半導体単結晶膜に反りや割れが生じ、また、Siと窒化物半導体との結晶格子定数の差に起因して、多数の転位や結晶欠陥が生じるという問題が生じていた。   However, when a nitride semiconductor crystal is formed on a Si substrate, warpage or cracking occurs in the nitride semiconductor single crystal film due to the difference in thermal expansion coefficient between Si and nitride semiconductor, and Si and nitride semiconductor. Due to the difference in the crystal lattice constants, a number of dislocations and crystal defects have occurred.

これに対しては、Si基板と窒化物半導体層との間にバッファ層を設けて、上記クラックや転位を低減させることが一般的に行われている。
例えば、非特許文献1には、AlN層厚を5nm、GaN層厚を20nm以上のAlN/GaNの多層膜からなる多層構造バッファ領域を設けることにより、膜厚に対する反りが低減され、ひび割れの導入も防ぐことができることが記載されている。
For this, a buffer layer is generally provided between the Si substrate and the nitride semiconductor layer to reduce the cracks and dislocations.
For example, in Non-Patent Document 1, by providing a multilayer structure buffer region composed of an AlN / GaN multilayer film with an AlN layer thickness of 5 nm and a GaN layer thickness of 20 nm or more, warpage with respect to the film thickness is reduced, and cracks are introduced. It is also described that it can be prevented.

また、特許文献1には、前記多層構造バッファ領域として、厚さ5nmのAlxGa1-xN(0.5≦x≦1)からなる第1のバッファ層と、厚さ20nmのAlyGa1-yN(0.01≦y≦0.2)からなる第2のバッファ層を交互に複数層積層させることにより、表面が原子層レベルで平滑で、しかも、クラックのない窒化物半導体を形成することができることが記載されている。 In Patent Document 1, as the multilayer buffer region, a first buffer layer made of Al x Ga 1-x N (0.5 ≦ x ≦ 1) having a thickness of 5 nm and Al y having a thickness of 20 nm are disclosed. A nitride semiconductor having a smooth surface at the atomic layer level and no cracks by alternately laminating a plurality of second buffer layers made of Ga 1-y N (0.01 ≦ y ≦ 0.2). It is described that can be formed.

ところで、半導体素子の耐圧向上のためには、窒化物半導体の厚さを増大させることが望ましいが、窒化物半導体の厚膜化に伴い、窒化物半導体エピタキシャル基板の反りも増大するという課題も生じていた。   By the way, in order to improve the breakdown voltage of the semiconductor element, it is desirable to increase the thickness of the nitride semiconductor, but with the increase in the thickness of the nitride semiconductor, there is a problem that the warpage of the nitride semiconductor epitaxial substrate also increases. It was.

これに対しては、例えば、特許文献2に、AlN/GaNの多層構造バッファ領域と、これよりも薄いAlN/GaNのサブ多層構造バッファ領域との間に、単層構造バッファ領域を設け、これらの層の厚さを変化させて積層することにより厚膜化すれば、窒化物半導体エピタキシャル基板の反りを低減させることができることが開示されている。   For this, for example, in Patent Document 2, a single layer structure buffer region is provided between an AlN / GaN multilayer buffer region and a thinner AlN / GaN sub multilayer structure buffer region. It is disclosed that the warpage of the nitride semiconductor epitaxial substrate can be reduced if the thickness is increased by changing the thickness of these layers to increase the thickness.

特開2007−67077号公報JP 2007-67077 A 特開2008−205117号公報JP 2008-205117 A

大塚康二,「応用物理」,2007年,第76巻,第5号,pp.489−494Otsuka Koji, “Applied Physics”, 2007, Vol. 76, No. 5, pp. 489-494

しかしながら、上記非特許文献1や特許文献1に記載されているようなAlN/GaNの多層膜を形成する場合、AlNの成長速度がGaNの成長速度よりも遅いため、厚膜化するためには、窒化物半導体エピタキシャル基板の製造効率に劣る。   However, when forming an AlN / GaN multilayer film as described in Non-Patent Document 1 and Patent Document 1, the growth rate of AlN is slower than the growth rate of GaN. The manufacturing efficiency of the nitride semiconductor epitaxial substrate is inferior.

また、上記特許文献2に記載されているような複数種類の多層構造バッファ領域および単層構造バッファ領域を様々な膜厚に変化させて形成することは、製造工程が煩雑となり、厚膜化するためには、この場合も、窒化物半導体エピタキシャル基板の製造効率に劣る。   In addition, forming a plurality of types of multilayer structure buffer regions and single layer structure buffer regions in various film thicknesses as described in Patent Document 2 makes the manufacturing process complicated and increases the film thickness. Therefore, also in this case, the manufacturing efficiency of the nitride semiconductor epitaxial substrate is inferior.

したがって、窒化物半導体エピタキシャル基板の製造においては、クラックの発生の抑制や、転位密度の低減化等の結晶性の向上を図ることができ、かつ、反りを抑制しつつ、窒化物半導体のデバイス活性層を厚膜化することができ、しかも、効率的に形成することができるバッファ構造が求められていた。   Therefore, in the manufacture of a nitride semiconductor epitaxial substrate, it is possible to improve the crystallinity such as the generation of cracks and the reduction of dislocation density, and the device activity of the nitride semiconductor while suppressing warpage. There has been a demand for a buffer structure that can increase the thickness of the layer and that can be efficiently formed.

本発明は、上記技術的課題を解決するためになされたものであり、デバイス活性層でのクラック発生が抑制され、かつ、転位密度の低減等の結晶性の向上を図りつつ、窒化物半導体の厚膜化に伴う反りも抑制された、製造効率に優れたバッファ構造を備えた窒化物半導体エピタキシャル基板を提供することを目的とするものである。   The present invention has been made to solve the above technical problem, and the occurrence of cracks in the device active layer is suppressed, and while improving crystallinity such as reduction of dislocation density, the nitride semiconductor is improved. An object of the present invention is to provide a nitride semiconductor epitaxial substrate having a buffer structure excellent in manufacturing efficiency, in which warpage associated with thickening is suppressed.

本発明に係る窒化物半導体エピタキシャル基板は、Si基板と、前記Si基板上に、厚さ2nm以上10nm以下のAlaGa1-aN(0.9≦a≦1.0)単結晶層および厚さ10nm以上30nm以下のAlbGa1-bN(0≦b≦0.1)単結晶層が交互に繰り返し積層された第1の多層バッファ領域と、前記第1の多層バッファ領域上に、厚さ2nm以上10nm以下のAlcGa1-cN(0.9≦c≦1.0)単結晶層および厚さ200nm以上500nm以下のAldGa1-dN(0≦d≦0.1)単結晶層が交互に繰り返し積層された第2の多層バッファ領域と、前記第2の多層バッファ領域上に形成されたGaN単結晶層と、前記GaN単結晶層上に形成されたAlxGa1-xN(0<x<1)単結晶層とを備えていることを特徴とする。
このような2種の多層バッファ領域を設けることにより、デバイス活性層でのクラック発生を抑制し、かつ、転位密度の低減等の結晶性の向上を図ることができ、また、窒化物半導体の厚膜化に伴う反りも抑制することができる。
A nitride semiconductor epitaxial substrate according to the present invention includes a Si substrate, an Al a Ga 1-a N (0.9 ≦ a ≦ 1.0) single crystal layer having a thickness of 2 nm to 10 nm on the Si substrate, and A first multilayer buffer region in which Al b Ga 1-b N (0 ≦ b ≦ 0.1) single crystal layers having a thickness of 10 nm or more and 30 nm or less are alternately and repeatedly stacked on the first multilayer buffer region; Al c Ga 1-c N (0.9 ≦ c ≦ 1.0) single crystal layer having a thickness of 2 nm to 10 nm and Al d Ga 1-d N (0 ≦ d ≦ 0) having a thickness of 200 nm to 500 nm .1) Second multilayer buffer region in which single crystal layers are alternately and repeatedly stacked, GaN single crystal layer formed on the second multilayer buffer region, and Al formed on the GaN single crystal layer x Ga 1-x N (0 <x <1) single crystal layer It is a sign.
By providing such two types of multilayer buffer regions, it is possible to suppress the occurrence of cracks in the device active layer and to improve the crystallinity such as the reduction of the dislocation density. Warpage associated with film formation can also be suppressed.

前記窒化物半導体エピタキシャル基板の中でも、特に、Si基板と、前記Si基板上に、厚さ5nmのAlN単結晶層および厚さ20nmのGaN単結晶層が交互に繰り返し積層された第1の多層バッファ領域と、前記第1の多層バッファ領域上に、厚さ5nmのAlN単結晶層および厚さ200nm以上500nm以下のGaN単結晶層が交互に繰り返し積層された第2の多層バッファ領域と、前記第2の多層バッファ領域上に形成されたGaN単結晶層と、前記活性層上に形成されたAlxGa1-xN(0<x<1)単結晶層とを備えていることが好ましい。 Among the nitride semiconductor epitaxial substrates, in particular, a first multilayer buffer in which an Si substrate and an AlN single crystal layer having a thickness of 5 nm and a GaN single crystal layer having a thickness of 20 nm are alternately stacked on the Si substrate. A second multilayer buffer region in which an AlN single crystal layer having a thickness of 5 nm and a GaN single crystal layer having a thickness of 200 nm to 500 nm are alternately and repeatedly stacked on the first multilayer buffer region; It is preferable that a GaN single crystal layer formed on the two multilayer buffer regions and an Al x Ga 1-x N (0 <x <1) single crystal layer formed on the active layer.

また、前記窒化物半導体エピタキシャル基板においては、前記Si基板と第1の多層バッファ領域との間に、前記Si基板上に、AlN単結晶層およびAlyGa1-yN(0<y<1)単結晶層が積層された初期バッファ領域を備えていることが好ましい。
成長初期バッファとしては、Si、GaNとの親和性が高く、メルトバックエッチング反応を起こさないAlN単結晶が適しており、また、AlN単結晶層表面の段差を平坦化するためには、GaNとAlNの混晶であるAlGaN単結晶層も挿入して、上記のような初期バッファ領域を形成しておくことが好ましい。
In the nitride semiconductor epitaxial substrate, an AlN single crystal layer and Al y Ga 1-y N (0 <y <1) are formed on the Si substrate between the Si substrate and the first multilayer buffer region. It is preferable to provide an initial buffer region in which single crystal layers are stacked.
As an initial growth buffer, AlN single crystal that has high affinity with Si and GaN and does not cause a meltback etching reaction is suitable, and in order to flatten the step on the surface of the AlN single crystal layer, GaN and It is preferable to insert an AlGaN single crystal layer which is a mixed crystal of AlN to form the initial buffer region as described above.

本発明によれば、デバイス活性層でのクラック発生が抑制され、かつ、転位密度の低減等の結晶性の向上を図りつつ、窒化物半導体の厚膜化に伴う反りも抑制された窒化物半導体エピタキシャル基板を提供することができる。
さらに、本発明に係る窒化物半導体エピタキシャル基板は、製造効率に優れているという利点も有しており、また、デバイスプロセスにおける歩留の向上にも寄与し得るものである。
According to the present invention, the occurrence of cracks in the device active layer is suppressed, and the nitride semiconductor in which the warpage accompanying the increase in the thickness of the nitride semiconductor is suppressed while improving the crystallinity such as the reduction of the dislocation density. An epitaxial substrate can be provided.
Furthermore, the nitride semiconductor epitaxial substrate according to the present invention has an advantage that it is excellent in production efficiency, and can also contribute to an improvement in yield in the device process.

本発明に係る窒化物半導体エピタキシャル基板の層構造を示す概略断面図である。It is a schematic sectional drawing which shows the layer structure of the nitride semiconductor epitaxial substrate which concerns on this invention. 図1の第1の多層バッファ領域3および第2の多層バッファ領域4部分の拡大図である。FIG. 3 is an enlarged view of a first multilayer buffer region 3 and a second multilayer buffer region 4 in FIG. 1.

以下、本発明を、図面を参照して、より詳細に説明する。
図1に、本発明に係る窒化物半導体エピタキシャル基板の層構造の概略を示す。図1に示す窒化物半導体エピタキシャル基板は、Si基板1上に、初期バッファ領域2、第1の多層バッファ領域3、第2の多層バッファ領域4、GaN単結晶層5、AlxGa1-xN単結晶層6が、順次積層された構造を備えているものである。
前記GaN単結晶層5は、デバイス活性層として形成されているものであり、その上にAlxGa1-xN(0<x<1)単結晶層6が積層されることにより、HEMT構造が形成される。
Hereinafter, the present invention will be described in more detail with reference to the drawings.
FIG. 1 shows an outline of the layer structure of a nitride semiconductor epitaxial substrate according to the present invention. The nitride semiconductor epitaxial substrate shown in FIG. 1 has an initial buffer region 2, a first multilayer buffer region 3, a second multilayer buffer region 4, a GaN single crystal layer 5, an Al x Ga 1-x on a Si substrate 1. The N single crystal layer 6 has a structure in which the N single crystal layers 6 are sequentially stacked.
The GaN single crystal layer 5 is formed as a device active layer, and an Al x Ga 1-x N (0 <x <1) single crystal layer 6 is laminated thereon to form a HEMT structure. Is formed.

図2に、図1の窒化物半導体エピタキシャル基板の第1の多層バッファ領域3および第2の多層バッファ領域4の拡大図を示す。第1の多層バッファ領域3は、厚さ2nm以上10nm以下のAlaGa1-aN(0.9≦a≦1.0)単結晶層31および厚さ10nm以上30nm以下のAlbGa1-bN(0≦b≦0.1)単結晶層32が、Si基板1側から交互に繰り返し積層された多層構造からなる。また、第2の多層バッファ領域4は、厚さ2nm以上10nm以下のAlcGa1-cN(0.9≦c≦1.0)単結晶層41および厚さ200nm以上500nm以下のAldGa1-dN(0≦d≦0.1)単結晶層42が、交互に繰り返し積層された多層構造からなる。 FIG. 2 shows an enlarged view of the first multilayer buffer region 3 and the second multilayer buffer region 4 of the nitride semiconductor epitaxial substrate of FIG. The first multilayer buffer region 3 includes Al a Ga 1-a N (0.9 ≦ a ≦ 1.0) single crystal layer 31 having a thickness of 2 nm to 10 nm and Al b Ga 1 having a thickness of 10 nm to 30 nm. The -bN (0 ≦ b ≦ 0.1) single crystal layer 32 has a multi-layer structure in which layers are alternately and repeatedly stacked from the Si substrate 1 side. The second multi-layer buffer area 4 has a thickness of 2nm or more 10nm less Al c Ga 1-c N ( 0.9 ≦ c ≦ 1.0) single crystal layer 41 and the thickness of 200nm or more 500nm following Al d The Ga 1-d N (0 ≦ d ≦ 0.1) single crystal layer 42 has a multilayer structure in which layers are alternately and repeatedly stacked.

前記第1の多層バッファ領域3においては、これを構成するAlaGa1-aN単結晶層31の厚さは、第2の多層バッファ領域4を構成するAlcGa1-cN単結晶層41と同等であるが、AlbGa1-bN単結晶層32の厚さは、第2の多層バッファ領域4を構成するAldGa1-dN単結晶層42の厚さよりも薄い。このため、第1の多層バッファ領域3は、第2の多層バッファ領域4よりも、単位厚さ当たりの積層数が多い、すなわち、異種層の界面の数が多いため、転位密度の低減効果が大きいが、反りの抑制効果においては劣る。 In the first multilayer buffer region 3, the thickness of the Al a Ga 1-a N single crystal layer 31 constituting this is the same as that of the Al c Ga 1-c N single crystal constituting the second multilayer buffer region 4. Although it is equivalent to the layer 41, the thickness of the Al b Ga 1-b N single crystal layer 32 is smaller than the thickness of the Al d Ga 1-d N single crystal layer 42 constituting the second multilayer buffer region 4. . For this reason, the first multilayer buffer region 3 has a larger number of stacks per unit thickness than the second multilayer buffer region 4, that is, has a larger number of interfaces between different layers, and therefore has an effect of reducing the dislocation density. Although large, it is inferior in suppressing the warpage.

前記AlaGa1-aN単結晶層31およびAlcGa1-cN単結晶層41の厚さは、2nm以上10nm以下であることが好ましく、5nm前後であることがより好ましい。
前記厚さが2nm未満の場合は、平坦に成膜するのが困難であり、平坦性が損なわれ、応力制御性の低下を招く。一方、前記厚さが10nmを超える場合は、エピタキシャル成長中にクラックが発生する。
The thicknesses of the Al a Ga 1-a N single crystal layer 31 and the Al c Ga 1-c N single crystal layer 41 are preferably 2 nm or more and 10 nm or less, and more preferably around 5 nm.
When the thickness is less than 2 nm, it is difficult to form a flat film, flatness is impaired, and stress controllability is reduced. On the other hand, if the thickness exceeds 10 nm, cracks occur during epitaxial growth.

一方、前記第2の多層バッファ領域4においては、前記多層バッファ領域3と比べて、転位密度の低減効果は小さいが、AldGa1-dN単結晶層42の厚さが厚いことから、第2の多層バッファ領域4よりも上層であるGaN単結晶層5およびAlxGa1-xN単結晶層6における反りの抑制効果に優れている。 On the other hand, the second multilayer buffer region 4 is less effective in reducing the dislocation density than the multilayer buffer region 3, but the Al d Ga 1-d N single crystal layer 42 is thick. The GaN single crystal layer 5 and the Al x Ga 1-x N single crystal layer 6 which are upper layers than the second multilayer buffer region 4 are excellent in the warp suppressing effect.

前記AlbGa1-bN単結晶層32の厚さは、10nm以上30nm以下であることが好ましく、20nm前後であることがより好ましい。
Ga組成の高い単結晶層32を厚さ10nm未満で平坦に成膜することは困難であり、前記厚さが10nm未満の場合は、平坦性が損なわれ、応力制御性の低下を招く。
一方、前記厚さが30nmを超える場合は、単結晶層32の平坦性、応力制御性の点では問題はない。しかしながら、転位を効率よく屈曲、消滅させるためには、Al組成の高い単結晶層31/Ga組成の高い単結晶層32(AlN/GaN)界面の数(単位厚さ当たり)をより多く形成することが好ましいという点からは、膜厚が大きいことは、不利に働く。
The thickness of Al b Ga 1-b N single crystal layer 32 is preferably 10nm or more 30nm or less, and more preferably is around 20 nm.
It is difficult to form a single crystal layer 32 having a high Ga composition flat with a thickness of less than 10 nm. When the thickness is less than 10 nm, the flatness is impaired and stress controllability is reduced.
On the other hand, when the thickness exceeds 30 nm, there is no problem in terms of flatness and stress controllability of the single crystal layer 32. However, in order to efficiently bend and eliminate dislocations, a larger number of interfaces (per unit thickness) of single crystal layer 31 having a high Al composition / single crystal layer 32 having a high Ga composition (AlN / GaN) is formed. From the viewpoint of being preferable, a large film thickness is disadvantageous.

また、前記AldGa1-dN単結晶層42の厚さは、200nm以上500nm以下であることが好ましく、250nm前後であることがより好ましい。
GaN単結晶層5は、AlcGa1-cN単結晶層41/AldGa1-dN単結晶層42(AlN/GaN)界面からの距離が近すぎても離れすぎていても応力制御性が低下する。GaN単結晶層5と接するAldGa1-dN単結晶層42の厚さが、AlN/GaN界面からGaN単結晶層5までの距離に相当することから、AldGa1-dN単結晶層42の厚さは上記範囲内であることが好ましい。
The thickness of the Al d Ga 1-d N single crystal layer 42 is preferably 200 nm or more and 500 nm or less, and more preferably around 250 nm.
The GaN single crystal layer 5 is stressed whether it is too close or too far from the Al c Ga 1-c N single crystal layer 41 / Al d Ga 1-d N single crystal layer 42 (AlN / GaN) interface. Controllability is reduced. Since the thickness of the Al d Ga 1-d N single crystal layer 42 in contact with the GaN single crystal layer 5 corresponds to the distance from the AlN / GaN interface to GaN single crystal layer 5, Al d Ga 1-d N single The thickness of the crystal layer 42 is preferably within the above range.

したがって、窒化物半導体のエピタキシャル成長の早期において、転位密度を低減させておけば、その上に形成される各層での転位密度の増加を抑制することができるため、転位密度の低減化の観点から、先に、第1バッファ領域を形成し、その上に、第2バッファ領域を形成することが好ましい。
逆に、第2バッファ層を先に形成し、その上に、第1バッファ層を形成した場合は、反りの抑制効果は十分に得られるが、成膜過程において、転位密度を十分に低減化させることができず、結晶性に劣ることとなる。
Therefore, if the dislocation density is reduced early in the epitaxial growth of the nitride semiconductor, an increase in the dislocation density in each layer formed thereon can be suppressed.From the viewpoint of reducing the dislocation density, It is preferable that the first buffer region is formed first, and the second buffer region is formed thereon.
On the contrary, when the second buffer layer is formed first and the first buffer layer is formed thereon, the warping suppression effect can be sufficiently obtained, but the dislocation density is sufficiently reduced during the film formation process. The crystallinity is poor.

なお、多層バッファ領域においては、異種層の界面が多数存在していればよいため、第1の多層バッファ領域3におけるAlaGa1-aN単結晶層31とAlbGa1-bN単結晶層32は、交互に積層されていれば、Si基板1側に位置する第1の多層バッファ領域3の最初の層がAlbGa1-bN単結晶層32であってもよい。同様に、第2の多層バッファ領域4におけるAlcGa1-cN単結晶層41とAldGa1-dN単結晶層42についても、Si基板1側に位置する第2の多層バッファ領域4の最初の層がAldGa1-dN単結晶層42であってもよい。 In the multi-layer buffer region, it is only necessary that a large number of interfaces of different layers exist. Therefore, the Al a Ga 1-a N single crystal layer 31 and the Al b Ga 1-b N single layer in the first multi-layer buffer region 3 are used. crystal layer 32, if it is laminated alternately, the first layer of the first multilayer buffer region 3 located in the Si substrate 1 side may be a Al b Ga 1-b N single crystal layer 32. Similarly, the Al c Ga 1-c N single crystal layer 41 and the Al d Ga 1-d N single crystal layer 42 in the second multilayer buffer region 4 are also located on the Si substrate 1 side. The first layer of 4 may be an Al d Ga 1-d N single crystal layer 42.

上記のように、本発明に係る窒化物半導体エピタキシャル基板においては、2種類の多層バッファ領域3,4を設けることにより、デバイス活性層でのクラック発生の抑制、転位密度の低減化が図られ、かつ、窒化物半導体の厚膜化に伴う反りも抑制される。   As described above, in the nitride semiconductor epitaxial substrate according to the present invention, by providing two types of multilayer buffer regions 3 and 4, suppression of crack generation in the device active layer and reduction of dislocation density are achieved, In addition, warpage associated with the increase in the thickness of the nitride semiconductor is also suppressed.

前記AlaGa1-aN単結晶層31およびAlcGa1-cN単結晶層41は、0.9≦a≦1.0、0.9≦c≦1.0であることが好ましく、特に、a=c=1であるAlN単結晶層であることが好ましい。
また、前記AlbGa1-bN単結晶層32およびAldGa1-dN単結晶層42は、0≦b≦0.1、0≦d≦0.1であること好ましく、特に、b=d=0であるGaN単結晶層であることが好ましい。
このように、AlとGaの組成比が大きく異なる2種のAlGaN単結晶層を交互に繰り返し積層させることにより、第1および第2バッファ領域における応力緩和効果をより効果的に発揮させることができる。
The Al a Ga 1-a N single crystal layer 31 and the Al c Ga 1-c N single crystal layer 41 preferably satisfy 0.9 ≦ a ≦ 1.0 and 0.9 ≦ c ≦ 1.0. In particular, an AlN single crystal layer in which a = c = 1 is preferable.
The Al b Ga 1-b N single crystal layer 32 and the Al d Ga 1-d N single crystal layer 42 preferably satisfy 0 ≦ b ≦ 0.1 and 0 ≦ d ≦ 0.1. A GaN single crystal layer in which b = d = 0 is preferable.
As described above, by alternately and repeatedly laminating two types of AlGaN single crystal layers having greatly different composition ratios of Al and Ga, the stress relaxation effect in the first and second buffer regions can be more effectively exhibited. .

したがって、前記窒化物半導体エピタキシャル基板の中で、特に好ましい層構成としては、Si基板と、前記Si基板上に、厚さ5nmのAlN単結晶層および厚さ20nmのGaN単結晶層が交互に繰り返し積層された第1の多層バッファ領域と、前記第1の多層バッファ領域上に、厚さ5nmのAlN単結晶層および厚さ200nm以上500nm以下のGaN単結晶層が交互に繰り返し積層された第2の多層バッファ領域と、前記第2の多層バッファ領域上に形成されたGaN単結晶層と、前記活性層上に形成されたAlxGa1-xN(0<x<1)単結晶層とを備えている構成が挙げられる。 Therefore, among the nitride semiconductor epitaxial substrates, as a particularly preferable layer structure, an SiN substrate, and an AlN single crystal layer having a thickness of 5 nm and a GaN single crystal layer having a thickness of 20 nm are alternately repeated on the Si substrate. A first multilayer buffer region that is laminated, and a second multilayer in which an AlN single crystal layer having a thickness of 5 nm and a GaN single crystal layer having a thickness of 200 nm to 500 nm are alternately and repeatedly laminated on the first multilayer buffer region. A multilayer buffer region, a GaN single crystal layer formed on the second multilayer buffer region, and an Al x Ga 1-x N (0 <x <1) single crystal layer formed on the active layer, The structure provided with.

AlN単結晶層の方が、GaN単結晶層よりもエピタキシャル成長速度が遅いため、第2の多層バッファ領域4よりも単位厚さ当たりのAlN単結晶層の厚さの割合が多い第1の多層バッファ領域3は、第2の多層バッファ領域4よりも形成に長時間を要するが、上記のような層構成により、第1の多層バッファ領域3のみでなく、第2の多層バッファ領域4も形成することにより、バッファ領域全体の成膜時間の短縮化を図ることができる。
また、このような多層バッファ領域の各層の組成構成および各膜厚は、多様に変化させる必要はないため、制御が容易である。
したがって、転位密度の低減効果により優れた第1のバッファ領域3を形成した後、その上に、成長速度のより速い第2のバッファ領域4を形成することにより、厚膜化した場合においても、窒化物半導体エピタキシャル基板の製造効率の向上を図ることができる。
Since the AlN single crystal layer has a slower epitaxial growth rate than the GaN single crystal layer, the ratio of the thickness of the AlN single crystal layer per unit thickness is larger than that of the second multilayer buffer region 4. The region 3 requires a longer time to form than the second multilayer buffer region 4, but not only the first multilayer buffer region 3 but also the second multilayer buffer region 4 is formed by the layer configuration as described above. As a result, the film formation time of the entire buffer region can be shortened.
In addition, the composition of each layer and each film thickness of such a multilayer buffer region do not need to be changed in various ways, and thus can be easily controlled.
Therefore, after forming the first buffer region 3 superior in the effect of reducing the dislocation density, and then forming the second buffer region 4 with a faster growth rate on the first buffer region 3, even when the film thickness is increased, The manufacturing efficiency of the nitride semiconductor epitaxial substrate can be improved.

前記第1の多層バッファ領域3は、1層のAlaGa1-aN単結晶層31と1層のAlbGa1-bN単結晶層32が10〜100回繰り返し積層される、すなわち、積層数が10〜100であることが好ましい。
AlaGa1-aN単結晶層31およびAlbGa1-bN単結晶層32の各層が薄すぎたり、積層組数が少なすぎたりすると、膜成長過程において、多層バッファ領域による応力緩和が十分でなく、クラックや反りの抑制効果が十分に得られず、また、結晶性(低転位密度)も低下する。
一方、各層が厚すぎたり、積層組数が多すぎたりする場合、コスト高となり、製造効率の点でも劣り、好ましくない。
第2の多層バッファ領域4を構成するAlcGa1-cN単結晶層41とAldGa1-dN単結晶層42の積層についても、同様である。
In the first multilayer buffer region 3, one layer of Al a Ga 1-a N single crystal layer 31 and one layer of Al b Ga 1-b N single crystal layer 32 are repeatedly stacked 10 to 100 times. The number of stacked layers is preferably 10 to 100.
If each of the Al a Ga 1-a N single crystal layer 31 and the Al b Ga 1-b N single crystal layer 32 is too thin or the number of stacked layers is too small, stress relaxation by the multilayer buffer region occurs during the film growth process. However, the effect of suppressing cracks and warpage cannot be sufficiently obtained, and the crystallinity (low dislocation density) is also lowered.
On the other hand, when each layer is too thick or the number of laminated groups is too large, the cost is high and the manufacturing efficiency is poor, which is not preferable.
The same applies to the lamination of the Al c Ga 1-c N single crystal layer 41 and the Al d Ga 1-d N single crystal layer 42 constituting the second multilayer buffer region 4.

前記Si基板1には、Si単結晶が用いられ、その製造方法は、特に限定されない。チョクラルスキー(CZ)法により製造されたものであっても、フローティングゾーン(FZ)法により製造されたものであってもよく、また、これらのSi単結晶基板に気相成長法によりSi単結晶層をエピタキシャル成長させたもの(Siエピ基板)であってもよい。
窒化物半導体をSi単結晶基板上にエピタキシャル成長させることにより、従来のSi半導体製造プロセスにおいて用いられている装置および技術を利用することができ、大口径かつ低コストでの製造が可能となる。
Si single crystal is used for the Si substrate 1, and the manufacturing method thereof is not particularly limited. Those produced by the Czochralski (CZ) method or those produced by the floating zone (FZ) method may be used. An epitaxially grown crystal layer (Si epi substrate) may be used.
By epitaxially growing a nitride semiconductor on a Si single crystal substrate, it is possible to utilize devices and techniques used in a conventional Si semiconductor manufacturing process, and manufacturing with a large diameter and low cost is possible.

前記Si基板1上に形成される初期バッファ領域2は、AlN単結晶層21およびAlyGa1-yN(0<y<1)単結晶層22が、この順にSi基板1側から積層されたものであるが、これは、第1の多層バッファ領域3を形成する前のSi基板表面の保護および下地として役割を果たすものである。
SiとGaは非常に反応性が高く、成長初期においてSi基板表面にGaが付着した場合、メルトバックエッチング反応により、Si基板表面に荒れが生じる。
このため、成長初期バッファとして、Si、GaNとの親和性が高く、前記メルトバックエッチング反応を起こさないAlN単結晶層を形成しておくことが好ましい。
しかしながら、前記AlN単結晶の成長は、Siの融点を考慮すると、本来の最適な成長温度よりも低い温度となるため、AlN単結晶層表面は非常に多くの段差を含む形状となる。この上に、GaN、AlN等の窒化物半導体結晶の成長を行った場合であっても、良質な結晶を得ることは困難である。
したがって、AlN単結晶層表面の段差を平坦化するためには、さらに、GaNとAlNの混晶であるAlyGa1-yN(0<y<1)単結晶層を挿入して、初期バッファ領域2を形成することが好ましい。
なお、前記初期バッファ領域を設けない場合には、例えば、特殊な基板洗浄前処理等を行っておくことが好ましい。
In the initial buffer region 2 formed on the Si substrate 1, an AlN single crystal layer 21 and an Al y Ga 1-y N (0 <y <1) single crystal layer 22 are laminated in this order from the Si substrate 1 side. However, this serves as a protection and base for the surface of the Si substrate before the first multilayer buffer region 3 is formed.
Si and Ga are very reactive, and when Ga adheres to the surface of the Si substrate in the initial stage of growth, the surface of the Si substrate becomes rough due to the meltback etching reaction.
For this reason, it is preferable to form an AlN single crystal layer having a high affinity with Si and GaN and not causing the meltback etching reaction as an initial growth buffer.
However, since the growth of the AlN single crystal takes a temperature lower than the original optimum growth temperature in consideration of the melting point of Si, the surface of the AlN single crystal layer has a shape including a large number of steps. In addition, even when a nitride semiconductor crystal such as GaN or AlN is grown, it is difficult to obtain a good quality crystal.
Therefore, in order to flatten the level difference on the surface of the AlN single crystal layer, an Al y Ga 1-y N (0 <y <1) single crystal layer, which is a mixed crystal of GaN and AlN, is further inserted. It is preferable to form the buffer region 2.
In the case where the initial buffer area is not provided, for example, a special substrate cleaning pretreatment is preferably performed.

前記初期バッファ領域2を設ける際、続けて形成される第1の多層バッファ領域3の最初の層をAlbGa1-bN単結晶層32とする場合、初期バッファ領域2のAlyGa1-yN単結晶層22に、組成が同じ、または、比較的近い層が接することになる。
本来は、転位の低減や応力制御の観点からは、組成比が大きく異なる界面とする方が好ましいが、AlyGa1-yN単結晶層22が形成された段階では、まだ十分な結晶性が得られていない。このため、成長初期の結晶性をより早く高める観点からは、上記のような組成比が近い界面を設けることが、その上に形成される層の転位の低減や応力制御に対して有利に働くため好ましい。
The initial time of providing a buffer region 2, to the first of the first layer of the multi-layer buffer area 3 which is formed continuously with the Al b Ga 1-b N single crystal layer 32, Al y Ga 1 initial buffer area 2 -y N single crystal layer 22 is in contact with a layer having the same or relatively close composition.
Originally, from the viewpoint of dislocation reduction and stress control, it is preferable that the interface has a greatly different composition ratio. However, at the stage where the Al y Ga 1-y N single crystal layer 22 is formed, sufficient crystallinity is still obtained. Is not obtained. For this reason, from the viewpoint of increasing the crystallinity at the early stage of growth faster, providing an interface having a close composition ratio as described above works advantageously for reducing dislocations and controlling stress on the layer formed thereon. Therefore, it is preferable.

前記AlN単結晶層21およびAlyGa1-yN単結晶層22の厚さは、製造コスト面からは、できる限り薄いことが好ましいが、AlN単結晶層21は、バッファとして必要な結晶性を得るためには、相応の膜厚が必要となり、厚さ100〜150nm程度であることが好ましい。
また、AlyGa1-yN単結晶層22も、AlN単結晶層21に存在する段差を平滑化するために、相応の膜厚が必要となり、厚さ100〜200nm程度であることが好ましい。
The thickness of the AlN single crystal layer 21 and the Al y Ga 1-y N single crystal layer 22 is preferably as thin as possible from the viewpoint of manufacturing cost. However, the AlN single crystal layer 21 has crystallinity necessary as a buffer. In order to obtain this, a corresponding film thickness is required, and the thickness is preferably about 100 to 150 nm.
Also, the Al y Ga 1-y N single crystal layer 22 needs to have a corresponding film thickness in order to smooth the steps existing in the AlN single crystal layer 21, and is preferably about 100 to 200 nm in thickness. .

また、前記多層バッファ領域上に形成されるGaN単結晶層5は、上述したように、デバイス活性層として形成されているものであり、その上に積層されるAlxGa1-xN(0<x<1)単結晶層6とにより、HEMT構造が形成されるものである。
したがって、GaN単結晶層5は、良好な結晶性および平坦性を確保する観点から、厚さ500〜3000nm程度で形成されることが好ましい。
また、AlxGa1-xN単結晶層6は、クラックの発生を回避するため、厚さ20〜50nm程度で形成されることが好ましい。
Further, as described above, the GaN single crystal layer 5 formed on the multilayer buffer region is formed as a device active layer, and Al x Ga 1-x N (0 <X <1) The HEMT structure is formed by the single crystal layer 6.
Therefore, the GaN single crystal layer 5 is preferably formed with a thickness of about 500 to 3000 nm from the viewpoint of ensuring good crystallinity and flatness.
The Al x Ga 1-x N single crystal layer 6 is preferably formed with a thickness of about 20 to 50 nm in order to avoid generation of cracks.

なお、本発明に係るエピタキシャル成長方法は、特に限定されるものではなく、一般的に用いられる方法でよく、例えば、MOCVD(Metal Organic Chemical Vapor Deposition)やPECVD(Plasma Enhanced Chemical Vapor Deposition)を始めとしたCVD法、レーザービームを用いた蒸着法、雰囲気ガスを用いたスパッタ法等を用いることができる。   The epitaxial growth method according to the present invention is not particularly limited, and may be a generally used method such as MOCVD (Metal Organic Chemical Vapor Deposition) or PECVD (Plasma Enhanced Chemical Vapor Deposition). A CVD method, a vapor deposition method using a laser beam, a sputtering method using an atmospheric gas, or the like can be used.

以下、本発明を実施例に基づいてさらに具体的に説明するが、本発明は、下記実施例により制限されるものではない。
[実施例1]
図1に示すような層構造を備えた窒化物半導体エピタキシャル基板を、以下の工程により作製した。
まず、直径4インチのSi基板1をMOCVD装置にセットし、原料としてトリメチルアルミニウム(TMA)、およびNH3を用い、1100℃での気相成長により、厚さ100nmのAlN単結晶層21を形成し、さらにその上に、原料としてトリメチルガリウム(TMG)、TMAおよびNH3を用い、1000℃での気相成長により厚さ200nmのAlyGa1-yN(y=0.1)単結晶層(Al0.1Ga0.9N単結晶層)22を積層させ、初期バッファ領域2を形成した。
EXAMPLES Hereinafter, although this invention is demonstrated further more concretely based on an Example, this invention is not restrict | limited by the following Example.
[Example 1]
A nitride semiconductor epitaxial substrate having a layer structure as shown in FIG. 1 was produced by the following steps.
First, a Si substrate 1 having a diameter of 4 inches is set in an MOCVD apparatus, and an AlN single crystal layer 21 having a thickness of 100 nm is formed by vapor phase growth at 1100 ° C. using trimethylaluminum (TMA) and NH 3 as raw materials. Further, on that, trimethylgallium (TMG), TMA and NH 3 are used as raw materials, and a 200 nm thick Al y Ga 1-y N (y = 0.1) single crystal is formed by vapor phase growth at 1000 ° C. A layer (Al 0.1 Ga 0.9 N single crystal layer) 22 was laminated to form the initial buffer region 2.

次に、原料としてTMAおよびNH3を用い、1000℃での気相成長により、前記初期バッファ領域2上に、厚さ5nmのAlaGa1-aN(a=1)単結晶層(AlN単結晶層)31を積層させた。
前記AlN単結晶層31上に、原料としてTMGおよびNH3を用い、1000℃での気相成長により、厚さ20nmのAlbGa1-bN(b=0)単結晶層(GaN単結晶層)32を積層させた。
前記AlN単結晶層31およびGaN単結晶層32を、同様の工程にて、交互に繰り返し積層させ、積層数を50として、第1の多層バッファ領域を形成した。
さらに、前記第1の多層バッファ領域3上に、厚さ5nmのAlcGa1-cN(c=1)単結晶層(AlN単結晶層)41および厚さを250nmのAldGa1-dN(d=0)単結晶層(GaN単結晶層)42を交互に繰り返し積層させ、積層数を24として、それ以外は、前記第1の多層バッファ領域3の形成と同様の工程にて、第2の多層バッファ領域4を形成した。
Next, TMA and NH 3 are used as raw materials, and an Al a Ga 1-a N (a = 1) single crystal layer (AlN) having a thickness of 5 nm is formed on the initial buffer region 2 by vapor phase growth at 1000 ° C. Single crystal layer) 31 was laminated.
An Al b Ga 1-b N (b = 0) single crystal layer (GaN single crystal) having a thickness of 20 nm is formed on the AlN single crystal layer 31 by vapor phase growth at 1000 ° C. using TMG and NH 3 as raw materials. Layer) 32 was laminated.
The AlN single crystal layer 31 and the GaN single crystal layer 32 were alternately and repeatedly stacked in the same process, and the number of stacked layers was set to 50 to form the first multilayer buffer region.
Further, the above first multilayer buffer region 3, an Al c Ga 1-c N ( c = 1) single crystal layer (AlN single crystal layer) 41 and the thickness of the thickness of 5 nm 250 nm of Al d Ga 1- d N (d = 0) single crystal layers (GaN single crystal layers) 42 are alternately and repeatedly stacked, and the number of stacked layers is 24. The other steps are the same as in the formation of the first multilayer buffer region 3. A second multilayer buffer region 4 was formed.

前記第2の多層バッファ領域4上に、原料としてTMGおよびNH3を用い、1000℃での気相成長により、厚さ2000nmのGaN単結晶層5を積層させた。
さらに、前記GaN単結晶層5上に、原料としてTMG、TMA、およびNH3を用い、1000℃での気相成長により、厚さ20nmのAlxGa1-xN(x=0.25)単結晶層(Al0.25Ga0.75N単結晶層)6を積層させ、窒化物半導体エピタキシャル基板を得た。
なお、気相成長により形成した各層の厚さの調整は、各原料の流量および供給時間の調整により行った。
A GaN single crystal layer 5 having a thickness of 2000 nm was stacked on the second multilayer buffer region 4 by vapor phase growth at 1000 ° C. using TMG and NH 3 as raw materials.
Furthermore, TMG, TMA, and NH 3 are used as raw materials on the GaN single crystal layer 5, and Al x Ga 1-x N (x = 0.25) having a thickness of 20 nm is formed by vapor phase growth at 1000 ° C. A single crystal layer (Al 0.25 Ga 0.75 N single crystal layer) 6 was laminated to obtain a nitride semiconductor epitaxial substrate.
The thickness of each layer formed by vapor phase growth was adjusted by adjusting the flow rate and supply time of each raw material.

[実施例2]
初期バッファ領域2を形成せずに、それ以外は、実施例1と同様の工程にて、窒化物半導体エピタキシャル基板を作製した。
[Example 2]
A nitride semiconductor epitaxial substrate was fabricated in the same process as in Example 1 except that the initial buffer region 2 was not formed.

[比較例1]
第2の多層バッファ領域4を形成せずに、前記第1の多層バッファ領域3のみをAlN単結晶層31およびGaN単結晶層32の繰り返しの積層数を150として形成し、それ以外は、実施例1と同様の工程にて、窒化物半導体エピタキシャル基板を作製した。
[Comparative Example 1]
The second multilayer buffer region 4 is not formed, but only the first multilayer buffer region 3 is formed with the number of repeated stacks of the AlN single crystal layer 31 and the GaN single crystal layer 32 as 150. A nitride semiconductor epitaxial substrate was fabricated in the same process as in Example 1.

[比較例2]
第2の多層バッファ領域4を形成せずに、前記第1の多層バッファ領域3のみをAlN単結晶層31およびGaN単結晶層32の繰り返しの積層数を290として形成し、前記第1の多層バッファ領域3上には、厚さ1000nmのGaN単結晶層5を積層させた。それ以外は、実施例1と同様の工程にて、窒化物半導体エピタキシャル基板を作製した。
[Comparative Example 2]
Without forming the second multilayer buffer region 4, only the first multilayer buffer region 3 is formed with the number of repeated stacks of the AlN single crystal layer 31 and the GaN single crystal layer 32 as 290, and the first multilayer buffer region 3 is formed. A GaN single crystal layer 5 having a thickness of 1000 nm was stacked on the buffer region 3. Except for this, a nitride semiconductor epitaxial substrate was fabricated in the same process as in Example 1.

[比較例3]
第1の多層バッファ領域3を形成せずに、前記第2の多層バッファ領域4のみをAlN単結晶層41およびGaN単結晶層42の繰り返しの積層数を28として形成し、前記第2の多層バッファ領域4上には、厚さ1000nmのGaN単結晶層5を積層させた。それ以外は、実施例1と同様の工程にて、窒化物半導体エピタキシャル基板を作製した。
[Comparative Example 3]
Without forming the first multilayer buffer region 3, only the second multilayer buffer region 4 is formed with the number of repeated stacks of the AlN single crystal layer 41 and the GaN single crystal layer 42 as 28, and the second multilayer buffer region 4 is formed. A GaN single crystal layer 5 having a thickness of 1000 nm was stacked on the buffer region 4. Except for this, a nitride semiconductor epitaxial substrate was fabricated in the same process as in Example 1.

[実施例3〜28、比較例4〜27]
第1の多層バッファ領域3のAlaGa1-aN単結晶層31およびAlbGa1-bN単結晶層32の各厚さ、第2の多層バッファ領域4のAlcGa1-cN単結晶層41およびAldGa1-dN単結晶層42の各組成比および積層回数を表1(実施例)または表2(比較例)に示すように変化させた。また、第1の多層バッファ領域3においてはAlbGa1-bN単結晶層32を、第2の多層バッファ領域4においてはAldGa1-dN単結晶層42を最初に積層し、それ以外は、実施例1と同様の工程にて、窒化物半導体エピタキシャル基板を作製した。
なお、実施例3〜28および比較例2〜27においては、総膜厚が約5μmになるように各層の厚さおよび積層数を調整した。
[Examples 3-28, Comparative Examples 4-27]
Each thickness of the Al a Ga 1-a N single crystal layer 31 and the Al b Ga 1-b N single crystal layer 32 in the first multilayer buffer region 3, and Al c Ga 1-c in the second multilayer buffer region 4 The composition ratios and the number of laminations of the N single crystal layer 41 and the Al d Ga 1-d N single crystal layer 42 were changed as shown in Table 1 (Example) or Table 2 (Comparative Example). In addition, the Al b Ga 1-b N single crystal layer 32 is first stacked in the first multilayer buffer region 3, and the Al d Ga 1-d N single crystal layer 42 is first stacked in the second multilayer buffer region 4. Except for this, a nitride semiconductor epitaxial substrate was fabricated in the same process as in Example 1.
In Examples 3 to 28 and Comparative Examples 2 to 27, the thickness of each layer and the number of layers were adjusted so that the total film thickness was about 5 μm.

Figure 2010251738
Figure 2010251738

Figure 2010251738
Figure 2010251738

上記実施例および比較例で作製した窒化物半導体エピタキシャル基板について、デバイス活性層として用いられるGaN単結晶層の基板面中心部における転位密度を、透過型電子顕微鏡により評価した。また、反りおよびクラックの発生(基板外周を除く)についても、レーザ変位計および光学顕微鏡の暗視野像により評価した。なお、反りは、エピタキシャル成長前の基板裏面が基板厚さ方向に変位した距離の最大値と最小値の差により評価した。
これらの結果をまとめて、表3(実施例)および表4(比較例)に示す。
表3,4において、反りの評価は、○:31μm以下、△:31μm超50μm以下、×:50μm超とした。また、転位密度の評価は、○:5×109/cm2以下、×:5×109/cm2超とした。
なお、膜形成のプロセス時間は、基板特性に特に影響しないが、製造効率やコストの点では短い方が好ましく、参考指標として記載した。
About the nitride semiconductor epitaxial substrate produced in the said Example and comparative example, the dislocation density in the substrate surface center part of the GaN single-crystal layer used as a device active layer was evaluated with the transmission electron microscope. Further, the occurrence of warpage and cracks (excluding the outer periphery of the substrate) was also evaluated by a dark field image of a laser displacement meter and an optical microscope. The warpage was evaluated based on the difference between the maximum value and the minimum value of the distance that the back surface of the substrate before epitaxial growth was displaced in the substrate thickness direction.
These results are collectively shown in Table 3 (Examples) and Table 4 (Comparative Examples).
In Tables 3 and 4, the warpage was evaluated as follows: ○: 31 μm or less, Δ: more than 31 μm and 50 μm or less, and x: more than 50 μm. The evaluation of the dislocation density was ○: 5 × 10 9 / cm 2 or less, and x: more than 5 × 10 9 / cm 2 .
The film formation process time does not particularly affect the substrate characteristics, but is preferably shorter in terms of manufacturing efficiency and cost, and is described as a reference index.

Figure 2010251738
Figure 2010251738

Figure 2010251738
Figure 2010251738

表3,4に示した評価結果から分かるように、各実施例の条件により作製した窒化物半導体エピタキシャル基板は、いずれも、クラックの発生がなく、転位密度が5×109/cm2以下であり、かつ、比較例に比べて、反りが抑制されている傾向にあることが認められた。特に、実施例1,3は、転位密度が最も小さく、また、反りの抑制効果も優れていた。なお、初期バッファ領域を形成しない場合(実施例2)は、プロセス時間の面では実施例1を上回る効率が得られたが、特性は若干下回るものであった。 As can be seen from the evaluation results shown in Tables 3 and 4, all of the nitride semiconductor epitaxial substrates produced under the conditions of each example had no cracks and had a dislocation density of 5 × 10 9 / cm 2 or less. In addition, it was recognized that the warpage tends to be suppressed as compared with the comparative example. In particular, Examples 1 and 3 had the lowest dislocation density and were excellent in warpage suppressing effect. In the case where the initial buffer region was not formed (Example 2), efficiency higher than that in Example 1 was obtained in terms of process time, but the characteristics were slightly lower.

一方、各比較例の条件により作製した窒化物半導体エピタキシャル基板は、全体的に転位密度が大きく、クラックや反りが発生するものが多かった。
なお、第2の多層バッファ領域4を形成しない場合(比較例1,2)は、転位密度の観点からは最も優れていたが、クラックの発生と反りの増大が生じており、さらに、プロセス時間が非常に長いという欠点を有していた。
また、第1の多層バッファ領域を形成しない場合(比較例3)は、クラックの発生もなく、プロセス時間の観点からは最も優れていたが、転位密度の軽減効果は低下した。
On the other hand, the nitride semiconductor epitaxial substrate fabricated under the conditions of each comparative example has a large dislocation density as a whole and many cracks and warpages are generated.
In the case where the second multilayer buffer region 4 was not formed (Comparative Examples 1 and 2), it was the most excellent from the viewpoint of dislocation density, but the occurrence of cracks and an increase in warpage occurred, and the process time Had the disadvantage of being very long.
In the case where the first multilayer buffer region was not formed (Comparative Example 3), cracks were not generated and it was most excellent from the viewpoint of process time, but the effect of reducing the dislocation density was lowered.

1 Si基板
2 初期バッファ領域
21 AlN単結晶層
22 AlyGa1-yN単結晶層
3 第1の多層バッファ領域
31 AlaGa1-aN単結晶層
32 AlbGa1-bN単結晶層
4 第2の多層バッファ領域
41 AlcGa1-cN単結晶層
42 AldGa1-dN単結晶層
5 GaN単結晶層
6 AlxGa1-xN単結晶層
1 Si substrate 2 initial buffer region 21 AlN single crystal layer 22 Al y Ga 1-y N single crystal layer 3 first multilayer buffer area 31 Al a Ga 1-a N single crystal layer 32 Al b Ga 1-b N single Crystal layer 4 Second multilayer buffer region 41 Al c Ga 1-c N single crystal layer 42 Al d Ga 1-d N single crystal layer 5 GaN single crystal layer 6 Al x Ga 1-x N single crystal layer

Claims (3)

Si基板と、前記Si基板上に、厚さ2nm以上10nm以下のAlaGa1-aN(0.9≦a≦1.0)単結晶層および厚さ10nm以上30nm以下のAlbGa1-bN(0≦b≦0.1)単結晶層が交互に繰り返し積層された第1の多層バッファ領域と、前記第1の多層バッファ領域上に、厚さ2nm以上10nm以下のAlcGa1-cN(0.9≦c≦1.0)単結晶層および厚さ200nm以上500nm以下のAldGa1-dN(0≦d≦0.1)単結晶層が交互に繰り返し積層された第2の多層バッファ領域と、前記第2の多層バッファ領域上に形成されたGaN単結晶層と、前記GaN単結晶層上に形成されたAlxGa1-xN(0<x<1)単結晶層とを備えていることを特徴とする窒化物半導体エピタキシャル基板。 A Si substrate, an Al a Ga 1-a N (0.9 ≦ a ≦ 1.0) single crystal layer having a thickness of 2 nm to 10 nm and an Al b Ga 1 having a thickness of 10 nm to 30 nm on the Si substrate. -b N (0 ≦ b ≦ 0.1) first multilayer buffer regions in which single crystal layers are alternately and repeatedly stacked, and Al c Ga having a thickness of 2 nm to 10 nm on the first multilayer buffer region 1-c N (0.9 ≦ c ≦ 1.0) single crystal layers and Al d Ga 1-d N (0 ≦ d ≦ 0.1) single crystal layers having a thickness of 200 nm to 500 nm are alternately and repeatedly stacked. Second multilayer buffer region formed, a GaN single crystal layer formed on the second multilayer buffer region, and Al x Ga 1-x N (0 <x < 1) A nitride semiconductor epitaxial substrate comprising a single crystal layer. Si基板と、前記Si基板上に、厚さ5nmのAlN単結晶層および厚さ20nmのGaN単結晶層が交互に繰り返し積層された第1の多層バッファ領域と、前記第1の多層バッファ領域上に、厚さ5nmのAlN単結晶層および厚さ200nm以上500nm以下のGaN単結晶層が交互に繰り返し積層された第2の多層バッファ領域と、前記第2の多層バッファ領域上に形成されたGaN単結晶層と、前記活性層上に形成されたAlxGa1-xN(0<x<1)単結晶層とを備えていることを特徴とする窒化物半導体エピタキシャル基板。 A Si substrate, a first multilayer buffer region in which an AlN single crystal layer having a thickness of 5 nm and a GaN single crystal layer having a thickness of 20 nm are alternately stacked on the Si substrate, and the first multilayer buffer region A second multilayer buffer region in which an AlN single crystal layer having a thickness of 5 nm and a GaN single crystal layer having a thickness of 200 nm to 500 nm are alternately stacked, and a GaN formed on the second multilayer buffer region. A nitride semiconductor epitaxial substrate comprising a single crystal layer and an Al x Ga 1-x N (0 <x <1) single crystal layer formed on the active layer. 前記Si基板と第1の多層バッファ領域との間に、前記Si基板上に、AlN単結晶層、AlyGa1-yN(0<y<1)単結晶層の順に積層された初期バッファ領域を備えていることを特徴とする請求項1または2記載の窒化物半導体エピタキシャル基板。 An initial buffer in which an AlN single crystal layer and an Al y Ga 1-y N (0 <y <1) single crystal layer are sequentially stacked on the Si substrate between the Si substrate and the first multilayer buffer region. The nitride semiconductor epitaxial substrate according to claim 1, further comprising a region.
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