JP2010243302A - Interference prevention structure probe card - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an interference prevention structure probe card including a probe head with an interference prevention structure. <P>SOLUTION: The interference prevention structure probe card 1 includes a probe head 5 and a spiral contact 2'. The probe head 5 is disposed between a tester 4 and a semiconductor device to provide electric connection therebetween, the tester 4 performing an operation test by connecting the semiconductor device 31 formed on a wafer 3 under test with an LSI tester, and is formed by stacking a low CTE material 52 formed in the tester side, an organic substrate 54, and a low CTE material 53 formed in the semiconductor device side. The spiral contact 2' is formed in the semiconductor device side of the probe head as an electrode 2' corresponding to the arrangement of an electrode of the semiconductor device. A cut face 51 cut in a tapered shape, in a C shape or a curved shape, is formed in the periphery of the probe head in the semiconductor device side except for the area where the spiral contact 2' is arranged. <P>COPYRIGHT: (C)2011,JPO&amp;INPIT

Description

  The present invention relates to a probe card for inspecting a multi-electrode semiconductor device such as a liquid crystal panel, a camera module, an IC, and an LSI, and more particularly to an interference prevention structure probe card in which a low thermal expansion material is provided on the lower surface of the upper surface of a probe head.

Semiconductor devices such as liquid crystal panels, camera modules, ICs, and LSIs are generally formed in a rectangular shape, and are provided with a large number of terminal electrodes (hereinafter simply referred to as “electrodes”) arranged in an edge arrangement and area arrangement.
Such a device is subjected to an operation test or the like for each individual product in an inspection process during manufacture, and quality controlled so as to eliminate defective products from mass-produced products.

  Conventionally, in order to perform an operation test of these devices alone, an inspector is prepared by combining a drive circuit for operating the device, a signal processing circuit unique to the inspection, a measurement unit, a pass / fail judgment display unit, and the like. In the inspection stage, the electrical continuity between the inspecting device and the device to be inspected is inspected, and after the inspection, the continuity is released, the inspected device is removed from the inspecting device, the inspection is finished, and the product is shipped. The inspector uses a probe card on which a large number of probe needles corresponding to the arrangement and pitch (hereinafter also referred to as “electrode arrangement”) of the fine electrodes of the device are used, and this is sent to the inspection position of the device that has been sent to the inspection position. A device in which each electrode is brought into contact with each other and the continuity between the measuring means and the device is inspected by a probe card is known (for example, see Patent Document 1).

In addition, the tip of the spiral contact is formed flat, the formed flat surface is mirror-polished, and the land of the mounting substrate that contacts the spiral contact is also mirror-polished, so that the flat surface of the spiral contact A technique in which a land of a mounting board is bonded to a metal is disclosed (for example, see Patent Document 2). According to Patent Document 2, the spiral contact is a triple wound spiral contact, and is positioned and fixed to a mounting board having a conductive land on the surface. This spiral contact is formed in a spiral shape from the root toward the center of the tip. In a convex spiral contact having a tip at the center of the spiral, the roots of the spiral contact are shifted from each other by 120 °. The three spiral contacts arranged in a spiral shape with the same center and parallel to each other are joined together at the tip, and united at the tip. The flat upper surface is provided with a mirror-like flat surface that is mirror-finished.
Thus, a spiral contact having a mirror-like flat surface on the top surface and a connection terminal also having a mirror-like flat surface on the connection surface can be brought into close contact with each other, and a triple spiral spiral contact can be obtained. The mirror-like flat surface of the connector and the mirror-like flat surface of the connection terminal face each other and overlap each other, so that the mirror-like flat surfaces are in close contact with each other to generate an intermetallic bond, thereby generating an intermetallic joint. Can be firmly bonded to each other.

  FIG. 5 is a cross-sectional view showing a probe card 101 having a conventional probe head 105. As shown in FIG. 5, the conventional probe head 105 is fixed to the connector 106, and when contacting the electrode 132 of the semiconductor device 131 on the wafer 103, the wafer on which the probe head and the semiconductor device are formed. Therefore, in order to eliminate the parallel crossing, it was necessary to adjust the probe head so as not to interfere with the wafer.

Japanese Patent Application No. 2007-298476 Japanese Patent Application No. 2008-222905

However, when inspecting semiconductor devices such as liquid crystal panels, camera modules, ICs, and LSIs, it becomes increasingly difficult to ensure the Z stroke of probing as the semiconductor devices become finer. The probe head needs to make reliable contact so as not to cause poor contact when electrically connected to the electrode of the semiconductor device. In order to ensure probing with such contact reliability, the probe head and the semiconductor device are required. The parallel accuracy with the wafer on which the wafer is formed is important, but in order to eliminate this parallel accuracy, it is necessary to adjust the probe head so that it does not interfere with the wafer. was there.
The present invention has been made to solve the above-described problems, and an object thereof is to provide an interference prevention structure probe card in which the probe head is a probe head having an interference prevention structure.

According to a first aspect of the present invention, there is provided a probe card for interference prevention structure comprising a semiconductor device formed on a wafer to be inspected and connected between an LSI tester and an inspection device for performing an operation test, and the semiconductor device. A probe head that mediates electrical connection is formed by laminating a low CTE material provided on the inspection instrument side, the organic substrate, and a low CTE material provided on the semiconductor device side,
A spiral contact provided as an electrode corresponding to the arrangement of the electrodes of the semiconductor device on the semiconductor device side of the probe head;
The peripheral surface of the probe head on the semiconductor device side is provided with a cut surface that is cut in a tapered shape except for an area where the spiral contact is disposed.

  The invention according to claim 2 is the interference prevention structure probe card according to claim 1, wherein the cut surface is a C-cut surface.

  The invention according to claim 3 is the interference prevention structure probe card according to claim 1, wherein the cut surface is a curved surface.

  According to the first aspect of the present invention, the probe head is provided with a cut surface which is cut in a taper shape except the area where the spiral contact is disposed on the periphery of the probe head on the semiconductor device side. Probing can be performed safely without the periphery interfering with the wafer.

  According to the second aspect of the invention, the probing can be performed safely without interfering with the wafer by making the cut surface a C-cut surface.

  According to the third aspect of the present invention, since the cut surface is a curved surface, it is possible to perform probing safely without interfering with the wafer.

It is the schematic for demonstrating the structure of embodiment of this invention, (a) is sectional drawing which shows the whole outline, (b) is an expanded sectional view of the A section shown to (a). It is the schematic for demonstrating the spiral contactor provided with the mirror-polished surface at the front-end | tip flat surface, (a) is a top view, (b) (c) is sectional drawing of the AA line shown to (a). (B), the integral part of the tip of the spiral contactor is finished to a mirror-polished surface, and (c) is provided with a mirror-polished part at the tip of the spiral contactor. It is an expanded sectional view of the B section shown in (b) of Drawing 1, (a) is a sectional view showing metal-to-metal joining which arises in the electrode by the side of an inspection device of a probe head, (b) is an inspection device side of a probe head. It is sectional drawing which shows the low temperature fusion | melting solder joining given to an electrode. It is the schematic for demonstrating operation | movement of embodiment of this invention, and is an expanded sectional view of the location corresponded to the A section shown in FIG. It is sectional drawing which shows the conventional probe card, (a) is sectional drawing which shows the whole outline, (b) is an expanded sectional view of the C section shown to (a).

DESCRIPTION OF EMBODIMENTS Hereinafter, embodiments of an interference prevention structure probe card according to the present invention will be described in detail with reference to the drawings.
1A and 1B are schematic views for explaining a configuration of an embodiment of the present invention. FIG. 1A is a cross-sectional view showing an overall outline, and FIG. 1B is an enlarged cross-sectional view of a portion A shown in FIG.

As shown in FIGS. 1A and 1B, the interference prevention structure probe card 1 includes an inspector 4 that performs an operation test by connecting a semiconductor device 31 formed on a wafer 3 to be inspected to an LSI tester. The probe head 5 that mediates electrical connection between the semiconductor device 31 and the semiconductor device 31 includes a low CTE material (low thermal expansion material) 52 provided on the tester 4 side, an organic substrate 54, and the semiconductor device 31 side. A spiral contact 2 ′ provided as an electrode 2 ′ corresponding to the arrangement of the electrodes 32 of the semiconductor device 31 on the semiconductor device 31 side of the probe head 5; In addition, a cut surface 51 that is cut into a taper shape is provided on the periphery of the probe head 5 on the semiconductor device 31 side except for the area where the spiral contact 2 'is disposed.
As described above, by providing a tapered cut surface on the periphery of the probe head 5 on the semiconductor device 31 side, probing can be performed safely without the periphery of the probe head 5 interfering with the wafer 3. it can. The cut surface 51 may be a C-cut surface or a curved surface. The probe head 5 has an interposer structure, but is not limited.

  As shown in FIG. 1B, in the probe head 5 integrally formed with the low CTE material 52, the organic substrate 54, and the low CTE material 53 in order from the tester 4 side, the low CTE material 52 is electrically conductive. The conductive via 55 is provided, and is electrically connected to the spiral contact 2 provided on the electrode of the connector 6. The conductive via 55 of the low CTE material 52 is electrically connected to the electrode of the organic substrate 54, and the organic substrate 54 serves as an interposer with the pitch between the electrodes reduced and the conductive via 55 provided in the low CTE material 53. Electrically conducting. A spiral contact 2 ′ is provided in the conductive via 55 of the low CTE material 53. The spiral contact 2 'is disposed so as to be in contact with the solder ball 32, which is an electrode of the semiconductor device 31 formed on the wafer 3, and is electrically connected to perform a characteristic inspection or the like. The low CTE material conductive via 55 is formed by providing a through hole in the low CTE material and embedding a conductive metal plating or conductive material therein. The probe card 5 is fixed by a connector 6. In addition, a spiral contact 2 is provided on the connector 6 on the side of the inspection device 4 so as to be electrically connected to the electrode of the connector 6. The spiral contact 2 contacts the electrode of the PWB 12 and is electrically connected. Conducted. The connector 6 is fixed by a fixing bolt 13 together with the rigid body 11 and the PWB 12.

  FIG. 2 is a schematic diagram for explaining a spiral contact having a mirror-like flat surface such as a mirror-polished surface on the tip flat surface, where (a) is a plan view, and (b) and (c) are (a). FIG. 6B is a cross-sectional view taken along line AA shown in FIG. 5B. FIG. 5B is a plan view of the spiral contactor in which an integral part is finished to a mirror-like flat surface such as a mirror-polished surface, and FIG. Is provided with a mirror-like flat surface portion such as a mirror-polished surface. The number of turns of each spiral contact is not limited to this embodiment, and can be changed.

FIG. 3 is an enlarged cross-sectional view of a portion B shown in FIG. 1B, FIG. 3A is a cross-sectional view showing the metal-to-metal bonding that occurs in the probe-side electrode of the probe head, and FIG. It is sectional drawing which shows the low-temperature fusion | melting solder joining given to the electrode by the side of an inspection device.
As shown in FIG. 3A, land-like connection terminals 63 are provided on the semiconductor device 31 side of the connector 6. The spiral contact 2 is electrically connected and joined to the connection terminal 63. In this case, the spiral contact 2 is mounted with the convex shape facing downward, and a flat portion 2a is formed at the center of the spiral.
A flat portion 2a formed at the center of the spiral of the spiral contact 2 is joined to the land-like electrode 52 on the side of the inspection device 4 of the probe head 5 by metal-to-metal joining. As a result, an electronic device such as the semiconductor device 31 is firmly bonded without receiving a thermal history, and good electrical conduction is possible.

  Further, as shown in FIG. 3B, a flat portion 2a formed at the center of the spiral of the spiral contact 2 is soldered to the land electrode 56 on the side of the inspection device 4 of the probe head 5 at a low temperature. Molten solder bonding is performed, whereby an electronic device such as a semiconductor device is firmly bonded without receiving a thermal history, and good electrical conduction is possible.

  A spiral contact 2 ′ provided on the semiconductor device 31 side of the probe head 5 protrudes in a convex shape on the semiconductor device 31 side. The semiconductor device 31 has a structure in which connection terminals 32 such as solder balls are arranged in an edge arrangement or an area arrangement, and a spiral contact 2 ′ is also provided on the probe head 5 corresponding to the arrangement of the solder balls 32 of the semiconductor device 31. Yes. Note that a mounting substrate (PWB) on which an electronic device such as the semiconductor device 31 is mounted is subjected to a low temperature heating of about 100 ° C. and a spring property of a spiral contact of about 10 MPa without receiving a thermal history such as solder reflow. It is possible to join the metal strongly and strongly by the metal-to-metal bonding generated by the force. Further, when the mirror finish is sub-nm or less, metal-to-metal bonding occurs at room temperature (room temperature), and strong electrical bonding can be achieved.

  The flat surface 2a of the spiral contact 2 and the mirror-like flat surface of the land 56 are mirror-finished to a surface roughness of 0.2 nm to 20 nm by CMP. The semiconductor device includes an IC, an LSI, a camera module, a liquid crystal panel, and the like. Then, a mirror-like flat surface is finished by CMP treatment, and metal-to-metal bonding occurs by performing low-temperature heating at about 100 ° C. between the spiral contact that generates an urging force of about 10 MPa and the connection terminal. Electrically strong joints can be formed between them, and by mounting a multi-electrode device without soldering, the semiconductor device can be electrically strong without causing damage due to thermal history. In addition, it can be soldered with a low-temperature molten solder paste between the spiral contact and the connection terminal, which may damage the mounting substrate on which electronic components such as semiconductor devices are mounted due to thermal history. It is strongly bonded electrically without generating any.

  Further, when a pressing force is applied against the urging force, the spiral contact member is flattened and contracted, and in the open state, the central portion rises in a conical shape and returns to the original shape. Therefore, even if the flatness of the PWB surface or the device surface is low and there is some undulation, good conductive contact can always be maintained. The number of turns of each spiral contact is not limited to this embodiment, and can be changed.

FIG. 4 is a schematic diagram for explaining the operation of the embodiment of the present invention, and is an enlarged cross-sectional view of a portion corresponding to part A shown in FIG.
As shown in FIG. 4, the rigid body (stiffener) 11 is made of ceramic, and the rigid body 11, the printed circuit board (PWB) 12, and the connector 6 are fixed by fixing bolts 13. The probe head 5 is fastened and fixed by a suspension bolt 61 and a nut 62 soldered to the probe head 5. The rigid body (stiffener) 11 is not limited to ceramic, and may be another low thermal expansion material.

Conventionally, in probing work with full wafer one contact, the operator adjusts the base plate at the work site, and the inclination of the probe is considerable from end to end. For example, when the position of a wafer having a diameter of 300 mm is adjusted with a single touch, it is detected by a sensor, the distance is measured and adjusted by itself, and an automatic adjustment function is provided.
As described above, the probe head 5 and the semiconductor device 31 have a considerable number of parallel intersections, except for the area where the spiral contact 2 'is arranged on the periphery of the probe head 5 of the present invention on the semiconductor device 31 side. A cut surface 51 cut into a tapered shape is provided.
By providing this cut surface 51, as shown in FIG. 4, for example, the cut surface 51 shown on the left side in the drawing does not come into contact with the wafer 3, and the spiral contact 2 ′ has all the solder balls of the semiconductor device 31. 32, 32... Can be in good contact with each other and the electrical characteristic inspection can be performed.
The present invention cannot be realized without using the spiral contactor invented by the present applicant. The probe head using the spiral contactor functions even with a slight movement, and can be applied as a cantilever because the pitch can be further reduced. In addition, the spiral contact can be deformed from a flat state to a convex state, is not easily broken, and has a wide range of applications.

  The preferred embodiments have been described above. However, the present invention is not limited to the above-described embodiments, and can be appropriately changed without departing from the gist of the present invention. For example, although the configuration using the connector 6 has been described, the spiral contact 2 is directly soldered to the electrode of the printed circuit board 12, and the tip flat surface of the spiral contact is indirectly connected to the land connection terminal of the probe head. Or may be one to which low-temperature melting solder bonding is applied.

  In a probe card for inspecting a multi-electrode semiconductor device such as a liquid crystal panel, a camera module, an IC, or an LSI, the probe card is applied to an interference prevention structure probe card that prevents the periphery of the probe head from contacting the wafer.

DESCRIPTION OF SYMBOLS 1 Interference prevention structure probe card, probe card 2, 2 'Spiral contact 3 Wafer 31 Semiconductor device 32 Solder ball, Electrode 33 Dicing area (scribe line)
4 Inspection Device 5 Probe Head 51 Cut Surface 52, 53 Low CTE Material 54 Organic Substrate 6 Connector

Claims (3)

A probe head that mediates electrical connection by interposing between a semiconductor device formed between a semiconductor device formed on a wafer to be inspected and an LSI tester for performing an operation test and the semiconductor device is provided on the side of the inspector Formed by laminating the low CTE material provided on the organic substrate and the low CTE material provided on the semiconductor device side,
A spiral contact provided as an electrode corresponding to the arrangement of the electrodes of the semiconductor device on the semiconductor device side of the probe head;
An interference prevention structure probe card, wherein a cut surface that is cut in a taper shape except for an area where the spiral contactor is disposed is provided on a peripheral edge of the probe head on the semiconductor device side.   2. The interference prevention structure probe card according to claim 1, wherein the cut surface is a C-cut surface. The probe card according to claim 1, wherein the cut surface is a curved surface.

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