JP2010232234A - Mounting device and mounting method - Google Patents

Mounting device and mounting method Download PDF

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JP2010232234A
JP2010232234A JP2009075325A JP2009075325A JP2010232234A JP 2010232234 A JP2010232234 A JP 2010232234A JP 2009075325 A JP2009075325 A JP 2009075325A JP 2009075325 A JP2009075325 A JP 2009075325A JP 2010232234 A JP2010232234 A JP 2010232234A
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chip
height
circuit board
chip component
bonding
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Katsumi Terada
勝美 寺田
Hajime Hirata
肇 平田
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Toray Engineering Co Ltd
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Toray Engineering Co Ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/75—Apparatus for connecting with bump connectors or layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319—Arrangement of the layer connectors prior to mounting
    • H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Supply And Installment Of Electrical Components (AREA)
  • Wire Bonding (AREA)
  • Die Bonding (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a mounting device and a monitoring method capable of preventing mounting failures of chip components even if variations are generated in thicknesses of the chip components in the mounting device for temporarily compression-bonding the chip components on each circuit pattern of a circuit board having a plurality of circuit patterns formed thereon via resin, and pressing and heating the plurality of chip components and the circuit board to compression-bond and mount the chip components on the circuit board in a step subsequent to the temporarily compression-bonding step. <P>SOLUTION: In the mounting device, a press applying head for mounting chip components according to circuit patterns one by one and a height detecting means for detecting heights of the chip components temporarily compression-bonded on the circuit board are provided in a temporarily compression-bonding portion for temporarily compression-bonding the plurality of chip components via the resin on the circuit board having the plurality of circuit patterns formed thereon. The mounting device has a chip repair determining means for checking variations of the heights detected by the height detecting means in units of the number of the plurality of chip components to be integrally compression-bonded in a step subsequent to the temporarily compression-bonding step, and determining the detachment of chip components on the basis of the variation of the heights. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

本発明は、集積回路素子などのチップ部品を基板に実装する実装装置および実装方法に関するものである。   The present invention relates to a mounting apparatus and a mounting method for mounting a chip component such as an integrated circuit element on a substrate.

近年、エレクトロニクス製品の軽量化、小型化に伴い、回路基板のパターンのファインピッチ化（高精度化・微細化）が進められている。このような回路基板への集積回路などのチップ部品の実装は、チップ部品を位置合わせして樹脂を介して回路パターンに実装する仮圧着工程と、回路パターンに実装されたチップ部品を加圧し加熱して接合させる本圧着工程とが行われている。   In recent years, with the reduction in weight and size of electronic products, finer pitches (higher precision / miniaturization) of circuit board patterns have been promoted. Mounting of chip parts such as integrated circuits on such circuit boards includes a temporary crimping process in which the chip parts are aligned and mounted on a circuit pattern via a resin, and the chip parts mounted on the circuit pattern are pressurized and heated. And a main press-bonding step to be joined.

チップ部品を回路基板に本圧着して実装する装置として、本出願人は特許文献１の実装装置を出願している。   The present applicant has applied for a mounting apparatus of Patent Document 1 as an apparatus for mounting a chip component on a circuit board by subjecting the chip component to a circuit board.

特許文献１の実装装置３００は図８に示すように、回路基板２を水平保持する可動テーブル３０３と、チップ部品４を上方から加圧するヘッド３１２を備えた加圧手段３０５と、チップ部品４と加圧手段３０５との間に介在させる弾性材３０６と、回路基板２の下方から樹脂を加熱硬化させる加熱手段３０８とを備えている。   As shown in FIG. 8, the mounting apparatus 300 of Patent Document 1 includes a movable table 303 that horizontally holds the circuit board 2, a pressure unit 305 that includes a head 312 that pressurizes the chip component 4 from above, a chip component 4, and the like. An elastic member 306 interposed between the pressurizing unit 305 and a heating unit 308 for heating and curing the resin from below the circuit board 2 are provided.

そして、回路基板２に整列した複数個のチップ部品４を覆うように、これらチップ部品４と加圧手段３０５に設けられたヘッド３１２との間に弾性材３０６を介在し、弾性材３０６の上方からヘッド３１２を加圧している。このとき、弾性材３０６がチップ部品４ごとの厚みのバラツキを吸収して均等に加圧するとともに、回路基板２の下方の加熱手段３０８から加熱されてチップ部品４の実装された回路基板２の裏面部分のみ加熱して回路基板２とチップ部品４の間に塗布された樹脂を加熱硬化するようになっている。   Then, an elastic material 306 is interposed between the chip components 4 and the head 312 provided in the pressure unit 305 so as to cover the plurality of chip components 4 aligned on the circuit board 2, and above the elastic material 306. The head 312 is pressurized. At this time, the elastic material 306 absorbs the thickness variation of each chip component 4 and pressurizes evenly, and is heated from the heating means 308 below the circuit board 2 to be mounted on the back surface of the circuit board 2 on which the chip component 4 is mounted. Only a portion is heated to heat and cure the resin applied between the circuit board 2 and the chip component 4.

これにより、複数個のチップ部品４を同時に回路基板２に本圧着して実装することができるようにしている。   As a result, a plurality of chip components 4 can be simultaneously bonded to the circuit board 2 and mounted.

特開２００４−２５９９１７号公報JP 2004-259917 A

一方、回路基板に実装されるチップ部品は、ウエハに形成された電子回路をダイシングなどにより個片状に切り出したものであるため、個々のウエハの厚みがそのままチップ部品の厚みとなる。一枚の回路基板に複数のチップ部品を実装する場合、複数のウエハから切り出されたチップ部品が混在して仮圧着される。一方、ウエハの厚みはバラツキを持っており、仮圧着されたチップ部品の高さもバラツキを生じることになる。   On the other hand, since the chip component mounted on the circuit board is obtained by cutting an electronic circuit formed on the wafer into individual pieces by dicing or the like, the thickness of each wafer becomes the thickness of the chip component as it is. When a plurality of chip components are mounted on one circuit board, chip components cut out from a plurality of wafers are mixed and temporarily pressed. On the other hand, the thickness of the wafer varies, and the height of the temporarily bonded chip parts also varies.

このようなチップ部品の高さにバラツキが発生している回路基板を、特許文献１のような構成の実装装置で一括に本圧着すると、チップ部品とボンディングヘッドの間に介在した弾性材ではチップ部品の高さのバラツキを吸収することができずに、チップ部品の実装不良を招くことがあった。   When circuit boards with such variations in the height of chip components are collectively pressure bonded together by a mounting apparatus having a configuration as in Patent Document 1, an elastic material interposed between the chip components and the bonding head is used as a chip. The variation in the height of the components cannot be absorbed, and the mounting failure of the chip components may be caused.

そこで、上記問題点に鑑み、複数の回路パターンが形成された回路基板の各回路パターンにチップ部品を樹脂を介して仮圧着した後、仮圧着の次の工程で複数チップ部品と回路基板を加圧および加熱してチップ部品を回路基板に本圧着して実装させる実装装置において、チップ部品の厚さにバラツキが生じていても、チップ部品の実装不良が発生しない実装装置および実装方法を提供することを目的とする。   In view of the above problems, a chip component is temporarily bonded to each circuit pattern of a circuit board on which a plurality of circuit patterns are formed via a resin, and then the plurality of chip components and the circuit substrate are added in the next step of the temporary bonding. Provided are a mounting apparatus and a mounting method in which a chip component is not mounted poorly even if the thickness of the chip component varies, in a mounting apparatus in which the chip component is mounted on the circuit board by pressure bonding and heating. For the purpose.

以上の課題を解決するために、請求項１に記載の発明は、
複数の回路パターンが形成された回路基板に、複数のチップ部品を樹脂を介して仮圧着する仮圧着部に、
回路パターンにチップ部品を一つずつ実装する加圧ヘッドと、回路基板に仮圧着されたチップ部品の高さを検出する高さ検出手段を備え、
仮圧着の次の工程でチップ部品を一括して本圧着を行う、複数のチップ部品の個数を単位として、前記高さ検出手段が検出した高さのバラツキを調べて、前記高さのバラツキに基づいてチップ部品の取り外しを判断するチップリペア判断手段を備えたことを特徴とする実装装置である。 In order to solve the above problems, the invention described in claim 1
In a temporary press-bonding part that temporarily press-bonds a plurality of chip components to a circuit board on which a plurality of circuit patterns are formed via a resin,
A pressure head for mounting chip components one by one on the circuit pattern, and a height detection means for detecting the height of the chip components temporarily bonded to the circuit board,
In the next step of pre-bonding, the chip components are collectively bonded together. The variation in the height detected by the height detecting means is examined in units of the number of chip components, and the variation in the height is determined. A mounting apparatus comprising chip repair determining means for determining removal of a chip component based on the chip component.

請求項２に記載の発明は、
請求項１に記載の発明において、
チップ部品の高さを検出する前記高さ検出手段が、前記加圧ヘッドに備えられ、前記加圧ヘッドとともに移動する構成であり、
チップ部品の仮圧着の完了した状態で、前記加圧ヘッドと回路基板との距離を測定することにより、チップ部品の高さを検出する高さ検出手段からなる実装装置である。 The invention described in claim 2
In the invention of claim 1,
The height detecting means for detecting the height of the chip component is provided in the pressure head, and moves with the pressure head,
A mounting apparatus comprising height detection means for detecting the height of the chip component by measuring the distance between the pressure head and the circuit board in a state where the temporary bonding of the chip component is completed.

請求項３に記載の発明は、
請求項１に記載の発明において、
チップ部品の高さを検出する前記高さ検出手段が、前記加圧ヘッドを駆動する昇降手段に備えられ、昇降手段の駆動部にマウントされた駆動部の位置検出器の位置検出信号を測定することにより、チップ部品の高さを検出する高さ検出手段からなる実装装置である。 The invention according to claim 3
In the invention of claim 1,
The height detecting means for detecting the height of the chip component is provided in an elevating means for driving the pressure head, and measures a position detection signal of a position detector of a driving unit mounted on the driving unit of the elevating means. Thus, the mounting device includes a height detecting means for detecting the height of the chip component.

請求項４に記載の発明は、
請求項１から３のいずれかに記載の発明において、
前記チップリペア判断手段の判断結果に基づいて、チップリペア箇所を指示する表示部を有した実装装置である。 The invention according to claim 4
In the invention according to any one of claims 1 to 3,
The mounting apparatus includes a display unit for instructing a chip repair location based on a determination result of the chip repair determination unit.

請求項５に記載の発明は、
複数の回路パターンが形成された回路基板に、樹脂を介して複数のチップ部品を仮圧着する実装方法であって、
加圧ヘッドに吸着保持されたチップ部品を、基板保持ステージに保持された回路基板に押圧し仮圧着するステップと、
前記回路基板に仮圧着されたチップ部品の高さを検出し記憶するステップと、
仮圧着の次の工程における、チップ部品を一括して本圧着する複数のチップ部品の個数を単位として、前記記憶されたチップ部品の高さの最大値と最小値との範囲が、予め設定されているチップ部品の高さの許容値の範囲内であるかを判断するステップと、
を有する実装方法である。 The invention described in claim 5
A mounting method in which a plurality of chip parts are temporarily bonded to a circuit board on which a plurality of circuit patterns are formed via a resin,
A step of pressing and temporarily pressing the chip component sucked and held by the pressure head against the circuit board held by the substrate holding stage;
Detecting and storing the height of the chip part temporarily bonded to the circuit board;
A range between the maximum value and the minimum value of the height of the stored chip parts is set in advance in units of the number of chip parts to which the chip parts are subjected to final pressure bonding in a batch in the next step of the temporary pressure bonding. Determining whether the height of the chip component is within a tolerance range;
Is a mounting method.

請求項１に記載の発明によれば、複数の回路パターンが形成された回路基板の各回路パターンにチップ部品を実装する仮圧着部において、チップ部品の厚さにバラツキが許容範囲を外れていても、チップ部品の仮圧着実装の際に、高さ検出手段によりチップ部品の高さを検出し、回路基板に実装されたチップ部品を取り外すチップリペア判断手段を備えているので、チップ部品の厚さにバラツキを許容範囲内に納めることができ、良好なチップ部品の実装ができる。   According to the first aspect of the present invention, in the temporary press-bonding portion for mounting the chip component on each circuit pattern of the circuit board on which a plurality of circuit patterns are formed, the thickness of the chip component is not within an allowable range. In addition, when the chip component is temporarily crimped and mounted, the height detection unit detects the height of the chip component and includes a chip repair determination unit that removes the chip component mounted on the circuit board. In addition, the variation can be kept within an allowable range, and a good chip component can be mounted.

請求項２に記載の発明によれば、チップ部品の高さを検出する高さ検出手段が、加圧ヘッドに備えられ、加圧ヘッドとともに移動する構成である。そして、チップ部品の仮圧着の完了した状態で、加圧ヘッドと回路基板との距離を測る。そのため、仮圧着が完了した時点のチップ部品の高さバラツキを正確に測定することができる。   According to the second aspect of the present invention, the height detecting means for detecting the height of the chip component is provided in the pressure head and moves together with the pressure head. Then, the distance between the pressure head and the circuit board is measured in a state where the temporary pressure bonding of the chip component is completed. Therefore, it is possible to accurately measure the height variation of the chip component at the time when the temporary pressure bonding is completed.

請求項３に記載の発明によれば、チップ部品の高さを検出する高さ検出手段が、加圧ヘッドを駆動する昇降手段に備えられ、昇降手段の駆動部にマウントされた駆動部の位置検出器の位置検出信号を測定することにより、チップ部品の高さを検出する高さ検出手段である。そのため、専用の高さ検出手段を加圧ヘッドに設けなくても、仮圧着が完了した時点のチップ部品の高さバラツキを正確に測定することができる。   According to the third aspect of the present invention, the height detecting means for detecting the height of the chip component is provided in the elevating means for driving the pressure head, and the position of the driving section mounted on the driving section of the elevating means. This is a height detection means for detecting the height of the chip component by measuring the position detection signal of the detector. Therefore, it is possible to accurately measure the height variation of the chip component at the time when the temporary pressure bonding is completed without providing a dedicated height detection means in the pressure head.

請求項４に記載の発明によれば、チップリペア判断手段の判断結果に基づいて、チップリペア箇所を指示する表示部を有しているので、効率よくチップ部品のリペアを行うことができる。   According to the fourth aspect of the present invention, since the display unit for indicating the chip repair location is provided based on the determination result of the chip repair determination means, the chip parts can be repaired efficiently.

請求項５に記載の発明によれば、仮圧着において、チップ部品の高さを検出し、チップ部品を一括して本圧着する複数のチップ部品の個数を単位として、本圧着の許容範囲かどうかを判断する。そのため、チップ部品の高さバラツキを許容範囲内に納めることができ良好なチップ部品と回路基板の実装ができるようになる。   According to the fifth aspect of the present invention, in the temporary crimping, whether or not the height of the chip component is detected, and whether or not the allowable range of the final crimping is in the unit of the number of the plurality of chip components that are final crimped together. Judging. As a result, the height variation of the chip components can be kept within an allowable range, and a good chip component and circuit board can be mounted.

本発明の実施の形態に係る実装装置の概略斜視図である。1 is a schematic perspective view of a mounting apparatus according to an embodiment of the present invention. 本発明の仮圧着部の概略構成を示す側面図である。It is a side view which shows schematic structure of the temporary crimping | compression-bonding part of this invention. 本発明の仮圧着部におけるチップ部品高さを測定する概略側面図である。It is a schematic side view which measures the chip component height in the temporary crimping | compression-bonding part of this invention. 回路基板の概略平面図である。It is a schematic plan view of a circuit board. 回路基板の概略側面図である。It is a schematic side view of a circuit board. 本発明の実装装置の動作を説明するフローチャートである。It is a flowchart explaining operation | movement of the mounting apparatus of this invention. チップリペア判断手段の構成を説明するブロック図である。It is a block diagram explaining the structure of a chip repair determination means. 従来の実装装置の概略斜視図である。It is a schematic perspective view of the conventional mounting apparatus.

以下、図面を参照して本発明の実施の形態を説明する。   Embodiments of the present invention will be described below with reference to the drawings.

図１は、本実施の形態に係る実装装置１の概略斜視図である。図１において、実装装置１に向かって左右方向をＸ軸、手前方向をＹ軸、Ｘ軸とＹ軸で構成されるＸＹ平面に直交する軸をＺ軸、Ｚ軸を中心として回転する方向をθ方向とする。実装装置１は、回路基板２にチップ部品４を仮圧着する仮圧着部１００と、回路基板２にチップ部品４を本圧着する本圧着部２００と、実装装置１の全体を制御する制御部１５０とから構成されている。   FIG. 1 is a schematic perspective view of a mounting apparatus 1 according to the present embodiment. In FIG. 1, the direction toward the mounting apparatus 1 is the X axis as the left and right direction, the Y axis as the front direction, the Z axis as the axis perpendicular to the XY plane composed of the X axis and the Y axis, and the direction rotating around the Z axis. The direction is θ. The mounting apparatus 1 includes a temporary crimping unit 100 that temporarily crimps the chip component 4 to the circuit board 2, a final crimping unit 200 that crimps the chip component 4 to the circuit board 2, and a control unit 150 that controls the entire mounting apparatus 1. It consists of and.

仮圧着部１００は、基台１０１上に載置された基板保持ステージ１０２と、基台１０１のＹ方向後方に設けられた支持フレーム１０３と、支持フレーム１０３に設けられ回路基板２にチップ部品４を仮圧着する加圧手段１０４と、チップ部品４を回路基板２から取り外すリペアステージ１０５とから構成されている。   The temporary pressure bonding unit 100 includes a substrate holding stage 102 placed on the base 101, a support frame 103 provided behind the base 101 in the Y direction, and a chip component 4 on the circuit board 2 provided on the support frame 103. Is composed of a pressurizing means 104 for temporarily press-fitting and a repair stage 105 for removing the chip component 4 from the circuit board 2.

基板保持ステージ１０２には、図示していない搬送手段により回路基板２が供給される。基板保持ステージ１０２は、ＸＹ方向およびθ方向に移動可能な位置調整手段１０６が備えられている。位置調整手段１０６は、サーボモータに連結されたボールねじなどの機構により基板保持ステージ１０２をＸＹ方向およびθ方向に駆動するように構成されている。   The circuit board 2 is supplied to the substrate holding stage 102 by a conveying means (not shown). The substrate holding stage 102 is provided with position adjusting means 106 that can move in the XY direction and the θ direction. The position adjusting means 106 is configured to drive the substrate holding stage 102 in the XY direction and the θ direction by a mechanism such as a ball screw connected to a servo motor.

加圧手段１０４と基板保持ステージ１０２をＹ方向手前から参照した場合の構成図を図２に示す。図２に示すように、支持フレーム１０３に設けられた加圧手段１０４は、Ｚ方向に駆動する加圧ヘッド１０７と、加圧ヘッド１０７の回路基板２側に接続されたチップ部品４を吸着保持するアタッチメント１０９と、加圧ヘッド１０７を駆動する昇降手段１０８と、昇降手段１０８に設けられたトルク検出器１１０と、加圧ヘッド１０７の側面に設けられた距離センサ１１１とから構成されている。   FIG. 2 shows a configuration diagram when the pressing unit 104 and the substrate holding stage 102 are referenced from the front in the Y direction. As shown in FIG. 2, the pressing means 104 provided on the support frame 103 sucks and holds the pressing head 107 driven in the Z direction and the chip component 4 connected to the circuit board 2 side of the pressing head 107. An attachment 109 for driving the pressure head 107, a torque detector 110 provided on the lift means 108, and a distance sensor 111 provided on a side surface of the pressure head 107.

昇降手段１０８は、サーボモータとボールねじの機構により加圧ヘッド１０７をＺ方向に駆動するように構成されている。サーボモータとボールねじの構成に限らず、圧空シリンダとピストンの構成にしてもよい。加圧ヘッド１０７に加わる加圧力は、トルク検出器１１０で検出できるようになっている。   The elevating means 108 is configured to drive the pressure head 107 in the Z direction by a mechanism of a servo motor and a ball screw. Not only the configuration of the servo motor and the ball screw, but also the configuration of a pneumatic cylinder and a piston may be used. The pressure applied to the pressure head 107 can be detected by the torque detector 110.

アタッチメント１０９に吸着保持されたチップ部品４には回路基板２の電極と接続されるバンプ５が設けられている。また、回路基板２には、チップ部品４のバンプ５と接続する電極３が設けられている。回路基板２の電極３には樹脂６が塗布されている。   The chip component 4 sucked and held by the attachment 109 is provided with bumps 5 connected to the electrodes of the circuit board 2. The circuit board 2 is provided with electrodes 3 connected to the bumps 5 of the chip component 4. Resin 6 is applied to the electrodes 3 of the circuit board 2.

回路基板２へのチップ部品４の実装は、回路基板２に付された位置合わせマークとチップ部品４に付された位置合わせマークとを図示しない画像認識手段により画像認識した後、位置合わせを行い、アタッチメント１０９に吸着保持されたチップ部品４を回路基板２側に押し付けることにより行われる。具体的には、加圧ヘッド１０７はトルク検出器１１０が所定のトルクを検出する位置まで下降し、チップ部品４を回路基板２に押し付けた後（仮圧着工程）、アタッチメント１０９のチップ部品４の吸着保持を解除し、加圧ヘッド１０７を上昇させる。仮圧着部１００では、所定時間、チップ部品４を回路基板２に押し付け樹脂６により仮固定される工程までが行われる。   The chip component 4 is mounted on the circuit board 2 after the image recognition means (not shown) recognizes the alignment mark attached to the circuit board 2 and the alignment mark attached to the chip component 4, and then the alignment is performed. This is done by pressing the chip component 4 sucked and held by the attachment 109 against the circuit board 2 side. Specifically, the pressure head 107 is lowered to a position where the torque detector 110 detects a predetermined torque, and after pressing the chip component 4 against the circuit board 2 (temporary pressure bonding step), the chip component 4 of the attachment 109 is pressed. The suction holding is released and the pressure head 107 is raised. In the temporary press-bonding portion 100, a process up to a predetermined time is performed until the chip component 4 is pressed against the circuit board 2 and temporarily fixed by the resin 6.

図３にチップ部品４を回路基板２に押し付け、トルク検出器１１０が所定のトルクを検出した状態を示す。チップ部品４のバンプ５と回路基板２の電極３が接触した状態となる。この状態で、チップ部品４と回路基板２は樹脂６によって仮固定される。   FIG. 3 shows a state where the chip component 4 is pressed against the circuit board 2 and the torque detector 110 detects a predetermined torque. The bump 5 of the chip component 4 and the electrode 3 of the circuit board 2 are in contact with each other. In this state, the chip component 4 and the circuit board 2 are temporarily fixed by the resin 6.

加圧ヘッド１０７の側面に設けられた距離センサ１１１は、チップ部品４を回路基板２に押し付け、トルク検出器１１０が所定のトルクを検出した時の、加圧ヘッド１０７と回路基板２との距離からチップ部品４の高さＨを検出し、制御部１５０の記憶部１５１に検出結果を記憶させる。   The distance sensor 111 provided on the side surface of the pressure head 107 presses the chip component 4 against the circuit board 2 and the distance between the pressure head 107 and the circuit board 2 when the torque detector 110 detects a predetermined torque. Then, the height H of the chip component 4 is detected, and the detection result is stored in the storage unit 151 of the control unit 150.

距離センサ１１１は、本発明の高さ検出手段に相当する。距離センサ１１１は、赤外線レーザ光を利用した距離センサや、超音波信号を利用した距離センサなどが適用できる。また、サーボモータとボールねじで構成された昇降手段で、サーボモータにマウントされたエンコーダなどの位置検出器の信号を利用しても良い。具体的には、生産開始に先だって、回路基板２を基板保持ステージ１０２に保持させる前に、チップ部品４の吸着保持されていない加圧ヘッド１０７を下降させて、基板保持ステージ１０２にアタッチメント１０９を接地させる。この状態の時のエンコーダの位置検出信号を基準位置として制御部１５０の記憶部１５１に記憶させる。次に、生産を開始し、回路基板２を基板保持ステージ１０２に保持し、アタッチメント１０９にチップ部品４を吸着保持する。仮圧着部１００でチップ部品４を回路基板２に押し付け、トルク検出器１１０が所定のトルクを検出した時の、エンコーダの位置検出信号を測定する。測定された値と前記基準位置との差からチップ部品４の高さＨを求める。   The distance sensor 111 corresponds to the height detection means of the present invention. As the distance sensor 111, a distance sensor using an infrared laser beam, a distance sensor using an ultrasonic signal, or the like can be applied. In addition, a lifting / lowering means constituted by a servo motor and a ball screw may use a signal from a position detector such as an encoder mounted on the servo motor. Specifically, prior to the start of production, before the circuit board 2 is held on the substrate holding stage 102, the pressure head 107 on which the chip component 4 is not sucked and held is lowered to attach the attachment 109 to the substrate holding stage 102. Ground. The position detection signal of the encoder in this state is stored in the storage unit 151 of the control unit 150 as a reference position. Next, production is started, the circuit board 2 is held on the board holding stage 102, and the chip component 4 is sucked and held on the attachment 109. The chip component 4 is pressed against the circuit board 2 by the temporary crimping unit 100, and the position detection signal of the encoder when the torque detector 110 detects a predetermined torque is measured. The height H of the chip component 4 is obtained from the difference between the measured value and the reference position.

図４に、回路基板２をＺ方向上側から参照した状態、図５に回路基板２をＹ方向側面から参照した状態、を示す。図４に示すように、回路基板２には、複数の回路パターン７が形成されており、各回路パターン７にチップ部品４が仮圧着部１００で仮圧着される。回路パターン７はＸＹ平面で縦横に整列して配置されている。Ｘ方向を列とし、チップ部品４は列に従って順次仮圧着が行われ、列毎に仮圧着が完了するとＹ方向に一列移動し、順次仮圧着が続行される。例として、図４では７列７行の場合を示した。   4 shows a state in which the circuit board 2 is referenced from the upper side in the Z direction, and FIG. 5 shows a state in which the circuit board 2 is referenced from the side in the Y direction. As shown in FIG. 4, a plurality of circuit patterns 7 are formed on the circuit board 2, and the chip component 4 is temporarily crimped to each circuit pattern 7 by a temporary crimping portion 100. The circuit pattern 7 is aligned in the vertical and horizontal directions on the XY plane. The X direction is a row, and the chip components 4 are sequentially subjected to temporary pressure bonding in accordance with the rows. When the temporary pressure bonding is completed for each row, the chip components 4 are moved one row in the Y direction, and the temporary pressure bonding is continued. As an example, FIG. 4 shows the case of 7 columns and 7 rows.

図５は、図４における１列分のチップ部品４と回路基板２の断面を示している。チップ部品４の回路基板２からの高さＨは、ウエハの厚さバラツキの影響を受けて、図５に示すＨ１〜Ｈ７のようにばらついてしまう。これらの高さデータＨ１〜Ｈ７は制御部１５０の記憶部１５１に記憶される。また、記憶部１５１には、後述する本圧着部２００に備えられた加圧ヘッド２０７が一度に加圧する回路基板２上のチップ部品４の加圧数データＰＤが記憶される。加圧数データＰＤは、チップ部品の個数の単位となる。また、記憶部１５１には本圧着部２００で一括圧着する際に加圧が可能なチップ部品４の高さバラツキの許容範囲Ｖが記憶される。   FIG. 5 shows a cross section of the chip component 4 and the circuit board 2 for one row in FIG. The height H of the chip component 4 from the circuit board 2 varies as indicated by H1 to H7 shown in FIG. 5 due to the influence of wafer thickness variation. These height data H1 to H7 are stored in the storage unit 151 of the control unit 150. In addition, the storage unit 151 stores the number-of-pressing data PD of the chip component 4 on the circuit board 2 that is pressurized at once by the pressing head 207 provided in the main press-bonding unit 200 described later. The pressurization number data PD is a unit of the number of chip parts. In addition, the storage unit 151 stores an allowable range V of the height variation of the chip component 4 that can be pressurized when the main crimping unit 200 performs the batch crimping.

図５の場合、加圧数データＰＤは、７個が対応する（図５の高さデータＨ１〜Ｈ７で範囲を示した部分）。また、許容範囲Ｖは、チップ部品４の高さが最大となっているＨ４の位置から回路基板２側にＶの範囲としている。   In the case of FIG. 5, the pressurization number data PD corresponds to 7 pieces (the portion whose range is indicated by the height data H <b> 1 to H <b> 7 in FIG. 5). The allowable range V is a range of V from the position of H4 where the height of the chip component 4 is maximum to the circuit board 2 side.

制御部１５０の演算部１５２では、高さデータＨ１〜Ｈ７から、最大高さＨｍａｘと最小高さＨｍｉｎを求める。次に、最大高さＨｍａｘと最小高さＨｍｉｎの差Ｈｄｉｆを求める（計算式はＨｄｉｆ＝｜Ｈｍａｘ−Ｈｍｉｎ｜となる）。次に、差Ｈｄｉｆと許容範囲Ｖとを比較し、差Ｈｄｉｆが許容範囲Ｖの範囲外ならば、高さデータＨ１〜Ｈ７から、許容範囲Ｖから外れたチップ部品４を求める。次に、許容範囲Ｖから外れるチップ部品４を表示部１５３に表示し、回路基板２をリペアステージ１０５に搬送を指示する。そのため、回路基板２に仮圧着されるチップ部品４の厚みがばらついていても、チップ部品４のリペアが行われ、本圧着部２００で実装不良を発生することがない。   The calculation unit 152 of the control unit 150 obtains the maximum height Hmax and the minimum height Hmin from the height data H1 to H7. Next, a difference Hdif between the maximum height Hmax and the minimum height Hmin is obtained (the calculation formula is Hdif = | Hmax−Hmin |). Next, the difference Hdif is compared with the allowable range V. If the difference Hdif is outside the allowable range V, the chip component 4 that is out of the allowable range V is obtained from the height data H1 to H7. Next, the chip component 4 that is out of the allowable range V is displayed on the display unit 153, and the circuit board 2 is instructed to be transported to the repair stage 105. For this reason, even if the thickness of the chip component 4 temporarily bonded to the circuit board 2 varies, the chip component 4 is repaired, and mounting failure does not occur in the main bonding portion 200.

なお、制御部１５０の記憶部１５１および演算部１５２の一連の機能は、本発明のチップリペア判断手段に相当する。   A series of functions of the storage unit 151 and the calculation unit 152 of the control unit 150 corresponds to the chip repair determination unit of the present invention.

図７に、チップリペア判断手段の構成をブロック図で示す。チップリペア判断手段（Ｂ０１）には、高さデータＨ１〜Ｈ７（Ｂ０１）と、一括圧着の加圧数データＰＤ（Ｂ０３）と、一括圧着の許容範囲Ｖ（Ｂ０４）とが入力される。そして、チップ部品の高さの最大値Ｈｍａｘおよび最小値Ｈｍｉｎを求め（Ｂ０５）、最大値Ｈｍａｘと最小値Ｈｍｉｎの差Ｈｄｉｆを求め（Ｂ０６）、許容範囲Ｖとの比較を行う（Ｂ０７）。比較の結果、許容範囲Ｖを外れる場合は、リペアの指示信号（Ｂ０８）が出力される。   FIG. 7 is a block diagram showing the configuration of the chip repair determination unit. The chip repair determination means (B01) is inputted with height data H1 to H7 (B01), press-fitting number data PD (B03) for batch crimping, and an allowable range V (B04) for batch crimping. Then, a maximum value Hmax and a minimum value Hmin of the height of the chip component are obtained (B05), a difference Hdif between the maximum value Hmax and the minimum value Hmin is obtained (B06), and a comparison with the allowable range V is performed (B07). As a result of the comparison, if the allowable range V is not satisfied, a repair instruction signal (B08) is output.

制御部１５０は、タッチパネル等の入出力装置、メモリチップやマイクロプロセッサなどを主体とした適当なハードウエア、このハードウエアを動作させるためのプログラムを組み込んだハードディスク装置、及び各構成部とデータ通信を行う適当なインターフェイス回路などから構成され、記憶部１５１はハードディスク装置、演算部１５２はメモリチップやマイクロプロセッサ、表示部１５３はタッチパネル等の入出力装置が対応する。   The control unit 150 communicates data with an input / output device such as a touch panel, appropriate hardware mainly including a memory chip and a microprocessor, a hard disk device incorporating a program for operating the hardware, and each component. The storage unit 151 corresponds to a hard disk device, the calculation unit 152 corresponds to a memory chip or a microprocessor, and the display unit 153 corresponds to an input / output device such as a touch panel.

図１にもどり、リペアステージ１０５は、基板保持ステージ１０２の近傍に配置され、リペアの必要となったチップ部品４を取り外すステージである。リペアは、ロボットなどにより自動で行っても良いし、人が介在して手動で行っても良い。また、リペアステージ１０５に回路基板２を搬送せずに、仮圧着部１００の運転を停止して、基板保持ステージ１０２上でリペアを行っても良い。   Returning to FIG. 1, the repair stage 105 is a stage that is disposed in the vicinity of the substrate holding stage 102 and removes the chip component 4 that needs to be repaired. The repair may be performed automatically by a robot or the like, or may be performed manually with human intervention. Further, the operation of the temporary pressure bonding unit 100 may be stopped and the repair may be performed on the substrate holding stage 102 without conveying the circuit board 2 to the repair stage 105.

本圧着部２００は、基台２０１上に載置された基板保持ステージ２０２と、基台２０１のＹ方向後方に設けられた支持フレーム２０３と、支持フレーム２０３に設けられ回路基板２にチップ部品４を本圧着する加圧手段２０４と、チップ部品４と加圧手段２０４の間に介在させる弾性材２０９と、樹脂を加熱硬化させる加熱手段２１０とから構成されている。   The main press bonding part 200 includes a substrate holding stage 202 placed on the base 201, a support frame 203 provided behind the base 201 in the Y direction, and a chip component 4 on the circuit board 2 provided on the support frame 203. Is composed of a pressurizing means 204 for main-compression bonding, an elastic material 209 interposed between the chip component 4 and the pressurizing means 204, and a heating means 210 for heat-curing the resin.

基板保持ステージ２０２には、図示していない搬送手段によりチップ部品４が仮圧着された回路基板２が供給される。基板保持ステージ２０２は、ＸＹ方向およびθ方向に移動可能な位置調整手段２０６が備えられている。位置調整手段２０６は、サーボモータに連結されたボールねじなどの機構により基板保持ステージ２０２をＸＹ方向およびθ方向に駆動するように構成されている。   The substrate holding stage 202 is supplied with the circuit board 2 on which the chip component 4 has been temporarily pressure-bonded by a conveying means (not shown). The substrate holding stage 202 is provided with position adjusting means 206 that can move in the XY direction and the θ direction. The position adjusting means 206 is configured to drive the substrate holding stage 202 in the XY and θ directions by a mechanism such as a ball screw connected to a servo motor.

支持フレーム２０３に設けられた加圧手段２０４は、Ｚ方向に駆動する加圧ヘッド２０７と、加圧ヘッド２０７を駆動する昇降手段とから構成されている。加圧ヘッド２０７は概略凸形状断面であって回路基板２のチップ部品４の列方向に伸びた柱状物である。そして、凸部先端で弾性材２０９を介して複数個のチップ部品４を一括に加圧する。   The pressurizing unit 204 provided on the support frame 203 includes a pressurizing head 207 that drives in the Z direction and an elevating unit that drives the pressurizing head 207. The pressure head 207 is a columnar object having a substantially convex cross section and extending in the column direction of the chip components 4 of the circuit board 2. Then, the plurality of chip components 4 are collectively pressed through the elastic material 209 at the tip of the convex portion.

弾性材２０９は、加圧ヘッド２０７とチップ部品４との間に介在するように、待機位置にある加圧ヘッド２０７を挟み込むように配備された巻取ローラ２１３と繰り出しローラ２１４とに懸架されている。この弾性材２０９を巻取ローラ２１３で巻き取ることにより、繰り出しローラ２１４から新たな弾性材２０９が供給されるようになっている。なお、弾性材２０９には、例えばガラスクロス入りのシリコンシートなどが使用される。また、弾性材２０９の厚みは、使用する実装部材などによって適宜に変更される。   The elastic member 209 is suspended between a take-up roller 213 and a feed roller 214 disposed so as to sandwich the pressure head 207 at the standby position so as to be interposed between the pressure head 207 and the chip component 4. Yes. A new elastic material 209 is supplied from the feeding roller 214 by winding the elastic material 209 with the winding roller 213. As the elastic material 209, for example, a silicon sheet containing glass cloth is used. Further, the thickness of the elastic member 209 is appropriately changed depending on the mounting member used.

次に、本発明の実装装置１の動作について図６のフロチャートを用いて説明する。
まず、仮圧着部１００の基板保持ステージ１０２に回路基板２が搬送される。回路基板２には、予め各回路パターン７の位置に樹脂６が塗布されている（ステップＳＴ０１）。 Next, operation | movement of the mounting apparatus 1 of this invention is demonstrated using the flowchart of FIG.
First, the circuit board 2 is conveyed to the substrate holding stage 102 of the temporary pressure bonding unit 100. Resin 6 is applied to the circuit board 2 in advance at the position of each circuit pattern 7 (step ST01).

次に、加圧ヘッド１０７の回路基板２側に接続されたチップ部品４を吸着保持するアタッチメント１０９に、チップ部品５を搬送し吸着保持する。吸着保持は、チップ部品４のバンプ５が回路基板２側になるように行われる（ステップＳＴ０２）。   Next, the chip component 5 is conveyed and sucked and held on the attachment 109 that sucks and holds the chip component 4 connected to the circuit board 2 side of the pressure head 107. The suction holding is performed so that the bump 5 of the chip component 4 is on the circuit board 2 side (step ST02).

次に、回路基板２に付された位置合わせマークと、チップ部品４の位置合わせマークを図示しない画像認識手段により画像認識する。画像認識データに基づいて、基板保持ステージ１０２を位置調整手段１０６で駆動し、チップ部品４と回路パターン７の位置合わせを行う（ステップＳＴ０３）。   Next, the image recognition means (not shown) recognizes the alignment mark attached to the circuit board 2 and the alignment mark of the chip component 4. Based on the image recognition data, the substrate holding stage 102 is driven by the position adjusting means 106 to align the chip component 4 and the circuit pattern 7 (step ST03).

次に、加圧ヘッド１０７を下降し、回路パターン７にチップ部品４を仮圧着する。仮圧着は、トルク検知器１１０が所定のトルクを検出してから所定時間だけ加圧を行い、チップ部品４のバンプ５を回路パターン７に設けられた電極３に押し込む（ステップＳＴ０４）。   Next, the pressure head 107 is lowered, and the chip component 4 is temporarily pressure-bonded to the circuit pattern 7. Temporary press-bonding is performed for a predetermined time after the torque detector 110 detects a predetermined torque, and the bump 5 of the chip component 4 is pushed into the electrode 3 provided on the circuit pattern 7 (step ST04).

次に、距離センサ１１１を用いて、加圧ヘッド１０７と回路基板２との距離を測定する。測定結果は、チップ部品４の高さデータＨとして回路パターン７の位置情報と共に、制御部１５０の記憶部１５１に記憶する（ステップＳＴ０５）。   Next, the distance between the pressure head 107 and the circuit board 2 is measured using the distance sensor 111. A measurement result is memorize | stored in the memory | storage part 151 of the control part 150 with the positional information on the circuit pattern 7 as the height data H of the chip component 4 (step ST05).

次に、チップ部品４の吸着保持を解除して加圧ヘッド１０７を上昇させる。回路基板２の全回路パターン７にチップ部品４が仮圧着を完了していない場合は、ステップＳＴ０２に戻り、順次、図４に示す矢印の順の回路パターン７に位置合わせを行いチップ部品４を仮圧着していく（ステップＳＴ０６）。   Next, the suction holding of the chip component 4 is released and the pressure head 107 is raised. If the chip component 4 has not been pre-bonded to all the circuit patterns 7 of the circuit board 2, the process returns to step ST02, and the chip components 4 are sequentially aligned with the circuit pattern 7 in the order of the arrows shown in FIG. Temporary pressure bonding is performed (step ST06).

次に、全回路パターン７にチップ部品４が仮圧着させると、記憶部１５１に記憶されている各回路パターン７毎のチップ部品４の高さデータＨと、本圧着部２００の加圧ヘッド２０７が加圧できるチップ部品４の加圧数データＰＤと、加圧ヘッド２０７が一括加圧できる高さバラツキの許容範囲Ｖとから、許容範囲Ｖを超えるチップ部品４と回路パターン７の位置を求める（ステップＳＴ０７）。   Next, when the chip components 4 are temporarily crimped to all the circuit patterns 7, the height data H of the chip components 4 for each circuit pattern 7 stored in the storage unit 151 and the pressure head 207 of the main crimping unit 200. The positions of the chip component 4 and the circuit pattern 7 that exceed the allowable range V are obtained from the pressing number data PD of the chip component 4 that can be pressed and the allowable range V of the height variation that the pressurizing head 207 can collectively press. (Step ST07).

具体的には、制御部１５０の演算部１５２において、加圧数データＰＤに対応するチップ部品４の高さデータＨ（例えば図５のＨ１〜Ｈ７）から、最大高さＨｍａｘと最小高さＨｍｉｎを求める。次に、最大高さＨｍａｘと最小高さＨｍｉｎの差Ｈｄｉｆを求める（計算式はＨｄｉｆ＝｜Ｈｍａｘ−Ｈｍｉｎ｜となる）。次に、差Ｈｄｉｆと許容範囲Ｖとを比較し、差Ｈｄｉｆが許容範囲Ｖの範囲外ならば、高さデータＨ１〜Ｈ７から、許容範囲Ｖから外れたチップ部品４を求める。   Specifically, in the calculation unit 152 of the control unit 150, the maximum height Hmax and the minimum height Hmin are calculated from the height data H (for example, H1 to H7 in FIG. 5) of the chip component 4 corresponding to the pressurization number data PD. Ask for. Next, a difference Hdif between the maximum height Hmax and the minimum height Hmin is obtained (the calculation formula is Hdif = | Hmax−Hmin |). Next, the difference Hdif is compared with the allowable range V. If the difference Hdif is outside the allowable range V, the chip component 4 that is out of the allowable range V is obtained from the height data H1 to H7.

次に、許容範囲Ｖを外れるチップ部品４が存在する場合は、回路基板２をリペアステージ１０５に搬送する。リペア箇所が無い場合は、仮圧着工程が完了する（ステップＳＴ０８）。   Next, when there is a chip component 4 outside the allowable range V, the circuit board 2 is transferred to the repair stage 105. When there is no repair location, the temporary press-bonding process is completed (step ST08).

次に、リペアステーション１０５で高さ異常となったチップ部品４を取り外す（ステップＳＴ０９）。   Next, the chip component 4 whose height is abnormal at the repair station 105 is removed (step ST09).

次に、取り外した回路パターン７の取り外し位置情報ＴＩを記憶部１５１に記憶させ、ステップＳＴ０１に戻る（ステップＳＴ１０）。ステップＳＴ０１以降の動作では、取り外し位置情報ＴＩに基づき、チップ部品４の仮圧着が行われる。すなわち、すでに仮圧着されている回路パターン７にはチップ部品４を仮圧着しない。さらに、同じ回路パターン７の位置が複数回にリペアが行われていた場合は、チップ部品４の仮圧着の対象箇所から除く除外情報ＥＸを記憶部１５１に記憶させる。除外情報ＥＸの回路パターン７には以後、チップ部品４の仮圧着を行わない。   Next, the removal position information TI of the removed circuit pattern 7 is stored in the storage unit 151, and the process returns to step ST01 (step ST10). In the operation after step ST01, the chip component 4 is temporarily crimped based on the removal position information TI. That is, the chip component 4 is not temporarily bonded to the circuit pattern 7 that has already been temporarily bonded. Furthermore, when the position of the same circuit pattern 7 has been repaired a plurality of times, exclusion information EX that is excluded from the provisional press-bonding locations of the chip component 4 is stored in the storage unit 151. Thereafter, the temporary compression bonding of the chip component 4 is not performed on the circuit pattern 7 of the exclusion information EX.

次に、ステップＳＴ０８で仮圧着工程が完了すると、回路基板２を本圧着部２００の基板保持ステージ２０２に搬送する（ステップＳＴ１１）。   Next, when the provisional pressure bonding process is completed in step ST08, the circuit board 2 is transferred to the substrate holding stage 202 of the main pressure bonding part 200 (step ST11).

次に、回路基板２の本圧着する列と加圧ヘッド２０７の凸部との位置合わせを行う。そして、弾性材２０９を介在させて加圧ヘッド２０７を回路基板４の列毎に一括圧着を行い、チップ部品４を回路基板４に本圧着する。一括圧着の際に、除外情報ＥＸの含まれている回路パターン７が存在する場合は、加圧力を所定の加圧力よりも低めに設定して加圧を行う（ステップＳＴ１２）。   Next, alignment of the circuit board 2 to which the main press bonding is performed and the convex portion of the pressure head 207 is performed. Then, the pressure head 207 is collectively pressure-bonded for each row of the circuit boards 4 with the elastic material 209 interposed therebetween, and the chip component 4 is finally pressure-bonded to the circuit board 4. When the circuit pattern 7 including the exclusion information EX is present during the collective crimping, pressurization is performed by setting the pressurizing force lower than a predetermined pressurizing force (step ST12).

次に、図４に示す列毎に回路基板２の本圧着する列と加圧ヘッド２０７の凸部との位置合わせを行い、順次、ステップＳＴ１２に基づき本圧着を行う（ステップＳＴ１３）。   Next, for each row shown in FIG. 4, the row of the circuit board 2 to be pressure-bonded and the convex portion of the pressure head 207 are aligned, and the pressure bonding is sequentially performed based on step ST12 (step ST13).

次に、全列の本圧着が完了すると、回路基板４を搬出し本圧着工程を完了し、続けてステップＳＴ０１に戻り、次の回路基板２へのチップ部品４の仮圧着工程を開始する（ステップＳＴ１４）。   Next, when the main press-bonding of all the rows is completed, the circuit board 4 is unloaded and the main press-bonding process is completed. Then, the process returns to step ST01 to start the temporary press-bonding process of the chip component 4 to the next circuit board 2 ( Step ST14).

このように、回路基板２の各回路パターン７に仮圧着されているチップ部品４の高さ位置が、本圧着部２００の加圧ヘッド２０７の一括圧着できる高さバラツキの許容範囲Ｖにすることができるので、チップ部品４の実装不良のない回路基板４を提供することができる。   As described above, the height position of the chip component 4 that is temporarily press-bonded to each circuit pattern 7 of the circuit board 2 is set to the allowable range V of the height variation in which the pressurizing head 207 of the main press-bonding portion 200 can be collectively pressed. Therefore, it is possible to provide the circuit board 4 free from defective mounting of the chip component 4.

１ 実装装置
２ 回路基板
３ 電極
４ チップ部品
５ バンプ
６ 樹脂
７ 回路パターン
１００ 仮圧着部
１０１ 基台
１０２ 基板保持ステージ
１０２ 手段
１０３ 支持フレーム
１０４ 加圧手段
１０５ リペアステージ
１０６ 位置調整手段
１０７ 加圧ヘッド
１０８ 昇降手段
１０９ アタッチメント
１１０ トルク検出器
１１１ 距離センサ
１５０ 制御部
１５１ 記憶部
１５２ 演算部
１５３ 表示部
２００ 本圧着部
２０１ 基台
２０２ 基板保持ステージ
２０３ フレーム
２０４ 加圧手段
２０６ 位置調整手段
２０７ 加圧ヘッド
２０９ 弾性材
２１０ 加熱手段
２１３ 巻取ローラ
２１４ 繰り出しローラ
３００ 実装装置
３０３ 可動テーブル
３０５ 加圧手段
３０６ 弾性材
３０８ 加熱手段
３１２ ヘッド
Ｈ チップ部品の高さ
Ｈ１〜Ｈ７ 高さデータ
ＰＤ 加圧数データ
Ｖ 許容値
ＴＩ 取り外し位置情報
ＥＸ 除外情報
Ｈｍａｘ 最大高さ
Ｈｍｉｎ 最小高さ
Ｈｄｉｆ 差 DESCRIPTION OF SYMBOLS 1 Mounting apparatus 2 Circuit board 3 Electrode 4 Chip component 5 Bump 6 Resin 7 Circuit pattern 100 Temporary pressure bonding part 101 Base 102 Substrate holding stage 102 Means 103 Support frame 104 Pressure means 105 Repair stage 106 Position adjustment means 107 Pressure head 108 Lifting means 109 Attachment 110 Torque detector 111 Distance sensor 150 Control part 151 Storage part 152 Calculation part 153 Display part 200 Crimping part 201 Base 202 Substrate holding stage 203 Frame 204 Pressure means 206 Position adjustment means 207 Pressure head 209 Elasticity Material 210 Heating means 213 Winding roller 214 Feeding roller 300 Mounting device 303 Movable table 305 Pressurizing means 306 Elastic material 308 Heating means 312 Head H Height of chip parts H1 to H7 Height Data PD Pressure data V Allowable value TI Removal position information EX Exclusion information Hmax Maximum height Hmin Minimum height Hdif Difference

Claims (5)

複数の回路パターンが形成された回路基板に、複数のチップ部品を樹脂を介して仮圧着する仮圧着部に、
回路パターンにチップ部品を一つずつ実装する加圧ヘッドと、回路基板に仮圧着されたチップ部品の高さを検出する高さ検出手段を備え、
仮圧着の次の工程でチップ部品を一括して本圧着を行う、複数のチップ部品の個数を単位として、前記高さ検出手段が検出した高さのバラツキを調べて、前記高さのバラツキに基づいてチップ部品の取り外しを判断するチップリペア判断手段を備えたことを特徴とする実装装置。 In a temporary press-bonding part that temporarily press-bonds a plurality of chip components to a circuit board on which a plurality of circuit patterns are formed via a resin,
A pressure head for mounting chip components one by one on the circuit pattern, and a height detection means for detecting the height of the chip components temporarily bonded to the circuit board,
In the next step of pre-bonding, the chip components are collectively bonded together. The variation in the height detected by the height detecting means is examined in units of the number of chip components, and the variation in the height is determined. A mounting apparatus comprising chip repair determination means for determining removal of a chip part based on the chip repair. 請求項１に記載の発明において、
チップ部品の高さを検出する前記高さ検出手段が、前記加圧ヘッドに備えられ、前記加圧ヘッドとともに移動する構成であり、
チップ部品の仮圧着の完了した状態で、前記加圧ヘッドと回路基板との距離を測定することにより、チップ部品の高さを検出する高さ検出手段からなる実装装置。 In the invention of claim 1,
The height detecting means for detecting the height of the chip component is provided in the pressure head, and moves with the pressure head,
A mounting apparatus comprising height detecting means for detecting the height of the chip component by measuring the distance between the pressure head and the circuit board in a state where the temporary bonding of the chip component is completed. 請求項１に記載の発明において、
チップ部品の高さを検出する前記高さ検出手段が、前記加圧ヘッドを駆動する昇降手段に備えられ、昇降手段の駆動部にマウントされた駆動部の位置検出器の位置検出信号を測定することにより、チップ部品の高さを検出する高さ検出手段からなる実装装置。 In the invention of claim 1,
The height detecting means for detecting the height of the chip component is provided in an elevating means for driving the pressure head, and measures a position detection signal of a position detector of a driving unit mounted on the driving unit of the elevating means. Thus, a mounting apparatus comprising a height detecting means for detecting the height of the chip component. 請求項１から３のいずれかに記載の発明において、
前記チップリペア判断手段の判断結果に基づいて、チップリペア箇所を指示する表示部を有した実装装置。 In the invention according to any one of claims 1 to 3,
A mounting apparatus having a display unit for instructing a chip repair location based on a determination result of the chip repair determination means. 複数の回路パターンが形成された回路基板に、樹脂を介して複数のチップ部品を仮圧着する実装方法であって、
加圧ヘッドに吸着保持されたチップ部品を、基板保持ステージに保持された回路基板に押圧し仮圧着するステップと、
前記回路基板に仮圧着されたチップ部品の高さを検出し記憶するステップと、
仮圧着の次の工程における、チップ部品を一括して本圧着する複数のチップ部品の個数を単位として、前記記憶されたチップ部品の高さの最大値と最小値との範囲が、予め設定されているチップ部品の高さの許容値の範囲内であるかを判断するステップと、
を有する実装方法。 A mounting method in which a plurality of chip components are temporarily crimped via a resin to a circuit board on which a plurality of circuit patterns are formed,
A step of pressing and temporarily pressing the chip component sucked and held by the pressure head against the circuit board held by the substrate holding stage;
Detecting and storing the height of the chip part temporarily bonded to the circuit board;
A range between the maximum value and the minimum value of the height of the stored chip parts is set in advance in units of the number of chip parts to which the chip parts are subjected to final pressure bonding in a batch in the next step of the temporary pressure bonding. Determining whether the height of the chip component is within a tolerance range;
Mounting method.
JP2009075325A 2009-03-26 2009-03-26 Mounting device and mounting method Pending JP2010232234A (en)

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Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103687328A (en) * 2012-09-26 2014-03-26 光宝电子(广州)有限公司 A soldering tin detecting and automatically-repairing system and a method thereof
WO2015199045A1 (en) * 2014-06-26 2015-12-30 東レエンジニアリング株式会社 Mounting device and mounting method
WO2016031806A1 (en) * 2014-08-25 2016-03-03 東レエンジニアリング株式会社 Mounting head and mounting device in which same is used
WO2017010413A1 (en) * 2015-07-14 2017-01-19 東レエンジニアリング株式会社 Semiconductor mounting device
JPWO2016189684A1 (en) * 2015-05-27 2018-03-15 富士機械製造株式会社 Mounting device
KR20180128411A (en) 2016-03-30 2018-12-03 토레이 엔지니어링 컴퍼니, 리미티드 Method and apparatus for manufacturing semiconductor device
US20220412733A1 (en) * 2020-07-30 2022-12-29 Shinkawa Ltd. Mounting apparatus and parallelism detection method in mounting apparatus
KR20230165143A (en) 2022-05-26 2023-12-05 티디케이가부시기가이샤 Substrate processing apparatus
KR20230165144A (en) 2022-05-26 2023-12-05 티디케이가부시기가이샤 Substrate processing apparatus
KR20230165140A (en) 2022-05-26 2023-12-05 티디케이가부시기가이샤 Substrate processing apparatus
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Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10256311A (en) * 1997-03-17 1998-09-25 Hitachi Chem Co Ltd Multi-chip mounting method

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10256311A (en) * 1997-03-17 1998-09-25 Hitachi Chem Co Ltd Multi-chip mounting method

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CN103687328A (en) * 2012-09-26 2014-03-26 光宝电子(广州)有限公司 A soldering tin detecting and automatically-repairing system and a method thereof
WO2015199045A1 (en) * 2014-06-26 2015-12-30 東レエンジニアリング株式会社 Mounting device and mounting method
JP2016009850A (en) * 2014-06-26 2016-01-18 東レエンジニアリング株式会社 Mounting device and mounting method
WO2016031806A1 (en) * 2014-08-25 2016-03-03 東レエンジニアリング株式会社 Mounting head and mounting device in which same is used
JPWO2016189684A1 (en) * 2015-05-27 2018-03-15 富士機械製造株式会社 Mounting device
CN107851587B (en) * 2015-07-14 2021-01-26 东丽工程株式会社 Semiconductor mounting device
WO2017010413A1 (en) * 2015-07-14 2017-01-19 東レエンジニアリング株式会社 Semiconductor mounting device
JP2017022326A (en) * 2015-07-14 2017-01-26 東レエンジニアリング株式会社 Semiconductor packaging device
CN107851587A (en) * 2015-07-14 2018-03-27 东丽工程株式会社 Conductor mounting apparatus
KR20180128411A (en) 2016-03-30 2018-12-03 토레이 엔지니어링 컴퍼니, 리미티드 Method and apparatus for manufacturing semiconductor device
US20220412733A1 (en) * 2020-07-30 2022-12-29 Shinkawa Ltd. Mounting apparatus and parallelism detection method in mounting apparatus
US12018936B2 (en) * 2020-07-30 2024-06-25 Shinkawa Ltd. Mounting apparatus and parallelism detection method in mounting apparatus
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