JP2010226348A - Symbol synchronizing apparatus and symbol synchronizing method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a symbol synchronizing apparatus and method performing accurate synchronization detection or synchronization maintenance in accordance with a fixed threshold easily configured or easily processed even when a reception demodulation level is varied by a change in communication path environment. <P>SOLUTION: In place of level value comparison, the number of times at which a correlation value of a sampling point becomes a peak value, is detected and a threshold for that determination is set to the preset threshold number of times. Thereby, synchronization detection and synchronization following processes are performed without being affected by variation in reception power value. <P>COPYRIGHT: (C)2011,JPO&INPIT

Description

  The present invention relates to a symbol synchronization apparatus and a symbol synchronization method, and more particularly, to an improvement in a symbol synchronization and tracking apparatus suitable for a digital wireless communication system in which communication path environment changes are remarkably improved.

In a digital wireless communication system, in order to demodulate data on the receiving side, it is necessary to first perform symbol synchronization, and after synchronization is established, it is necessary to follow and maintain synchronization. For symbol synchronization and tracking (synchronization maintenance), a known data pattern preset in both transmission and reception is usually used.
That is, on the transmission side, transmission is performed in units of frames in which a known data pattern is added to the data to be transmitted, and on the reception side, the synchronization of each frame is established by supplementing this known data pattern, and according to the synchronization timing, Is demodulated. In a digital wireless communication system, frame synchronization establishment and synchronization maintenance are extremely important, and these known data patterns are referred to as frame synchronization words (hereinafter referred to as “FSW”) and are arranged at the head of each frame. However, depending on the system, there is a system that is added as a relatively long-period synchronization preamble for initial synchronization.

Hereinafter, as an example of a communication format provided with a synchronization preamble, a format shown in MIL-STD-188-110 (A United States Defense Standard regarding telecommunications) will be described as an example.
FIG. 4 is a schematic diagram showing a communication format defined in MIL-STD-188-110. The standard further scrambles by superimposing a code of a predetermined pattern. Since it is unnecessary, it is omitted. In this example, the leading synchronization preamble 301 is a known data pattern (1440 symbols) provided for initial synchronization acquisition, and subsequently transmitted data 302 is a known data pattern for frame synchronization tracking described above. (FSW) 303 and information data (communication data) 304 that is an unknown data pattern are transmitted as a plurality of frames, and the data is composed of symbols to be described later.
In this example, the known data pattern (FSW) has 16 symbols, and axes (I axis, Q axis) which are the reference for synchronous detection when demodulating information data (32 symbols) subjected to PSK (Phase Shift Keying) modulation. Also used to determine.

In PSK modulation, a symbol represents information data to be transmitted by its phase position. For example, in the case of QPSK (Quadrature Phase Shift Keying), the phase position is set as shown in FIG. ing.
That is, in the example shown in FIG. 5, QPSK can represent data by four symbol positions (phase positions) and can represent data of 2 bits by one symbol. Specifically, four values represented by 2 bits by transmitting any of the waves of 45 °, 135 °, 225 °, and 315 ° with respect to the reference sine wave (I-axis in FIG. 5). , (00), (01), (10), (11) can be transmitted. Note that, according to the MIL-STD-188-110 standard, the symbol position is further encoded by the modified Gray code, but this is also not directly related to the present invention, so that the description thereof is omitted.
When receiving and demodulating a signal transmitted in this way, it indicates which value (position) the phase of the transmitted symbol corresponds to, that is, which of the four types of bit strings. This determination process is called demodulation.

In order to correctly perform demodulation, it is necessary to capture symbols at an optimal timing. This will be described with reference to FIG. FIG. 6 schematically shows an eye pattern of symbols on the I-axis (or Q-axis) of QPSK data, and is overwritten with one symbol period as a cycle. In this example, the data acquisition is oversampled at a frequency that is six times the symbol period (frequency), and the timing of this oversampling is indicated by T0 to T5. In addition, as for the oversampling multiple, any numerical value can be set as long as it exceeds two times, and usually about four to eight times.
In the example shown in FIG. 6, it is best to perform data demodulation at the timing of T3, and then the nearest timing is T2 or T4. The demodulation at T1 and T5 is not preferable, and at the timing of T0. It cannot be demodulated. That is, the further away from T3, the more inappropriate the demodulation timing becomes. As apparent from FIG. 6, the symbol values are concentrated in the minimum range at the timing T3, and the variation of the symbol values is small. On the other hand, the variation of the symbol values is large at T0 and T5. This means that when noise (noise) is mixed in the symbol data, the demodulation at the timing at T3 where the eye opening is the widest has the lowest probability of erroneous data due to the influence of the noise, and as it moves away from the timing of T3 The probability is high.
The example shown in FIG. 6 is a schematic diagram of an eye pattern when it is relatively close to an ideal state. In an actual system, the timing T3 at which the eye opening becomes maximum is before and after the timing shown in the figure. Since it fluctuates (left and right in the drawing), it is important to adjust the timing so as to come to the position of T3. That is, adjusting so as to perform data demodulation at the timing (T3) at which the eye opening becomes maximum is called “synchronization”, “synchronization acquisition”, or “synchronization acquisition”. In addition, even if synchronization is established once, it is possible to compensate for timing deviations caused by frequency deviation or Doppler shift of each reference oscillator on the transmission / reception side, and to maintain the synchronized state. This is called “maintenance” or “synchronous tracking”.

FIG. 7 is a block diagram showing an example of a conventional symbol synchronization apparatus. In the figure, reference numeral 601 denotes a multiplexer that distributes received data to the above-described timings T0 to T5 in FIG. 6 based on a predetermined timing signal, and reference numeral 602 denotes a matched filter (hereinafter referred to as “MF”) as a correlator using a synchronization preamble as a coefficient. 603 is an integrator that integrates the correlation value of the received signal that is the output of the MF 602 and the synchronization preamble, and the MF 602 and the integrator 603 are oversampling timings T0, T1,. -Provided corresponding to T5 respectively.
By comparing the outputs of the integrator 603, the maximum value becomes the optimum synchronization point, and the selector 604 outputs the timing of this synchronization point. Thereafter, the timing is adjusted by an adjusting means (not shown) so that the synchronization point is at the position T3, and the mode shifts to the synchronization follow-up mode.
The coefficient of MF 602 uses a synchronization preamble, but if the 1440 symbol is used as it is, it is too long, and is equivalent to taking a long-term correlation by integrating with integrator 603 while sliding the coefficient as variable. It can also be operated. In other words, the processing of MF 602 and the processing of integrator 603 are combined so as to be processing equivalent to MF having a coefficient length of 1440. Further, since the correlation can be detected sufficiently if it has a certain length, not all the coefficients for 1440 symbols are necessarily required, and a coefficient length shorter than this may be used as appropriate.

The operation will be described below. First, the received signal is oversampled at a multiple of the symbol rate, 6 times in this example, and distributed to the corresponding MF 602 (MF0 to MF5) by the multiplexer 601 at each timing. Each MF 602 calculates the correlation value between the received signal and the preamble coefficient, and outputs it to the integrator 603 (∫0 to ∫5). As described above, the MF 602 and the integrator 603 are configured to work together as an MF having a coefficient length of 1440. When the maximum output of the integrator 603 exceeds a preset threshold value, the timing is determined as a synchronization point.
FIG. 8 schematically shows the output of the integrator 603 when synchronization is not achieved in a low noise environment, and the correlation value is a value close to zero. FIG. 9 schematically shows the output of the integrator 603 when synchronization is achieved in a low noise environment, and the maximum correlation value exceeds the threshold value. In this example, the maximum level T5 is described as a synchronization point, but it will be described later that the correlation value that is not the maximum value also exceeds the threshold value.
If the maximum value sample point can be detected in this way, the sampling is performed so that the detected maximum value sampling timing (T5 in FIG. 9) becomes the center T3 timing by the adjusting mechanism (not shown) as described above. Slide the timing to adjust. That is, after adjusting so that the value of T5 which is the maximum value in FIG. 9 becomes the timing of T3, the mode shifts to the synchronous follow-up mode. Note that the synchronization tracking is generally controlled using known data added to each frame instead of the synchronization preamble so that the optimum synchronization point comes to T3 based on the same principle as described above.
Japanese Patent Application Laid-Open No. 2004-228688 discloses a code tracking method for receiving a signal of a code spread method, which determines whether or not to perform phase adjustment by looking at a power threshold at a synchronization point. Japanese Patent Application Laid-Open No. 2004-228561 proposes a method in which a communication environment is estimated by various means and a threshold value for synchronization determination is changed in response to a change in the communication environment.

JP 2006-60691 A Japanese Patent Laid-Open No. 2005-253055

However, the conventional symbol synchronization apparatus and synchronization detection method as described above may not be able to accurately detect synchronization or accurately perform synchronization tracking processing in response to changes in the communication environment.
That is, in a wireless communication environment that changes from moment to moment, the average power of the received signal varies greatly due to the effects of fading, noise, etc., and the correlation value between the received signal and the MF coefficient also varies accordingly. It is practically difficult to set a fixed threshold value in advance, and setting a fixed threshold value as in the prior art causes false synchronization. For example, since the received signal power constantly changes due to fading, as shown in FIG. 9, if the threshold value is too small, a plurality of timing points exceeding the threshold value are detected. Therefore, a timing that is not a synchronization point is determined as a synchronization point. There is a possibility that "false synchronization" may occur. Conversely, if the threshold value is too large, the correct synchronization point may not exceed the threshold value, so that a situation in which accurate synchronization detection cannot be performed occurs.
In order to deal with such a problem, as proposed in Patent Document 2, the threshold for synchronization determination is set as an environmental reflection parameter, for example, signal power as a threshold corresponding to a change in the moving speed of the mobile station. A device that changes the ratio of interference to interference power (SIR) has been proposed, but there is a possibility that a complicated process is required and a new problem of increasing the cost of the apparatus is caused.
The present invention has been made to solve such problems in the conventional symbol synchronization apparatus and symbol synchronization acquisition / follow-up means, and can accurately synchronize even when the received power fluctuates greatly. An object of the present invention is to provide a symbol synchronization apparatus and method capable of performing detection or tracking synchronization.

In order to solve such a problem, the present invention provides a symbol synchronization apparatus according to claim 1 of the present invention, in which the received symbol data is detected by the symbol synchronization apparatus that detects the synchronization timing of each symbol based on the received known data pattern. Means for oversampling the pattern n times, n correlators for oversampling and outputting sample values, and maximum level detecting means for selecting the maximum level from the output values of the n correlators; N counters for counting the number of times each correlator output reaches the maximum level in correspondence with the n correlators, and a threshold value in which count values of the n counters for a predetermined number of symbols are set in advance. The synchronization timing is determined based on the maximum level number comparison means for comparing with the number of times and the counter that has exceeded the threshold number as a result of this comparison A synchronization timing determination means, characterized by comprising a.
The invention according to claim 2 is the symbol synchronizer according to claim 1, wherein the known data pattern at the time of initial synchronization acquisition is a synchronization preamble or a part thereof, and the known data pattern at the time of synchronization tracking after synchronization is It is a known data pattern added to each frame.

The invention according to claim 3 relates to a symbol synchronization method, and in the symbol synchronization method for detecting the synchronization timing of each symbol based on the received known data pattern, the received known data pattern is oversampled by n times. A correlation process that outputs n correlation values for the oversampling value, a maximum level detection process that selects a maximum level from the output values obtained by the correlation process, and the correlation process output value is a maximum level. Counter processing that counts the number of times, the maximum level number comparison processing that compares the count value of the counter in a predetermined number of symbols with a preset threshold number of times, and the result of this comparison processing is a counter that exceeds the threshold number of times. Synchronization timing determination processing for determining synchronization timing based on That.
The invention according to claim 4 is the symbol synchronization method according to claim 3, wherein the known data pattern at the time of initial synchronization acquisition is a synchronization preamble or a part thereof, and the known data pattern at the time of synchronization tracking after synchronization is It is a known data pattern added to each frame.

The synchronization device and the symbol synchronization method of the present invention compare the number of times that the correlation value at each sampling point becomes the maximum value as a threshold value, instead of the conventional level value comparison, as a threshold value. Since the synchronization point is determined, accurate synchronization detection and tracking operation can always be performed even in an environment where the received power value fluctuates. Moreover, since simple processing is sufficient, the circuit scale can be made smaller than that of the conventional method, and the cost of the apparatus is not increased.
Furthermore, since the symbol synchronization point judgment threshold is the number of times, it can be fixed regardless of changes in the communication environment, eliminating the need for circuits and devices for environment estimation, and greatly simplifying the device configuration. it can. At the same time, more accurate synchronization detection, synchronization acquisition, and synchronization follow-up processing can be expected if a means for changing the threshold value according to environmental changes is used together as in the conventional example.

It is a block diagram which shows the principal part structural example of the symbol synchronizer which concerns on this invention. It is a timing diagram of sampling which shows the process example of the symbol synchronizer which concerns on this invention. It is a flowchart which shows the process example of the symbol synchronization method which concerns on this invention. It is a schematic diagram which shows the communication format prescribed | regulated to MIL-STD-188-110. It is a figure explaining 4 value PSK. It is the figure which represented typically the eye pattern of the symbol of the I axis (or Q axis) of QPSK data. It is a block diagram which shows the example of a principal part structure of the conventional symbol synchronizer. It is a timing chart of sampling explaining operation of the conventional symbol synchronizer, and it is a figure showing typically an integrator output when not synchronizing. It is the timing diagram of other sampling explaining operation | movement of the conventional symbol synchronizer, and is the figure which represented typically the integrator output when synchronizing.

Hereinafter, the present invention will be described in detail with reference to embodiments shown in the drawings. However, the components, types, combinations, shapes, relative arrangements, and the like described in this embodiment are merely illustrative examples and not intended to limit the scope of the present invention only unless otherwise specified. . In addition, the same parts and the same matters as those already described are denoted by the same reference numerals and numbers, and redundant description is omitted.
FIG. 1 is a block diagram showing an embodiment of a symbol synchronizer according to the present invention. In the figure, reference numeral 1 denotes a multiplexer, which distributes received signals to the timings T0 to T5 in FIG. 6 described above in the same manner as 601 shown in FIG. 2 is a matched filter (MF0 to MF5) as six correlators provided corresponding to the number of oversampling, and has the same function as the matched filter (MF602) of FIG. As described in detail, the purpose of use is different. Further, 3 is a first maximum value selector, 4 is a counter (Σ0 to Σ5) corresponding to each of the six matched filters (MF), and 5 is a second maximum value selector. In the following description of the embodiments, the term “matched filter 2” is used when referring to the whole of MF0 to MF5.
The feature of this apparatus is that it corresponds to the matched filter 2 (any one of MF0 to MF5) that selects the maximum value from the signals supplied from the matched filter 2 and outputs the maximum signal from the counter. The count-up signal is output only to the counter that does, and not to the other. That is, the counter 4 counts up only those to which the count-up signal is supplied from the maximum value selector 3, and does not count up the others. A second maximum value selector 5 outputs the maximum count value (number of times) from the counter 4 (Σ0 to Σ5). This maximum value is compared with a predetermined threshold number in a processing unit (not shown), and when the threshold value is exceeded, the timing at which the maximum number is reached is determined as a synchronization point. In the figure, MF0 to MF5 of the matched filter 2 and Σ0 to Σ5 of the counter 4 correspond to oversampling timings T0, T1,... T5 in order from the top.

Hereinafter, the operation will be described in detail. First, the received signal is oversampled at a multiple of the symbol rate (six times in this example) as in the conventional example, and is distributed to the corresponding matched filter 2 MF0 to MF5 by the multiplexer 1 at each timing. The matched filter 2 outputs the correlation value between the synchronization preamble and the received signal to the first maximum value selector 3.
The first maximum value selector 3 outputs a count-up signal to the counter 4 (any one of Σ0 to Σ5) corresponding to the timing of obtaining the maximum value among the outputs of the matched filter 2 corresponding to T0 to T5. .
When the counter 4 receives the count-up signal from the first maximum value selector 3, the counter 4 counts up (+1) the count value at that time. The count-up signal may be arbitrary. For example, the count-up signal is configured to count up when the signal is “1” and not count up when the signal is “0”. Each of Σ0 to Σ5 of the counter 4 stores the history of the count-up signal for a period corresponding to the synchronization preamble, and outputs the count value during that period to the second maximum value selector 5. As a result, the value of the counter 4 indicates the number of times that the correlation with the preamble during the sampling timing period is greater than the others.

The second maximum value selector 5 compares the output of the counter 4 (any one of Σ0 to Σ5) with the maximum count value during a predetermined period with a preset threshold count, and exceeds the threshold count. The sampling timing corresponding to the counter is determined as the synchronization point. It would be reasonable to set this threshold number of times to, for example, about 0.7 times the total number of counts.
Note that the coefficient length of the matched filter (MF) can be set to an optimum value as appropriate by the system. However, when all the synchronization preambles (1440 symbols) are used as in this example, for example, the coefficient length is set to 32 and count 45 times. At this time, if the threshold number is 45, the threshold number is set to 32 based on 31.5, which is 0.7 times the number. It is judged that.

FIG. 2 is a schematic diagram showing the output of the matched filter (MF) 2 and the counting up of the counters (Σ0 to Σ5) corresponding to the outputs. In the four examples shown in this figure, the maximum number of times at the timing of sampling T5 is the largest, so that timing is the synchronization point. That is, since the first matched filter output has the maximum T5, the counter Σ5 corresponding to the timing is counted up. The counter value is indicated by a numerical value in the bottom line of each schematic diagram in FIG.
Similarly, the timing of the maximum value for the second time, the third time,... Is counted, and finally the counter value is N0 to N5 at the Mth time (M = 45 in the above example) as shown in the figure. The case where it represents is illustrated. Here, if the number of times of the count value N5 at the timing T5 is the maximum and 0.7 × M (32 in the above example) or more, it is determined that the synchronization is achieved (the synchronization point). .

FIG. 3 is a flowchart showing a processing example of the symbol synchronization method according to the present invention.
In this example, when the processing starts, it is detected that the preamble is an initial synchronization preamble (S1), oversampling processing is performed so as to obtain 6 sample values per symbol (S2), and each obtained sampling is performed. A correlation value with a preamble coefficient is obtained for the value (S3). The correlation value is generally a matched filter shown as an example of a correlator, but may be another means or process such as a slide correlator.
When the correlation value is found for n sampling values in this way, the timing at which the maximum value is obtained is detected (S4). Since this detection is a relative comparison of correlation values in T0 to T5, it is not affected by the communication environment.

When the timing at which the correlation value becomes maximum is detected, the value of any one of Σ0 to Σ5 of the counter 4 corresponding to the timing is increased by +1 (increment) (S5). Such processing is continued until the processing is completed for all of the synchronization preambles or the preset number of symbols (predetermined number of symbols) (S2 to S6), and when completed (S6, Yes), the counter of the current time It is determined whether or not the maximum value exceeds a preset threshold number (S7). If the maximum value is exceeded (S8, Yes), it is determined that the timing is a synchronization point (S9). The sampling timing is adjusted (slid) so that the maximum timing is located at the center of the sampling period (S10), the synchronization processing is performed, and the processing at that time is ended. On the other hand, when the maximum number of times does not exceed the threshold value in the process S8 (S8, No), it is determined that synchronization is not established and the process ends (S11), or the process returns to the process S1 and the same process is performed. Repeat.
That is, according to the symbol synchronization method of the present invention, a process of oversampling a received synchronization preamble or a known synchronization data pattern attached to a frame by a factor of n and a correlation for outputting n correlation values for the oversampling value. Processing, a maximum level detection process for selecting the maximum output value from the correlation process, a counter process for counting the number of times the correlation process output value reaches the maximum level, and a predetermined number of symbols A maximum level number comparison process for comparing the count value of the counter with a preset threshold number, and a synchronization timing determination process for determining that the timing corresponding to the counter exceeding the threshold number is a synchronization timing as a result of the comparison process; It is characterized by including.
Thus, according to the present invention, in the process of performing the synchronization determination, the relative comparison of the correlation value and the number of times of the maximum value are compared with the threshold number of times. Not included. Therefore, accurate synchronization acquisition is possible without requiring complicated processing for changing the threshold value in accordance with communication environment fluctuations. Furthermore, the synchronization maintaining process can be performed while determining the synchronization point by comparing the maximum number of times in the subsequent synchronization maintenance without stopping at the initial synchronization acquisition. When synchronization maintaining processing includes fluctuations in the oscillator frequency on the transmission side or the reception side, or synchronization fluctuations due to fading, Doppler effect, or the like, it is also possible to correct the deviation. For example, as described with reference to FIG. 2, the sampling timing that is the maximum number of times may be adjusted to the center (T3) of the sampling period.

As described above, the initial synchronization processing has been described. For synchronization tracking after successful synchronization acquisition, a frame synchronization word (FSW) that is known data added to each frame is used instead of the synchronization preamble. As described above, the control can be performed based on the same principle as described above. In general, the synchronization preamble includes a large number of symbols to ensure synchronization from an asynchronous state, and the arranged periodic interval is long, so that a known data pattern attached to each frame or a short cycle is used. It would be reasonable to achieve synchronization tracking and synchronization using known data other than the transmitted synchronization preamble.
In the above-described example, the case where all the synchronization preamble 1440 symbols are used has been described. However, the present invention is not necessarily limited to this example. can do.
In addition, in the present invention, one feature is that accurate synchronization detection is possible even if the number of thresholds is fixed. However, as disclosed in Patent Document 2, it also follows environmental changes. Can be made variable. Even in this case, according to the apparatus and method of the present invention, an integrator is not required, and a counter that counts the number of times is sufficient. Therefore, the circuit scale can be reduced as compared with the prior art.

As mentioned above, although the Example was concretely described about this invention, in the implementation | achievement of this invention, a various deformation | transformation is possible, without being limited to this example. For example, the modulation scheme to which the present invention is applicable need not be limited to FSK, and it can be easily understood that the present invention can be applied to any modulation scheme.
In implementing the present invention, each process can be digitally processed by a CPU, a DSP, or a required memory device without being limited to the block diagram shown in the example. For example, a plurality of matched filters and counters are preferably processed by a DSP. Furthermore, if the symbol synchronization method and control method of the present invention are programmed according to an OS that can be controlled by a computer, the present invention can be implemented in a communication device equipped with a computer equipped with the OS. In particular, many recent communication devices are equipped with a CPU, DSP, or other digital processing device, so that the present invention is realized by installing a program for carrying out the present invention in such an existing communication device. It would also be possible.

1 multiplexer, 2 matched filter (correlator), 3 first maximum value selector, 4 counter, 5 second maximum value selector

Claims (4)

  In a symbol synchronizer that detects the synchronization timing of each symbol based on a received known data pattern, a means for oversampling the received known data pattern by n times and outputs a correlation value between the oversampled known data pattern N correlators, a maximum level detecting means for selecting a maximum level from the n correlator output values, and each correlator output corresponding to the n correlators has a maximum level. N counters for counting the number of times, and maximum level number comparison means for comparing the maximum value among the count values of the n counters in a predetermined number of symbols with a preset threshold number of times, and the result of this comparison And synchronization timing determination means for determining synchronization timing based on a counter exceeding the number of times of the threshold, That symbol synchronization device.   2. The symbol synchronization apparatus according to claim 1, wherein the known data pattern at the time of initial synchronization acquisition is a synchronization preamble or a part thereof, and the known data pattern at the time of synchronization tracking after synchronization is added to each frame. A symbol synchronizer characterized by being a pattern.   In a symbol synchronization method for detecting the synchronization timing of each symbol based on a received known data pattern, a process of oversampling the received known data pattern by n times and a correlation for outputting n correlation values for the oversampling value Processing, maximum level detection processing for selecting the maximum level from the output value by the correlation processing, counter processing for counting the number of times the correlation processing output value reaches the maximum level, and the counter of the counter for a predetermined number of symbols A maximum level number comparison process for comparing the maximum value among the count values with a preset threshold number, and a synchronization timing determination process for determining a synchronization timing based on a counter exceeding the threshold number as a result of the comparison process; The symbol synchronization method characterized by including.   4. The symbol synchronization method according to claim 3, wherein the known data pattern at the time of initial synchronization acquisition is a synchronization preamble or a part thereof, and the known data pattern at the time of tracking following synchronization is added to each frame. A symbol synchronization method characterized by:

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