JP2010181482A - Active matrix substrate and method of manufacturing the same, and display device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reliably correct a short-circuiting defect even when the defect is minute. <P>SOLUTION: An active matrix substrate 10 includes: a plurality of first lines 14; a plurality of second lines 15 intersecting the first lines 14 via an insulating film; and a second area 12 formed outside a first area 11 being the area where the first lines 14 and the second lines 15 intersect each other. A trunk line part 26 intersecting the first lines 14 via an insulating film is arranged on the second area 12 and the first lines 14 have double-line parts 50 arranged so as to intersect the trunk line part 26 and single-line parts 51 connected to both ends of the double-line parts. Moreover, conductive films 52 intersecting both end parts of the double-line parts 50 are disposed on the width direction-outside of the trunk line part 26 on the insulating film. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to an active matrix substrate, a method of manufacturing the same, and a display device, and particularly relates to defect correction of an active matrix substrate.

  In recent years, for example, thin display devices such as liquid crystal display devices have been increased in screen size and integration. For example, an active matrix liquid crystal display device is configured by bonding a TFT substrate on which a plurality of TFTs (thin film transistors) are formed and a counter substrate facing the TFT substrate via a liquid crystal layer.

  In addition, the display device is strongly demanded to improve display quality. However, since the pattern of the wiring on the substrate is also highly detailed as the display is highly detailed, the occurrence of display defects (including display defects) due to disconnection or short circuit of the wiring or the like is completely prevented. It ’s difficult.

  Thus, it is known to correct a defect (pixel defect) in each pixel in the display area and a defect in a wiring intersection in the non-display area by laser irradiation (see Patent Documents 1 and 2).

  In Patent Document 2, a plurality of slits are formed in the capacity trunk line in a region where the capacity trunk line (Cs bus line) and the gate wiring intersect, and the capacity trunk line and the gate wiring are short-circuited. Further, it is disclosed that laser light is irradiated so as to connect both ends of the slit so as to surround the short-circuit portion. As a result, the short-circuit portion of the capacity trunk line is separated from the other parts of the capacity trunk line, so that the defect due to the short circuit is corrected.

Special table 2008-500562 gazette JP 2003-114448 A

  However, in Patent Document 2, since the interval between the slits is relatively wide, it is difficult to correct a defect with high accuracy by irradiation with laser light, and there is a problem that the takt time for defect correction becomes long.

  Therefore, when the gate wiring is doubled at the part overlapping the capacity trunk line and a short-circuit defect occurs in one wiring part of the double line part of the gate wiring, laser light is emitted from the one wiring part outside the capacity trunk line. It is conceivable to correct the defect by irradiating and cutting.

  However, in recent years, the miniaturization of wiring has been promoted, and accordingly, the short-circuited portion tends to be minute. However, when the short-circuited portion becomes minute, there is a problem that it is not known which of the plurality of portions in the gate wiring should be cut. In this case, if the wiring part which is not short-circuited is cut by mistake, the entire active matrix substrate becomes a defective product, which is very wasteful.

  The present invention has been made in view of such various points, and an object thereof is to surely correct a defect even if the short-circuit defect is minute.

  In order to achieve the above object, in the present invention, a conductive film is provided that intersects both end portions of the double-line portion.

  Specifically, an active matrix substrate according to the present invention includes a plurality of first wirings extending in parallel with each other, and a plurality of second wirings extending in parallel with each other while intersecting the first wiring via an insulating film. An active matrix substrate comprising a first region that is a region where the first wiring and the second wiring intersect with each other, and a second region formed outside the first region, wherein the second matrix In the region, a trunk line portion that intersects the first wiring via the insulating film is disposed, and the first wiring is disposed at both ends of the double-wire portion and the double-wire portion disposed so as to intersect the trunk line portion. A conductive film is provided on the insulating film, arranged on the outer side in the width direction of the main line portion and intersecting both end portions of the double line portion.

  The first wiring may be a gate wiring, the second wiring may be a source wiring, and the main line portion may be a capacitive main line.

  The first area may be a display area, and the second area may be a non-display area.

  The display device according to the present invention includes an active matrix substrate, a counter substrate disposed opposite to the active matrix substrate, and a display medium layer provided between the active matrix substrate and the counter substrate. In the display device, the active matrix substrate includes a plurality of first wirings extending in parallel with each other, and a plurality of second wirings extending in parallel with each other while intersecting the first wiring through an insulating film. A first region which is a region where the first wiring and the second wiring intersect with each other, and a second region formed outside the first region, and the second region includes the first region A trunk line portion intersecting with one wiring through the insulating film is arranged, the first wiring is a double line portion arranged to intersect the trunk line portion, and a single wire portion connected to both ends of the double line portion, respectively. And have , On the insulating film, it is disposed outside in the width direction of the main line, a conductive film which crosses at both ends portion of the multi-line portion is provided.

  The first wiring may be a gate wiring, the second wiring may be a source wiring, and the main line portion may be a capacitive main line.

  The first area may be a display area, and the second area may be a non-display area.

  The method for manufacturing an active matrix substrate according to the present invention includes a plurality of first wirings extending in parallel to each other and a plurality of second wirings extending in parallel to each other while intersecting the first wiring via an insulating film. And a first region that is an area where the first wiring and the second wiring intersect each other, and a second region formed outside the first region, and the second region includes the first region A trunk line portion that intersects the first wiring via the insulating film is disposed, and the first wiring is a double-wire portion disposed so as to intersect the trunk line portion, and a single wire connected to both ends of the double-wire portion, respectively. And an active matrix substrate provided on the insulating film on the outer side in the width direction of the main line portion and provided with a conductive film that intersects both end portions of the double-line portion. The double line portion of the first wiring and the trunk line portion are short. An inspection step for detecting the presence or absence of a short-circuit defect, and when the short-circuit defect is detected in the inspection step, both end sides of any one of the plurality of wirings constituting the double-line portion of the first wiring are cut. It is confirmed that the wiring including the short-circuit defect is not cut in the first cutting process, the confirmation process for confirming whether or not the wiring including the short-circuit defect is cut in the first cutting process, and the confirmation process. A second cutting step for cutting both ends of the wiring other than the cut wiring among the plurality of wirings, and after the second cutting step, the wiring including the short-circuit defect is cut. In such a case, the conductive film and the cut wiring are electrically connected by laser light irradiation so that the single wire portions of the first wiring are electrically connected with the short-circuit defect separated. Process.

  In the first cutting step, it is preferable that the wiring is cut on the opposite side of the main line portion from the region facing the conductive film in the double-wire portion of the first wiring.

  Furthermore, in the second cutting step, it is preferable that the wiring is cut on the main line portion side with respect to a region facing the conductive film in the double-wire portion of the first wiring.

  The first wiring may be a gate wiring, the second wiring may be a source wiring, and the main line portion may be a capacitive main line.

  The first area may be a display area, and the second area may be a non-display area.

-Action-
Next, the operation of the present invention will be described.

  Since the active matrix substrate is provided with a conductive film that intersects both ends of the double-wire portion on the outer side in the width direction of the main wire portion, even if the main wire portion and the double-wire portion of the first wiring are short-circuited, The short-circuit defect can be surely corrected by appropriately cutting the wiring constituting the double-wire portion and electrically connecting the wiring and the conductive film.

  That is, when manufacturing the active matrix substrate, first, an inspection process is performed to detect the presence or absence of a short-circuit defect in which the double-wire portion and the main wire portion of the first wiring are short-circuited. When a short-circuit defect is detected in the inspection process, a first cutting process is performed to cut both end sides of any one of the plurality of wirings constituting the double-line portion of the first wiring.

  Then, a confirmation process is performed and it is confirmed whether the wiring containing a short circuit defect was cut | disconnected by the 1st cutting process. When it is confirmed that the wiring including the short-circuit defect is not cut in the checking process, the second cutting process is performed. In the second cutting step, both ends of the wires other than the cut wires are cut out of the plurality of wires.

  Thereafter, when a wiring including a short-circuit defect is cut, a connection process is performed. In this connection step, the conductive film and the cut wiring are electrically connected by laser light irradiation so that the single wire portions of the first wiring are conducted with the short-circuit defect separated. As a result, even when the short-circuit portion is very small and its position cannot be specified accurately, it is possible to reliably correct the defect due to the short-circuit.

  According to the present invention, since the conductive film intersecting the both end portions of the double line portion is provided outside the main line portion in the active matrix substrate in the width direction, there is a short circuit defect between the double line portion and the main line portion of the first wiring. Even when the position is minute and the position cannot be accurately specified, the defect due to the short circuit can be reliably corrected. As a result, the entire active matrix substrate can be prevented from becoming a defective product, and the yield of products can be dramatically improved.

FIG. 1 is a plan view showing a main part of the liquid crystal display device of the present embodiment. FIG. 2 is an enlarged plan view showing one pixel of the active matrix substrate constituting the liquid crystal display device. FIG. 3 is a cross-sectional view of the active matrix substrate and the liquid crystal display device including the active matrix substrate along the line III-III in FIG. FIG. 4 is an enlarged plan view showing the double line portion of the gate wiring and the capacity trunk line. FIG. 5 is an enlarged plan view showing a double-line portion in which one wiring is cut. FIG. 6 is an enlarged plan view showing a double-line portion in which both wirings are cut. FIG. 5 is an enlarged plan view showing a double-line portion connected to the conductive film. FIG. 8 is a flowchart for explaining a process of correcting a short-circuit defect.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. The present invention is not limited to the following embodiment.

<< Embodiment of the Invention >>
1 to 8 show an embodiment of the present invention.

  FIG. 1 is a plan view showing a main part of the liquid crystal display device 1 of the present embodiment, and FIG. 2 is a plan view showing an enlarged pixel of an active matrix substrate 10 constituting the liquid crystal display device 1. FIG. 3 is a cross-sectional view of the active matrix substrate 10 and the liquid crystal display device 1 including the active matrix substrate 10 taken along line III-III in FIG.

  FIG. 4 is an enlarged plan view showing the double-line portion 50 and the capacity trunk line 26 of the gate wiring 14. 5 to 7 are enlarged plan views for explaining the process of correcting the short-circuit defect. FIG. 8 is a flowchart for explaining a process of correcting a short-circuit defect.

<Configuration of liquid crystal display device 1>
As shown in FIGS. 1 and 3, the liquid crystal display device 1 includes an active matrix substrate 10, a counter substrate 30 disposed to face the active matrix substrate 10, and a space between the active matrix substrate 10 and the counter substrate 30. And a liquid crystal layer 40 as a display medium layer, and a sealing material (not shown) for adhering the active matrix substrate 10 and the counter substrate 30 to each other and enclosing the liquid crystal layer 40.

  In the liquid crystal display device 1, as shown in FIG. 1, a display area 11 as a first area for displaying an image is formed in an area where the active matrix substrate 10 and the counter substrate 30 overlap. A non-display region 12 as a second region is formed on the outside, that is, in the region of the active matrix substrate 10 exposed without overlapping the counter substrate 30.

  As shown in FIG. 1, the display area 11 is, for example, a rectangular area, and is formed by arranging a plurality of pixels 20 as a minimum unit of an image corresponding to each pixel electrode 13 described later in a matrix. . On the other hand, the non-display area 12 is formed along two adjacent sides of the display area 11 and is formed in an L shape as a whole. In the non-display area 12, a gate driver 21 extending along the short side of the display area 11 and a source driver 22 extending along the long side of the display area 11 are provided.

<Configuration of counter substrate 30>
As shown in FIG. 3, the counter substrate 30 is provided between the glass substrate 23 as an insulating substrate, the black matrix 16 provided in a lattice shape on the glass substrate 23, and each lattice of the black matrix 16. A color filter 17 including a red layer, a green layer, and a blue layer, a common electrode 18 provided so as to cover the black matrix 16 and the color filter 17, and a photo spacer (not shown) provided on the common electrode 18 in a column shape. And an alignment film (not shown) provided so as to cover the common electrode 18.

  The black matrix 16 is formed of, for example, a resin film in which carbon fine particles are dispersed, and the common electrode is made of, for example, ITO (Indium Tin Oxide). The liquid crystal layer 40 is made of, for example, a nematic liquid crystal material.

<Configuration of active matrix substrate 10>
As shown in FIGS. 2 and 3, the active matrix substrate 10 intersects the gate wiring 14 as a plurality of first wirings extending in parallel with each other via the gate insulating film 31 and in parallel with each other. And a plurality of source wirings 15 as second wirings.

  That is, the gate wiring 14 and the source wiring 15 are formed in a lattice shape as a whole, and the pixels 20 are respectively formed in rectangular regions surrounded by these wirings. A region where the gate line 14 and the source line 15 intersect with each other is a display region 11.

  As shown in FIG. 1, one end of the gate wiring 14 is drawn from the display area 11 to the non-display area 12 and connected to the gate driver 21. On the other hand, one end of the source line 15 is drawn from the display area 11 to the non-display area 12 and connected to the source driver 22.

  The source driver 22 is connected to one end of a capacity trunk line 26 as a trunk line portion. The capacitive trunk line 26 is disposed between the gate driver 21 and the display area 11 in the non-display area 12 and extends along the short side of the display area 11. The capacity trunk line 26 is constituted by a plurality of trunk line groups, for example, and intersects the gate wiring 14 via the gate insulating film 31.

  As shown in FIG. 2, a plurality of TFTs (Thin-Film Transistors) 25 as switching elements are arranged at the corners of each pixel 20. In each pixel 20, a pixel electrode 13 connected to the TFT 25 is formed over substantially the entire pixel 20. In addition, a capacitor wiring 27 extending in parallel with the gate wiring 14 is disposed in the center of the pixel 20. One end of the capacity wiring 27 is connected to the capacity trunk line 26.

  Further, as shown in FIG. 3, the active matrix substrate 10 has a glass substrate 24 as an insulating substrate. On the surface of the glass substrate 24, the plurality of capacitor wirings 27 and the gate wirings 14 are formed. Yes.

  Further, as shown in FIG. 2, a gate electrode 28 constituting the TFT 25 is formed on the surface of the glass substrate 24 so as to branch from the gate wiring 14. As shown in FIG. 3, the gate electrode 28, the gate wiring 14, and the capacitor wiring 27 are covered with a gate insulating film 31 as an insulating film. The gate insulating film 31 is formed over substantially the entire display area 11 and non-display area 12.

  On the surface of the gate insulating film 31, the semiconductor layer 32 constituting the TFT 25 is disposed so as to overlap a part of the gate electrode 28. A source electrode 33 branched from the source wiring 15 and a drain electrode 34 are formed on the gate insulating film 31 so as to cover a part of the semiconductor layer 32. As shown in FIG. 2, one end of the drain electrode 34 extends to the center of the pixel 20, and a capacitor electrode 35 is integrally formed at the end thereof. The capacitor electrode 35 is opposed to the capacitor wiring 27 with the gate insulating film 31 interposed therebetween, thereby constituting an auxiliary capacitor of the pixel 20.

  Further, an interlayer insulating film 36 is formed on the gate insulating film 31 so as to cover the TFT 25, the capacitor electrode 35, and the like. The pixel electrode 13 is formed on the surface of the interlayer insulating film 36. The pixel electrode 13 is connected to the capacitor electrode 35 through a contact hole 37 penetratingly formed in the interlayer insulating film 36. As a result, the pixel electrode 13 is connected to the TFT 25 via the capacitor electrode 35 and the drain electrode 34. An alignment film (not shown) is formed on the interlayer insulating film 36 so as to cover the pixel electrode 13.

<Configuration of intersection of gate wiring 14 and capacity trunk line 26>
As shown in FIGS. 1 and 4, the gate wiring 14 formed in the non-display region 12 is connected to the double-line portion 50 disposed so as to intersect the capacity trunk line 26 and to both ends of the double-line portion 50. The single wire portion 51 is provided.

  The double line part 50 is comprised by the two wiring 41 and 42, for example. Each wiring 41 and 42 extends in parallel with each other, and is connected to the single line portion 51 in a state where the ends thereof are coupled to each other. Both end portions of the double-line portion 50 are disposed outside the entire width of the capacity trunk line 26 and do not overlap the capacity trunk line 26.

  Here, the double line portion 50 has a line width of about 15 μm, for example, and the single line portion 51 has a line width of about 30 μm, for example. Further, the entire width of the capacity trunk line 26 is, for example, about 500 μm to 700 μm, and the line width of the capacity wiring 27 is, for example, about 20 μm.

  On the gate insulating film 31, a conductive film 52 is provided that is disposed on the outer side in the width direction of the capacitive trunk line 26 and intersects both end portions of the double-line portion 50. The conductive films 52 are respectively provided on both outer sides of the capacity trunk line 26, and the width of the double-line portion 50 in the length direction is formed to be about μm, for example. Further, the conductive film 52 is made of the same metal material as that of the source wiring 15. Therefore, it can be formed in the same process as the source wiring 15.

<Operation of the liquid crystal display device 1>
In the liquid crystal display device 1 configured as described above, in each pixel 20, when a gate signal is sent from the gate driver 21 to the gate electrode 28 via the gate wiring 14 and the TFT 25 is turned on, the source driver 22 supplies the source to the source. A signal is sent to the source electrode 33 through the source wiring 15, and a predetermined charge is written into the pixel electrode 13 through the semiconductor layer 32 and the drain electrode 34. At this time, a potential difference is generated between each pixel electrode 13 of the active matrix substrate 10 and the common electrode 18 of the counter substrate 30, and a predetermined voltage is applied to the liquid crystal layer 40. In addition, when the TFT 25 is in the off state, a decrease in the voltage written in the pixel electrode 13 is suppressed by the auxiliary capacitance formed between the capacitance electrode 35 and the capacitance wiring 27. In the liquid crystal display device 1, a desired image is displayed by adjusting the light transmittance of the liquid crystal layer 40 by changing the alignment state of the liquid crystal molecules according to the magnitude of the voltage applied to the liquid crystal layer 40.

-Manufacturing method-
Next, a manufacturing method and a correction method of the active matrix substrate 10 and the liquid crystal display device 1 according to the present embodiment will be described with an example.

<Active matrix substrate formation process>
First, a metal film such as a titanium film, an aluminum film, and a titanium film is sequentially formed on the entire substrate of the glass substrate 24 by sputtering, for example, and then patterned by photolithography to form the gate wiring 14, the gate electrode 28, and the like. The capacitor wiring 27 is formed to a thickness of about 4000 mm, for example.

  Subsequently, a silicon nitride film or the like is formed on the entire substrate on which the gate wiring 14, the gate electrode 28, and the capacitor wiring 27 are formed by, for example, a plasma CVD (Chemical Vapor Deposition) method, and the gate insulating film 31 has a thickness of 4000 mm. Form to the extent.

Further, an intrinsic amorphous silicon film and an n ⁺ amorphous silicon film doped with phosphorus are successively formed by plasma CVD on the entire substrate on which the gate insulating film 31 is formed. Thereafter, these silicon films are patterned into island shapes on the gate electrode 28 by photolithography, and a semiconductor forming layer in which an intrinsic amorphous silicon layer having a thickness of about 2000 mm and an n ⁺ amorphous silicon layer having a thickness of about 500 mm are stacked. Form.

  Then, an aluminum film, a titanium film, and the like are formed by sputtering on the entire substrate on which the semiconductor formation layer is formed, and then patterned by photolithography to form the source wiring 15, the source electrode 33, the conductive film 52, and the drain. The electrode 34 and the capacitive trunk line 26 are each formed to a thickness of about 2000 mm.

Subsequently, the n ⁺ amorphous silicon layer of the semiconductor formation layer is etched using the source electrode 33 and the drain electrode 34 as a mask, thereby patterning the channel portion, thereby forming the semiconductor layer 32 and the TFT 25 including the semiconductor layer 32.

  Further, for example, an acrylic photosensitive resin is applied to the entire substrate on which the TFT 25 is formed by spin coating, and the applied photosensitive resin is exposed through a photomask. Thereafter, the exposed photosensitive resin is developed to form an interlayer insulating film 36 on the drain electrode 34 to a thickness of about 2 μm to 3 μm. Subsequently, a contact hole 37 is formed in the interlayer insulating film 36 for each pixel 20.

  Next, an ITO film is formed on the entire substrate on the interlayer insulating film 36 by a sputtering method, and then patterned by photolithography to form the pixel electrode 13 with a thickness of about 1000 mm.

  Thereafter, a polyimide resin is applied to the entire substrate on which the pixel electrodes 13 are formed by, for example, a printing method, and then a rubbing process is performed to form an alignment film with a thickness of about 1000 mm.

  As described above, the active matrix substrate 10 can be formed.

<Opposite substrate manufacturing process>
First, a negative acrylic photosensitive resin in which fine particles such as carbon are dispersed is applied to the entire glass substrate 23 by spin coating, for example, and the applied photosensitive resin is passed through a photomask. Exposure. Thereafter, the exposed photosensitive resin is developed to form a black matrix 16 having a thickness of about 1.5 μm.

  Subsequently, for example, a negative acrylic photosensitive resin colored in red, green or blue is applied onto the substrate on which the black matrix 16 is formed, and the applied photosensitive resin is passed through a photomask. To expose. Thereafter, by developing the photosensitive resin, a colored layer (for example, a red layer) of a selected color is formed to a thickness of about 2.0 μm. Further, the same process is repeated for the other two colors to form other two colored layers (for example, a green layer and a blue layer) with a thickness of about 2.0 μm, thereby forming the color filter 17.

  Further, for example, an ITO film is formed on the substrate on which the color filter 17 is formed by sputtering, and the common electrode 18 is formed to a thickness of about 1500 mm.

  Thereafter, a positive phenol novolac photosensitive resin is applied to the entire substrate on which the common electrode 18 is formed by spin coating, and the applied photosensitive resin is exposed through a photomask and then developed. As a result, a photo spacer is formed to a thickness of about 4 μm.

  Thereafter, a polyimide resin is applied to the entire substrate on which the photo spacer is formed by a printing method, and then a rubbing process is performed to form an alignment film with a thickness of about 1000 mm.

  The counter substrate 30 can be formed as described above.

<Seal material drawing process>
Next, for example, using a dispenser or the like, a sealing material (not shown) made of ultraviolet curing and thermosetting resin or the like is drawn in a rectangular frame shape on the counter substrate 30 formed in the counter substrate forming step. .

<Liquid crystal dropping process>
Next, a liquid crystal material is dropped on a region on the inner side of the sealing material on the counter substrate 30 on which the sealing material is drawn in the seal drawing process.

<Lamination process>
Next, the counter substrate 30 onto which the liquid crystal material has been dropped in the liquid crystal dropping step and the active matrix substrate 10 formed in the active matrix substrate forming step are bonded together under reduced pressure, and then the bonded substrate is bonded. The substrate surface is pressurized by releasing to atmospheric pressure.

  Subsequently, after irradiating the sealing material sandwiched between the substrates with UV light, the sealing material is heated and cured.

  As described above, the liquid crystal display device 1 before inspection can be manufactured. Thereafter, the liquid crystal display device 1 is inspected and corrected as necessary.

<Inspection process>
First, in the inspection process, as shown in FIG. 8, in step S <b> 1, the liquid crystal display device 1 is inspected for lighting to detect the presence or absence of a short-circuit defect 60 in which the double-line portion 50 of the gate wiring 14 and the capacity trunk line 26 are short-circuited. To do.

  That is, for example, a pulse voltage of +15 V having a bias voltage of −10 V, a period of 16.7 msec, and a pulse width of 50 μsec is input to each gate wiring 14 as a gate inspection signal. Then, all the TFTs 25 are turned on, and a source inspection signal having a potential of ± 2 V whose polarity is inverted every 16.7 msec is input to each source wiring 15. As a result, a source inspection signal is input to the pixel electrode 13 via each TFT 25. At the same time, a common electrode inspection signal having a direct current potential of −1 V is input to the common electrode 18. As a result, a voltage is applied to the liquid crystal layer 40 between each pixel electrode 13 and the common electrode 18, and the pixel 20 constituted by each pixel electrode 13 is turned on.

  At this time, for example, in the normally black mode (black display when no voltage is applied) liquid crystal display device 1, the display screen changes from black display to white display. Here, when the capacitor main line 26 and the double-line portion 50 of the gate wiring 14 are short-circuited due to the presence of particles or the like, the on / off control of the TFT 25 stops functioning. Display unevenness occurs. The gate wiring 14 causing the unevenness of the surface is identified by visual observation with a microscope or the like. Note that at this stage, it is minute and cannot be determined which of the wirings 41 and 42 of the double-line portion 50 has the short-circuit defect 60.

  In step S2 of FIG. 8, the presence of the short-circuit defect 60 is detected by the display unevenness. If there is no short-circuit defect 60, the inspection is terminated as normal. On the other hand, when the short circuit defect 60 is detected, the process proceeds to step S3.

<First cutting step>
In step S3, a first cutting step is performed, and as shown in FIG. 5, both end sides of any one of the plurality of wirings 41 and 42 constituting the double line portion 50 of the gate wiring 14 are cut. First, the both ends of one wiring 41 of the plurality of wirings 41 and 42 are cut by cutting the opposite side (that is, outside) of the capacity trunk line 26 from the region facing the conductive film 52 in the multi-line portion 50. A portion 53 is formed. The wiring 41 is cut by, for example, irradiating a laser beam oscillated from a YAG laser.

<Confirmation process>
Next, it progresses to step S4 and the liquid crystal display device 1 is light-inspected again, and it is confirmed whether or not the wiring 42 including the short-circuit defect 60 is cut in the first cutting step. As a result, it is determined in step S5, and when there is no display unevenness and the short-circuit defect 60 does not remain (that is, when the short-circuit defect 60 is formed on one wiring 41), subsequent inspection and correction are not performed. End with. On the other hand, when the display unevenness remains (that is, when the wiring including the short-circuit defect 60 is not cut), the process proceeds to step S6.

<Second cutting step>
In step S6, a second cutting step is performed, and as shown in FIG. 6, both ends of the wires 41, 42 other than the cut wires 41 (that is, the wires 42) are cut by laser light. To do. At this time, the wiring 42 is cut away from the region facing the conductive film 52 in the double-line portion 50 (ie, inside) to form the cut portion 54.

  In the present embodiment, since there are two of the plurality of wirings 41 and 42 constituting the double-line portion 50, the wiring 42 including the short-circuit defect 60 is cut in this second cutting step. Then, it progresses to step S7.

<Connection process>
In step S7, a connection process is performed. As shown in FIG. 7, the conductive film 52 is disconnected from the conductive film 52 so that the single-line portions 51 of the gate wiring 14 are electrically connected to each other with the short-circuit defect 60 separated from the gate wiring 14. The wirings 41 and 42 are electrically connected to each other at a connection portion 55 formed by melting by irradiation with laser light. As a result, even if both of the two wirings 41 and 42 are cut, the conductive state of the gate wiring 14 can be recovered with the short-circuit defect 60 separated. As described above, the short circuit between the capacity trunk line 26 and the gate line 14 can be eliminated.

-Effect of the embodiment-
Therefore, according to this embodiment, the conductive film 52 is provided on the outer side in the width direction of the capacity trunk line 26 in the active matrix substrate 10 so as to intersect the both end portions of the double-line portion 50 of the gate wiring 14. Even when the short-circuit defect 60 between the double-line portion 50 and the capacity trunk line 26 is very small and the position thereof cannot be specified accurately, the defect due to the short-circuit can be reliably corrected.

  In other words, the short-circuit defect 60 between the gate wiring 14 and the capacitor trunk line 26 can be reliably corrected while miniaturizing the wiring of the active matrix substrate 10 to increase the display detail of the liquid crystal display device 1. . As a result, the entire active matrix substrate 10 and the liquid crystal display device 1 can be prevented from becoming defective products, and the yield of products can be dramatically improved.

<< Other Embodiments >>
In the above-described embodiment, the case where the double-line portion 50 of the gate wiring 14 includes the two wirings 41 and 42 has been described. However, the present invention is not limited to this. You may make it comprise. For example, when the double-line part 50 is composed of three wirings, after the second cutting process, a confirmation process is performed to perform lighting inspection, and if display unevenness remains, the third cutting process is performed. You can do it. In the third cutting step, both end sides of the remaining third wiring are cut, and in the subsequent connecting step, the single wire portions 51 of the gate wiring 14 are electrically connected to each other in a state where the short-circuit defect 60 is separated by laser light irradiation. Each wiring and the conductive film 52 can be connected.

  In the above embodiment, the liquid crystal display device has been described as an embodiment of the display device according to the present invention. However, the present invention is not limited to this, and the display medium layer other than the liquid crystal layer (for example, an organic EL layer) is provided. The same applies to other active matrix display devices.

  As described above, the present invention relates to an active matrix substrate, a method for manufacturing the same, and a display device, and is particularly useful for correcting defects in the active matrix substrate.

1 Liquid crystal display device
10 Active matrix substrate
11 Display area (first area)
12 Non-display area (second area)
14 Gate wiring (first wiring)
15 Source wiring (second wiring)
26 Capacity main line (main line part)
27 Capacity wiring
30 Counter substrate
31 Gate insulating film (insulating film)
40 Liquid crystal layer (display medium layer)
41, 42 wiring
50 Double track
51 Single wire part
52 conductive film
60 Short circuit defect

Claims (11)

A plurality of first wires extending in parallel with each other;
A plurality of second wirings intersecting the first wiring via an insulating film and extending in parallel with each other;
A first region that is a region where the first wiring and the second wiring intersect each other;
An active matrix substrate comprising a second region formed outside the first region,
In the second region, a trunk portion that intersects the first wiring via the insulating film is disposed,
The first wiring has a double-wire portion disposed so as to intersect the main line portion, and a single-wire portion connected to both ends of the double-wire portion,
An active matrix substrate, characterized in that a conductive film is provided on the insulating film so as to be disposed on the outer side in the width direction of the main line portion and intersect with both end portions of the double-line portion. The active matrix substrate according to claim 1,
The first wiring is a gate wiring,
The second wiring is a source wiring,
The active matrix substrate, wherein the main line portion is a capacity main line. The active matrix substrate according to claim 1 or 2,
The first area is a display area,
The active matrix substrate, wherein the second region is a non-display region. An active matrix substrate;
A counter substrate disposed opposite to the active matrix substrate;
A display device comprising a display medium layer provided between the active matrix substrate and the counter substrate,
The active matrix substrate includes a plurality of first wirings extending in parallel to each other, a plurality of second wirings extending in parallel to each other, intersecting the first wiring via an insulating film, and the first wiring and the first wiring. A first region which is a region where two wirings intersect each other, and a second region formed outside the first region,
In the second region, a trunk portion that intersects the first wiring via the insulating film is disposed,
The first wiring has a double-wire portion disposed so as to intersect the main line portion, and a single-wire portion connected to both ends of the double-wire portion,
A display device, characterized in that a conductive film is provided on the insulating film so as to be disposed on the outer side in the width direction of the main line portion and intersect with both end portions of the double-line portion. The display device according to claim 4,
The first wiring is a gate wiring,
The second wiring is a source wiring,
The main line unit is a capacity main line. The display device according to claim 4 or 5,
The first area is a display area,
The display device, wherein the second area is a non-display area. A plurality of first wirings extending in parallel with each other and the first wiring crossing each other via an insulating film, and a plurality of second wirings extending in parallel with each other and the first wiring and the second wiring cross each other. A first region that is a region and a second region formed outside the first region,
In the second region, a trunk portion that intersects the first wiring via the insulating film is disposed,
The first wiring has a double-wire portion disposed so as to intersect the main line portion, and a single-wire portion connected to both ends of the double-wire portion,
On the insulating film, a method of manufacturing an active matrix substrate provided with a conductive film disposed on the outer side in the width direction of the main line portion and intersecting both end portions of the double-line portion,
An inspection step for detecting the presence or absence of a short-circuit defect in which the double-wire portion of the first wiring and the trunk portion are short-circuited;
When the short-circuit defect is detected in the inspection step, a first cutting step of cutting both end sides of any one of the plurality of wirings constituting the double-wire portion of the first wiring;
A confirmation step for confirming whether or not the wiring including the short-circuit defect is cut in the first cutting step;
A second cutting step that is performed when it is confirmed in the checking step that the wiring including the short-circuit defect is not cut, and cuts both ends of the wiring other than the cut wiring among the plurality of wirings; ,
When the wiring including the short-circuit defect is cut after the second cutting step, the conductive film and the conductive film are electrically connected to each other so that the single-wire portions of the first wiring are electrically connected to each other with the short-circuit defect separated. A method of manufacturing an active matrix substrate, comprising: a connection step of electrically connecting the cut wiring to a laser beam. In the manufacturing method of the active-matrix board | substrate described in Claim 7,
In the first cutting step, the wiring is cut on the opposite side of the main line portion from the region facing the conductive film in the double-wire portion of the first wiring. In the manufacturing method of the active-matrix substrate described in Claim 8,
In the second cutting step, the wiring is cut on the main line portion side of the double-wire portion of the first wiring in a region facing the conductive film. In the manufacturing method of the active-matrix substrate as described in any one of Claims 7 thru | or 9,
The first wiring is a gate wiring,
The second wiring is a source wiring,
The method of manufacturing an active matrix substrate, wherein the main line portion is a capacity main line. In the manufacturing method of the active-matrix substrate as described in any one of Claims 7 thru | or 10,
The first area is a display area,
The method of manufacturing an active matrix substrate, wherein the second region is a non-display region.

Images