JP2010139495A - Semiconductor device and method for producing the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device capable of suppressing reduction of accuracy of characteristics of the semiconductor device caused by a stress applied to a joining surface between a semiconductor substrate and a cap member, and a method for producing the same. <P>SOLUTION: The semiconductor device is constituted so as to include at least one of the recesses 17, 46-48 among a recess 17 formed in a region joined with a cap member 40 in the semiconductor substrate 10, recesses 46, 47 formed in a region joined to the semiconductor substrate 10 in the cap member 40 or a recess 48 formed in a region on the opposite side to the region joined to the semiconductor substrate 10 in the cap member 40. In the semiconductor device, the recesses 17, 46-48 can expand and contract and reduce stress. Thus, the semiconductor device can suppress reduction of accuracy of characteristics. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a semiconductor device configured by bonding a cap member to a semiconductor substrate on which a sensor portion is formed, and a method for manufacturing the same.

  Conventionally, a wafer level package structure is formed by joining a semiconductor wafer having a plurality of sensor portions and a package member having electrodes electrically connected to the sensor portions and the outside. It is known to divide the level package structure into chips and configure a semiconductor device.

  Specifically, such a semiconductor device has a semiconductor substrate cut out from a semiconductor wafer and a cap member cut out from a package member. The semiconductor substrate includes, for example, a sensor unit having a fixed part having a comb-like fixed electrode and a movable part having a comb-like movable electrode. In addition, a recess portion is formed in a portion of the cap member corresponding to the fixed electrode and the movable electrode in the sensor portion provided in the semiconductor substrate, and a plurality of through holes are formed outside the recess portion. Each through hole is embedded with a through electrode that is electrically connected to the sensor unit or the semiconductor substrate.

  Then, a region outside the recessed portion of the cap member is joined to the semiconductor substrate, so that a cavity is formed between the semiconductor substrate and the cap member in the semiconductor device. A fixed electrode is arranged. In such a semiconductor device, when acceleration is applied, the distance between the movable electrode and the fixed electrode changes to change the capacitance, and acceleration is detected based on the change in capacitance.

  Further, as a method for forming a wafer level package structure by bonding a semiconductor wafer and a package member, for example, Patent Document 1 discloses the following bonding method. Specifically, a silicon wafer that constitutes a semiconductor wafer and a silicon wafer that constitutes a package member are placed in a vacuum chamber, and an inert gas ion beam is irradiated onto the bonding surface of each silicon wafer to thereby form a silicon wafer. A silicon wafer bonding method is disclosed in which a bonding force for bonding to a bonding surface is applied and the silicon wafers are bonded together by overlapping the silicon wafers.

JP-A-10-92702

  However, when the bonding method disclosed in Patent Document 1 is applied and, for example, a semiconductor device including the sensor unit capable of detecting acceleration is configured, the following problem occurs. That is, in such a semiconductor device, an oxide film is disposed on the front and back surfaces of the silicon substrate that constitutes the cap member, and the silicon substrate that constitutes the semiconductor substrate and the oxide film that is disposed on the silicon substrate that constitutes the cap member, respectively. The joint surface is completely joined and an intrinsic stress is generated on the joint surface. At this time, in such a semiconductor device, since the stress cannot be relieved at the bonding surface of the silicon substrate constituting the semiconductor substrate, this stress is transmitted to the inside of the silicon substrate. When this stress is transmitted to the movable electrode and the fixed electrode in the sensor unit, the distance between the movable electrode and the fixed electrode changes, and there is a problem that the detection accuracy of acceleration is lowered.

  Further, in such a semiconductor device, each silicon substrate constituting the semiconductor device does not have the same heat capacity due to the outer shape, etc., and further comprises a silicon substrate, an oxide film, and a cap member constituting the semiconductor substrate. The linear expansion coefficients of the silicon substrate and the penetrating electrode are different. Therefore, for example, when the semiconductor device is used in a high temperature environment, the degree of expansion differs between each silicon substrate, oxide film, and through electrode constituting the semiconductor device. Thermal stress will be generated. However, in such a semiconductor device, since the thermal stress cannot be relieved, there is a problem that the thermal stress is transmitted to the movable electrode and the fixed electrode in the sensor unit, and the detection accuracy of the acceleration is lowered.

  Further, such a problem does not occur only when a semiconductor device is formed by bonding semiconductor wafers and silicon wafers constituting a package member, but the semiconductor device is bonded by bonding materials having different linear expansion coefficients. The same problem occurs when configuring. Furthermore, such a problem is not a problem that occurs only when a sensor unit capable of detecting acceleration is formed on a semiconductor wafer. For example, when a sensor unit capable of detecting angular velocity is formed on a semiconductor wafer. The same problem occurs.

  In view of the above points, the present invention provides a semiconductor device and a method for manufacturing the same that can suppress degradation in accuracy of characteristics of the semiconductor device due to intrinsic stress generated when the semiconductor wafer and the package member are bonded. It is a second object to provide a semiconductor device and a method for manufacturing the same that can suppress the deterioration of the accuracy of the characteristics of the semiconductor device due to thermal stress.

  In order to solve the above object, the present inventors have studied a semiconductor device configured by joining a cap member to a semiconductor substrate on which a sensor portion is formed.

  As described above, for example, in a semiconductor device including a sensor unit that can detect acceleration, a groove for forming the shape of the sensor unit is formed in the semiconductor substrate. And the area | region in which this groove | channel is formed among the joining surfaces in a semiconductor substrate, and the area | region corresponding to this groove | channel among the joining surfaces in a cap member reduce the joining area of a semiconductor substrate and a cap member, and a semiconductor substrate The stress applied to the joint surface between the cap member and the cap member is reduced, and the stress applied to the joint surface between the semiconductor substrate and the cap member can be expanded and contracted. be able to. However, the groove for forming the shape of the sensor portion is originally for forming the structure of the sensor portion, and is not for relieving the stress generated at the joining surface of the semiconductor substrate and the cap member. The stress cannot be sufficiently relaxed, and the stress is transmitted to the inside of the semiconductor substrate.

  In addition, among the grooves for forming the shape of the sensor portion in the semiconductor substrate, the width of the groove formed in the region bonded to the cap member is enlarged, and the stress applied between the semiconductor substrate and the cap member It is also conceivable to reduce the accuracy of the characteristics of the semiconductor device by increasing the region where expansion and contraction with respect to this stress can be achieved. However, in such a semiconductor device, the groove for forming the shape of the sensor portion is formed by trench etching. For this reason, when an attempt is made to configure a semiconductor device by enlarging only the width of the groove formed in the region joined to the cap member among the grooves for forming the shape of the sensor portion, the cap member of the semiconductor substrate The etching rate is greatly different between the groove formed in the region to be bonded and the groove formed in the region not bonded to the cap member, and there is a problem that the manufacturing process becomes complicated.

  Therefore, in order to achieve the above object, according to the first aspect of the present invention, the semiconductor substrate (10), the movable part (20) having the movable electrode (24), and the fixed part (30) having the fixed electrode (32). ), And a recess portion (14) formed in a portion corresponding to the movable electrode (24) and the fixed electrode (32) formed by a groove (15) formed in the semiconductor substrate (10). 41), and a cap member (40) joined to the semiconductor substrate (10) in a region outside the recess (41), the cap member (40) of the semiconductor substrate (10) 40), a recess (17) formed in a region different from the groove (15) formed in the semiconductor substrate (10), or the semiconductor substrate (10) of the cap member (40). In the area to be joined And a recess (46, 47) formed including a region different from the region corresponding to the groove (15) formed in the semiconductor substrate (10), or the semiconductor substrate (10) of the cap member (40). And at least any one of the recesses (48) formed in a region opposite to the region to be joined to the region (17, 46 to 48).

  In the second aspect of the present invention, the semiconductor substrate (10) includes a diaphragm that can be deformed by the pressure of the measurement medium and a sensor portion (14) having a gauge resistance formed on the diaphragm, and the semiconductor substrate (10) Of these, the concave portion (17) formed in the region bonded to the cap member (40), the concave portion (46, 47) formed in the region bonded to the semiconductor substrate (10) of the cap member (40), or The cap member (40) includes at least one recess (17, 46 to 48) of the recess (48) formed in a region opposite to the region bonded to the semiconductor substrate (10). It is characterized by.

  According to the semiconductor device of Claim 1 and 2, the part which opposes a recessed part (17) among the recessed part (17) and cap member (40) formed in the semiconductor substrate (10), or a cap member (40) Among the recesses (46, 47) formed in the region bonded to the semiconductor substrate (10) and the portion of the semiconductor substrate (10) facing the recesses (46, 47), or the semiconductor of the cap member (40). Since the recess (48) formed in the region opposite to the region bonded to the substrate (10) can be expanded and contracted, it is applied to the bonding surface between the semiconductor substrate (10) and the cap member (40). Stress can be relieved. Therefore, it is possible to suppress the stress applied to the joint surface between the semiconductor substrate (10a) and the package member (40a) from being transmitted to the movable electrode (24) and the fixed electrode (32) or the gauge resistance. Therefore, it is possible to suppress a decrease in accuracy of characteristics of the semiconductor device. The stress applied to the joint surface between the semiconductor substrate (10) and the cap member (40) is, for example, intrinsic stress or thermal stress.

  Further, in a semiconductor device including such a cap member, the stress applied to the bonding surface between the semiconductor substrate and the cap member increases as the bonding area between the semiconductor substrate and the cap member increases. That is, the larger the bonding area between the semiconductor substrate and the cap member, the more easily stress is transmitted to the inside of the semiconductor substrate, and the accuracy of the characteristics of the semiconductor device is likely to deteriorate. For this reason, in such a semiconductor device, if the bonding area between the semiconductor substrate and the cap member is reduced, the stress applied to the bonding surface between the semiconductor substrate and the cap member can be reduced.

  Accordingly, the recess (17) formed in the semiconductor substrate (10) or the recess (46, 47) formed in a region of the cap member (40) joined to the semiconductor substrate (10) is provided. In the semiconductor device described in 1 and 2, the recess (17, 46, 47) is formed in the semiconductor substrate (10) or the cap member (40), and the recess (17) and the cap formed in the semiconductor substrate (10). Of the member (40), the portion facing the recess (17), or the recess (46, 47) formed in the cap member (40) and the semiconductor substrate (10), facing the recess (46, 47). It can be set as the state which is not joined to the part.

  Therefore, in such a semiconductor device, when the region where the semiconductor substrate (10) and the cap member (40) are bonded is the same as that of the conventional semiconductor device, the semiconductor substrate (10) or the cap is used. Since the recess (17, 46, 47) is formed in the member (40), the bonding area where the semiconductor substrate (10) and the cap member (40) are bonded can be reduced. Thereby, since the stress applied to the bonding surface between the semiconductor substrate (10) and the silicon substrate (40) can be reduced, the stress is transmitted to the movable electrode (24) and the fixed electrode (32) or the gauge resistance. It can be prevented that the accuracy of the characteristics of the semiconductor device is lowered.

  For example, as in the invention described in claim 3, the recess (17) formed in the semiconductor substrate (10) goes around the outside of the movable electrode (24) and the fixed electrode (32) in the semiconductor substrate (10). Can be formed. And like invention of Claim 4, the recessed part (17) formed in the semiconductor substrate (10) can be formed so that the outer side of a gauge resistance may be made a round in the semiconductor substrate (10). Further, as in the invention described in claim 5, the recesses (46, 47) formed in the region of the cap member (40) joined to the semiconductor substrate (10) are recessed in the cap member (40). It can form so that the outer side of a part (41) may wrap around.

  Further, as in the invention described in claim 6, a plurality of through holes (43) penetrating the front and back surfaces of the cap member (40) are formed in the cap member (40), and a sensor is provided in each of the through holes (43). A through electrode (45) electrically connected to the part (14) or the semiconductor substrate (10) is arranged, and the recesses (46 to 48) formed in the cap member (40) are formed into the through hole (43). It can be formed so as to surround each.

  In such a semiconductor device, the through electrode (45) is disposed in the cap member (40), and the linear expansion coefficient of the cap member (40) is different from the linear expansion coefficient of the through electrode (45), so that the high temperature environment is increased. When used in the process, thermal stress due to the through electrode (45) is generated. However, in such a semiconductor device, the recesses (46 to 48) are formed so as to surround each of the through holes (43), and the recesses (46 to 48) can expand and contract, so that the through electrode (45). It is possible to relieve the stress caused by. In addition, when the recessed part (46, 47) is formed in the area | region joined with a semiconductor substrate (10) among cap members (40), the said recessed part (46, 47) and the said recessed part (46) between a semiconductor substrate (10). 46 and 47) can be expanded and contracted at the portion facing each other, and the stress caused by the through electrode (45) can be further reduced.

  In this case, as in the invention described in claim 7, the recesses (46 to 48) are concentric with the respective through holes (43) so that the distance from the wall surface to the wall surface of the through hole (43) is uniform. It can be formed to form a figure.

  In such a semiconductor device, stress due to each through electrode (45) is uniformly applied to the wall surface of each recess (46 to 48), and for example, a concentric figure is formed with each through hole (43). As compared with the case where the recesses (46 to 48) are formed so as to avoid the stress, the stress caused by each through electrode (45) is easily relaxed.

  Further, as in the invention according to claim 8, the recess (47) formed in the region of the cap member (40) joined to the semiconductor substrate (10) penetrates the front and back surfaces of the cap member (40). It can also be formed by holes.

  And like invention of Claim 9, in the cap member (40), the recessed part (47) comprised by the hole which penetrates the front and back of a cap member (40) is formed, and this recessed part (47) is formed. The sensor unit (14) or the wiring (70) electrically connected to the semiconductor substrate (10) may be provided, and the wiring (70) may be provided so that a space surrounded by the wall surface of the recess (47) remains. it can.

  According to such a semiconductor device, the wiring (70) is provided in the concave portion (47) so that a space surrounded by the wall surface remains, and the concave portion (47) and the concave portion of the semiconductor substrate (10) are provided. (47) can be expanded and contracted at the portion facing the substrate, and the stress applied to the bonding surface between the semiconductor substrate (10) and the cap member (40) can be relaxed.

  Further, as in the invention described in claim 10, the recess (47) formed in the region of the cap member (40) joined to the semiconductor substrate (10) is formed by a hole penetrating the cap member (40). It is also possible to form the recess (47) only in a region different from the groove (15).

  Further, as in the inventions described in claims 11 and 12, a semiconductor substrate (10) includes a support substrate (11), an insulating film (12) disposed on the surface of the support substrate (11), and an insulating film ( 12) is an SOI substrate having a semiconductor layer (13) disposed on the opposite side of the support substrate (11) across the semiconductor substrate (10), and the semiconductor layer (13) of the semiconductor substrate (10) is a cap member (40). The cavity (18) may be formed in a region corresponding to a region where the semiconductor layer (13) is bonded to the cap member (40) in the insulating film (12).

  According to a thirteenth aspect of the present invention, the step of preparing the semiconductor wafer (10a), the movable portion (20) having the movable electrode (24), and the fixed electrode (32) are provided on the semiconductor wafer (10a). A step of forming a sensor part (14) formed by a groove (15) formed in the semiconductor wafer (10a), and a package member (40a) joined to the semiconductor wafer (10a). ), A step of forming a recess (41) in a portion of the package member (40a) corresponding to the movable electrode (24) and the fixed electrode (32), a semiconductor wafer (10a) and a package member ( 40a), a region of the semiconductor wafer (10a) to be bonded to the package member (40a), and a half of the semiconductor device manufacturing method. A region different from the groove (15) formed in the body wafer (10a), or a region bonded to the semiconductor wafer (10a) in the package member (40a) and formed in the semiconductor wafer (10a) A recess (17) is formed in at least one of a region including a region different from the region corresponding to the groove (15), or a region opposite to the region bonded to the semiconductor wafer (10a) in the package member (40a). , 46 to 48).

  In the invention described in claim 14, the semiconductor includes a step of forming, on the semiconductor wafer (10a), a diaphragm deformable by the pressure of the measurement medium and a sensor portion (14) having a gauge resistance formed on the diaphragm. A method for manufacturing an apparatus, comprising: a region of a semiconductor wafer (10a) bonded to a package member (40a); a region of a package member (40a) bonded to a semiconductor wafer (10a); or a package member ( 40a), including a step of forming a recess (17, 46 to 48) in at least one of the regions opposite to the region bonded to the semiconductor wafer (10a).

  In the method for manufacturing a semiconductor device according to claim 13 and 14, a semiconductor wafer (of a package member (40a), or a part facing each recess (17, 46, 47) and the recess (17, 46, 47). Since the recess (48) formed in the region opposite to the region to be joined to 10a) can be expanded and contracted, the step of forming at least one of the recesses (17, 46 to 48) is performed. Thus, the stress applied to the bonding surface between the semiconductor wafer (10a) and the package member (40a) can be relaxed. Therefore, it is possible to suppress the stress from being transmitted to the movable electrode (24) and the fixed electrode (32) or the gauge resistance, and it is possible to suppress the deterioration of the accuracy of the characteristics of the semiconductor device.

  Furthermore, in the manufacturing method of the semiconductor device according to claim 13 and claim 14, the semiconductor wafer (10a) in the region bonded to the package member (40a) in the semiconductor wafer (10a) or the package member (40a) When the step of forming the recesses (17, 46, 47) in the region to be bonded is provided, the step of bonding the semiconductor wafer (10a) and the package member (40a) is performed on the semiconductor wafer (10a). Of the recessed portion (17) and the package member (40a) facing the recessed portion (17), or the recessed portion (46, 47) formed in the package member (40a) and the recessed portion (46 of the semiconductor wafer (10a)). 47) and the opposite part can be prevented from being joined. Therefore, in such a method for manufacturing a semiconductor device, when the region where the semiconductor wafer (10a) and the package member (40a) are bonded is the same as that in the conventional method for manufacturing a semiconductor device, the semiconductor wafer ( Since the recesses (17, 46, 47) are formed in the semiconductor wafer (10a) or the package member (40a) when the 10a) and the package member (40a) are joined, the semiconductor wafer (10a) and the package member It is possible to reduce the bonding area where (40a) is bonded. As a result, the stress applied to the bonding surface between the semiconductor wafer (10a) and the package member (40a) can be reduced, so that the stress is transmitted to the movable electrode (24) and the fixed electrode (32) or the gauge resistance. It can be prevented that the accuracy of the characteristics of the semiconductor device is lowered.

  For example, as in the invention described in claim 15, before the step of bonding the semiconductor wafer (10a) and the package member (40a), the movable electrode (24) and the fixed electrode (32) are attached to the semiconductor wafer (10a). The step of forming the recess (17) so as to make a round of the outside of () can be performed. Further, as in the invention described in claim 16, before the step of bonding the semiconductor wafer (10a) and the package member (40a), the semiconductor wafer (10a) is recessed so as to make a round around the outside of the gauge resistance. A step of forming (17) can be performed.

  And like invention of Claim 17, before the process of joining a semiconductor wafer (10a) and a package member (40a), the package member (40a) goes around the outer side of a hollow part (41). Thus, the step of forming the recess (46) can be performed. Further, as in the invention described in claim 18, after the step of bonding the semiconductor wafer (10a) and the package member (40a), the package member (40a) is provided with a recess (47) penetrating the front and back surfaces. A step of forming a hole to be configured can be performed.

  Further, as in the invention described in claim 19, before the step of bonding the semiconductor wafer (10a) and the package member (40a), a region of the package member (40a) to be bonded to the semiconductor wafer (10a). And a step of forming a plurality of frame-shaped recesses (46, 48) in at least one of the regions opposite to the region bonded to the semiconductor wafer (10a), and the semiconductor wafer (10a) and the package member ( 40a), a step of forming a through hole (43) penetrating the front and back surfaces in a region surrounded by the recesses (46, 48) of the package member (40a), and a through hole (43 And a step of disposing a through electrode (45) in each.

  Further, as in the invention described in claim 20, after the step of bonding the semiconductor wafer (10a) and the package member (40a), a plurality of through holes (43) penetrating the front and back surfaces of the package member (40a). Forming a frame-shaped recess (47, 48) so as to surround each of the through holes (43), and disposing a through electrode (45) in each of the through holes (43). It can be carried out.

  In the invention according to claim 19 and claim 20, the step of disposing the through electrode (45) in the package member (40a) and the step of forming the recesses (46 to 48) surrounding each of the through holes (43). Contains. Accordingly, the recess (46, 47) formed in the region to be bonded to the semiconductor wafer (10a) in the package member (10a) and the portion of the semiconductor wafer facing the recess (46, 47), or the semiconductor wafer (10a) ) And the concave portion (48) formed in the region opposite to the region to be joined can be expanded and contracted, and the stress generated when the through electrode (45) is disposed can be relieved.

  In addition, as in the invention described in claim 21, after the step of bonding the semiconductor wafer (10a) and the package member (40a), the package member (40a) penetrates the front and back surfaces and has a plurality of recesses (47). And the step of forming a hole that constitutes the sensor portion (14) or the semiconductor wafer (10a) so that a space surrounded by the wall surface of the recess (47) remains in the recess (47). And a step of arranging the wiring (70).

  In such a method for manufacturing a semiconductor device, the wiring (70) is arranged in the recess (47) so that a space surrounded by the wall surface remains, and the recess (47) and the recess of the semiconductor wafer (10a) are arranged. The portion facing (47) can be expanded and contracted, and the stress applied to the wall surface of the recess (47) when arranging the wiring (70) can be suppressed, and the semiconductor wafer (10a) and The stress generated when the package member (40a) is joined can be relaxed.

  Furthermore, as in the inventions of claims 22 and 23, in the step of preparing the semiconductor wafer (10a), the support substrate (11) is prepared, and the insulating film (12) is formed on the surface of the support substrate (11). The cavity portion (18) is left after the placement and formation of the cavity portion (18) in the region corresponding to the region to be joined where the semiconductor wafer (10a) is joined to the package member (40a) in the insulating film (12). Thus, an SOI wafer configured by disposing the semiconductor layer (13) on the opposite side of the support substrate (11) with the insulating film (12) interposed therebetween can be prepared.

  In addition, the code | symbol in the bracket | parenthesis of each means described in this column and the claim shows the correspondence with the specific means as described in embodiment mentioned later.

It is a figure showing the section composition of the semiconductor device in a 1st embodiment of the present invention. FIG. 2 is a top surface layout diagram of the SOI substrate shown in FIG. 1. FIG. 3 is a cross-sectional view showing a manufacturing process of the semiconductor device shown in FIG. 1. (A) is a partial top view of an SOI wafer provided with a mask for performing the etching process in the process of FIG. 3 (b), and (b) is a mask for performing the etching process in the process of FIG. 3 (c). It is a partial top view of an SOI wafer provided with. It is a figure which shows the cross-sectional structure of the semiconductor device in 2nd Embodiment of this invention. FIG. 6 is a schematic plan view of a bonding surface with an SOI substrate among the silicon substrates shown in FIG. 5. It is a figure which shows the cross-sectional structure of the semiconductor device in 3rd Embodiment of this invention. It is a figure which shows the cross-sectional structure of the semiconductor device in 4th Embodiment of this invention. FIG. 9 is a schematic plan view of a bonding surface with an SOI substrate in the silicon substrate shown in FIG. 8. It is a figure which shows the cross-sectional structure of the semiconductor device in 5th Embodiment of this invention. FIG. 11 is a schematic plan view of a bonding surface with an SOI substrate in the silicon substrate shown in FIG. 10. It is a figure which shows the cross-sectional structure of the semiconductor device in 6th Embodiment of this invention. It is a figure which shows the cross-sectional structure of the semiconductor device in 7th Embodiment of this invention. It is a figure which shows the cross-sectional structure of the semiconductor device in 8th Embodiment of this invention. FIG. 15 is a schematic plan view of a surface of the silicon substrate shown in FIG. 14 opposite to the bonding surface with the SOI substrate. It is a figure which shows the cross-sectional structure of the semiconductor device in 9th Embodiment of this invention. FIG. 17 is a cross-sectional view showing a manufacturing step of the semiconductor device shown in FIG. 16. It is a figure which shows the cross-sectional structure of the semiconductor device in 10th Embodiment of this invention. FIG. 19 is a top surface layout diagram of the SOI substrate shown in FIG. 18. It is a schematic plan view of the joint surface with an SOI substrate among the silicon substrates in another Example. It is a partial top view of the SOI wafer provided with the mask in another Example.

(First embodiment)
A first embodiment of the present invention will be described. FIG. 1 is a diagram showing a cross-sectional configuration of the semiconductor device of this embodiment, and FIG. 2 is a top surface layout diagram of the SOI substrate shown in FIG. 2 corresponds to the AA sectional view shown in FIG. 1, and FIG. 1 corresponds to the BB sectional view when the cap member is arranged on the SOI substrate shown in FIG.

  As shown in FIG. 1, the semiconductor device of this embodiment is configured using an SOI (Silicon on Insulator) substrate 10 corresponding to the semiconductor substrate of the present invention and a silicon substrate 40 corresponding to the cap member of the present invention. Yes. A cavity 50 is formed between the SOI substrate 10 and the silicon substrate 40, and the cavity 50 is hermetically sealed by bonding the SOI substrate 10 and the silicon substrate 40 together.

  The SOI substrate 10 includes a support substrate 11, an insulating film 12 disposed on the surface of the support substrate 11, and a semiconductor layer 13 disposed on the opposite side of the support substrate 11 with the insulating film 12 interposed therebetween. Yes. A sensor unit 14 is formed in the semiconductor layer 13.

  Although the sensor unit 14 is not particularly limited, in the present embodiment, as shown in FIGS. 1 and 2, the sensor unit 14 is formed by a groove 15 formed in the SOI substrate 10. The sensor unit 14 includes a movable unit 20 that can be displaced with respect to the semiconductor layer 13 and a fixed unit 30 that is fixedly supported. The sensor unit 14 includes a beam structure that includes the movable unit 20 and the fixed unit 30. . The insulating film 12 has an opening 16 formed by removing a region corresponding to the beam structure in a rectangular shape.

  Specifically, the movable part 20 of the sensor part 14 is configured such that both ends of a rectangular weight part 21 are integrally connected to the anchor parts 23 a and 23 b via the beam part 22. These anchor portions 23 a and 23 b are fixed to a pair of opposing side portions of the opening edge portion of the opening portion 16 in the insulating film 12. Thereby, the weight portion 21 and the beam portion 22 are in a state of facing the opening portion 16.

  The beam portion 22 has a rectangular frame shape in which two parallel beams are connected at both ends thereof, and has a spring function of displacing in a direction perpendicular to the longitudinal direction of the two beams. Specifically, the beam portion 22 displaces the weight portion 21 in the arrow X direction when receiving an acceleration including a component in the arrow X direction in FIG. 2 and restores the original state according to the disappearance of the acceleration. It has become. Thereby, the weight part 21 can be displaced in the direction of the arrow X integrally with the beam part 22 in a plane parallel to the semiconductor layer 13 in accordance with the application of acceleration.

  Then, on both side surfaces of the weight portion 21 with the axis X in the displacement direction as the center, the comb-like movable electrodes 24 protrude in opposite directions in the direction orthogonal to the axis X in the displacement direction. The movable electrode 24 faces the opening 16. Thus, the movable electrode 24 provided in the weight portion 21 can be displaced in the displacement direction X together with the beam portion 22 and the weight portion 21. In the present embodiment, the SOI substrate 10 has a rectangular plate shape, and the movable electrode 24 is provided in the weight portion 21 so as to be parallel to the long side direction (vertical direction in the drawing) of the SOI substrate 10. .

  In addition, the fixed portion 30 of the sensor unit 14 is supported by another set of opposing side portions where the anchor portions 23a and 23b are not supported among the opposing side portions at the opening edge portion of the opening portion 16, and the weight Two pieces are provided across the portion 21.

  Each fixed portion 30 is fixed to the opening edge portion of the opening portion 16 in the insulating film 12, and a plurality of wiring portions 31 arranged to be opposed to the side surface of the movable electrode 24 and the wiring portion 31 supported by the semiconductor layer 13. The fixed electrode 32 is provided.

  As described above, the sensor unit 14 of the present embodiment is configured to include the movable electrode 24 that is displaced according to the application of acceleration and the fixed electrode 32 that is disposed so as to face the movable electrode 24. Therefore, in the sensor unit 14, when the acceleration is applied, the movable electrode 24 is displaced and the distance between the movable electrode 24 and the fixed electrode 32 changes to change the capacitance, and the acceleration is based on the change in the capacitance. Can be detected.

  Further, in the semiconductor layer, a region outside the sensor unit 14 (hereinafter referred to as a peripheral unit), the movable unit 20 and the fixed unit 30 are provided with contact regions 13a, 26, and 33 that are in contact with a through electrode 45 described later. ing. Specifically, a contact area 13a is provided at a predetermined position on the periphery. A movable electrode wiring portion 25 is formed in the movable portion 20 in a state of being connected to one anchor portion 23a, and the movable electrode wiring portion 25 is provided with a contact region 26. Similarly, each fixing portion 30 is provided with a contact area 33 at a predetermined position of each wiring portion 31.

  As shown in FIGS. 1 and 2, the semiconductor layer 13 of the SOI substrate 10 is in a region bonded to the silicon substrate 40 and in a region different from the groove 15 formed in the SOI substrate 10. A recess 17 is formed. Specifically, in the present embodiment, the concave portion 17 is outside the movable electrode 24 and the fixed electrode 32, and is an area between the movable electrode 24 and the fixed electrode 32 and the contact regions 13a, 26, 33. It is formed so as to go around the region including it. More specifically, the recess 17 is formed so as to include a region between the contact region 26 and the weight portion 21 in the movable portion 20 and a region between the contact region 33 and the wiring portion 31 in the fixed portion 30. .

  Further, as shown in FIG. 1, the silicon substrate 40 is formed with a recessed portion 41 constituting the cavity 50 in a portion corresponding to the movable electrode 24 and the fixed electrode 32. Further, the silicon substrate 40 is provided with an insulating film 42 so as to cover the front and back surfaces, and four through holes 43 penetrating the front and back surfaces are formed. In each of these through holes 43, an insulating film 44 is disposed on each side wall, and a through electrode 45 made of a metal such as Cu or Al is embedded therein. The insulating films 42 and 44 are configured using, for example, an oxide film or a TEOS film.

  Specifically, each through electrode 45 is provided on the silicon substrate 40 so as to be in contact with the contact regions 26 and 33 provided on the sensor unit 14 and the contact region 13a provided on the peripheral part. The three through electrodes 45 provided so as to be in contact with the contact regions 26 and 33 of the sensor unit 14 electrically connect a processing circuit (not shown) and the sensor unit 14. Further, one through electrode 45 provided so as to come into contact with the peripheral contact area 13a electrically connects a processing circuit (not shown) and the peripheral part. The through electrode 45 in contact with the peripheral contact region 13a applies a potential to the peripheral part, for example, parasitic capacitance between the peripheral part and the wiring part 31 provided in the fixed part 30, or the peripheral part. This is to suppress or eliminate the parasitic capacitance between the substrate and the support substrate 11.

  Next, a method for manufacturing such a semiconductor device will be described. FIG. 3 is a cross-sectional view showing the manufacturing process of the semiconductor device of this embodiment.

  First, as shown in FIG. 3A, an SOI wafer 10a corresponding to the semiconductor wafer of the present invention is prepared. As shown in FIG. 3B, well-known photolithography, etching, and the like are performed on the SOI wafer 10a. Thus, a trench constituting the concave portion 17 is formed so as to have the above shape. For example, when the thickness of the semiconductor layer 13 is 15 μm, a trench having a depth of 3 μm can be formed.

  Here, FIG. 4A shows a partial top view of the SOI wafer 10a provided with a mask when performing the etching step in the step of FIG. 3B. As shown in FIG. 4A, the mask 60 has an opening corresponding to a region where a recess is to be formed in the SOI wafer 10a, and the opening formed in the mask 60 forms a movable electrode in the SOI wafer 10a. It is formed so as to go around the outside of the scheduled area and the fixed electrode formation scheduled area.

  Thereafter, as shown in FIG. 3C, the sensor unit 14 is formed on the SOI wafer 10a by performing a known semiconductor manufacturing process such as photolithography and etching. Specifically, the sensor unit 14 is formed as follows. FIG. 4B is a partial top view of the SOI wafer 10a provided with the mask 60 when performing the etching process in the process of FIG. As shown in FIG. 4B, a mask 60 is laminated on the recess 17 formed by the process of FIG. 3B on the SOI wafer 10a, and the sensor 60 is formed on the mask 60. An opening is formed so that it is possible. Then, in a state where such a mask 60 is arranged on the SOI wafer 10a, the SOI wafer 10a is etched to form a groove 15, and further, the insulating film 12 is etched through the groove 15 as a sacrificial layer, whereby the movable electrode 24 is formed. Set to the released state (movable in the direction of arrow X).

  The regions within the dotted lines in FIGS. 4A and 4B indicate the regions etched twice by the etching in the step of FIG. 3B and the etching in the step of FIG. 3C. . In this case, a region within the dotted line (hereinafter referred to as a twice-etched region) of the SOI wafer 10a is a region where etching is performed only once (a region other than the twice-etched region in the recess 17 and two of the grooves 15). The amount of etching is larger than that in the region other than the etching region. However, when the semiconductor layer 15 is etched, since the insulating film 12 functions as an etching stopper layer, the recess 17 and the groove 15 can be formed in a desired shape.

  Next, as shown in FIG. 3D, a cap member is formed, and a silicon wafer 40a corresponding to the package member of the present invention is prepared. As shown in FIG. 3E, the silicon wafer 40a is a surface on the side bonded to the SOI wafer 10a and corresponds to the movable electrode 24 and the fixed electrode 32 provided on the SOI wafer 10a. A recess 41 is formed in the portion by photolithography, etching, or the like. Thereafter, as shown in FIG. 3F, insulating films 42 are formed on the front and back surfaces of the silicon wafer 40a.

  Subsequently, as shown in FIG. 3G, a cavity 50 is formed between the SOI wafer 10a and the silicon wafer 40a by the recess 41, and the movable electrode 24 and the fixed electrode 32 of the sensor unit 14 are formed. The SOI wafer 10a and the silicon wafer 40a are bonded so as to be disposed in the cavity 50. The bonding of the SOI wafer 10a and the silicon wafer 40a is performed by, for example, a portion of the SOI wafer 10a bonded to the insulating film 42 provided on the silicon wafer 40a and the SOI wafer 10a of the insulating film 42 provided on the silicon wafer 40a. The surface to be bonded is irradiated with an inert ion beam or plasma to activate the surface, and the SOI wafer 10a and the insulating film 42 provided on the silicon wafer 40a are brought into contact with each other to bond the surfaces. it can.

  Then, as shown in FIG. 3 (h), four through holes 43 penetrating the front and back surfaces of the silicon wafer 40a are formed, and an insulating film 44 is arranged on the side wall of each through hole 43 and inside the silicon wafer 40a. A through-level electrode 45 is formed by embedding a metal such as Cu or Al to form a wafer level package structure. Then, the semiconductor device of this embodiment is manufactured by dividing the wafer level package structure into chips by a dicing cutter or the like.

  In such a semiconductor device, the concave portion 17 formed in the SOI substrate 10 and the portion facing the concave portion 17 in the insulating film 42 provided in the silicon substrate 40 can be in a non-bonded state. Therefore, the concave portion 17 formed on the SOI substrate 10 and the portion of the insulating film 42 formed on the silicon substrate 40 that faces the concave portion 17 can be expanded and contracted. Therefore, the wafer level package structure is formed by bonding the SOI wafer 10a and the silicon wafer 40a by the portion of the insulating film 42 provided in the recess 17 formed in the SOI substrate 10 and the silicon substrate 40 that faces the recess 17. In this case, the intrinsic stress applied to the bonding surface can be relieved, and this stress is transmitted to the movable electrode 24 and the fixed electrode 32 in the sensor unit 14 to reduce the accuracy of the characteristics of the semiconductor device. Can be suppressed. Further, in the present embodiment, the concave portion 17 is formed outside the movable electrode 24 and the fixed electrode 32 and includes a region between the movable electrode 24 and the fixed electrode 32 and each contact region 13a, 26, 33. Has been. Therefore, the stress applied to the silicon wafer 40 a when the through electrode 45 is formed by the concave portion 17 and the portion of the insulating film 42 provided on the silicon substrate 40 that faces the concave portion 17 causes the movable electrode of the sensor portion 14 to move. 24 and the fixed electrode 32 can also be suppressed, and the deterioration of the accuracy of the characteristics of the semiconductor device can be suppressed.

  Further, in such a semiconductor device, when the semiconductor device is used in a high temperature environment, the linear expansion coefficients of the SOI substrate 10, the silicon substrate 40, the insulating films 42 and 44 provided on the silicon substrate 40, and the through electrode 45 are high. Because of the difference, thermal stress is generated between the members 10, 40, 42, 44, 45, but the concave portion 17 formed in the SOI substrate 10 and the concave portion of the insulating film 42 provided in the silicon substrate 40. The portion facing 17 can relieve the thermal stress and suppress the deterioration of the characteristic accuracy of the semiconductor device.

  Further, since the linear expansion coefficient of the through electrode 45 and the linear expansion coefficient of the silicon substrate 40 are different, the silicon substrate 40 may be warped (bent) due to thermal stress. The stress resulting from the above is applied to the interface between the SOI substrate 10 and the insulating film 42. However, in the present embodiment, the thermal stress can be relieved by the portion of the insulating film 42 provided in the recess 17 formed in the SOI substrate 10 and the silicon substrate 40 that faces the recess 17, so that the semiconductor device is Warping can be suppressed. Even if the silicon substrate 40 is warped and stress due to this is generated, the recess 17 formed in the SOI substrate 10 and the portion of the insulating film 42 provided in the silicon substrate 40 facing the recess 17 This stress can be relaxed. Therefore, it is possible to suppress a decrease in accuracy of characteristics of the semiconductor device.

  In the present embodiment, the movable electrode 24 and the fixed electrode 32 are formed to be parallel to the long side direction of the SOI substrate 10. In general, the semiconductor device is likely to warp due to bending of the long side, but in this embodiment, the movable electrode 24 and the fixed electrode 32 are configured to be parallel to the long side direction of the SOI substrate 10. Therefore, even if the long side is bent, the distance between the movable electrode 24 and the fixed electrode 32 does not change, and a decrease in accuracy of characteristics of the semiconductor device can be suppressed.

  Further, in such a semiconductor device, the recess 17 is formed in the SOI wafer 10a when the region where the SOI wafer 10a and the silicon wafer 40a are bonded is the same as in the conventional semiconductor device. The bonding area when the SOI wafer 10a and the silicon wafer 40a are bonded can be reduced. Therefore, since the intrinsic stress generated between the SOI wafer 10a and the silicon wafer 40a can be reduced, the intrinsic stress can be prevented from being transmitted to the movable electrode 24 and the fixed electrode 32, and the semiconductor device It can suppress that the precision of the characteristic falls.

(Second Embodiment)
A second embodiment of the present invention will be described. The semiconductor device according to the present embodiment is different from the first embodiment in that the SOI substrate 10 is provided with the recesses 17 instead of the recesses 17 in the SOI substrate 10 and the other parts are the same as those in the first embodiment. The description is omitted here. FIG. 5 is a diagram showing a cross-sectional configuration of the semiconductor device according to the present embodiment, and FIG. 6 is a schematic plan view of a bonding surface with the SOI substrate 10 in the silicon substrate 40 shown in FIG. 6 corresponds to the CC cross-sectional view shown in FIG. 5, and FIG. 5 corresponds to the DD cross-sectional view when the SOI substrate 10 is arranged on the silicon substrate 40 shown in FIG. In FIG. 6, the insulating films 42 and 44 are omitted.

  As shown in FIGS. 5 and 6, the semiconductor device of the present embodiment forms a sensor unit 14 that is a region bonded to the SOI substrate 10 in the silicon substrate 40 and is formed on the SOI substrate 10. A recess 46 is formed including a region different from the region corresponding to the groove 15. Specifically, in the present embodiment, the recess 46 is configured by a trench, and is an area outside the recess 41 and includes an area between the recess 41 and each through-hole 43. It is formed so as to make a round.

  Such a semiconductor device is manufactured as follows.

  First, the processes shown in FIGS. 3A and 3C are performed to form the sensor unit 14 on the SOI wafer 10a. Thereafter, a silicon wafer 40a is prepared in the same manner as in FIG. 3D, and when the step of FIG. 3E is performed, a recess 41 is formed by well-known photolithography and etching, and the shape of the above-described shape is obtained. A trench constituting the recess 46 is formed. Subsequently, the steps of FIGS. 3G and 3H are performed to form a wafer level package structure, and the semiconductor device of this embodiment is manufactured by dividing the wafer level package structure into chips. The

  In such a semiconductor device, the concave portion 46 formed in the silicon substrate 40 and the portion of the SOI substrate 10 that faces the concave portion 46 are not joined. Therefore, the concave portion 46 formed in the silicon substrate 40 and the portion of the SOI substrate 10 facing the concave portion 46 can be expanded and contracted, and the same effect as in the first embodiment can be obtained. Further, in such a semiconductor device, the recess 46 formed in the silicon wafer 40a can be formed at the same time as the recess 41, so that the manufacturing process is not increased.

  Furthermore, since the linear expansion coefficient of the through electrode 45 and the linear expansion coefficient of the silicon substrate 40 are different, the silicon substrate 40 may be warped (bent) due to thermal stress. A recess 46 is formed in 40, and the warpage of the silicon substrate 40 can be further suppressed than in the first embodiment. In particular, in the present embodiment, since the recess 46 is formed between the through electrode 45 and the depression 41 (the movable electrode 24 and the fixed electrode 32 of the sensor unit 14), the stress caused by each through electrode 45 is increased. Transmission to the movable electrode 24 and the fixed electrode 32 in the sensor unit 14 can be suppressed.

(Third embodiment)
A third embodiment of the present invention will be described. The semiconductor device of the present embodiment is different from that of the second embodiment in that the silicon substrate 40 is provided with a hole that constitutes a recess instead of the trench that constitutes the recess 46. Since it is the same as that of 2nd Embodiment, description is abbreviate | omitted here. FIG. 7 is a diagram showing a cross-sectional configuration of the semiconductor device according to the present embodiment. The schematic plan view of the silicon substrate 40 in the semiconductor device of this embodiment is the same as that of the second embodiment, and the recess 46 in FIG. 6 corresponds to the recess of this embodiment.

  As shown in FIGS. 6 and 7, the semiconductor device of the present embodiment is a region bonded to the SOI substrate 10 and a region corresponding to the groove 15 forming the sensor unit 14 formed in the SOI substrate 10. A recess 47 is formed including a different area. Specifically, the recess 47 is formed by a hole penetrating the front and back surfaces of the silicon substrate 40, is an area outside the recess 41, and between the recess 41 and each through-hole 43. It is formed so as to go around the region including the region.

  Such a semiconductor device is manufactured as follows.

  First, the steps shown in FIGS. 3A and 3C to 3G are performed to join the SOI wafer 10a on which the sensor unit 14 is formed and the silicon wafer 40a on which the insulating film 42 is provided. . Thereafter, when the step of FIG. 3H is performed, the through hole 43 is formed, and a hole penetrating the silicon wafer 40a is formed to form the recess 47. A through-hole electrode 45 is formed by embedding a metal such as Cu or Al in each through-hole 43 to form a wafer level package structure. Subsequently, the semiconductor device of this embodiment is manufactured by dividing the wafer level package structure into chips.

  In such a semiconductor device, the concave portion 47 formed in the silicon substrate 40 and the portion of the SOI substrate 10 that faces the concave portion 47 are not joined. Therefore, the concave portion 47 formed in the silicon substrate 40 and the portion of the SOI substrate 10 facing the concave portion 47 can be expanded and contracted, and the same effect as in the second embodiment can be obtained. Furthermore, in this embodiment, since the hole which comprises the recessed part 47 can be formed simultaneously with the through-hole 43 which comprises the penetration electrode 45, it does not increase a manufacturing process.

  Moreover, in this embodiment, the recessed part 47 is comprised by the hole which penetrates the front and back of the silicon substrate 40, and the surface area of the recessed part 47 becomes large compared with the recessed part 46 of the said 2nd Embodiment. For this reason, the area | region which can expand / contract in the recessed part 47 increases, and it can further suppress that each stress is transmitted to the movable electrode 24 and the fixed electrode 32 among the sensor parts 14. FIG.

  In such a semiconductor device, since the recess 47 is formed by a hole penetrating the front and back surfaces of the silicon substrate 40, the groove 15 formed in the SOI substrate 10 and the recess 47 formed in the silicon substrate 40 By connecting, the inside of the cavity 50 and the outside of the semiconductor device are connected. Therefore, the semiconductor device according to the present embodiment cannot be hermetically sealed in the cavity 50. Therefore, the semiconductor device is particularly suitable for application to a semiconductor device in which the cavity 50 is at atmospheric pressure.

(Fourth embodiment)
A fourth embodiment of the present invention will be described. The semiconductor device of this embodiment is obtained by changing the region where the recess 47 is formed with respect to the third embodiment, and the other parts are the same as those of the third embodiment, and thus the description thereof is omitted here. FIG. 8 is a diagram showing a cross-sectional configuration of the semiconductor device according to the present embodiment, and FIG. 9 is a schematic plan view of a bonding surface with the SOI substrate 10 in the silicon substrate 40 shown in FIG. 9 corresponds to the EE cross section shown in FIG. 8, and FIG. 8 corresponds to the FF cross section when the SOI substrate 10 is arranged on the silicon substrate 40 shown in FIG. In FIG. 9, the insulating films 42 and 44 are omitted.

  As shown in FIGS. 8 and 9, in the semiconductor device of this embodiment, the recess 47 is configured by a hole penetrating the front and back surfaces of the silicon substrate 40, and is an area outside the recess 41. It is formed in an area including the area between the depression 41 and each through-hole 43 and excluding the area corresponding to the groove 15, the movable part 20, and the fixed part 30. More specifically, the concave portion 47 of the present embodiment is formed only in a region corresponding to the peripheral portion of the SOI substrate 10 in the silicon substrate 40. Of the concave portion 47 of the third embodiment, the groove 15 and the movable portion 20 are formed. And it is formed in the area | region except the area | region corresponding to the fixing | fixed part 30. FIG.

  The semiconductor device of the present embodiment is manufactured in the same manner as in the third embodiment, and the concave portion 47 having the above shape may be formed in the silicon substrate 40 when performing the process of FIG.

  In such a semiconductor device, the recess 47 is not formed in the region corresponding to the groove 15 in the silicon substrate 40 so that the groove 15 and the recess 47 are not connected. For this reason, even when the recess 47 is formed in the silicon substrate 40 by a hole penetrating the front and back surfaces, the cavity 50 can be hermetically sealed. Effects similar to those of the third embodiment can be obtained.

  In the present embodiment, the example in which the concave portion 47 is formed in the region excluding the region corresponding to the groove 15, the movable portion 20, and the fixed portion 30 of the silicon substrate 40 has been described. A recess 47 may be formed in a region corresponding to the movable portion 20 and the fixed portion 30. In the case of such a semiconductor device, the stress transmitted to the movable electrode 24 and the fixed electrode 32 in the sensor unit 14 can be further reduced than in the semiconductor device of the present embodiment. Similar effects can be obtained.

(Fifth embodiment)
A fifth embodiment of the present invention will be described. The semiconductor device according to the present embodiment is obtained by forming a region for forming the recess 46 with respect to the second embodiment, and the other parts are the same as those of the second embodiment, and thus the description thereof is omitted here. FIG. 10 is a diagram showing a cross-sectional configuration of the semiconductor device according to the present embodiment, and FIG. 11 is a schematic plan view of a bonding surface with the SOI substrate 10 in the silicon substrate 40 shown in FIG. 11 corresponds to the GG sectional view shown in FIG. 10, and FIG. 10 corresponds to the HH sectional view when the SOI substrate 10 is arranged on the silicon substrate 40 shown in FIG. In FIG. 11, the insulating films 42 and 44 are omitted.

  As shown in FIGS. 10 and 11, in the semiconductor device of this embodiment, the recess 46 has a frame shape constituted by a trench, and is formed so as to surround each through-hole 43. Specifically, as shown in FIG. 11, the recess 46 is formed so as to form a concentric figure with each through hole 43 so that the distance from the wall surface to the wall surface of the through hole 43 is uniform. Yes. In the present embodiment, the shape (planar shape) of each through hole 43 viewed from the bonding surface of the SOI substrate 10 is a circular shape, and the shape of each recess 46 is a ring shape surrounding each through hole 43. Concentric shape. In the present specification, configuring a concentric figure means that figures having similar shapes are arranged sharing a center, and a concentric shape is centered on a circle having a different diameter. Means that they are shared.

  The semiconductor device of the present embodiment is manufactured in the same manner as in the second embodiment, and when the process of FIG. 3E is performed, the concave portion 46 having the above shape is formed, and the process of FIG. When performing, the through-hole 43 should just be formed in the area | region enclosed by each recessed part 46 among the silicon substrates 40. FIG.

  According to such a semiconductor device, since the recess 46 is formed in the silicon substrate 40 so as to surround each through hole 43, the stress caused by each through electrode 45 is higher than that in each embodiment described above. Among them, the transmission to the movable electrode 24 and the fixed electrode 32 can be further reduced, and the same effect as in the second embodiment can be obtained.

  In the present embodiment, the planar shape of each through-hole 43 is a columnar shape, and the planar shape of each recess 46 is a donut shape surrounding each through-hole 43. The through holes 43 and the recesses 46 are formed so as to form concentric figures so that the distances from the through holes 43 to the wall surfaces of the through holes 43 are uniform. As a result, the stress caused by each through electrode 45 is uniformly applied to the wall surface of each recess 46. For example, the planar shape of each recess 46 is a frame shape surrounding each through hole 43, and each recess Compared with the case where the distance from the wall surface 46 to the wall surface of each through-hole 43 is not uniform, the stress caused by each through-electrode 45 is easily relaxed.

  In the present embodiment, the semiconductor device in which the planar shape of each through electrode 45 is circular and the planar shape of each recess 46 is donut-shaped has been described. However, each through electrode 45 and each recess 46 has If they are formed so as to form concentric figures, the same effect can be obtained. For example, the planar shape of the through electrode 45 can be a square shape or a rectangular shape.

(Sixth embodiment)
A sixth embodiment of the present invention will be described. The semiconductor device according to the present embodiment is different from the fifth embodiment in that the silicon substrate 40 is provided with holes constituting the recesses 47 instead of the trenches constituting the recesses 46. Since it is the same as that of 5th Embodiment, description is abbreviate | omitted here. FIG. 12 is a diagram showing a cross-sectional configuration of the semiconductor device according to the present embodiment. The schematic plan view of the silicon substrate 40 in the semiconductor device of this embodiment is the same as that of the fifth embodiment, and the recess 46 in FIG. 11 corresponds to the recess 47 of this embodiment.

  As shown in FIG. 11 and FIG. 12, in the semiconductor device of this embodiment, the recess 47 is configured by a hole penetrating the front and back surfaces, and is formed so as to surround each through hole 43.

  The semiconductor device of the present embodiment is manufactured in the same manner as in the fifth embodiment, and the concave portion 47 having the above shape may be formed in the silicon substrate 40 when performing the process of FIG.

  In such a semiconductor device, a recess 47 is formed in the silicon substrate 40 so as to surround each through-hole 43, and the recess 47 is configured by a hole that penetrates the silicon substrate 40. Accordingly, the surface area of the concave portion 47 is increased and the area where the concave portion 47 can expand and contract is increased as compared with the concave portion 46 of the fifth embodiment. While the stress to be transmitted can be reduced from being transmitted to the movable electrode 24 and the fixed electrode 32 in the sensor unit 14, the same effect as in the fifth embodiment can be obtained.

  Note that, in this semiconductor device, as in the third embodiment, the groove 15 formed in the SOI substrate 10 and the recess 47 formed in the silicon substrate 40 are connected to each other so that the inside of the cavity 50 is sealed. Since it cannot be hermetically sealed, it is particularly suitable when applied to a semiconductor device in which the inside of the cavity 50 is at atmospheric pressure.

(Seventh embodiment)
A seventh embodiment of the present invention will be described. The semiconductor device according to the present embodiment is different from the sixth embodiment in that the insulating film 42 is not disposed on the side wall of each through-hole 43, and the other parts are the same as those in the sixth embodiment, and thus the description thereof is omitted here. . FIG. 13 is a diagram showing a cross-sectional configuration of the semiconductor device according to the present embodiment. The schematic plan view of the silicon substrate 40 in the semiconductor device of this embodiment is the same as that of the sixth embodiment.

  As shown in FIG. 13, in the semiconductor device of the present embodiment, the recess 47 is formed by a hole that penetrates the front and back surfaces, and is formed so as to surround each through-hole 43. Therefore, in the silicon substrate 40, the portion surrounded by each recess 47 and the portion not surrounded by each recess 47 are electrically insulated. In each through hole 43, only the through electrode 45 is embedded.

  The semiconductor device of this embodiment is manufactured in the same manner as in the sixth embodiment, and eliminates the step of disposing the insulating film 44 on the side wall of each through-hole 43 when performing the step of FIG. Manufactured by.

  According to such a semiconductor device, since the step of disposing the insulating film 44 on the wall surface of each through-hole 43 is not performed after each through-hole 43 is formed, the manufacturing process can be simplified and the first The same effects as in the sixth embodiment can be obtained.

(Eighth embodiment)
An eighth embodiment of the present invention will be described. The semiconductor device according to the present embodiment is obtained by changing a region having a recess with respect to the fifth embodiment, and the other parts are the same as those of the first embodiment, and thus the description thereof is omitted here. FIG. 14 is a diagram showing a cross-sectional configuration of the semiconductor device according to the present embodiment, and FIG. 15 is a schematic plan view of a surface opposite to the bonding surface with the SOI substrate 10 in the silicon substrate 40 shown in FIG. 14 corresponds to a cross-sectional view taken along the line II when the SOI substrate 10 is arranged on the silicon substrate 40 shown in FIG. In FIG. 15, the insulating films 42 and 44 are omitted.

  As shown in FIGS. 14 and 15, in the semiconductor device of the present embodiment, a recess 48 is formed in a region of the silicon substrate 40 opposite to the region bonded to the SOI substrate 10. Specifically, the recess 48 is formed of a trench and is formed so as to surround each through hole 43.

  The semiconductor device of the present embodiment is manufactured in the same manner as in the fifth embodiment. For example, when the step of FIG. 3E is performed, the concave portion 48 having the above shape is formed, and the semiconductor device of FIG. When performing the process, the through-holes 43 may be formed in the regions surrounded by the recesses 48 in the silicon substrate 40. In addition, when the step of FIG. 3H is performed, the concave portion 48 having the above-described shape can be formed in the silicon substrate 40 simultaneously with the formation of the through holes 43. In this case, for example, by applying a loading effect, the through hole 43 and the recess 48 can be formed simultaneously.

  In such a semiconductor device, expansion and contraction are possible in the recess 48 formed in the silicon substrate 40, and the same effect as in the fifth embodiment can be obtained.

(Ninth embodiment)
A ninth embodiment of the present invention will be described. The semiconductor device according to the present embodiment includes a cavity in the insulating film 12 instead of the recess 17 in the semiconductor layer 13 as compared with the first embodiment, and is otherwise the same as in the first embodiment. Therefore, the description is omitted here. FIG. 16 is a diagram illustrating a cross-sectional configuration of the semiconductor device according to the present embodiment.

  As shown in FIG. 16, in the semiconductor device of this embodiment, a cavity 18 is formed in the insulating film 12 of the SOI substrate 10. Specifically, the cavity 18 is formed in a region of the insulating film 12 corresponding to the region where the semiconductor layer 13 is bonded to the silicon substrate 40. In this embodiment, the cavity 18 makes a round of the opening 16. Is formed.

  Such a semiconductor device is manufactured as follows. FIG. 17 is a cross-sectional view showing the manufacturing process of the semiconductor device of this embodiment.

  As shown in FIG. 17A, a silicon wafer constituting the support substrate 11 is prepared, and as shown in FIG. 17B, the insulating film 12 is arranged on the surface of the silicon wafer. Thereafter, when the SOI wafer 10a is formed in the insulating film 12, the cavity 18 having the above shape is formed in a region corresponding to a region to be bonded where the SOI wafer 10a is bonded to the silicon wafer 40a. Subsequently, as shown in FIG. 17C, the semiconductor layer 13 is disposed on the opposite side of the silicon wafer constituting the support substrate 11 with the insulating film 12 interposed therebetween so that the cavity 18 remains, thereby insulating the cavity. An SOI wafer 10 a having a cavity portion 18 in the film 12 is prepared.

  Thereafter, as shown in FIGS. 17 (d) to 17 (i), an SOI wafer provided with the sensor unit 14 is performed by performing the same processes as those in FIGS. 3 (c) to 3 (h). 10a and the silicon wafer 40a are joined to form a wafer level package structure. Subsequently, the semiconductor device of this embodiment is manufactured by dividing the wafer level package structure into chips.

  In such a semiconductor device, the cavity 18 is formed in the insulating film 12, and the wall surface constituting the cavity 18 can be expanded / contracted, so that it is applied to the bonding surface between the SOI substrate 10 and the silicon substrate 40. The stress that is applied can be relaxed by the cavity 18 formed in the insulating film 12, and the deterioration of the accuracy of the characteristics of the semiconductor device can be suppressed. Furthermore, the stress caused by each through electrode 45 can be relaxed on the wall surface constituting the cavity 18.

  Further, in such a method for manufacturing a semiconductor device, the thermal stress applied when the SOI wafer 10 a is produced can be relaxed by the cavity 18 formed in the insulating film 12.

(10th Embodiment)
A tenth embodiment of the present invention will be described. The semiconductor device according to the present embodiment is different from the third embodiment in that each through-hole 43 is formed by a recess 47 that is formed by a hole that penetrates the front and back surfaces of the silicon substrate 40. Since it is the same as that of embodiment, description is abbreviate | omitted here.

  18 is a diagram showing a cross-sectional configuration of the semiconductor device of this embodiment, and FIG. 19 is a top surface layout diagram of the SOI substrate 10 shown in FIG. 19 corresponds to the JJ sectional view shown in FIG. 18, and FIG. 18 corresponds to the KK sectional view when the silicon substrate 40 is arranged on the SOI substrate 10 shown in FIG.

  As shown in FIGS. 18 and 19, in the semiconductor device of the present embodiment, four recesses 47 formed by holes penetrating the front and back surfaces of the silicon substrate 40 are formed in the silicon substrate 40.

  One of the recesses 47 is open to the movable electrode wiring portion 25 on the semiconductor layer 13 side. In addition, two of the recesses 47 are open to the wiring portions 31 of the fixing portions 30 on the semiconductor layer 13 side. Further, one of the recesses 47 is open to the peripheral part.

  On the semiconductor layer 13 side, pads 13 b, 27, and 34 are provided at predetermined positions in the peripheral portion, the movable electrode wiring portion 25 in the movable portion 20, and predetermined positions in each fixed portion 30, respectively. Each of these pads 13 b, 27, 34 is provided in the opening region of the recess 47 and is exposed in the recess 47. Each recess 47 is provided with a bonding wire 70 corresponding to the wiring of the present invention so that a space surrounded by the wall surface of the recess 47 remains. Specifically, the bonding wires 70 are bonded to the respective pads 13b, 27, and 34 through the openings of the recesses 47 that are not on the pads 13b, 27, and 34 sides. As a result, the pads 13b, 27, and 34 are electrically connected to the processing circuit via the bonding wire 70.

  In such a semiconductor device, the through electrode 45 is not disposed in each recess 47, and the recess 47 and the portion of the SOI substrate 10 that faces the recess 47 are not joined. it can. Therefore, each concave portion 47 and the portion of the SOI substrate 10 that faces each concave portion 47 can be expanded and contracted, and the same effect as in the third embodiment can be obtained.

  Furthermore, in such a semiconductor device, an acceleration signal (capacitance change) from the sensor unit 14 sealed by the silicon substrate 40 can be taken out of the semiconductor device without providing the through electrode 45. Therefore, when the through electrode 45 is not provided in this way, stress due to the difference between the linear expansion coefficient of the through electrode 45 and the linear expansion coefficient of the insulating film 44 does not occur, and thus warpage of the SOI substrate 10 occurs. The effect of being difficult can be obtained.

(Other embodiments)
In the first embodiment, the recess 17 is formed in the SOI substrate 10 so as to go around the outer sides of the movable electrode 24 and the fixed electrode 32. In the second and third embodiments, the outer side of the recess 41 is made a round. In the fourth embodiment, the recess 47 is formed outside the recess 41 and in a predetermined area. In the fifth to eighth embodiments, each through hole is formed. Although the example in which the concave portions 46 to 48 are formed so as to surround the respective 43 has been described, of course, the region in which the concave portions 17 and 46 to 48 are formed is not limited thereto. FIG. 20 is a schematic plan view of a surface bonded to the SOI substrate 10 in the silicon substrate 40 according to another embodiment. In FIG. 20, the insulating films 42 and 44 are omitted.

  For example, as shown in FIG. 20A, two recesses 46 can be formed in the silicon substrate 40. Specifically, the recess 46 described in the second embodiment and a trench that forms a new recess 46 so as to surround the outside of the through electrode 45 in the region outside the recess 46 are formed. You can also. According to such a semiconductor device, the stress caused by the through electrode 45 and transmitted to the side opposite to the sensor unit 14 can be relaxed more efficiently than in the second embodiment. That is, it is possible to suppress stress from being transmitted to the outer edge portion of the semiconductor device, and to suppress warping of the semiconductor device.

  In addition, as shown in FIG. 20B, the trenches constituting the recesses 46 can be arranged at the four corners of the silicon substrate 40 except for the region corresponding to the groove 15. In such a semiconductor device, since the recess 46 is formed in a region farther from the recess 41 than in the second to seventh embodiments, the airtightness of the cavity 50 can be improved.

  Furthermore, as shown in FIG. 20C, when the trench constituting the recess 46 is formed so as to surround the recess 41, the direction parallel to the short side direction (left and right direction on the paper surface) of the silicon substrate 40 is formed. The width of the recess 46 can also be increased. Semiconductor devices generally tend to warp when their long sides bend, but by suppressing the width of the recess 46 in the direction parallel to the short side direction of the semiconductor device, the long sides of the semiconductor device are prevented from bending. It becomes easy to do. Then, as shown in FIG. 20 (d), it is possible to form only the trench that forms the recess 46 in the direction parallel to the short side direction in the silicon substrate 40. Even in such a semiconductor device, it is easy to suppress bending of the long side of the semiconductor device. In FIG. 20, the example in which the trench constituting the recess 46 is formed in the silicon substrate 40 has been described. Of course, the recess 47 constituted by a hole penetrating the front and back surfaces may be formed in the silicon substrate 40. .

  In FIG. 20, the concave portion 46 provided in the silicon substrate 40 has been described. Of course, the concave portion 17 provided in the SOI substrate 10 can be appropriately changed in a similar manner. For example, two concave portions 17 are formed in the SOI substrate 10. can do. In this case, for example, the new concave portion 17 is configured so as to surround the concave portion 17 described in the first embodiment and the outer region of the concave portion 17 and the outer sides of the contact regions 13a, 26, and 33. A trench can be formed. Furthermore, the region of the recess 48 formed on the surface of the silicon substrate 40 described in the eighth embodiment on the side opposite to the surface bonded to the SOI substrate 10 can be changed as appropriate.

  In the first embodiment, the method of performing the etching with the mask 60 as shown in FIG. 4A placed on the SOI wafer 10a when the concave portion 17 is formed by etching has been described. The shape is not limited to this. FIG. 21 is a partial top view of an SOI wafer 10a provided with a mask 60 in another embodiment. As shown in FIG. 21, the SOI wafer 10a is provided with a mask 60 having a shape in which a portion overlapping with a portion corresponding to the groove formation scheduled region is not opened among portions corresponding to the recess formation planned region. . That is, in this mask 60, compared with the mask 60 shown in FIG. 4A, a portion of the SOI wafer 10a where the recess 17 is formed overlaps with a portion where the groove 15 is formed. The difference is that the etching is not performed.

  Therefore, when the SOI wafer 10a is etched in the step of FIG. 3C by performing the etching in a state where the mask 60 as shown in FIG. 21 is disposed on the SOI wafer 10a in the step of FIG. 3B. The etching region can be eliminated twice. That is, the region etched twice in the SOI wafer 10a reaches the oxide film 12 by etching in a shorter time than the region etched only when the groove 15 is formed. Then, if etching is performed with the oxide film 12 exposed, side etching proceeds. For example, the wiring portions for the movable electrode 25 and the wiring portions 31 of the fixed portions 30 may be partially thinned. . However, when the mask 60 as shown in FIG. 21 is arranged on the SOI wafer 10 to form the sensor unit 14 and the recess 17, there is no region etched twice, so the movable electrode wiring unit 25 or Each fixing part 30 can be prevented from becoming partially thin. In FIG. 4B, the same effect as in FIG. 21 can be obtained even if the removal width of the mask 60 in the twice-etched region (dotted line region) is narrowed.

  In each of the above embodiments, the sensor unit 14 is configured to be able to detect acceleration based on a change in capacitance between the movable electrode 24 and the fixed electrode 32. 14 is not limited to this. For example, the sensor unit 14 can be formed so that the angular velocity can be detected based on a change in capacitance between the movable electrode 24 and the fixed electrode 32.

  Furthermore, a sensor unit 14 that includes a diaphragm that is formed on one surface of the SOI substrate 10 and that can be deformed by the pressure of the measurement medium and a gauge resistance that is formed on the diaphragm can be formed on the SOI substrate 10. In such a semiconductor device, a recess 41 is formed in the silicon substrate 40 at a portion corresponding to the gauge resistance. For example, when the semiconductor device of the first embodiment is configured using such a sensor unit 14, the SOI substrate 10 can be provided with the recess 17 so as to make a round around the region outside the gauge resistance. .

  Further, in each of the above embodiments, the SOI wafer 10a and the insulating film 42 provided on the silicon wafer 40a are bonded by irradiation with an inert ion beam or plasma. Of course, the SOI wafer 10a and the silicon wafer 40a are bonded to each other. However, the joining method is not limited to this. For example, a low melting point glass may be disposed between the SOI wafer 10a and the silicon wafer 40a, and the SOI wafer 10a and the silicon wafer 40a may be bonded via the low melting point glass. In this case, since the low melting point glass has an insulating property, the insulating film 42 does not have to be disposed on the bonding surface of the silicon wafer 40a with the SOI wafer 10a. In addition, the insulating film 42 provided on the SOI wafer 10a and the silicon wafer 40a is hydrophilized and bonded by hydrogen bonding, and heat treatment is performed to form an Si—O—Si bond, whereby the SOI wafer 10a and the silicon wafer 40a are bonded. Can also be joined.

  Moreover, in each said embodiment, although the silicon substrate 40 was mentioned as an example and demonstrated as a cap member, of course, it is not limited to this, For example, glass can also be used as a cap member. When glass is used as the cap member, for example, the glass and the SOI wafer 10a can be bonded by anodic bonding. Similarly, in the first to eighth and tenth embodiments, the SOI substrate 10 is described as an example of the semiconductor substrate. However, for example, a silicon substrate can be used as the semiconductor substrate.

  Further, in the first to ninth embodiments, in order to perform electrical connection between the contact area 13a provided in the peripheral part and the contact areas 26 and 33 provided in the sensor part 14 and the processing circuit, Although the example which embeds the penetration electrode 45 comprised by metals, such as Al and Cu, in the through-hole 43 was demonstrated, for example, CVD (Chemical Vapor Deposition) method etc. are carried out to the wall surface of each through-hole 43 by Al, Cu, etc. It is also possible to provide wiring configured as described above. In such a semiconductor device, portions of the through holes 43 and the SOI substrate 10 facing the through holes 43 can be expanded and contracted, and the movable electrode 24 of the sensor unit 14 can be expanded and contracted by the through holes 43 and the portions. In addition, the stress applied to the fixed electrode 32 can be suppressed, and the generation of stress due to the through electrodes 45 arranged in the through holes 43 can be suppressed. In this case, the wiring corresponds to the through electrode 45 of the present invention.

  Similarly, even when the pads 13b, 27, and 33 are arranged on the peripheral portion and the sensor portion 14 as in the tenth embodiment, a CVD method or the like is used on the wall surface of the through hole 43 instead of the bonding wire 70. The wiring comprised by these can also be provided.

  In the first to ninth embodiments, the through electrode 45 is disposed on the silicon wafer 40a after the SOI wafer 10a and the silicon wafer 40a are bonded. However, after the through electrode 45 is disposed on the silicon wafer 40a, The SOI wafer 10a and the silicon wafer 40a can also be bonded.

  In the first embodiment, the manufacturing process of the semiconductor device in which the recess portion 17 and the sensor portion 14 are formed in the SOI wafer 10a and then the recess portion 41 and the through hole 43 are formed in the silicon wafer 40a has been described. It can also be set as the manufacturing process of the semiconductor device which forms the recessed part 17 and the sensor part 14 in the SOI wafer 10a after forming the hollow part 41 and the through-hole 43 in the wafer 40a. Similarly, also in the second to tenth embodiments, the order of the manufacturing steps for the SOI wafer 10a and the silicon wafer 40a performed before the SOI wafer 10a and the silicon wafer 40a are bonded can be appropriately changed.

  Further, in the first, second, fifth, and eighth embodiments, the example in which the trenches are formed in the SOI wafer 10a or the silicon wafer 40a to form the recesses 17, 46, and 48 has been described. A LOCOS oxide film is formed in a region where a recess is to be formed in 10a or silicon wafer 40a, and the surface of SOI wafer 10a or silicon wafer 40a is recessed. , 46, 48 can be formed. Moreover, the recessed part 17 can also be formed by ion-implanting etc. into a recessed part formation scheduled area | region among SOI wafer 10a or the silicon wafer 40a, and roughening the surface.

  Moreover, although the said 5th-8th embodiment demonstrated the example in which each through-hole 43 and each recessed part 46-48 comprised the concentric figure, of course, each through-hole 43 and each recessed part 46-48 exist. It is also possible not to construct concentric figures.

  In addition, a semiconductor device can be configured by combining the above embodiments, and the combination can be changed as appropriate. For example, the semiconductor device in which the recess 17 is formed in the SOI substrate 10 and the trench constituting the recess 46 is formed in the silicon substrate 40 by combining the second or fifth embodiment with the first embodiment. It can also be. Further, by combining the first embodiment with the third, fourth, sixth, or seventh embodiment, a recess 17 is formed in the SOI substrate 10 and a hole constituting the recess 47 is formed in the silicon substrate 40. A formed semiconductor device can also be used. When these semiconductor devices are configured, the recesses 17 formed in the SOI substrate 10 and the recesses 46 and 47 formed in the silicon substrate 40 are provided so as not to face each other, so that the SOI substrate 10 and the silicon substrate 40 are provided. The stress applied to the joint surface and the stress caused by the through electrode 45 can be further relaxed. Further, the eighth embodiment is combined with the first embodiment to form a semiconductor device in which a recess 48 is formed in the SOI substrate 10 and a trench constituting the recess 48 is formed in the silicon substrate 40. You can also.

  Further, by combining the second or third embodiment with the third or fourth embodiment, the silicon substrate 40 has a recess 46 constituted by a trench and a recess 47 constituted by a hole penetrating the front and back surfaces of the silicon substrate 40. A formed semiconductor device can also be used. In this case, the SOI substrate 10 and the silicon substrate 10 are formed by forming a recess 46 formed by a trench and a recess 47 formed by a hole penetrating the front and back surfaces of the silicon substrate 40 in different regions of the silicon substrate 40, respectively. The stress applied to the bonding surface with the substrate 40 can be further relaxed. Of course, the fifth to eighth embodiments may be combined with the second embodiment to form a semiconductor device in which the recesses 46 to 48 are formed so as to surround the respective through holes 43.

  In addition, the fifth or eighth embodiment may be combined with the third or fourth embodiment to form a semiconductor device in which recesses 46 to 48 are formed so as to surround each through hole 43.

  Furthermore, the ninth embodiment may be combined with the first to eighth embodiments to form a semiconductor device in which the cavity 18 is formed in the insulating film 12 of the SOI substrate 10.

DESCRIPTION OF SYMBOLS 10 SOI substrate 14 Sensor part 15 Groove 17 Recessed part 20 Movable part 24 Movable electrode 30 Fixed part 32 Fixed electrode 40 Silicon substrate 41 Recessed part 42 Insulating film 43 Through hole 45 Through electrode

Claims (23)

A semiconductor substrate (10);
A movable part (20) having a movable electrode (24) that can be displaced in accordance with application of a physical quantity; and a fixed part (30) having a fixed electrode (32) arranged to face the movable electrode (24). A sensor part (14) formed by a groove (15) formed in the semiconductor substrate (10),
A portion corresponding to the movable electrode (24) and the fixed electrode (32) in the sensor portion (14) is provided with a recess portion (41), and the semiconductor substrate (10) is provided in a region outside the recess portion (41). ) And a cap member (40) to be joined;
The recessed portion (41) is formed between the semiconductor substrate (10) and the cap member (40), and the movable electrode (24) and the fixed electrode (32) are arranged in the sensor portion (14). A semiconductor device having a cavity (50),
A recess (17) formed in a region different from the groove (15) formed in the semiconductor substrate (10) in the region bonded to the cap member (40) in the semiconductor substrate (10). Alternatively, a region of the cap member (40) that is bonded to the semiconductor substrate (10) and that is different from the region corresponding to the groove (15) formed in the semiconductor substrate (10). At least one of the recesses (46, 47) formed and the recesses (48) formed in a region of the cap member (40) opposite to the region bonded to the semiconductor substrate (10). A semiconductor device comprising one of the recesses (17, 46 to 48). A semiconductor substrate (10);
A sensor part (14) comprising a diaphragm formed on one surface of the semiconductor substrate (10) and deformable by the pressure of a measurement medium, and a gauge resistance formed on the diaphragm;
A cap member (40) that includes a recess (41) in a portion corresponding to the gauge resistance in the sensor unit (14) and is joined to the semiconductor substrate (10) in a region outside the recess (41). When,
A cavity (50) formed between the semiconductor substrate (10) and the cap member (40) by the recess (41) and in which the gauge resistance is arranged in the sensor part (14). A semiconductor device,
A recess (17) formed in a region bonded to the cap member (40) in the semiconductor substrate (10), or a region bonded to the semiconductor substrate (10) in the cap member (40). Or at least one of the recesses (48) formed in a region of the cap member (40) opposite to the region bonded to the semiconductor substrate (10). (17, 46-48) The semiconductor device characterized by the above-mentioned.   The recess (17) formed in the semiconductor substrate (10) is formed so as to go around the outside of the movable electrode (24) and the fixed electrode (32) in the semiconductor substrate (10). The semiconductor device according to claim 1.   The semiconductor according to claim 2, wherein the recess (17) formed in the semiconductor substrate (10) is formed so as to go around the outside of the gauge resistance in the semiconductor substrate (10). apparatus.   Of the cap member (40), the recesses (46, 47) formed in the region to be joined to the semiconductor substrate (10) go around the outside of the recess (41) of the cap member (40). 5. The semiconductor device according to claim 1, wherein the semiconductor device is formed as described above.   The cap member (40) is formed with a plurality of through holes (43) penetrating the front and back surfaces of the cap member (40), and each of the through holes (43) has the sensor portion (14), or A through electrode (45) that is electrically connected to the semiconductor substrate (10) is disposed, and the recesses (46 to 48) formed in the cap member (40) pass through the through holes (43), respectively. 6. The semiconductor device according to claim 1, wherein the semiconductor device is formed to surround the semiconductor device.   The recesses (46 to 48) are formed so as to form concentric figures with the through holes (43) so that the distance from the wall surface to the wall surface of the through hole (43) is uniform. The semiconductor device according to claim 6.   The recess (47) formed in a region of the cap member (40) to be joined to the semiconductor substrate (10) is formed by a hole penetrating the front and back surfaces of the cap member (40). 8. The semiconductor device according to claim 1, wherein the semiconductor device is characterized in that:   The cap member (40) is formed with a plurality of the recesses (47) formed by holes penetrating the front and back surfaces of the cap member (40), and the recess (47) includes the sensor unit (14), Alternatively, a wiring (70) electrically connected to the semiconductor substrate (10) is provided, and the wiring (70) is provided so that a space surrounded by the wall surface of the recess (47) remains. The semiconductor device according to claim 1, wherein the semiconductor device is a semiconductor device. The recess (47) formed in a region of the cap member (40) to be joined to the semiconductor substrate (10) is formed by a hole penetrating the cap member (40).
6. The semiconductor device according to claim 1, wherein the recess (47) is formed only in a region different from the groove (15). The semiconductor substrate (10) includes a support substrate (11), an insulating film (12) disposed on a surface of the support substrate (11), and the support substrate (11) sandwiching the insulating film (12). An SOI substrate having a semiconductor layer (13) disposed on the opposite side,
Of the semiconductor substrate (10), the semiconductor layer (13) is bonded to the cap member (40), and the semiconductor layer (13) in the insulating film (12) is bonded to the cap member (40). 11. The semiconductor device according to claim 1, wherein a cavity (18) is formed in a region corresponding to the region. A support substrate (11), an insulating film (12) disposed on the surface of the support substrate (11), and a semiconductor layer disposed on the opposite side of the support substrate (11) across the insulating film (12) (13) an SOI substrate (10) having:
A sensor part (14) formed on the SOI substrate (10), including a part that changes in accordance with a change in physical quantity;
The sensor unit (14) includes a recess (41) in a portion that opposes the portion that changes according to the change in the physical quantity, and is bonded to the SOI substrate (10) in a region outside the recess (41). A cap member (40) to be formed;
Cavity formed between the SOI substrate (10) and the cap member (40) by the depression (41), and a portion of the sensor unit (14) that changes according to the change in the physical quantity is disposed. (50), and a semiconductor device comprising:
Of the semiconductor SOI substrate (10), the semiconductor layer (13) is bonded to the cap member (40), and the semiconductor layer (13) in the insulating film (12) is bonded to the cap member (40). A semiconductor device, characterized in that a cavity (18) is formed in a region corresponding to the region. Preparing a semiconductor wafer (10a);
A movable part (20) having a movable electrode (24) that can be displaced according to the application of a physical quantity on the semiconductor wafer (10a), and a fixed electrode (32) arranged to face the movable electrode (24) Forming a sensor portion (14) formed by a groove (15) formed in the semiconductor wafer (10a),
Preparing a package member (40a) which forms a cap member (40) when bonded to the semiconductor wafer (10a) and divided into chips;
The package member (40a) has a recess (41) on the surface that is bonded to the semiconductor wafer (10a) and corresponding to the movable electrode (24) and the fixed electrode (32). Forming, and
A cavity (50) is formed between the semiconductor wafer (10a) and the package member (40a) by the recess (41), and the movable electrode (24) and the fixed part of the sensor unit (14) are formed. Joining the semiconductor wafer (10a) and the package member (40a) such that the electrode (32) is disposed in the cavity (50),
Of the semiconductor wafer (10a), a region bonded to the package member (40a) and different from the groove (15) formed in the semiconductor wafer (10a), or the package member (40a) ) In the region bonded to the semiconductor wafer (10a) and including a region different from the region corresponding to the groove (15) formed in the semiconductor wafer (10a), or the package member (40a) including a step of forming a recess (17, 46 to 48) in at least one of the regions opposite to the region bonded to the semiconductor wafer (10a). A method for manufacturing a semiconductor device. Preparing a semiconductor wafer (10a);
Forming on the semiconductor wafer (10a) a sensor part (14) having a diaphragm deformable by the pressure of a measurement medium and a gauge resistance formed on the diaphragm;
Preparing a package member (40a) which forms a cap member (40) when bonded to the semiconductor wafer (10a) and divided into chips;
Forming a recess (41) in a portion of the package member (40a) on the side bonded to the semiconductor wafer (10a) and corresponding to the gauge resistance;
A cavity (50) is formed between the semiconductor wafer (10a) and the package member (40a) by the recess (41), and the gauge resistance of the sensor part (14) is the cavity (50). A step of bonding the semiconductor wafer (10a) and the package member (40a) so as to be disposed in a semiconductor device,
A region bonded to the package member (40a) in the semiconductor wafer (10a), a region bonded to the semiconductor wafer (10a) in the package member (40a), or a region of the package member (40a) A method for manufacturing a semiconductor device comprising the step of forming a recess (17, 46 to 48) in at least one of the regions opposite to the region bonded to the semiconductor wafer (10a).   Before the step of bonding the semiconductor wafer (10a) and the package member (40a), the semiconductor wafer (10a) is made to go around the outside of the movable electrode (24) and the fixed electrode (32). The method of manufacturing a semiconductor device according to claim 13, wherein a step of forming the recess (17) is performed.   Before the step of bonding the semiconductor wafer (10a) and the package member (40a), a step of forming the concave portion (17) in the semiconductor wafer (10a) so as to go around the outside of the gauge resistor. The method of manufacturing a semiconductor device according to claim 14, wherein the method is performed.   Before the step of bonding the semiconductor wafer (10a) and the package member (40a), a region of the package member (40a) to be bonded to the semiconductor wafer (10a), the depression (41 The method of manufacturing a semiconductor device according to claim 13, wherein the step of forming the recess (46, 48) is performed so as to make a round around the outside of the semiconductor device.   After the step of bonding the semiconductor wafer (10a) and the package member (40a), a step of forming holes forming the recesses (47) through the front and back surfaces of the package member (40a) is performed. 18. The method for manufacturing a semiconductor device according to claim 13, wherein the method is a semiconductor device manufacturing method. Prior to the step of bonding the semiconductor wafer (10a) and the package member (40a), a region of the package member (40a) to be bonded to the semiconductor wafer (10a) and the bonding to the semiconductor wafer (10a). Performing a step of forming a plurality of frame-shaped concave portions (46, 48) in at least one of the regions opposite to the region to be formed;
After the step of bonding the semiconductor wafer (10a) and the package member (40a), a through-hole penetrating the front and back surfaces in the region surrounded by the recesses (46, 48) of the package member (40a) The semiconductor device according to claim 13, wherein a step of forming (43) and a step of disposing a through electrode (45) in each of the through holes (43) are performed. Manufacturing method.   After the step of bonding the semiconductor wafer (10a) and the package member (40a), a step of forming a plurality of through holes (43) penetrating the front and back surfaces of the package member (40a); 43) A step of forming the frame-shaped recesses (47, 48) so as to surround each of the steps and a step of disposing a through electrode (45) in each of the through holes (43) are performed. Item 19. A method for manufacturing a semiconductor device according to any one of Items 13 to 18.   After the step of bonding the semiconductor wafer (10a) and the package member (40a), a step of forming holes that penetrate the front and back surfaces of the package member (40a) to form the plurality of recesses (47); The wiring (70) electrically connected to the sensor part (14) or the semiconductor wafer (10a) so that a space surrounded by the wall surface of the concave part (47) remains in the concave part (47). The method of manufacturing a semiconductor device according to claim 13, wherein a step of arranging the semiconductor device is performed.   In the step of preparing the semiconductor wafer (10a), a support substrate (11) is prepared, an insulating film (12) is disposed on the surface of the support substrate (11), and the semiconductor of the insulating film (12) is arranged. After the cavity (18) is formed in a region corresponding to a region to be bonded where the wafer (10a) is bonded to the package member (40a), the insulating film (12) is formed so that the cavity (18) remains. 22. An SOI wafer configured by arranging a semiconductor layer (13) on the opposite side of the support substrate (11) across the substrate is provided, wherein the semiconductor device according to any one of claims 13 to 21 is prepared. Production method. A support substrate (11), an insulating film (12) disposed on the surface of the support substrate (11), and a semiconductor layer disposed on the opposite side of the support substrate (11) across the insulating film (12) (13) and preparing an SOI wafer (10a) having:
Forming a sensor unit (14) having a portion that changes in accordance with a change in physical quantity on the SOI wafer (10a);
Preparing a package member (40a) which forms a cap member (40) when bonded to the SOI wafer (10a) and divided into chips;
Forming a recess (41) in a portion of the package member (40a) that is to be bonded to the SOI wafer (10a) and corresponding to a portion that changes in accordance with the change in the physical quantity; When,
A cavity (50) is formed between the SOI wafer (10a) and the package member (40a) by the depression (41) and changes according to a change in the physical quantity of the sensor unit (14). Bonding the SOI wafer (10a) and the package member (40a) such that a portion is disposed in the cavity (50),
In the step of preparing the SOI wafer (10a), a support substrate (11) is prepared, an insulating film (12) is disposed on the surface of the support substrate (11), and the SOI of the insulating film (12) is provided. After the cavity (18) is formed in a region corresponding to a region to be bonded where the wafer (10a) is bonded to the package member (40a), the insulating film (12) is formed so that the cavity (18) remains. A method of manufacturing a semiconductor device, comprising preparing an SOI wafer (10a) configured by disposing a semiconductor layer (13) on a side opposite to a support substrate (11).

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