JP2010114465A - Method of manufacturing nitride semiconductor chip and nitride semiconductor chip - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of obtaining nitride semiconductor chips having excellent light emitting characteristics without deterioration of crystallinity while preventing occurrence of cracking or chipping in a cut surface or an interface when a nitride semiconductor wafer including a nitride semiconductor as a substrate and a light emitting active layer is cut into chips, the cut chips having a predetermined shape and size with good yield. <P>SOLUTION: The method of manufacturing nitride semiconductor chips includes: a step of forming first wide split grooves in a desired chip shape on a chlorine-doped nitride semiconductor substrate of a wafer formed by stacking a multi-layer nitride semiconductor layer having a p-type layer, an n-type layer and an active layer interposed therebetween on the substrate; a step of forming second narrow split grooves or chipping grooves in a desired chip shape on a crystal growth side, which is the other side of the wafer, at positions facing the positions of the first split grooves; and a step of cutting a region constituted with nitride semiconductor crystals into chips from the first split grooves. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

The present invention relates to a process for the preparation of the general formula _{In x Al y Ga z N (} 0 ≦ x ≦ 1,0 ≦ y ≦ 1, x + y + z = 1) The nitride semiconductor light-emitting device or an electronic device element, denoted by, in particular Provided are a method for dividing a nitride semiconductor device manufactured on a nitride semiconductor substrate into a desired size with a high yield without impairing the crystallinity, and a nitride semiconductor chip.

  Conventionally, nitride semiconductors have been used or studied as light emitting devices and high power devices. For example, in the case of a light emitting device, it can be technically used as a light emitting device having a wide range from blue to orange by adjusting the composition of the light emitting device. In recent years, blue light emitting diodes and green light emitting diodes have been put to practical use by utilizing the characteristics, and blue-violet semiconductor lasers have been developed as nitride semiconductor laser elements. Such nitride semiconductor light-emitting elements or nitride semiconductor electronic device elements are mainly produced on a sapphire substrate. In recent years, nitride semiconductor laser elements and the like tend to be manufactured on a nitride semiconductor substrate from the viewpoint of oscillation lifetime.

  However, a structure for growing a nitride semiconductor light emitting device on a nitride semiconductor substrate has just started in recent years, and it is an issue for industry how to divide the nitride semiconductor device grown on the nitride semiconductor substrate into chips. Met. This is because the nitride semiconductor substrate is very hard and is very difficult to break except in the cleavage direction. Even if it is cracked, cracks and chipping are likely to occur on the cut surface, and the chip cannot be divided cleanly.

  In Patent Document 1, when a nitride semiconductor layer including an active layer is stacked on a nitride semiconductor substrate, the cleavage planes of the nitride semiconductor layer and the nitride semiconductor substrate can be made to coincide with each other. It is introduced that it can be easily cut by the M plane {11-00}.

Japanese Patent Laid-Open No. 11-4048

  Here, there are three types of M planes, which are cleavage planes of the nitride semiconductor, and there are also three types of cleavage directions (<11-20> directions) for obtaining the cleavage plane. .

  However, when the chip is divided along the <1-100> direction, which is not the cleavage direction, by a normal method, the direction is shifted by 30 degrees depending on how the blades of the scriber or dicer are pressed (<11-20> direction). Often cracked. In addition, even if the chip is divided along the <11-20> direction of the cleavage direction by a normal method, the direction shifted by 60 degrees different from the intended direction depending on how the scriber or dicer is subjected to the contact stress of the blade. I was sometimes cleaved.

  The cleavage property in the <11-20> direction is a very effective direction for dividing the chip, but there are three types of cleavage directions in the C plane, and the cleavage directions are not orthogonal to each other at 90 degrees. For this reason, the shape of the chip division depends on the way (direction) of applying the contact stress of the blade during the chip division. For this reason, the nitride semiconductor element grown on the nitride semiconductor substrate cannot be simply divided into a desired chip shape with a high yield by an ordinary chip dividing method.

  The present invention divides a wafer in which a nitride semiconductor layer having a multilayer structure having an active layer sandwiched between a p-type layer and an n-type layer on a chlorine-doped nitride semiconductor substrate is divided into nitride semiconductor chips. A method of manufacturing a nitride semiconductor chip, the step of forming a wide first dividing groove in a desired chip shape on the substrate side constituting one surface of the wafer, and the other surface of the wafer Forming a narrow second groove or chip groove in a desired chip shape at a position on the crystal growth side that is opposite to the position where the first groove is formed, and a nitride semiconductor crystal And the step of dividing the chip from the first dividing groove.

  By comprising the above steps, the growth film and the substrate are the same type of nitride semiconductor, so that they have the same cleavage characteristics, and the first dividing groove is wider than the second dividing groove, In addition, by dividing the first split groove into the first and second split grooves so that the crack line cracked by the second split groove can be broken at the shortest cutting distance, the second split groove from the bottom of the second split groove. It only reaches somewhere in the bottom of the first split groove below the bottom of the split groove, and it can be prevented from being cleaved in an unintended direction and cut into a desired chip shape.

  The reason why the second split groove having a narrow groove width is formed on the surface on the crystal growth side is that light is emitted from the surface on the crystal growth side, so that the light emission area is increased. The reason for the difference between the first split groove width and the second split groove width is that, as described above, the crack line cracked from the second split groove with the narrow split groove width is the first split groove with the wide split groove width. Even when the cracked line is removed from the position immediately below the second split groove and cracked in the diagonal direction, the first split groove width is wide, so the cracked cracked line becomes the first split groove. You can reach the bottom. In this way, the chip-shaped defect rate can be reduced.

  The present invention divides a wafer in which a nitride semiconductor layer having a multilayer structure having an active layer sandwiched between a p-type layer and an n-type layer on a chlorine-doped nitride semiconductor substrate is divided into nitride semiconductor chips. A method of forming a wide first dividing groove in a desired chip shape on a substrate side constituting one surface of the wafer, and a narrow width in the first dividing groove. Forming the third split groove or chipped groove in a desired chip shape, and using the first split groove and the third split groove or chipped groove as the region formed of the nitride semiconductor crystal And the step of dividing the chip.

  By including the above steps, the growth film and the substrate are the same type of nitride semiconductor, so that they have the same cleavage characteristics, and the third dividing groove is substantially along the center line of the bottom of the first dividing groove. By forming the first split groove and cutting the first split groove and the third split groove, the crack line cracked by the third split groove is selectively at the portion where the first split groove is locally thinned. Therefore, it can be prevented from being cleaved in an unintended direction and cut into a desired chip shape. The reason why the split grooves are formed on the substrate side is to increase the light emitting area on the crystal growth side.

  The present invention relates to a wafer in which a nitride semiconductor layer having a multilayer structure having an active layer sandwiched between a p-type layer and an n-type layer is stacked on a chlorine-doped nitride semiconductor substrate. Forming a first dividing groove in a desired chip shape in a linear shape on the substrate side constituting the surface, and forming the first dividing groove on the crystal growth side constituting the other surface of the wafer A step of forming a second split groove at a position opposite to the position and making the second split groove width narrower than the first split groove width, and a position matching the line of the first split groove And a step of newly forming a third split groove in the bottom of the first split groove and making the third split groove width narrower than the first split groove width, and the second split groove. And dividing the wafer into chips along the third dividing groove It may also be provided.

  By including the above steps, the growth film and the substrate are the same type of nitride semiconductor, so that they have the same cleavage characteristics, and the third dividing groove is substantially along the center line of the bottom of the first dividing groove. By forming the first split groove and cutting the first split groove and the third split groove, the crack line cracked by the third split groove is selectively at the portion where the first split groove is locally thinned. Therefore, it can be prevented from being cleaved in an unintended direction and cut into a desired chip shape. The reason why the split grooves are formed on the substrate side is to increase the light emitting area on the crystal growth side.

  The present invention is characterized in that a nitride semiconductor substrate containing at least chlorine is used in the process. Thus, the substrate can be divided more easily than a nitride semiconductor substrate that is not doped with chlorine at all.

  Since nitride semiconductor substrates doped with chlorine are easier to divide than those containing no chlorine, the cutting distance can be divided from 200 μm or less.

In the present invention, at least in a nitride semiconductor substrate doped with chlorine, the chlorine concentration is preferably 1 × 10 ¹⁴ / cm ³ or more. This facilitates chip division.

  The present invention preferably includes a step of forming a formation position of the second split groove bottom portion deeper than an active layer position of the wafer. Thus, the chip can be divided without damaging the active layer that emits light.

  The present invention includes the step of forming the second split groove bottom at the interface between the nitride semiconductor layer and the nitride semiconductor substrate of the wafer, or the step of forming the second split groove bottom deeper than the interface. It is preferable to comprise.

  As a result, when the chip is divided, the chip can be divided without damaging the active layer that emits light, and the bottom of the second dividing groove reaches the nitride semiconductor substrate doped with chlorine. Therefore, the chip division is a division of the nitride semiconductor substrate itself doped with chlorine, and can be divided more easily than a nitride semiconductor substrate that is not doped with chlorine at all.

  In the present invention, the groove forming directions of the first split groove, the second split groove, and the third split groove are a <11-20> direction, a <1-100> direction, < It is preferably any one of a direction of 57.6 ° from the <0001> direction, <0-111> direction, and <01-10> direction. This facilitates the formation of the split groove.

  In the present invention, the end face when divided by the chip division is {1-100} plane, {11-20} plane, {0001} plane, {0-111} plane, {01- 12} plane. In particular, the mirror end face in the case of producing a nitride semiconductor laser diode is preferably a {1-100} plane.

  In the present invention, when the desired chip shape of the nitride semiconductor light-emitting diode is a rectangle, and the long side of the rectangle is L and the short side is S, the combination of directions of the long side L and the short side S is With respect to the nitride semiconductor crystal, the S = <1-100> direction in the L = <11-20> direction, the S = <2-1-10> direction in the L = <0001> direction, and the L = <0-111> direction. And S = <2-1-10> direction, L = <0001> direction, and S = <01-10> direction.

  By providing the above combination, it is possible to form a large number of grooves with the long side as the direction in which chip division is easy, and conversely, form a small number of grooves as the short side in the direction where chip division is difficult. As a result, shape defects caused by chip division can be suppressed.

  In the present invention, when the desired chip shape of the nitride semiconductor light emitting diode is a rectangle, and the long side of the rectangle is L and the short side is S, the ratio of the long side to the short side (L / S) is It may be 1.01 or more and 4 or less. Accordingly, a force can be efficiently applied to the dividing groove from the lever principle, and the chip can be divided easily. In particular, it is possible to efficiently apply a force to the dividing groove on the short side where it is difficult to divide the chip according to the above-described principle, thereby facilitating the chip division.

  The present invention relates to a manufacturing method for dividing a wafer in which a nitride semiconductor layer having a multilayer structure having an active layer sandwiched between a p-type layer and an n-type layer on a substrate is divided into nitride semiconductor chips or forming a mirror end face The substrate is an M-plane ({1-100}) nitride semiconductor substrate doped with chlorine, and the shape of the nitride semiconductor chip to be divided is rectangular, and the long side of the rectangle is L, short When the side is S, the ratio of the long side to the short side (L / S) is 1.01 or more and 4 or less, and the direction of the long side L is the <0001> direction of the nitride semiconductor. A step of forming a wide first split groove on the wafer so that the direction of the side S is the <2-1-10> direction of the nitride semiconductor; and a narrow second split groove or chip in the wafer A step of forming a groove, and a wide first split groove or a second narrow split. Characterized in that it consists of a step of the rectangular area composed of a nitride semiconductor crystal was divided into chips by using the groove or chipping grooves.

  In the present invention, a nitride semiconductor layer having a multilayer structure having an active layer sandwiched between a p-type layer and an n-type layer is stacked on an M-plane ({1-100}) nitride semiconductor substrate doped with chlorine. M-plane nitride semiconductor chip formed by dividing the wafer into chips, which has a rectangular shape, and the direction of the short side S of the rectangle is the <2-1-10> direction of the nitride semiconductor The direction of the long side L of the rectangle is the <0001> direction of the nitride semiconductor, and the ratio of the long side L to the short side S is 1.01 or more and 4 or less.

  In the present invention, the nitride semiconductor substrate may be a GaN substrate.

  When a nitride semiconductor wafer including an active layer that emits light using a nitride semiconductor as a substrate is divided into chips, the generation of cracks and chipping at the cut surface and interface is prevented, and the crystallinity of the nitride semiconductor is impaired. In addition, a nitride semiconductor chip having excellent light emitting performance can be obtained, and can be cut into a desired shape and size with a high yield.

(A) It is a figure of the division groove formation for the chip | tip division | segmentation shown in Embodiment 1. FIG. (B) It is a figure of the 1st split groove formation (board | substrate side) shown in Embodiment 1. FIG. (C) It is an example of formation of the notch groove shown in Embodiment 1. FIG. (D) It is an example of formation of the notch groove shown in Embodiment 1. FIG. FIG. 10 is a diagram of forming a dividing groove for chip division shown in the second embodiment. FIG. 10 is a diagram of forming a dividing groove for dividing a chip shown in the third embodiment. FIG. 10 is a diagram of forming a dividing groove for chip division shown in the fourth embodiment. FIG. 10 is a diagram of forming a dividing groove for chip division shown in the fifth embodiment. (A) It is a block diagram of the nitride semiconductor light-emitting diode shown in Reference Embodiment 6. (B) It is a figure of the division groove formation for the chip | tip division | segmentation shown in Reference Embodiment 6. FIG. (C) The nitride semiconductor light-emitting diode chip shown in Reference Embodiment 6. (A) It is a figure of the division groove formation for the chip | tip division | segmentation shown in Reference Embodiment 7. FIG. (B) The nitride semiconductor light-emitting diode chip shown in Reference Embodiment 7. (A) This is a method for manufacturing the n-type GaN substrate shown in the tenth embodiment. (B) It is a block diagram of the nitride semiconductor laser shown in Embodiment 10. FIG. (C) It is {1-100} sectional drawing of the nitride semiconductor laser chip shown in Embodiment 10. FIG. (D) It is {11-20} sectional drawing of the nitride semiconductor laser chip shown in Embodiment 10. FIG. (A) It is a surface view of a wafer of the nitride semiconductor laser shown in the tenth embodiment. (B) It is a reverse view of the wafer of the nitride semiconductor laser shown in Embodiment 10.

  In general, as a method for crystal growth of a nitride semiconductor, metal organic vapor phase epitaxy (hereinafter referred to as MOCVD), molecular beam epitaxy (hereinafter referred to as MBE), hydride vapor phase epitaxy (hereinafter referred to as HVPE). This is usually done and any crystal growth method may be used.

Hereinafter, an example of a nitride semiconductor light emitting diode and a nitride semiconductor laser diode manufactured using a GaN substrate as a substrate and using the MOCVD method as a growth method will be described. The substrate may be any substrate made of a nitride semiconductor, and may be an Al _x Ga _y In _z N (x + y + z = 1) substrate. In addition, about 10% or less (but hexagonal) of nitrogen elements in the Al _x Ga _y In _z N (x + y + z = 1) substrate is substituted with other elements of P, As, and Sb. May be. In particular, in the case of a nitride semiconductor laser, a layer having a lower refractive index than the cladding layer needs to be in contact with the outside of the cladding layer in order to make the vertical transverse mode unimodal, and it is best to use an AlGaN substrate. It is. In the following examples, a nitride semiconductor C-plane {0001} substrate is described, but a nitride semiconductor A-plane {11-20} substrate, a nitride semiconductor R-plane {1-102} substrate. Alternatively, a nitride semiconductor M-plane {1-100} substrate may be used. However, it was the C-plane substrate that showed the most effective chip division according to the present invention. In addition, even if the substrate is not a perfect C-plane substrate, the same effect can be obtained if the substrate has an off angle of 2 degrees or less from the C-plane. The off angle was the same for the A-plane substrate, R-plane substrate, and M-plane substrate.

(Embodiment 1)
In the first embodiment, a method for manufacturing a nitride semiconductor light-emitting diode element and chip division will be described.

FIG. 1A shows a C-plane (0001) n-type GaN substrate 100, an n-type GaN buffer layer 101, an n-type Al _x1 Ga _1-x1 N clad layer 102, an active layer 103, a p-type Al _x2 Ga _1-x2. The N clad layer 104, the p-type GaN contact layer 105, the n-type electrode 106, the p-type electrode 107, the first split groove 108, and the second split groove 109 are configured.

A method for manufacturing the nitride semiconductor light emitting diode of FIG. 1A will be described below.
First, a thick GaN layer is stacked on a seed substrate (for example, a sapphire substrate) by the HVPE method, and then the sapphire substrate is peeled off by polishing to obtain a C-plane (0001) n-type having a thickness of 400 μm and a size of 2 inches φ. A GaN substrate 100 was produced. The n-type polarity of the n-type GaN substrate was obtained by doping Si, and the concentration of Si was 2 × 10 ¹⁸ / cm ³ . Further, the n-type GaN substrate is doped with about 1 × 10 ¹⁴ / cm ³ of chlorine.

  Next, the n-type GaN substrate 100 was set in an MOCVD apparatus, and an n-type GaN buffer layer 101 was formed to 1 μm at a growth temperature of 1050 ° C. This n-type GaN buffer layer is a layer provided for the purpose of alleviating the surface distortion of the n-type GaN substrate and improving the surface morphology and surface irregularities (flattening) that occurred when the n-type GaN substrate was peeled off from the seed substrate. Yes, it does not matter. However, when the GaN substrate is doped with chlorine, the surface morphology tends to deteriorate, so it is preferable to provide a GaN buffer layer as in this embodiment.

After forming the n-type GaN buffer layer 101, an n-type Al _x1 Ga _1-x1 N clad layer 102 having a thickness of 2 μm was formed. In this embodiment mode, X1 = 0. Next, the temperature of the substrate is lowered to about 700 ° C. to 800 ° C., and an active layer composed of three periods of an In _0.35 Ga _0.65 N well layer having a thickness of 4 nm and an In _0.02 Ga _0.98 N barrier layer having a thickness of 6 nm ( (Multiple quantum well layer) 103 is grown. At that time, SiH ₄ may be supplied or may not be supplied. The barrier layer may be made of GaN.

Next, the substrate temperature is raised again to 1050 ° C., and a p-type Al _x2 Ga _1-x2 N clad layer 104 having a thickness of 20 nm is grown. In this embodiment mode, X2 = 0.2. Thereafter, a p-type GaN contact layer 105 having a thickness of 0.2 μm was grown.

The active layer 103 according to the present embodiment has a multi-quantum well structure having three periods. However, other periodic structures or a single quantum well structure having only a well layer may be used. The active layer only needs to be composed of In _y Ga _1-y N, and the In composition may be changed according to a desired emission wavelength.

  When the active layer is a single quantum well and the emission wavelength is 370 nm or less, the well layer is preferably made of GaN, and must be doped with at least a polar impurity. When the active layer is composed of multiple quantum wells and the emission wavelength is 370 nm or less, the well layer is composed of GaN, the barrier layer must be a nitride semiconductor containing at least Al, and at least the well layer Alternatively, any of the barrier layers must be doped with polar impurities. Further, the n-type clad layer 102 and the p-type clad layer 104 may or may not be made of a nitride semiconductor containing Al. This is because carriers are sufficiently confined by the nitride semiconductor barrier layer containing Al having a multiple quantum well structure.

  The impurity of the well layer or the barrier layer in the active layer is preferably any of Si, Ge, O, C, Zn, Be, and Mg.

  The p-type impurity concentration of the p-type GaN contact layer 105 is preferably increased toward the position where the p-type electrode 107 is formed. This reduces the contact resistance due to p-type electrode formation. Further, in order to remove residual hydrogen in the p layer that hinders activation of Mg, which is a p-type impurity, a trace amount of oxygen may be mixed during the growth of the p-type layer.

After growing the p-type GaN contact layer 105 in this way, the inside of the reactor of the MOCVD apparatus was changed to all nitrogen carrier gas and NH ₃ and the temperature was lowered at 60 ° C./min. When the substrate temperature reached 850 ° C., the supply amount of NH ₃ was stopped, the substrate temperature was waited for 5 minutes, and then the temperature was lowered to room temperature. The holding temperature of the substrate is preferably between 650 ° C. and 900 ° C., and the waiting time is preferably 3 minutes or more and 15 minutes or less. Further, the rate of arrival of the temperature drop is preferably 30 ° C./min or more.

As a result of evaluating the growth film thus prepared by Raman measurement, the above-described method has already shown p-type characteristics after growth without performing the conventionally used p-type annealing. Further, the contact resistance due to the formation of the p-type electrode has also been reduced. As a result of performing SIMS (Secondary ionmass spectroscopy) measurement, the residual hydrogen concentration was 3 × 10 ¹⁸ / cm ³ or less near the outermost surface of the p-type GaN contact layer 105.

According to the experiments by the inventors, when the substrate temperature was lowered to room temperature in the NH ₃ atmosphere after forming the growth film, the residual hydrogen concentration was high in the vicinity of the growth film outermost surface. It is considered that the residual hydrogen concentration is caused by the NH ₃ atmosphere after the growth is completed. This residual hydrogen is known to hinder the activation of Mg which is a p-type impurity. The residual hydrogen concentration is preferably 5 × 10 ¹⁹ / cm ³ or less.

In this way, after the growth of the p-type GaN contact layer 105, the carrier gas is replaced with N ₂ , the supply amount of NH ₃ is stopped, and the growth temperature is maintained for a predetermined time, thereby promoting the p-type growth. The residual hydrogen concentration near the outermost surface was reduced and the contact resistance was reduced. As a method for further reducing the contact resistance due to the formation of the p-type electrode, it is preferable to remove the vicinity of the growth film outermost surface (the outermost surface of the p-type layer) by etching and form the p-type electrode on the removal surface. The layer thickness for removing the outermost surface of the growth film (the outermost surface of the p-type layer) is preferably 10 nm or more, and there is no particular upper limit, but the residual hydrogen concentration in the vicinity of the removal surface should be 5 × 10 ¹⁹ / cm ³ or less. Is preferred.

  Next, the chip division of the wafer on which the nitride semiconductor light emitting diode element is formed will be described. Here, the crystal growth side refers to the opposite side to the substrate side.

  First, the GaN substrate side of the wafer is polished by a polishing machine so that the chlorine-doped GaN substrate has a thickness of 150 μm and is mirrored. The mirror surface of the GaN substrate surface is made transparent so that the formation position of the split groove described below can be easily confirmed from the back side, and the formation position of the p electrode and the n electrode is easily adjusted. It is to do.

Next, the wafer is etched with a mixed solution made of sulfuric acid containing hydrofluoric acid or hot phosphoric acid. This etching process is performed in order to remove surface distortion and oxide film generated by polishing, to reduce the contact resistance of the p-type and n-type electrodes and to prevent electrode peeling. Subsequently, a light-transmitting p-type electrode 107 is patterned on the p-type GaN contact layer 105 in the order of Pd (4 nm) / Mo (3 nm) / Au (100 nm) by lithography, and a small amount of oxygen is introduced. However, annealing was performed at 500 ° C. in an N ₂ atmosphere. As a result, the contact resistance was reduced by forming the p-type electrode. The p-type electrode was patterned in order to form the second split groove described below in a portion where the electrode is not covered.

  Next, the wafer is turned over, and an n-type electrode 106 made of Ti (15 nm) / Al (150 nm) is patterned on the GaN substrate side by lithography. At this time, an n-type electrode pattern is formed on the opposite side to the position where the p-type electrode pattern is formed on the crystal growth side, and regions where the electrodes are not covered are matched to form a split groove.

  The wafer was set on a dicer, and first slits 108 having a depth of 30 μm, a line width of 20 μm, and a pitch of 350 μm were formed in the lattice shape shown in FIG. 1B on the GaN substrate side of the wafer. The first split groove is preferably formed in a portion where the n-type electrode 106 is not covered. This is because it causes electrode peeling.

  Next, an adhesive sheet is attached to the GaN substrate side of the wafer, and the GaN substrate side is pasted on the scriber table, and fixed with a vacuum chuck. After fixing, a scriber diamond needle is scribed once on the crystal growth side surface (p-type GaN contact layer 105 surface) with a pitch of 350 μm, a depth of 0.1 μm, and a line width of 5 μm. Next, scribing is performed in the same manner in the direction perpendicular to the previous scribing direction. In this way, a scribe line is formed so as to form a 350 μm square chip, and the second split groove 109 is formed. However, the second split groove 109 is formed at a position substantially coincident with the center line of the line width of the first split groove 108, and the dicing direction and the scribe direction are <11 with respect to the nitride semiconductor. -20> or <1-100> direction. Further, it is preferable to form the second split groove 109 at a position where the electrode is not covered, similarly to the first split groove 108.

  After scribing, the vacuum chuck was released, the wafer was removed from the table, and lightly pressed from the crystal growth side with a roller to obtain a large number of 350 μm square chips from the 2-inch φ wafer. Cracks, chipping and the like were not generated on the cut surface of the chip, and the yield was 98% or more when a product having no external defect was taken out.

  In this embodiment, the chip can be divided into a desired shape with a high yield because a nitride semiconductor film including a light emitting layer is formed on a similar nitride semiconductor substrate doped with chlorine and cut at a time. Instead, the first split groove and the second split groove are formed, and the second split groove is configured to be narrower than the first split groove width. In other words, since both the growth film and the substrate are the same type of nitride semiconductor, they have the same cleavage characteristics and are easily divided because the substrate is doped with chlorine, and the first groove is This is because the groove width is wider than that of the second split groove, and the first and second split grooves are cut. In addition, in order for the crack line broken by the second split groove to break at the shortest cutting distance, somewhere in the bottom of the first split groove below the second split groove bottom from the second split groove bottom. This is because it can only be reached, can be prevented from being cleaved in an unintended direction, and can be cut into a desired chip shape.

  The reason why the second split groove having a narrow groove width is formed on the surface on the crystal growth side is that light is emitted from the surface on the crystal growth side, so that the light emission area is increased.

  The reason for the difference between the first split groove width and the second split groove width is that, as described above, the crack line cracked from the second split groove with the narrow split groove width is the first split groove with the wide split groove width. Even when the cracked line is removed from the position immediately below the second split groove and cracked in the diagonal direction, the first split groove width is wide, so the cracked cracked line becomes the first split groove. You can reach the bottom. In this way, the chip-shaped defect rate can be reduced.

As a result of examining the effect of chlorine doping in the nitride semiconductor substrate, it is easier than doping a nitride semiconductor substrate not doped with chlorine at all by doping a chlorine concentration of at least 1 × 10 ¹⁴ / cm ³ or more. The substrate could be divided. In addition, when a thick nitride semiconductor film (for example, 300 μm) is formed by chlorine doping on a seed substrate (for example, sapphire substrate) by the HVPE method, no chlorine is doped on the same seed substrate. Compared to the same thick nitride semiconductor film, the amount of warpage caused by the difference in thermal expansion coefficient between the substrate and the thick film was small.

  The reason is not clear, but it is considered that the bonding force between the group III atom and the group V atom constituting the nitride semiconductor substrate is weakened by chlorine. Since the total film thickness of the element chip is mostly occupied by the substrate, chlorine doping that facilitates element division is very effective.

  In this embodiment, dicing is used to form the first split groove, but the groove may be formed by a chemical method such as wet etching or dry etching. For dry etching, for example, a reactive ion etching method, an ion milling method, a focused ion beam method, an ECR etching method, or the like can be used. Examples of wet etching include hydrofluoric acid, hot phosphoric acid, a mixed solution of hot phosphoric acid and sulfuric acid, and the like. By using these etching methods, damage to the nitride semiconductor surface and the side surface of the groove due to the formation of the groove can be suppressed. However, in order to perform the etching, it is necessary to perform a mask process using a lithography technique.

  As a physical groove forming method, a scriber or the like may be used in addition to the half-cut by dicing introduced in the present embodiment. However, since the first split groove must be wider than the second split groove width, the first split groove formation by the scriber is not very preferable.

  In the present embodiment, scribing is used to form the second groove width, but the above etching method, dicing, or the like may be used. However, scribing is most preferred in forming the second split groove. This is because the groove width is narrow and the groove can be formed quickly, and the area for scraping the wafer when cutting the wafer is small compared to dicing or etching, so that many chips can be obtained from a single wafer. Because.

  Furthermore, in the present embodiment, the scribe lines are formed in a lattice shape, but as shown in FIGS. 1C and 1D, a pair of chip grooves are formed only at the edge portion of the wafer to divide the elements. Also good. In this case, the total film thickness of the wafer is preferably 150 μm or less, or the cutting distance from the first split groove bottom to the second split groove bottom is preferably 150 μm or less. However, the total film thickness and the cutting distance are the thicknesses when chlorine is doped in the substrate.

  Further, in this embodiment, the GaN substrate is polished and thinned to about 150 μm, but according to experiments by the present inventors, the thickness of the chlorine-doped GaN substrate is preferably 200 μm or less, more preferably 150 μm or less. Was preferred. Although division is facilitated by doping chlorine in the nitride semiconductor, it is preferable to reduce the thickness of the substrate in order to cleave in a desired direction with a high yield. This is because the thickness of the GaN substrate is usually 300 μm to 600 μm, whereas the nitride semiconductor film including the light emitting layer stacked on the GaN substrate is about several μm, most of which is the thickness of the GaN substrate. Because it is occupied by.

  As in the present embodiment, it is most preferable to divide the wafer into chips at a position where the groove width center position of the first dividing groove and the groove width center position of the second dividing groove coincide. When the thickness of the wafer (the thickness of the GaN substrate) is too thick, the wafer tends to be displaced from the position and cracked. Furthermore, since the first split groove and the second split groove do not coincide with each other, the wafer (substrate) needs to be polished and thinned because it tends to be hard to break.

  The lower limit value of the thickness of the GaN substrate is not particularly limited, but if it is too thin, the wafer is cracked during the process for device formation, and therefore the lower limit value of the thickness of the GaN substrate is preferably 50 μm or more.

  In addition to polishing and thinning the entire chlorine-doped GaN substrate, as a method of thinning a partially chlorine-doped GaN substrate, the bottom of the first split groove and the bottom of the second split groove The cutting distance may be shortened. In this case, the cutting distance is preferably 200 μm or less, more preferably 150 μm or less and 50 μm or more, like the thickness of the chlorine-doped GaN substrate.

(Embodiment 2)
In the second embodiment, a method of dividing a chip by forming a third dividing groove in the first dividing groove will be described.

FIG. 2 shows a C-plane (0001) n-type GaN substrate 200, an n-type GaN buffer layer 201, an n-type Al _x1 Ga _1-x1 N clad layer 202, an active layer 203, and a p-type Al _x2 Ga _1-x2 N clad layer. 204, a p-type GaN contact layer 205, an n-type electrode 206, a p-type electrode 207, a first dividing groove 208, and a third dividing groove 209. The GaN substrate 200 is doped with a chlorine concentration of 5 × 10 ¹⁵ / cm ³ .

The manufacturing method of the nitride semiconductor light emitting diode of FIG. 2 is the same as that of the first embodiment.
The chip division of the wafer on which the nitride semiconductor light emitting diode element is formed will be described. Here, the crystal growth side refers to the opposite side to the substrate side.

  First, the GaN substrate side of the wafer is polished by a polishing machine so that the chlorine-doped GaN substrate has a thickness of 250 μm. At this time, the polishing surface may or may not be a mirror surface. This is because it is not necessary to confirm the split groove from both sides. Next, the wafer is etched with a mixed solution made of sulfuric acid containing hydrofluoric acid or hot phosphoric acid. This etching process is performed to remove surface distortion and oxide film generated by polishing, to reduce contact resistance of the p-type electrode and n-type electrode, and to prevent electrode peeling.

Subsequently, a light-transmitting p-type electrode 207 is formed on the entire surface of the wafer in the order of Pd (7 nm) / Au (80 nm) on the p-type GaN contact layer 205, and then introduced at 450 ° C. while introducing a small amount of oxygen. Annealing was performed in a N ₂ atmosphere. As a result, the contact resistance was reduced by forming the p-type electrode. Next, the wafer is turned over, and an n-type electrode 206 made of Ti (15 nm) / Al (150 nm) is formed on the entire surface of the wafer on the GaN substrate side.

  The wafer is set on a dicer, and on the GaN substrate side of the wafer, along the <1-100> direction of the GaN substrate, the depth is 50 μm, the line width is 30 μm, the pitch is 350 μm, and the <11-20> direction (the <1-20> direction). A first split groove 208 having a depth of 50 μm, a line width of 30 μm, and a pitch of 300 μm was formed from above the n-type electrode 206 along a direction perpendicular to the −100> direction.

  In consideration of electrode separation, the first split groove is preferably formed in a portion where the n-type electrode 206 is not covered, but in the present embodiment, the first split groove and the third split groove are provided. Are formed on the same surface, it is not necessary to provide an electrode non-covering portion for groove alignment. Therefore, for the purpose of simplifying the device process, increasing the number of chips from a single wafer, and increasing the light emitting area, both the n and p electrodes have no electrode uncovered portion for dividing grooves, and the entire wafer surface is provided. Electrode formation is performed on.

  Next, an adhesive sheet is affixed to the surface (p-type electrode 207) on the crystal growth side of the wafer, and the GaN substrate side is pasted on the scriber table and fixed with a vacuum chuck. After fixing, a scriber diamond needle is scribed once in the <1-100> direction with a pitch of 350 μm, a depth of 3 μm, and a line width of 5 μm along substantially the center line of the first split groove bottom. Next, scribing is performed once in the direction perpendicular to the previous scribing direction (<11-20> direction) with a pitch of 300 μm, a depth of 3 μm, and a line width of 5 μm, substantially along the center line of the first split groove bottom. . In this way, a scribe line is inserted to form a 350 μm × 300 μm square chip, and a third split groove 209 is formed.

  After scribing, the vacuum chuck was released, the wafer was removed from the table, and lightly pressed from the GaN substrate side with a roller to obtain a large number of 350 μm × 300 μm square chips from the 2-inch φ wafer. Cracks, chipping, etc. did not occur on the cut surface of the chip, and the yield was 92% or more when a product having no external defect was taken out.

  In this embodiment, the chip can be divided into a desired shape with a high yield because a nitride semiconductor film including a light emitting layer is formed on a similar nitride semiconductor substrate doped with chlorine and cut at a time. Instead, the first split groove and the third split groove are formed, and the third split groove is configured in the first split groove. In other words, since the growth film and the substrate are the same type of nitride semiconductor, they have the same cleavage characteristics, and the substrate is doped with chlorine, so that the division is easy, and the third groove is formed. By forming along the substantially central line of the bottom of the first split groove, the crack line cracked by the third split groove is selectively cracked at the portion locally thinned by the first split groove, This is because it is possible to prevent cleaving in an unintended direction and cut into a desired chip shape.

  The reason why the split grooves are formed on the substrate side is to increase the light emitting area on the crystal growth side.

  The effect of chlorine doping in the nitride semiconductor substrate is the same as in the first embodiment.

  In this embodiment, dicing is used to form the first split groove, but the groove may be formed by a chemical method such as wet etching or dry etching. For dry etching, for example, a reactive ion etching method, an ion milling method, a focused ion beam method, an ECR etching method, or the like can be used. Examples of wet etching include hydrofluoric acid, hot phosphoric acid, a mixed solution of hot phosphoric acid and sulfuric acid, and the like. However, in order to perform etching, it is necessary to perform mask processing by a lithography technique.

  As a physical groove forming method, scribing or the like may be used in addition to the half cutting by dicing introduced in the present embodiment. However, since the first split groove must be wider than the third split groove width, the first split groove formation by scribing is not very preferable.

  In the present embodiment, scribing is used to form the third groove width, but the etching method, dicing, or the like may be used. However, scribing is most preferred in forming the third split groove. Furthermore, in the present embodiment, the scribe lines are formed in a lattice shape, but as shown in FIG. 1C, a pair of chipped grooves may be formed only in the edge portion of the wafer to divide the elements. In this case, the total film thickness of the wafer is preferably 150 μm or less, or the cutting distance from the bottom of the third split groove to the surface on the crystal growth side is preferably 150 μm or less. However, the total film thickness and the cutting distance are the thicknesses when chlorine is doped in the substrate.

  As in the present embodiment, the third split groove is formed in the first split groove to locally divide the wafer into chips, so that the wafer is divided into chips. It is preferable that the cutting distance to the surface is short. The cutting distance is preferably 200 μm or less, more preferably 150 μm or less, like the thickness of the GaN substrate subjected to chlorine doping. The lower limit value of the thickness of the cutting distance is not particularly limited. However, if the thickness is too thin, the wafer breaks during the process for device formation. Therefore, the lower limit value of the cutting distance is preferably 50 μm or more.

  Further, the chlorine-doped GaN substrate polished in the present embodiment is thicker than the 200 μm thickness of the GaN substrate which is easy to cut. This prevents cracking and chipping from occurring during chip division so as to make it difficult to cut at portions other than the split groove portion.

(Embodiment 3)
In the third embodiment, a method of dividing a chip by forming a third dividing groove in the first dividing groove and further forming a second dividing groove on the opposite side of the third dividing groove will be described. . Here, the crystal growth side refers to the opposite side to the substrate side.

FIG. 3 shows a C-plane (0001) n-type GaN substrate 300, an n-type GaN buffer layer 301, an n-type Al _x1 Ga _1-x1 N clad layer 302, an active layer 303, and a p-type Al _x2 Ga _1-x2 N clad layer. 304, a p-type GaN contact layer 305, an n-type electrode 306, a p-type electrode 307, a first dividing groove 308, a third dividing groove 309, and a second dividing groove 310. The GaN substrate 300 is doped with a chlorine concentration of 1 × 10 ¹⁶ / cm ³ .

The method for manufacturing the nitride semiconductor light emitting diode in FIG. 3 is the same as that in the first embodiment.
The chip division of the wafer on which the nitride semiconductor light emitting diode element is formed will be described.

  First, the GaN substrate side of the wafer is polished by a polishing machine so that the chlorine-doped GaN substrate has a thickness of 200 μm and mirror-finished. The mirror surface of the GaN substrate surface is made transparent so that the formation position of the split groove described below can be easily confirmed from the back side, and the formation position of the p electrode and the n electrode is easily adjusted. It is to do.

Next, the wafer is etched with a mixed solution made of sulfuric acid containing hydrofluoric acid or hot phosphoric acid. This etching process is performed in order to remove surface distortion and oxide film generated by polishing, to reduce the contact resistance of the p-type and n-type electrodes and to prevent electrode peeling. Subsequently, a light-transmitting p-type electrode 307 is patterned on the p-type GaN contact layer 305 in the order of Pd (3 nm) / Ti (3 nm) / Au (12 nm) by lithography, and then a small amount of oxygen is introduced. However, annealing was performed at 500 ° C. in an N ₂ atmosphere. As a result, the contact resistance was reduced by forming the p-type electrode. The p-type electrode was patterned in order to form the second split groove described below in a portion where the electrode is not covered.

  Next, the wafer is turned over, and an n-type electrode 306 made of Mo (15 nm) / Al (150 nm) is patterned on the GaN substrate side by lithography. At this time, an n-type electrode pattern is formed on the opposite side to the position where the p-type electrode pattern is formed on the crystal growth side, and regions where the electrodes are not covered are matched to form a split groove.

  The wafer is set on a dicer, and on the GaN substrate side of the wafer, along the <1-100> direction, the depth is 20 μm, the line width is 20 μm, the pitch is 350 μm, and the <11-20> direction (the direction perpendicular to the direction). ), First split grooves 308 having a depth of 20 μm, a line width of 20 μm, and a pitch of 345 μm were formed. The first dividing groove is preferably formed in a portion where the n-type electrode 306 is not covered. This is because it causes electrode peeling.

  Next, a scriber diamond needle is scribed once in the <1-100> direction with a pitch of 350 μm, a depth of 5 μm, and a line width of 5 μm along substantially the center line of the first split groove bottom. Next, scribing is performed once in the direction perpendicular to the previous scribe direction (<11-20> direction) at a pitch of 345 μm, a depth of 5 μm, and a line width of 5 μm, substantially along the center line of the bottom of the first split groove. . In this way, a scribe line is inserted to form a 350 μm × 345 μm square chip, and a third split groove 309 is formed.

  Subsequently, an adhesive sheet is attached to the GaN substrate side of the wafer, and the GaN substrate side is pasted on the scriber table and fixed with a vacuum chuck. After fixing, a scriber diamond needle is used to scribe a pitch of 350 μm, a depth of 0.1 μm, and a line width of 5 μm once in the <1-100> direction on the crystal growth side surface (surface of the p-type GaN contact layer 305). . Next, scribing is performed once in the direction perpendicular to the previous scribing direction (<11-20> direction). In this way, a scribe line is inserted to form a 350 μm × 345 μm square chip, and a second split groove 310 is formed. However, the formation position of the second split groove 310 is a position substantially coincident with the third split groove 309. Also, the second split groove 310 is preferably formed at a position where the electrode is not covered, like the first split groove 308.

  After scribing, the vacuum chuck was released, the wafer was removed from the table, and lightly pressed from the GaN substrate side with a roller to obtain a large number of 350 μm × 345 μm square chips from a 2 inch φ wafer. Cracks, chipping and the like were not generated on the cut surface of the chip, and the yield was 98% or more when a product having no external defect was taken out.

  In this embodiment, the chip can be divided into a desired shape with a high yield because a nitride semiconductor film including a light emitting layer is formed on a similar nitride semiconductor substrate doped with chlorine and cut at a time. Instead, the third split groove is formed in the first split groove, and in addition, the second split groove is configured at a position opposite to the third split groove forming position. This is because it has the characteristics of the first and second embodiments and can be cut into a desired chip shape. The effect of chlorine doping in the nitride semiconductor substrate is the same as in the first embodiment.

  In this embodiment, dicing is used to form the first split groove, but the groove may be formed by a chemical method such as wet etching or dry etching. For dry etching, for example, a reactive ion etching method, an ion milling method, a focused ion beam method, an ECR etching method, or the like can be used. Examples of wet etching include hydrofluoric acid, hot phosphoric acid, a mixed solution of hot phosphoric acid and sulfuric acid, and the like. However, in order to perform etching, it is necessary to perform mask processing by a lithography technique.

  As a physical groove forming method, scribing or the like may be used in addition to the half cutting by dicing introduced in the present embodiment. However, since the first split groove must be wider than the second and third split groove widths, it is not preferable to form the first split groove by scribing.

  In the present embodiment, the scriber is used to form the second and third split groove widths, but the etching method, dicing, or the like may be used. However, scribing is most preferred in forming the first and third split grooves.

  Furthermore, in the present embodiment, the scribe lines are formed in a lattice shape, but as shown in FIG. 1C, a pair of chipped grooves may be formed only in the edge portion of the wafer to divide the elements. In this case, the total film thickness of the wafer is preferably 150 μm or less, or the cutting distance from the second split groove bottom to the third split groove bottom is preferably 150 μm or less. However, the total film thickness and the cutting distance are the thicknesses when chlorine is doped in the substrate.

  In this embodiment, the chlorine-doped GaN substrate is polished and thinned to about 200 μm. However, as described in the first embodiment, the thickness of the GaN substrate is 200 μm to facilitate chip division. The following is preferable, and more preferably 150 μm or less and 50 μm or more are preferable. In addition to polishing and thinning the entire chlorine-doped GaN substrate, as a method of partially thinning the GaN substrate, as in the second embodiment, the bottom of the second split groove and the third You may shorten the cutting distance with the bottom part of a split groove. At this time, the cutting distance is preferably 200 μm or less, more preferably 150 μm or less, and 50 μm or more, like the thickness of the chlorine-doped GaN substrate.

(Embodiment 4)
In the fourth embodiment, the chip division in the case where the second split groove depth of the first embodiment is formed deeper than the position of the nitride semiconductor light emitting layer will be described. Here, the crystal growth side refers to the opposite side to the substrate side.

FIG. 4 shows a C-plane (0001) n-type GaN substrate 400, an n-type GaN buffer layer 401, an n-type Al _x1 Ga _1-x1 N clad layer 402, an active layer 403, and a p-type Al _x2 Ga _1-x2 N clad layer. 404, a p-type GaN contact layer 405, an n-type electrode 406, a p-type electrode 407, a first dividing groove 408, and a second dividing groove 409. The GaN substrate 400 is doped with a chlorine concentration of 2 × 10 ¹⁷ / cm ³ .

The method for manufacturing the nitride semiconductor light-emitting diode in FIG. 4 is the same as that in the first embodiment.
Hereinafter, chip division of the wafer on which the nitride semiconductor light emitting diode element is formed will be described.

  First, the GaN substrate side of the wafer is polished by a polishing machine so that the chlorine-doped GaN substrate has a thickness of 100 μm and mirror-finished. Next, the wafer is etched with a mixed solution made of sulfuric acid containing hydrofluoric acid or hot phosphoric acid. This etching process is performed in order to remove surface distortion and oxide film generated by polishing, to reduce the contact resistance of the p-type and n-type electrodes and to prevent electrode peeling.

  Next, the wafer is masked by a lithography method, and the wafer is set in a reactive ion etching apparatus with the crystal growth side surface (p-type GaN contact layer) facing up. By dry etching, the growth surface has a depth of 0.5 μm along the <1-100> direction, a line width of 10 μm, a pitch of 350 μm, and a depth of 0.5 μm along the <11-20> direction. A second split groove 409 having a line width of 10 μm and a pitch of 250 μm was formed. Thereafter, the mask is removed, and a translucent p-type electrode 407 is formed on the p-type GaN contact layer 405 in the order of Pd (4 nm) / Au (10 nm). At this time, the p electrode portion was patterned using a lithography technique.

Next, the wafer on which the p-electrode was formed was annealed at 550 ° C. in an N ₂ atmosphere while introducing a small amount of oxygen. As a result, the contact resistance was reduced by forming the p-type electrode.

  Next, an adhesive sheet is affixed to the surface on the crystal growth side (p-type electrode formation surface), and the GaN substrate side is pasted on a dicer table and fixed with a vacuum chuck. After fixing, a dicer is used to form first split grooves 408 having a pitch of 350 μm, a depth of 20 μm, a line width of 50 μm, a pitch of 250 μm, a depth of 20 μm, and a line width of 50 μm on the surface on the GaN substrate side. 100> direction and <11-20> direction. In this way, a dicing line is inserted to form a 350 μm × 250 μm square chip, and a first split groove 408 is formed. However, the first split groove 408 is formed so that the second split groove 409 coincides with the center of the line width of the first split groove.

  After dicing, the vacuum chuck is released, the wafer is removed from the table, and an n-type electrode 406 made of tungsten (W) with a thickness of 15 nm / aluminum (Al) with a thickness of 150 nm is formed on the entire surface of the wafer on the GaN substrate side. Thereafter, lightly pressing with a roller from the GaN substrate side, a large number of 350 μm × 250 μm square chips were obtained from a 2 inch φ wafer. Cracks, chipping and the like were not generated on the cut surface of the chip, and the yield was 98% or more when a product having no external defect was taken out.

  In this embodiment, the chip can be divided into a desired shape with a high yield because a nitride semiconductor film including a light emitting layer is formed on a similar nitride semiconductor substrate doped with chlorine and cut at a time. Instead, the second split groove bottom is formed deeper than the nitride semiconductor light emitting layer position, and the second split groove is configured to be narrower than the first split groove width.

  That is, since both the growth film and the substrate are the same type of nitride semiconductor, they have the same cleavage characteristics and are easily divided because the substrate is doped with chlorine, and the bottom of the second groove Is deeper than the nitride semiconductor light emitting layer position, and the first split groove is wider than the second split groove, so that the crack line cracked by the second split groove breaks at the shortest cutting distance. Can only be reached from the bottom of the second split groove to the bottom of the first split groove below the bottom of the second split groove and is prevented from being cleaved in an unintended direction. This is because it can be cut into a shape.

  In addition, since the bottom of the second split groove is deeper than the position of the nitride semiconductor light emitting layer, even if chipping or cracking occurs during chip division, the light emitting layer is not damaged and an element failure occurs. The rate can be reduced. The reason why the second dividing groove having a narrow groove width is formed on the surface on the crystal growth side is to increase the light emitting area. The reason why the first and second groove widths are different is the same as in the first embodiment.

  However, since the second split groove was formed by the etching method, the process steps became complicated, the groove width was larger than that of the scribe, and the chip intake rate per single wafer was reduced.

  The effect of chlorine doping in the nitride semiconductor substrate is the same as in the first embodiment.

  In this embodiment, dicing is used to form the first split groove, but the groove may be formed by a chemical method such as wet etching or dry etching. For dry etching, for example, a reactive ion etching method, an ion milling method, a focused ion beam method, an ECR etching method, or the like can be used. Examples of wet etching include hydrofluoric acid, hot phosphoric acid, a mixed solution of hot phosphoric acid and sulfuric acid, and the like.

  As a physical groove forming method, scribing or the like may be used in addition to the half cutting by dicing introduced in the present embodiment. However, since the first split groove must be wider than the second split groove width, formation of the first split groove by scribing is not very preferable.

  In this embodiment, dry etching is used to form the second split groove width, but wet etching, dicing, scribe, or the like may be used. However, the second split groove of this embodiment is most preferably dry etching or wet etching. This is because by using these etching methods, damage to the nitride semiconductor light emitting layer due to the groove formation can be suppressed. However, in order to perform the etching, it is necessary to perform a mask process using a lithography technique.

  In this embodiment, the chlorine-doped GaN substrate is polished and thinned to about 100 μm. However, as described in the first embodiment, the thickness of the GaN substrate is 200 μm to facilitate chip division. The following is preferable, and more preferably 150 μm or less and 50 μm or more are preferable.

  In addition to polishing and thinning the entire GaN substrate subjected to chlorine doping, as a method of partially thinning the GaN substrate, the cutting distance between the bottom of the first split groove and the bottom of the second split groove May be shortened. In this case, the cutting distance is preferably 200 μm or less, more preferably 150 μm or less and 50 μm or more, as in the case of the thickness of the chlorine-doped GaN substrate. As the dividing groove, a scribe line may be formed in the first dividing groove, the second dividing groove, or both the first and second dividing grooves to divide the chip. Further, as shown in FIG. 1C, a pair of chipped grooves may be formed at the edge portion of the first or second split groove to divide the element. In this case, the total film thickness of the wafer is preferably 150 μm or less, or the cutting distance from the first split groove bottom to the second split groove bottom is preferably 150 μm or less. However, the total film thickness and the cutting distance are the thicknesses when chlorine is doped in the substrate.

(Embodiment 5)
In the fifth embodiment, chip division in the case where the second split groove depth of the fourth embodiment is formed deeper than the interface position between the nitride semiconductor film and the nitride semiconductor substrate will be described. Here, the crystal growth side refers to the opposite side to the substrate side.

FIG. 5 shows a C-plane (0001) n-type GaN substrate 500, an n-type GaN buffer layer 501, an n-type Al _x1 Ga _1-x1 N clad layer 502, an active layer 503, and a p-type Al _x2 Ga _1-x2 N clad layer. 504, a p-type GaN contact layer 505, an n-type electrode 506, a p-type electrode 507, a first dividing groove 508, and a second dividing groove 509. The GaN substrate 500 is doped with a chlorine concentration of 1 × 10 ¹⁸ / cm ³ .

The method for manufacturing the nitride semiconductor light-emitting diode in FIG. 5 is the same as that in the first embodiment.
Hereinafter, chip division of the wafer on which the nitride semiconductor light emitting diode element is formed will be described.

  First, the GaN substrate side of the wafer is polished by a polishing machine so that the chlorine-doped GaN substrate has a thickness of 300 μm. At this time, the polishing surface may be a mirror surface or may not be a mirror surface. Next, the wafer is etched with a mixed solution made of sulfuric acid containing hydrofluoric acid or hot phosphoric acid. This etching process is performed in order to remove surface distortion and oxide film generated by polishing, to reduce the contact resistance of the p-type and n-type electrodes and to prevent electrode peeling. Subsequently, the wafer is turned over, and an n-type electrode 506 made of Ti (15 nm) / Mo (150 nm) is formed on the entire surface of the wafer on the GaN substrate side. Next, the substrate is pasted on the dicer table with the GaN substrate side facing up, and fixed with a vacuum chuck. After fixing, the first split groove 508 having a pitch of 350 μm, a depth of 100 μm, a line width of 80 μm, a pitch of 150 μm, a depth of 100 μm, and a line width of 80 μm is formed on the GaN substrate side surface (n electrode forming surface) with a dicer. Were formed along the <1-100> direction and the <11-20> direction, respectively. In this way, a dicing line is inserted to form a 350 μm × 150 μm square chip, and a first split groove 508 is formed. After dicing, the vacuum chuck is released, the wafer is removed from the table, and the wafer is masked by a lithography method.

  Next, the surface on the crystal growth side is faced up (surface on the p-type GaN contact layer side) and set in a reactive ion etching apparatus. By dry etching, a second split groove 509 having a depth of 4 μm, a line width of 20 μm, a pitch of 350 μm, a depth of 4 μm, a line width of 20 μm, and a pitch of 150 μm is formed in the <1-100> direction on the crystal growth surface. And <11-20> directions. However, the second split groove 509 is formed such that the second split groove 509 coincides with the center line of the line width of the first split groove 508.

Thereafter, the mask is removed, and a light-transmitting p-type electrode 507 is patterned on the p-type GaN contact layer 505 in the order of Pd (2 nm) / Ni (2 nm) / Au (10 nm) using a lithography technique. Next, the wafer on which the p-electrode was formed was annealed at 600 ° C. in an N ₂ atmosphere while introducing a small amount of oxygen. As a result, the contact resistance was reduced by forming the p-type electrode.

  Next, the wafer was turned over, an adhesive sheet was attached to the GaN substrate side, and lightly pressed from the surface on the crystal growth side with a roller to obtain a large number of 350 μm × 150 μm square chips from a 2 inch φ wafer. Cracks, chipping and the like were not generated on the cut surface of the chip, and the yield was 98% or more when a product having no external defect was taken out. However, since the second split groove was formed by the etching method, the process steps became complicated, the groove width was larger than that of the scribe, and the chip intake rate per single wafer was reduced.

  In this embodiment, the chip can be divided into a desired shape with a high yield because a nitride semiconductor film including a light emitting layer is formed on a similar nitride semiconductor substrate doped with chlorine and cut at a time. Without forming the first and second split grooves, and forming the bottom of the second split groove deeper than the interface between the nitride semiconductor film and the substrate, and the second split groove is the first split groove. This is because it is narrower than the width. That is, since both the growth film and the substrate are the same type of nitride semiconductor, they have the same cleavage characteristics and are easily divided because the substrate is doped with chlorine, and the bottom of the second groove Is deeper than the interface between the nitride semiconductor film and the substrate, and the first dividing groove is wider than the second dividing groove, so that the crack line broken by the second dividing groove is at the shortest cutting distance. In order to break, the only way to reach the bottom of the first split groove below the second split groove bottom from the second split groove bottom is to prevent cleavage in an unintended direction, This is because it can be cut into a desired chip shape. The reason why the second dividing groove having a narrow groove width is formed on the surface on the crystal growth side is to increase the light emitting area. The reason why the first and second groove widths are different is the same as in the first embodiment.

  Furthermore, since the bottom of the second split groove is deeper than the interface between the nitride semiconductor film and the substrate, the light emitting layer is not damaged even if chipping or cracking occurs during chip division. The occurrence rate of defects can be reduced. Further, since the bottom of the second groove reaches the nitride semiconductor substrate doped with chlorine, the chip division is a division of the nitride semiconductor substrate itself doped with chlorine, and is not doped with chlorine at all. The chip can be easily divided as compared with the nitride semiconductor substrate. The effect of chlorine doping in the nitride semiconductor substrate is the same as in the first embodiment.

  In this embodiment, dicing is used to form the first split groove, but the groove may be formed by a chemical method such as wet etching or dry etching. For dry etching, for example, a reactive ion etching method, an ion milling method, a focused ion beam method, an ECR etching method, or the like can be used. Examples of wet etching include hydrofluoric acid, hot phosphoric acid, a mixed solution of hot phosphoric acid and sulfuric acid, and the like. As a physical groove forming method, scribing or the like may be used in addition to the half cutting by dicing introduced in the present embodiment. However, since the first split groove must be wider than the second split groove width, formation of the first split groove by scribing is not very preferable.

  In this embodiment, dry etching is used to form the second split groove width, but wet etching, dicing, scribe, or the like may be used. However, the second split groove of this embodiment is most preferably dry etching or wet etching. This is because by using these etching methods, damage to the nitride semiconductor light emitting layer due to the groove formation can be suppressed. However, in order to perform the etching, it is necessary to perform a mask process using a lithography technique.

  In the present embodiment, the first split groove and the second split groove are formed to locally divide the wafer into chips, so that the wafer is divided into chips, so that the first split groove bottom to the second split groove bottom. It is preferable that the cutting distance is short. The cutting distance is preferably 200 μm or less, more preferably 150 μm or less, like the thickness of the GaN substrate subjected to chlorine doping. The lower limit value of the thickness of the cutting distance is not particularly limited. However, if the thickness is too thin, the wafer breaks during the process for device formation. Therefore, the lower limit value of the cutting distance is preferably 50 μm or more.

  Further, the chlorine-doped GaN substrate polished in the present embodiment is thicker than the 200 μm thickness of the GaN substrate which is easy to cut. This prevents cracking and chipping from occurring during chip division so as to make it difficult to cut at portions other than the split groove portion.

  In addition to the split groove of the present embodiment, a scribe line is formed as a third split groove in the first split groove, the second split groove, or both the first and second split grooves. The chip may be divided. Further, as shown in FIG. 1C, a pair of chipped grooves may be formed at the edge portion of the first or second split groove to divide the element. In this case, the total film thickness of the wafer is preferably 150 μm or less, or the cutting distance from the first split groove bottom to the second split groove bottom is preferably 150 μm or less. However, the total film thickness and the cutting distance are the thicknesses when chlorine is doped in the substrate.

(Reference Embodiment 1)
In the first embodiment, the nitride-doped nitride semiconductor substrate (thickness 150 μm after polishing) of the first embodiment is changed to a nitride semiconductor substrate (thickness 100 μm after polishing) that is not subjected to chlorine doping. The same as in the first embodiment.

  The chip division of this reference embodiment will be described. Here, the crystal growth side refers to the opposite side to the substrate side. The GaN substrate side of the wafer is polished by a polishing machine, and the thickness of the GaN substrate not doped with chlorine is set to 100 μm.

  The wafer is diced by a dicer, the first dividing groove 108 having a depth of 30 μm, a line width of 20 μm, and a pitch of 350 μm on the GaN substrate side, and a pitch of 350 μm, a depth of 0.1 μm, a line width by a scriber on the crystal growth side surface A second split groove 109 having a thickness of 5 μm was formed in the lattice shape shown in FIG. However, the second split groove 109 is formed at a position substantially coincident with the center line of the line width of the first split groove 108, and the dicing direction and the scribe direction are <11 with respect to the nitride semiconductor. -20> or <1-100> direction.

  After scribing, the vacuum chuck was released, the wafer was removed from the table, and lightly pressed from the crystal growth side with a roller to obtain a large number of 350 μm square chips from the 2-inch φ wafer. Cracks, chipping, etc. did not occur on the cut surface of the chip, and the yield was 92% or more when a product having no external defect was taken out.

  In this embodiment, the chip can be divided into a desired shape with a yield of 90% or more. A nitride semiconductor film including a light emitting layer is formed on a similar nitride semiconductor substrate and cut at a time. Instead, the first split groove and the second split groove are formed, and the second split groove is configured to be narrower than the first split groove width.

  That is, since the growth film and the substrate are the same type of nitride semiconductor, they have the same cleavage characteristics, the first dividing groove is wider than the second dividing groove, and the first and first In order for the crack line broken by the second split groove to break at the shortest cutting distance by dividing into two split grooves, the second split groove bottom to the second split groove bottom below the second split groove bottom This is because it can only reach somewhere in the bottom of one split groove, and can be prevented from being cleaved in an unintended direction and cut into a desired chip shape. The reason why the second dividing groove having a narrow groove width is formed on the surface on the crystal growth side is to increase the light emitting area. The reason why the first and second groove widths are different is the same as in the first embodiment.

  Compared to the first embodiment, it is considered that the chip yield is reduced because the nitride semiconductor substrate is not doped with chlorine. However, the yield is improved by about 10% or more compared to the conventional case where chips are divided at a time without forming at least two or more split grooves.

  In the present embodiment, dicing is used to form the first split groove, but the groove may be formed by a chemical method such as wet etching or dry etching. For dry etching, for example, a reactive ion etching method, an ion milling method, a focused ion beam method, an ECR etching method, or the like can be used. Examples of wet etching include hydrofluoric acid, hot phosphoric acid, a mixed solution of hot phosphoric acid and sulfuric acid, and the like. However, in order to perform the etching, it is necessary to perform a mask process using a lithography technique.

  As a physical groove forming method, scribing or the like may be used in addition to the half-cut by dicing introduced in the present embodiment. However, since the first split groove must be wider than the second split groove width, formation of the first split groove by scribing is not very preferable. In the present embodiment, scribing is used to form the second groove width, but the above etching method, dicing, or the like may be used.

  In the present embodiment, the scribe lines are formed in a lattice shape. However, as shown in FIG. 1C, a pair of chipped grooves may be formed only in the edge portion of the wafer to divide the elements. In this case, the total film thickness of the wafer is preferably 100 μm or less, or the cutting distance from the first split groove bottom to the second split groove bottom is preferably 100 μm or less. However, the total film thickness is a value when the nitride semiconductor substrate is not doped with chlorine.

  The nitride semiconductor substrate not doped with chlorine is more difficult to divide the chip than the nitride semiconductor substrate doped with chlorine, and it is preferable to reduce the thickness of the substrate. According to experiments by the present inventors, the thickness of the nitride semiconductor substrate not doped with chlorine is preferably 150 μm or less, more preferably 100 μm or less. The lower limit of the thickness of the nitride semiconductor substrate without chlorine doping is not particularly limited, but if it is too thin, the wafer is cracked during the process for device fabrication, so the lower limit of the thickness of the nitride semiconductor substrate Is preferably 50 μm or more.

  In addition to polishing and thinning the entire GaN substrate that is not chlorine-doped, as a method of partially thinning the GaN substrate that is not chlorine-doped, the bottom of the first and second grooves You may shorten the cutting distance. In this case, the cutting distance is preferably 150 μm or less, more preferably 100 μm or less and 50 μm or more, like the thickness of the GaN substrate not doped with chlorine.

(Reference embodiment 2)
The present second embodiment is the same as the second embodiment except that the chlorine-doped nitride semiconductor substrate (thickness after polishing 250 μm) is changed to a nitride semiconductor substrate that is not chlorine-doped (thickness after polishing 200 μm). This is the same as in the second embodiment.

  The chip division of this reference embodiment will be described. Here, the crystal growth side refers to the opposite side to the substrate side.

  The GaN substrate side of the wafer is polished by a polishing machine so that the thickness of the GaN substrate not doped with chlorine is 200 μm. The wafer is diced to the GaN substrate side along the <1-100> direction by a depth of 50 μm, a line width of 30 μm, a pitch of 350 μm, and a depth of 50 μm and a line width of 30 μm along the <11-20> direction. First split grooves 208 having a pitch of 100 μm are formed. Subsequently, along the substantially central line of the bottom of the second split groove, a scriber extends along the <1-100> direction in a pitch of 350 μm, a depth of 3 μm, a line width of 5 μm, and a <11-20> direction. A third split groove 209 having a pitch of 100 μm, a depth of 3 μm, and a line width of 5 μm was formed along the line. However, the third split groove 209 is formed on the bottom of the first split groove 208 at a position substantially coincident with the center line of the first split groove line width.

  After scribing, the vacuum chuck was released, the wafer was removed from the table, and lightly pressed with a roller from the GaN substrate side to obtain a large number of 350 μm × 100 μm square chips from a 2 inch φ wafer. Cracks, chipping, etc. did not occur on the cut surface of the chip, and the yield was 89% or more when a product having no external defect was taken out.

  In this embodiment, the chip can be divided into a desired shape with a yield of 85% or more. A nitride semiconductor film including a light emitting layer is formed on a similar nitride semiconductor substrate and cut at a time. Instead, the first split groove and the third split groove are formed, and the third split groove is configured in the first split groove. That is, since the growth film and the substrate are the same type of nitride semiconductor, having the same cleavage characteristics and forming the third dividing groove along the substantially center line of the first dividing groove bottom, Since the crack line cracked by the third split groove is selectively cracked at the part that is locally thinned by the first split groove, it is prevented from being cleaved in an unintended direction, and the desired chip shape is obtained. This is because it can be cut. The reason why the split grooves are formed on the surface on the substrate side is to increase the light emitting area on the crystal growth side. The reason why the first and second groove widths are different is the same as in the first embodiment.

  Compared to the second embodiment, it is considered that the chip yield is decreased because the nitride semiconductor substrate is not doped with chlorine. However, the yield is improved by about 10% or more compared to the conventional case where chips are divided at a time without forming at least two or more split grooves. The effect of chlorine doping in the nitride semiconductor substrate is the same as in the first embodiment.

  In the present embodiment, dicing is used to form the first split groove, but the groove may be formed by a chemical method such as wet etching or dry etching. For dry etching, for example, a reactive ion etching method, an ion milling method, a focused ion beam method, an ECR etching method, or the like can be used. Examples of wet etching include hydrofluoric acid, hot phosphoric acid, a mixed solution of hot phosphoric acid and sulfuric acid, and the like. However, in order to perform etching, it is necessary to perform mask processing by a lithography technique.

  As a physical groove forming method, scribing or the like may be used in addition to the half-cut by dicing introduced in the present embodiment. However, since the first split groove must be wider than the second split groove width, formation of the first split groove by scribing is not very preferable. In the present embodiment, scribing is used to form the third groove width, but the above etching method, dicing, or the like may be used. However, scribing is most preferred in forming the third split groove.

  In the present embodiment, the scribe lines are formed in a lattice shape. However, as shown in FIG. 1C, a pair of chipped grooves may be formed only in the edge portion of the wafer to divide the elements. In this case, the total film thickness of the wafer is preferably 100 μm or less, or the cutting distance from the bottom of the third split groove to the surface on the crystal growth side is preferably 100 μm or less. However, the total film thickness and the cutting distance are the thicknesses when the substrate is not doped with chlorine.

  The nitride semiconductor substrate not doped with chlorine is more difficult to divide the chip than the nitride semiconductor substrate doped with chlorine, and it is preferable to reduce the thickness of the substrate. According to the experiments by the present inventors, the thickness of the nitride semiconductor substrate not subjected to chlorine doping is preferably 150 μm or less, more preferably 100 μm or less and 50 μm or more.

  As in this reference embodiment, the third split groove is formed in the first split groove, and the wafer is divided into chips by locally thinning the groove. It is preferable that the cutting distance to the surface is short. The cutting distance is preferably 150 μm or less, more preferably 100 μm or less, similarly to the thickness of the nitride semiconductor substrate not subjected to chlorine doping. The lower limit value of the thickness of the cutting distance is not particularly limited. However, if the thickness is too thin, the wafer breaks during the process for device formation. Therefore, the lower limit value of the cutting distance is preferably 50 μm or more.

  In addition, the GaN substrate not doped with chlorine polished in the present embodiment is thicker than the nitride semiconductor substrate 150 μm that is easy to cut. This prevents cracking and chipping from occurring during chip division so as to make it difficult to cut at portions other than the split groove portion.

(Reference Embodiment 3)
This reference embodiment 3 is different from the embodiment 3 except that the chlorine-doped nitride semiconductor substrate (thickness after polishing 200 μm) is changed to a nitride semiconductor substrate that is not chlorine-doped (thickness after polishing 150 μm). This is the same as in the third embodiment.

  The chip division of this reference embodiment will be described. Here, the crystal growth side refers to the opposite side to the substrate side. The GaN substrate side of the wafer is polished by a polishing machine so that the thickness of the GaN substrate not doped with chlorine is 150 μm. The wafer is diced to the GaN substrate side along the <1-100> direction by a dicer with a depth of 20 μm, a line width of 20 μm, a pitch of 400 μm, and a depth of 20 μm along the <11-20> direction, with a line width of 20 μm. First split grooves 308 having a pitch of 100 μm were formed.

  Subsequently, along a substantially center line on the bottom of the first split groove, a scriber is used in a <1-100> direction, a pitch of 400 μm, a depth of 5 μm, a line width of 5 μm, and a <11-20> direction. A third split groove 309 having a pitch of 100 μm, a depth of 5 μm, and a line width of 5 μm was formed. Furthermore, on the surface on the crystal growth side, the pitch is 400 μm, the depth is 0.1 μm, the line width is 5 μm along the <1-100> direction, and the pitch is 100 μm and the depth is 0. A second split groove 310 having a thickness of 1 μm and a line width of 5 μm was formed. However, the third split groove 309 is formed on the bottom of the first split groove 308 at a position substantially coincident with the center line of the first split groove line width, and the second split groove 310 is formed. Is formed at a position substantially coincident with the third split groove 309.

  After scribing, the vacuum chuck was released, the wafer was removed from the table, and lightly pressed from the GaN substrate side with a roller to obtain a large number of 400 μm × 100 μm square chips from a 2-inch φ wafer. Cracks, chipping, etc. did not occur on the cut surface of the chip, and the yield was 92% or more when a product having no external defect was taken out.

  In this embodiment, the chip can be divided into a desired shape with a yield of 90% or more. A nitride semiconductor film including a light emitting layer is formed on a similar nitride semiconductor substrate and cut at a time. Instead, the third split groove is formed in the first split groove, and in addition, the second split groove is configured at a position opposite to the third split groove forming position. This is because it has the features of Reference Embodiment 1 and Reference Embodiment 2 and can be cut into a desired chip shape. Compared to the third embodiment, it is considered that the chip yield is lowered because the nitride semiconductor substrate is not doped with chlorine. However, the yield is improved by about 10% or more compared to the conventional case where chips are divided at a time without forming at least two or more split grooves.

  In the present embodiment, dicing is used to form the first split groove, but the groove may be formed by a chemical method such as wet etching or dry etching. For dry etching, for example, a reactive ion etching method, an ion milling method, a focused ion beam method, an ECR etching method, or the like can be used. Examples of wet etching include hydrofluoric acid, hot phosphoric acid, a mixed solution of hot phosphoric acid and sulfuric acid, and the like. However, in order to perform etching, it is necessary to perform mask processing by a lithography technique.

  As a physical groove forming method, scribing or the like may be used in addition to the half-cut by dicing introduced in the present embodiment. However, since the first split groove must be wider than the second and third split groove widths, it is not preferable to form the first split groove by scribing.

  In the present embodiment, scribing is used to form the second and third split groove widths, but the etching method, dicing, or the like may be used. However, scribing is most preferred in forming the second and third split grooves.

  In the present embodiment, the scribe lines are formed in a lattice shape. However, as shown in FIG. 1C, a pair of chipped grooves may be formed only in the edge portion of the wafer to divide the elements. In this case, the total film thickness of the wafer is preferably 100 μm or less, or the cutting distance from the second split groove bottom to the third split groove bottom is preferably 100 μm or less. However, the total film thickness and the cutting distance are the thicknesses when the substrate is not doped with chlorine.

  The nitride semiconductor substrate not doped with chlorine is more difficult to divide the chip than the nitride semiconductor substrate doped with chlorine, and it is preferable to reduce the thickness of the substrate. As described in the first embodiment, in order to facilitate chip division, the thickness of the GaN substrate is preferably 150 μm or less, more preferably 100 μm or less and 50 μm or more.

  In addition to polishing and thinning the entire GaN substrate which is not doped with chlorine, as a method of partially thinning the GaN substrate, as in Reference Embodiment 2, the bottom of the second split groove and the third You may shorten the cutting distance with the bottom part of a split groove. At this time, the cutting distance is preferably 150 μm or less, more preferably 100 μm or less and 50 μm or more, like the thickness of the GaN substrate not subjected to chlorine doping.

(Reference Embodiment 4)
The fourth embodiment is different from the fourth embodiment except that the chlorine-doped nitride semiconductor substrate (thickness after polishing: 100 μm) is changed to a nitride semiconductor substrate not subjected to chlorine doping (thickness after polishing: 80 μm). This is the same as in the fourth embodiment.

  The chip division of this reference embodiment will be described. Here, the crystal growth side refers to the opposite side to the substrate side. The GaN substrate side of the wafer is polished by a polishing machine, and the thickness of the GaN substrate not doped with chlorine is set to 80 μm.

  The wafer is dry-etched on the crystal growth side along the <1-100> direction, the depth is 1 μm, the line width is 10 μm, the pitch is 350 μm, and the depth is 1 μm along the <11-20> direction. A second split groove 409 having a thickness of 10 μm and a pitch of 330 μm was formed. Subsequently, by a dicer on the surface on the GaN substrate side, the pitch is 350 μm, the depth is 10 μm, the line width is 50 μm along the <1-100> direction, and the pitch is 330 μm and the depth is 10 μm along the <11-20> direction. A first dividing groove 408 having a line width of 50 μm was formed. However, the first split groove 408 is formed so that the second split groove 409 coincides with the center of the line width of the first split groove.

  After dicing, the vacuum chuck was released, the wafer was removed from the table, and lightly pressed from the crystal growth side with a roller to obtain a large number of 350 μm × 330 μm square chips from a 2 inch φ wafer. Cracks, chipping, etc. did not occur on the cut surface of the chip, and the yield was 92% or more when a product having no external defect was taken out.

  In this embodiment, the chip can be divided into a desired shape with a yield of 90% or more. A nitride semiconductor film including a light emitting layer is formed on a similar nitride semiconductor substrate and cut at a time. Without forming the first and second split grooves, the second split groove bottom is formed deeper than the nitride semiconductor light emitting layer position, and the second split groove is narrower than the first split groove width. It depends on.

  That is, since the growth film and the substrate are the same type of nitride semiconductor, they have the same cleavage characteristics, the second groove bottom is deeper than the nitride semiconductor light emitting layer position, and the first groove is the first. In order for the crack line cracked by the second split groove to break at the shortest cutting distance because the groove width is wider than the split groove of 2, the bottom of the second split groove bottom from the second split groove bottom This is because it can only reach somewhere in the bottom of the first split groove, can be prevented from being cleaved in an unintended direction, and can be cut into a desired chip shape.

  In addition, since the bottom of the second split groove is deeper than the position of the nitride semiconductor light emitting layer, even if chipping or cracking occurs during chip division, the light emitting layer is not damaged and an element failure occurs. The rate can be reduced. However, since the second split groove was formed by the etching method, the process steps became complicated, the groove width was larger than that of the scribe, and the chip intake rate per single wafer was reduced. The reason why the second dividing groove having a narrow groove width is formed on the surface on the crystal growth side is to increase the light emitting area.

  The reason why the first and second groove widths are different is the same as in the first embodiment. Compared to the fourth embodiment, it is considered that the yield of the chip is decreased because the nitride semiconductor substrate is not doped with chlorine. However, the yield is improved by about 10% or more compared to the conventional case where chips are divided at a time without forming at least two or more split grooves.

  In the present embodiment, dicing is used to form the first split groove, but the groove may be formed by a chemical method such as wet etching or dry etching. For dry etching, for example, a reactive ion etching method, an ion milling method, a focused ion beam method, an ECR etching method, or the like can be used. Examples of wet etching include hydrofluoric acid, hot phosphoric acid, a mixed solution of hot phosphoric acid and sulfuric acid, and the like.

  As a physical groove forming method, scribing or the like may be used in addition to the half-cut by dicing introduced in the present embodiment. However, since the first split groove must be wider than the second split groove width, formation of the first split groove by scribing is not very preferable.

  In this reference embodiment, dry etching is used to form the second groove width, but wet etching, dicing, scribe, or the like may be used. However, the second split groove of the reference embodiment is most preferably a dry etching method or a wet etching method. This is because by using these etching methods, damage to the nitride semiconductor light-emitting layer due to the groove formation can be suppressed. However, in order to perform the etching method, it is necessary to perform mask processing using a lithography technique.

  The nitride semiconductor substrate not doped with chlorine is more difficult to divide the chip than the nitride semiconductor substrate doped with chlorine, and it is preferable to reduce the thickness of the substrate. As described in the first embodiment, in order to facilitate chip division, the thickness of the GaN substrate is preferably 150 μm or less, more preferably 100 μm or less and 50 μm or more.

  In addition to polishing and thinning the entire GaN substrate that is not chlorine-doped, as a method of partially thinning the GaN substrate that is not chlorine-doped, the bottom of the first and second grooves You may shorten the cutting distance. The cutting distance at this time is preferably 150 μm or less, more preferably 100 μm or less and 50 μm or more, like the thickness of the GaN substrate not doped with chlorine.

  In addition to the split groove of the reference embodiment, a scribe line is formed as a third split groove in the first split groove, the second split groove, or both the first and second split grooves. The chip may be divided. Further, as shown in FIG. 1C, a pair of chipped grooves may be formed at the edge portion of the first or second split groove to divide the element. In this case, the total film thickness of the wafer is preferably 100 μm or less, or the cutting distance from the first split groove bottom to the second split groove bottom is preferably 100 μm or less. However, the total film thickness is a value when the nitride semiconductor substrate is not doped with chlorine.

(Reference embodiment 5)
The present embodiment 5 is different from the embodiment 5 except that the chlorine-doped nitride semiconductor substrate (thickness after polishing: 300 μm) is changed to a nitride semiconductor substrate not subjected to chlorine doping (thickness after polishing: 250 μm). This is the same as in the fifth embodiment.

  The chip division of this reference embodiment will be described. Here, the crystal growth side refers to the opposite side to the substrate side. The GaN substrate side of the wafer is polished by a polishing machine so that the thickness of the GaN substrate not doped with chlorine is 250 μm. The wafer is dry-etched on the crystal growth side surface along the <1-100> direction, with a depth of 5 μm, a line width of 20 μm, a pitch of 350 μm, and a depth of 5 μm along the <11-20> direction. A second split groove 509 having a line width of 20 μm and a pitch of 340 μm was formed.

  Subsequently, by a dicer on the surface on the GaN substrate side, the pitch is 350 μm, the depth is 100 μm, the line width is 80 μm along the <1-100> direction, and the pitch is 340 μm and the depth is 100 μm along the <11-20> direction. A first split groove 508 having a line width of 80 μm was formed. However, the first split groove 508 is formed such that the second split groove 509 coincides with the approximate center of the line width of the first split groove.

  After dicing, the vacuum chuck was released, the wafer was removed from the table, and lightly pressed from the crystal growth surface side with a roller to obtain a large number of 350 μm × 340 μm square chips from the 2-inch φ wafer. Cracks, chipping, etc. did not occur on the cut surface of the chip, and the yield was 92% or more when a product having no external defect was taken out. However, since the second groove was formed by the etching method, the process steps became complicated, the groove width was larger than that of the scribe, and the chip intake rate per single wafer was reduced.

  In this embodiment, the chip can be divided into a desired shape with a yield of 90% or more. A nitride semiconductor film including a light emitting layer is formed on a similar nitride semiconductor substrate and cut at a time. Without forming the first and second split grooves, the bottom of the second split groove is formed deeper than the interface between the nitride semiconductor film and the substrate, and the second split groove has a first split groove width. This is because it is configured narrower.

  In other words, since the growth film and the substrate are the same type of nitride semiconductor, they have the same cleavage characteristics, and the bottom of the second groove is deeper than the interface between the nitride semiconductor film and the substrate, so that the first Since the groove is wider than the second split groove, the crack line broken by the second split groove can be broken at the shortest cutting distance from the bottom of the second split groove to the second split groove. This is because it only reaches somewhere in the bottom of the first split groove below the bottom, and can be prevented from being cleaved in an unintended direction and cut into a desired chip shape.

  In addition, since the bottom of the second split groove is deeper than the interface between the nitride semiconductor film and the substrate, the light emitting layer is not damaged even if chipping or cracking occurs during chip division. The occurrence rate of defects can be reduced. The reason why the second dividing groove having a narrow groove width is formed on the surface on the crystal growth side is to increase the light emitting area. The reason why the first and second groove widths are different is the same as in the first embodiment.

  Compared to the fifth embodiment, it is considered that the chip yield is lowered because the nitride semiconductor substrate is not doped with chlorine. However, the yield is improved by about 10% or more compared to the conventional case where chips are divided at a time without forming at least two or more split grooves.

  In the present embodiment, dicing is used to form the first split groove, but the groove may be formed by a chemical method such as wet etching or dry etching. For dry etching, for example, a reactive ion etching method, an ion milling method, a focused ion beam method, an ECR etching method, or the like can be used. Examples of wet etching include hydrofluoric acid, hot phosphoric acid, a mixed solution of hot phosphoric acid and sulfuric acid, and the like.

  As a physical groove forming method, scribing or the like may be used in addition to the half-cut by dicing introduced in the present embodiment. However, since the first split groove must be wider than the second split groove width, formation of the first split groove by scribing is not very preferable.

  In this reference embodiment, dry etching is used to form the second groove width, but wet etching, dicing, scribe, or the like may be used. However, the second split groove of the reference embodiment is most preferably a dry etching method or a wet etching method. This is because by using these etching methods, damage to the nitride semiconductor light emitting layer due to the groove formation can be suppressed. However, in order to perform the etching method, it is necessary to perform mask processing using a lithography technique.

  The nitride semiconductor substrate not doped with chlorine is more difficult to divide the chip than the nitride semiconductor substrate doped with chlorine, and it is preferable to reduce the thickness of the substrate. As described in the first embodiment, in order to facilitate chip division, the thickness of the GaN substrate is preferably 150 μm or less, more preferably 100 μm or less and 50 μm or more.

  In the present embodiment, the first split groove and the second split groove are formed to locally divide the wafer into chips, so that the wafer is divided into chips, so that the first split groove bottom to the second split groove bottom. It is preferable that the cutting distance is short. The cutting distance is preferably 150 μm or less, more preferably 100 μm or less, like the thickness of the GaN substrate not subjected to chlorine doping. The lower limit value of the thickness of the cutting distance is not particularly limited. However, if the thickness is too thin, the wafer breaks during the process for device formation. Therefore, the lower limit value of the cutting distance is preferably 50 μm or more.

  Further, the chlorine-doped GaN substrate polished in the present embodiment is thicker than the 150 μm thickness of the GaN substrate that is easy to cut. This prevents cracking and chipping from occurring during chip division so as to make it difficult to cut at portions other than the split groove portion.

  In addition to the split groove of the reference embodiment, a scribe line is formed as a third split groove in the first split groove, the second split groove, or both the first and second split grooves. The chip may be divided. Further, as shown in FIG. 1B, a pair of chipped grooves may be formed in the edge portion of the first split groove or the second split groove to divide the element. In this case, the total film thickness of the wafer is preferably 100 μm or less, or the cutting distance from the first split groove bottom to the second split groove bottom is preferably 100 μm or less. However, the total film thickness is a value when the nitride semiconductor substrate is not doped with chlorine.

(Reference Embodiment 6)
In the sixth embodiment, a chip division of a nitride semiconductor light emitting diode crystal-grown on a thick nitride semiconductor film doped with chlorine on a sapphire seed substrate will be described. Here, the crystal growth side refers to the opposite side to the sapphire seed substrate side.

6A shows a C-plane sapphire seed substrate 10, an n-type GaN film 20, a dielectric film 30, a chlorine-doped n-type GaN thick film 40, an n-type GaN buffer layer 601, an n-type Al _x1 Ga _1-x1. The N clad layer 602, the active layer 603, the p-type Al _x2 Ga _{1 -x2} N clad layer 604, and the p-type GaN contact layer 605 are configured.

A method for manufacturing the nitride semiconductor light emitting diode of FIG. 6A will be described below.
First, the n-type GaN film 20 having a thickness of 1 μm is stacked on the C-plane sapphire seed substrate 10 (thickness: 420 μm) by MOCVD and taken out from the MOCVD apparatus. Next, a dielectric film having a thickness of 100 nm is formed by sputtering or CVD, and processed into a stripe shape having a mask width of 7 μm and a pitch of 10 μm by a lithography technique. The seed substrate may be other than a nitride semiconductor. In addition to sapphire of the present embodiment, SiC, spinel, ZnO, MgO, Si, Ge, GaAs, A-plane sapphire, R-plane sapphire, and M-plane sapphire are used. You may do it. The dielectric film is, for example, SiO ₂ , SiN _x , TiO ₂ , or Al ₂ O ₃ . The dielectric film 30 of this reference embodiment uses SiO ₂ .

Next, the wafer was set in an HVPE apparatus, and an n-type GaN thick film 40 having a thickness of 200 μm was formed while doping with a chlorine concentration of 2 × 10 ¹⁹ / cm ³ and a Si concentration of 2 × 10 ¹⁸ / cm ³ . Here, the thick film in the specification of the present invention refers to a film thickness of 20 μm or more.

  The wafer laminated with the GaN thick film 40 was set again in the MOCVD apparatus, and the nitride semiconductor light emitting diode shown in FIG. 6A was manufactured under the same growth conditions as in the first embodiment.

  Next, the chip division of the wafer on which the nitride semiconductor light emitting diode element is formed will be described.

FIG. 6B shows the configuration of the first split groove 608 and the second split groove 609.
The nitride semiconductor film 600 in FIG. 6 according to the present embodiment is a general term for the n-type GaN film 20, the dielectric film 30, and the chlorine-doped n-type GaN thick film 40. Only the film 40 or the n-type GaN film 20 and the chlorine-doped n-type GaN thick film 40 may be used. The n-type electrode 606 is formed by depositing Ti / Ag on the entire surface of the sapphire seed substrate 10 after forming the first dividing groove 608.

  First, the sapphire seed substrate of the wafer is polished by a polishing machine to a thickness of 250 μm and mirrored. The thickness of the seed substrate thinned by polishing is preferably 250 μm or less.

Subsequently, a light-transmitting p-type electrode 607 is patterned on the p-type GaN contact layer 605 in the order of Pd (3 nm) / Mo (3 nm) / Au (10 nm) by a lithography technique, and then a small amount of oxygen is introduced. However, annealing was performed at 350 ° C. in an N ₂ atmosphere. As a result, the contact resistance was reduced by forming the p-type electrode. The p-type electrode was patterned in order to form the second split groove described below in a portion where the electrode is not covered.

  The wafer was set on a dicer, and first split grooves 608 having a depth of 280 μm, a line width of 100 μm, and a pitch of 350 μm were formed in the lattice shape shown in FIG. 1B on the sapphire seed substrate side of the wafer. The bottom of the first split groove is formed so as to reach the nitride semiconductor film 600 (n-type GaN thick film 40) subjected to chlorine doping. Since the groove width of the first dividing groove 608 is sufficiently larger than the pitch width of 10 μm of the dielectric film 30, it is the same regardless of whether it is formed at the position of the broken line 50 or the broken line 51 in FIG. . When the first dividing groove width is equal to or smaller than the mask width of the dielectric film, the first dividing groove is preferably formed on the dielectric mask position (dashed line 51). This is because the nitride semiconductor film coated directly on the dielectric mask grows in association with the mask directly by selective growth, so that voids or the like are easily generated and chip division is facilitated.

  Next, an n-type electrode 606 made of Ti (15 nm) / Ag (150 nm) is formed on the sapphire seed substrate side. At this time, an electrode is deposited in the first split groove. In addition, since the n-type electrode deposited on the sapphire seed substrate is covered with Ag having a high reflectivity, the light emitted from the light emitting layer is reflected to efficiently extract the light from the p electrode side. it can.

  Subsequently, an adhesive sheet is affixed to the sapphire seed substrate side of the wafer, and the sapphire seed substrate side is pasted on a scriber table and fixed with a vacuum chuck. After fixing, a scriber diamond needle is scribed once on the crystal growth side (p-type GaN contact layer 605 surface) with a pitch of 350 μm, a depth of 1 μm, and a line width of 5 μm. Next, scribing is performed in the same manner in the direction perpendicular to the previous scribing direction. In this way, a scribe line is inserted to form a 350 μm square chip, and a second split groove 609 is formed. However, the second split groove 609 is formed at a position substantially coincident with the center line of the line width of the first split groove 608, and the dicing direction and the scribe direction are <11 with respect to the nitride semiconductor. -20> or <1-100> direction. Further, the second split groove 609 is preferably formed at a position where the electrode is not covered.

  After scribing, the vacuum chuck was released, the wafer was removed from the table, and lightly pressed from the GaN substrate side with a roller to obtain a large number of 350 μm square chips from the 2-inch φ wafer. FIG. 6C shows the shape of the obtained chip. Cracks, chipping and the like were not generated on the cut surface of the chip, and the yield was 85% or more when a product having no external defect was taken out.

  In the present embodiment, the chip can be divided into a desired shape of 85% or more by forming a nitride semiconductor film including a light emitting layer on a similar nitride semiconductor substrate doped with chlorine, and once This is because the bottom of the first groove is formed so as to reach the chlorine-doped nitride semiconductor film 600 without being cut into two, and the second groove is configured to be narrower than the first groove width.

  That is, since the growth film and the nitride semiconductor film 600 are the same type of nitride semiconductor, they have the same cleavage characteristics and are easily divided because the nitride semiconductor film 600 is doped with chlorine. And, the first split groove is wider than the second split groove, and the first split groove is divided into the first and second split grooves, so that the crack line broken by the second split groove is In order to break at the shortest cutting distance, it has to reach somewhere from the second split groove bottom to the bottom of the first split groove below the second split groove bottom, and other than the first split groove region This is because it is a seed substrate different from a nitride semiconductor, so that cleavage is different, and it is possible to prevent cleaving in an unintended direction and to cut into a desired chip shape. The reason why the second split groove having a narrow groove width is formed on the surface on the crystal growth side is to increase the light emitting area. The reason why the first split groove width and the second split groove width are different is the same as in the first embodiment.

  Next, when the effect of chlorine doping in the nitride semiconductor film 600 was examined, a thick nitride semiconductor film (for example, 300 μm) obtained by performing chlorine doping on a seed substrate (for example, sapphire substrate) by the HVPE method. As a result, the amount of warpage caused by the difference in thermal expansion coefficient between the substrate and the thick film was smaller than that of the same thick nitride semiconductor film in which no chlorine was doped on the same seed substrate.

  When a conventional thick nitride semiconductor film not doped with chlorine is stacked on a seed substrate, the wafer itself is warped due to the difference in the coefficient of thermal expansion between each other, and the contact stress applied to the blade of the dicer or scriber is applied. Depending on the direction and direction, it often broke into pieces. However, when a thick nitride semiconductor film doped with chlorine is grown on the seed substrate as in the present embodiment, the warpage of the wafer itself is small, and it is broken into pieces depending on the contact stress or direction of the blade. There was no.

  Although the reason for this is not clear, it is considered that the bonding force between the group III atom and the group V atom constituting the nitride semiconductor substrate is weakened by chlorine.

  When only chlorine doping was not performed in the configuration of this reference embodiment, it was often observed that the first split groove was broken as described in the effect of chlorine doping. However, when the first split groove could be formed without cracking, there was no chipping or cracking in the chip cross section, and the chip could be divided into the desired shape. Therefore, when the present embodiment is used without chlorine doping, the chip yield is lower than that of chlorine doping, but the chip shape is good as in the case of chlorine doping.

  In the present embodiment, dicing is used to form the first split groove, but the groove may be formed by a chemical method such as wet etching or dry etching. For dry etching, for example, a reactive ion etching method, an ion milling method, a focused ion beam method, an ECR etching method, or the like can be used. Examples of wet etching include hydrofluoric acid, hot phosphoric acid, a mixed solution of hot phosphoric acid and sulfuric acid, and the like. However, in order to perform etching, it is necessary to perform mask processing by a lithography technique.

  As a physical groove forming method, scribing or the like may be used in addition to the half-cut by dicing introduced in the present embodiment. However, since the first split groove must be wider than the second split groove width, formation of the first split groove by scribing is not very preferable.

  In the present embodiment, scribing is used to form the second groove width, but the above etching method, dicing, or the like may be used. However, scribing is most preferred in forming the second split groove. This is because the groove width is narrow and the groove can be formed quickly, and the area for scraping the wafer when cutting the wafer is small compared to dicing or etching, so that many chips can be obtained from a single wafer. Because. Further, in the present embodiment, the scribe lines are formed in a lattice shape. However, as shown in FIG. 1C, a pair of chipped grooves may be formed only in the edge portion of the wafer to divide the elements. In this case, it is preferable that the cutting distance from the first split groove bottom to the second split groove bottom is 150 μm or less. However, the cutting distance is the thickness when the nitride semiconductor thick film is doped with chlorine.

  In the present embodiment, the sapphire seed substrate is polished and thinned to about 250 μm. However, according to experiments by the present inventors, the thickness of the sapphire seed substrate is preferably 250 μm or less, more preferably 200 μm or less. It was good.

  The feature of this reference embodiment is that the first split groove bottom reaches the nitride semiconductor film 600 doped with chlorine, and the cutting distance between the first split groove bottom and the second split groove bottom is as follows. It is shortened. The cutting distance is preferably 200 μm or less, more preferably 150 μm or less and 50 μm or more.

  This reference embodiment may use the chip dividing method of the second and third embodiments as long as the above features are included.

(Reference Embodiment 7)
Reference Embodiment 7 is the same as Reference Embodiment 6 except that the second split groove of Reference Embodiment 6 is formed by an etching method.

The nitride semiconductor light-emitting diode structure and the manufacturing method thereof are the same as those in Reference Embodiment 6 (FIG. 6A). However, the n-type GaN thick film 40 was grown to a thickness of 150 μm while doping with a chlorine concentration of 5 × 10 ²⁰ / cm ³ and a Si concentration of 1 × 10 ¹⁸ / cm ³ .

  Next, the chip division of the wafer on which the nitride semiconductor light emitting diode element is formed will be described. Here, the crystal growth side refers to the opposite side to the sapphire seed substrate side.

  FIG. 7A and FIG. 7B show the structure of the dividing groove and the chip shape, respectively. The nitride semiconductor film 700 in FIG. 7 of the present embodiment is a general term for the n-type GaN film 20, the dielectric film 30, and the chlorine-doped n-type GaN thick film 40, but the chlorine-doped n-type thick film. The n-type GaN film 20 and the chlorine-doped n-type GaN thick film 40 may be used.

  First, the sapphire seed substrate of the wafer is polished by a polishing machine to a thickness of 150 μm and mirrored.

Next, the wafer is masked by a lithography method, and the surface on the crystal growth side is faced up (p-type GaN contact layer), and set in a reactive ion etching apparatus. A second split groove 709 having a depth of 3 μm, a line width of 50 μm, and a pitch of 350 μm was formed in the lattice shape shown in FIG. 1B by dry etching. Thereafter, the mask is removed, and a translucent p-type electrode 707 is formed on the p-type GaN contact layer 705 in the order of Pd (2 nm) / Au (10 nm) using a lithography technique. Next, the wafer on which the p electrode was formed was annealed at 650 ° C. in an N ₂ atmosphere while introducing a small amount of oxygen.

  As a result, the contact resistance was reduced by forming the p-type electrode. Next, mask processing is performed again by lithography to form an n-type translucent electrode 706 made of Ti (4 nm) / Au (10 nm) at the bottom of the second split groove. Alternatively, the n-type translucent electrode 706 may be formed so as to cover the first split groove as in the sixth embodiment. In this case, the n-type electrode does not need to be translucent, but rather, it is preferable to thicken Al or the like instead of Au so that the reflectance is high.

  Next, the wafer is turned over, and Al or Ag having a high light reflectance is evaporated on the entire surface of the sapphire seed substrate. This is because light emitted from the light emitting layer is efficiently emitted from the p-electrode side.

  The wafer was set on a dicer, and a first split groove 708 having a depth of 150 μm, a line width of 100 μm, and a pitch of 350 μm was formed in the lattice shape shown in FIG. 1B on the sapphire seed substrate side of the wafer. However, the first dividing groove 708 is formed such that the second dividing groove 709 is substantially in the center of the line width of the first dividing groove, and the dicing direction and the dry etching groove direction are determined by the nitride semiconductor. <11-20> or <1-100> direction. Further, the bottom of the first split groove is formed so as to reach the interface between the seed substrate 10 and the nitride semiconductor film 700.

  Since the groove width of the first split groove 708 is sufficiently larger than the pitch width of 10 μm of the dielectric film 30, the groove width is the same regardless of whether it is formed at the position of the broken line 50 or the broken line 51 in FIG. . When the first dividing groove width is equal to or smaller than the mask width of the dielectric film, the first dividing groove forming position is preferably formed at the dielectric mask position (broken line 51). This is because the nitride semiconductor film coated directly on the dielectric mask grows in association with the mask directly by selective growth, so that voids or the like are easily generated and chip division is facilitated.

  After dicing, the vacuum chuck was released, the wafer was removed from the table, and lightly pressed from the crystal growth side with a roller to obtain a large number of 350 μm square chips from a 2-inch φ wafer. Cracks, chipping and the like were not generated on the cut surface of the chip, and the yield was 85% or more when a product having no external defect was taken out.

  In this reference embodiment, the chip can be divided into a desired shape of 85% or more by forming a nitride semiconductor film including a light emitting layer on a similar nitride semiconductor film 700 doped with chlorine, and The first split groove bottom is formed so as to reach the chlorine-doped nitride semiconductor film 700 without cutting at once, and the second split groove bottom is formed deeper than the nitride semiconductor light emitting layer 703 position. This is because the second split groove is configured to be narrower than the first split groove width.

  That is, since both the growth film and the nitride semiconductor film 700 are the same type of nitride semiconductor, they have the same cleavage characteristics and are easily divided because the substrate is doped with chlorine. Since the split groove bottom is deeper than the nitride semiconductor light emitting layer position and the first split groove is wider than the second split groove, the crack line broken by the second split groove has the shortest cutting distance. In order to crack at the bottom of the first split groove, the second split groove bottom part must reach somewhere in the bottom part of the first split groove below the second split groove bottom part. This is because it is a seed substrate different from a physical semiconductor, so that cleavage is different and it is possible to prevent cleavage in an unintended direction and to cut into a desired chip shape. In addition, since the bottom of the second split groove is deeper than the position of the nitride semiconductor light emitting layer, even if chipping or cracking occurs during chip division, the light emitting layer is not damaged and an element failure occurs. The rate can be reduced. The reason why the second dividing groove having a narrow groove width is formed on the surface on the crystal growth side is to increase the light emitting area. The reason why the first and second groove widths are different is the same as in the first embodiment.

  However, since the second split groove was formed by the etching method, the process steps became complicated, the groove width was larger than that of the scribe, and the chip intake rate per single wafer was reduced.

  As described in Reference Embodiment 6, when a thick nitride semiconductor film 700 doped with chlorine is grown on a seed substrate, the warpage of the wafer itself is small and breaks into pieces depending on the contact stress or direction of the blade. There was nothing.

  The effect of this reference embodiment when not doped with chlorine is the same as that of the reference embodiment 6.

  In the present embodiment, dicing is used to form the first split groove, but the groove may be formed by a chemical method such as wet etching or dry etching. For dry etching, for example, a reactive ion etching method, an ion milling method, a focused ion beam method, an ECR etching method, or the like can be used. Examples of wet etching include hydrofluoric acid, hot phosphoric acid, a mixed solution of hot phosphoric acid and sulfuric acid, and the like. As a physical groove forming method, scribing or the like may be used in addition to the half-cut by dicing introduced in the present embodiment. However, since the first split groove must be wider than the second split groove width, formation of the first split groove by scribing is not very preferable.

  In this reference embodiment, dry etching is used to form the second groove width, but wet etching, dicing, scribe, or the like may be used. However, the second split groove of the present embodiment is most preferably a dry etching method or a wet etching method. This is because by using these etching methods, damage to the nitride semiconductor light-emitting layer due to the groove formation can be suppressed. However, in order to perform the etching method, it is necessary to perform mask processing using a lithography technique.

  Further, as shown in FIG. 1C, a pair of chipped grooves may be formed only at the edge portion in the split groove to divide the element. In this case, it is preferable that the cutting distance from the first split groove bottom to the second split groove bottom is 150 μm or less. However, the cutting distance is the thickness when the nitride semiconductor thick film is doped with chlorine.

  In the present embodiment, the sapphire seed substrate is polished and thinned to about 150 μm. According to experiments by the present inventors, the thickness of the sapphire seed substrate is preferably 250 μm or less, more preferably 200 μm or less. It was good.

  The feature of the present embodiment is that the bottom of the first groove reaches the nitride-doped nitride semiconductor film, the bottom of the second groove is located below the nitride semiconductor light emitting layer, The cutting distance between the bottom of the first split groove and the bottom of the second split groove is shortened. The cutting distance is preferably 200 μm or less, more preferably 150 μm or less and 50 μm or more.

  This reference embodiment may use the chip dividing method of the fourth embodiment as long as the above features are included.

(Embodiment 6)
In the sixth embodiment, the split groove forming direction and the chip shape when using the C-plane nitride semiconductor substrate in the first to fifth embodiments will be described. However, the direction described below is an orientation with respect to the nitride semiconductor.

  In consideration of the ease of chip division, the forming direction of the dividing groove is preferably the <11-20> direction, and then the <1-100> direction. From the said direction, you may shift | deviate to about +/- 5 degree. An end face formed by dividing and dividing the groove along the <11-20> direction is a {1-100} plane. Further, an end face formed by dividing and dividing the groove along the <1-100> direction is a {11-20} plane.

  Chip shapes formed by combinations of these directions include squares, rectangles, regular triangles, rhombuses, parallelograms, trapezoids, and regular hexagons. It is preferable to divide into the above-mentioned chip shape so that the formation direction of the split groove includes at least the <11-20> direction. For example, in the case of a regular triangular, rhombus, trapezoidal, regular hexagonal chip shape in which the dividing groove is formed only in the <11-20> direction, the chip dividing yield is easy because the chip dividing direction is easy. Is good. When a rectangle is selected from the above chip shapes, the ratio of the long side L to the short side S of the rectangle is preferably L / S = 1.04-4. More preferably, the direction of the short side of the rectangle is the <1-100> direction, and the direction of the long side is the <11-20> direction. This is because a large number of grooves are formed in the <11-20> direction where chip division is easy, and conversely, a smaller number of grooves are formed in the <1-100> direction where chip division is difficult compared to the above direction.

  Further, in accordance with the above azimuth relation, when the groove is formed with a groove on the short side in the direction difficult to divide the chip, the L / S ratio is larger than 1. Therefore, from the lever principle, it is difficult to divide the chip efficiently. A force can be applied to the slit and the chip can be divided easily. For example, when the L / S ratio is 4, it can be divided by a force four times that of a normal chip division. The upper limit of the L / S ratio is set to 4 because it is difficult to arrange the chip when packaging the chip on the stem of the light emitting diode. Therefore, when the purpose is chip division, L / S may be larger than 4.

(Embodiment 7)
In the seventh embodiment, the split groove forming direction and the chip shape when using the M-plane nitride semiconductor substrate in the first to fifth embodiments will be described. However, the direction described below is an orientation with respect to the nitride semiconductor.

  In consideration of the ease of chip division, the forming direction of the dividing groove is preferably the <0001> direction, and then the <2-1-10> direction. From the said direction, you may shift | deviate to about +/- 5 degree. An end face formed by dividing and dividing the groove along the <0001> direction is a {2-1-10} plane. An end face formed by dividing and dividing the groove along the <2-1-10> direction is a {0001} plane.

Chip shapes formed by combinations of these directions include a square and a rectangle.
When a rectangle is selected from the above chip shapes, the ratio of the long side L to the short side S of the rectangle is preferably L / S = 1.04-4. More preferably, the direction of the short side of the rectangle is the <2-1-10> direction, and the direction of the long side is the <0001> direction. This is because a large number of grooves are formed in the <0001> direction where chip division is easy, and conversely, there are fewer grooves in the <2-1-10> direction where chip division is difficult compared to the above direction.

  Further, in accordance with the above azimuth relation, when the groove is formed with a groove on the short side in the direction difficult to divide the chip, the L / S ratio is larger than 1. Therefore, from the lever principle, it is difficult to divide the chip efficiently. A force can be applied to the slit and the chip can be divided easily. For example, when the L / S ratio is 4, it can be divided by a force four times that of a normal chip division. The upper limit of the L / S ratio is set to 4 because it is difficult to arrange the chip when packaging the chip on the stem of the light emitting diode. Therefore, when the purpose is chip division, L / S may be larger than 4.

(Embodiment 8)
In the eighth embodiment, the groove forming direction and the chip shape when using the R-plane nitride semiconductor substrate in the first to fifth embodiments will be described. However, the direction described below is an orientation with respect to the nitride semiconductor.

  In consideration of ease of chip division, the formation direction of the dividing groove is preferably the <0-111> direction, and then the <2-1-10> direction. From the said direction, you may shift | deviate to about +/- 5 degree. An end face formed by dividing and dividing the groove along the <0-111> direction is a {2-1-10} plane. Further, the end face formed by dividing and dividing the groove along the <2-1-10> direction is a {0-111} plane.

Chip shapes formed by combinations of these directions include a square and a rectangle.
When a rectangle is selected from the above chip shapes, the ratio of the long side L to the short side S of the rectangle is preferably L / S = 1.04-4. More preferably, the direction of the short side of the rectangle is the <2-1-10> direction, and the direction of the long side is the <0-111> direction. This is because a large number of grooves are formed in the <0-111> direction where chip division is easy, and conversely, a smaller number of <2-1-10> directions where chip division is difficult than in the above direction. is there.

  Further, in accordance with the above azimuth relation, when the groove is formed with a groove on the short side in the direction difficult to divide the chip, the L / S ratio is larger than 1. Therefore, from the lever principle, it is difficult to divide the chip efficiently. A force can be applied to the slit and the chip can be divided easily. For example, when the L / S ratio is 4, it can be divided by a force four times that of a normal chip division. The upper limit of the L / S ratio is set to 4 because it is difficult to arrange the chip when packaging the chip on the stem of the light emitting diode. Therefore, when the purpose is chip division, L / S may be larger than 4.

(Embodiment 9)
In the ninth embodiment, the split groove forming direction and the chip shape when using the A-plane nitride semiconductor substrate in the first to fifth embodiments will be described. However, the direction described below is an orientation with respect to the nitride semiconductor.

  Considering the ease of chip division, the direction of forming the dividing groove is preferably the <0001> direction or the 57.6 ° direction from the <01-10> direction, and then the <01-10> direction. From the said direction, you may shift | deviate to about +/- 5 degree. An end face formed by dividing and dividing the groove along the <0001> direction is a {01-10} face. An end face formed by dividing and dividing the groove along the direction of 57.6 ° from the <01-10> direction is a {01-12} plane. An end face formed by dividing and dividing the groove along the <01-10> direction is a {0001} plane.

  Chip shapes formed by combinations of these directions include squares, rectangles, triangles, parallelograms, and trapezoids. It is preferable to divide into the above chip shapes so that the formation direction of the split groove includes at least the <0001> direction or the 57.6 ° direction from the <01-10> direction.

  Of the above chip shapes, when the chip is divided into a triangle shape or a parallelogram shape so as to include the <0001> direction and the direction of 57.6 ° from the <01-10> direction, the direction in which the chip division is easy is performed. Therefore, the yield of chip division is good. Among the above chip shapes, when the chip is divided into parallelograms so as to include the <01-10> direction and the 57.6 ° direction from the <01-10> direction, the direction of the short side of the parallelogram Is the <01-10> direction, and the direction of the long side is 57.6 ° from the <01-10> direction. This is because many grooves are formed in the direction of 57.6 ° from the <01-10> direction where chip division is easy, and conversely, the <01-10> direction where chip division is difficult is less than in the above direction. This is for forming a groove.

  Further, when a rectangle is selected from the above chip shapes, the ratio of the long side L to the short side S of the rectangle is preferably L / S = 1.04-4. More preferably, the direction of the short side of the rectangle is the <01-10> direction, and the direction of the long side is the <0001> direction. This is because a large number of grooves are formed in the <0001> direction where chip division is easy, and conversely, a smaller number of <01-10> directions where chip division is difficult than in the above direction is formed. Further, in accordance with the rectangular azimuth relationship, when the direction in which the chip is difficult to be divided is formed by forming a groove on the short side and divided, the L / S ratio is larger than 1. Therefore, from the lever principle, the chip can be efficiently formed. A force can be applied to the split grooves that are difficult to divide, and chip division can be facilitated. For example, when the L / S ratio is 4, it can be divided by a force four times that of a normal chip division. The upper limit of the L / S ratio is set to 4 because it is difficult to arrange the chip when packaging the chip on the stem of the light emitting diode. Therefore, when the purpose is chip division, L / S may be larger than 4.

(Embodiment 10)
In the present embodiment, a nitride semiconductor laser element is used to describe end face formation and chip division of the element.

First, a method for manufacturing the n-type GaN substrate 800 will be described.
FIG. 8A includes a seed substrate 11 and an n-type GaN substrate 800. The n-type GaN substrate 800 includes a low-temperature buffer layer 15, an n-type GaN film 21, a dielectric film 31, and n doped with chlorine. It is composed of a type GaN thick film 41.

A low temperature buffer layer 15 is stacked on the seed substrate 11 at 550 ° C. by MOCVD. Next, an n-type GaN film 21 of 1 μm is formed while doping Si at a growth temperature of 1050 ° C. After the n-type GaN film 21 is formed, the wafer is taken out from the MOCVD apparatus, and a dielectric film 31 is formed to a thickness of 100 nm by using a sputtering method, a CVD method or an EB vapor deposition method. The dielectric film 31 is periodically formed by a lithography technique. To a typical stripe pattern. The stripe shape is formed by forming stripes in the <1-100> direction with respect to the n-type GaN film 21, and periodically having a stripe width of 5 μm and a pitch of 10 μm in the <11-20> direction perpendicular to the direction. A stripe pattern was formed. Subsequently, the wafer with the dielectric film 31 processed into the stripe shape is set in an HVPE apparatus, and the growth temperature is 1100 ° C., the Si concentration is 3 × 10 ¹⁸ / cm ³ , and the chlorine concentration is 1 × 10 ¹⁷ / cm ³ . While doping, a 350 μm chlorine-doped n-type GaN thick film 41 is laminated.

  After forming the n-type GaN thick film 41 by the above manufacturing method, the wafer was taken out of the HVPE apparatus, and the seed substrate 11 was peeled off by a polishing machine to produce an n-type GaN substrate 800. The n-type GaN substrate 800 may or may not include the low temperature buffer layer 15. Similarly, the n-type GaN substrate 800 may or may not include the dielectric film 31. The seed substrate may be deleted after the nitride semiconductor laser element structure is manufactured.

In the method for manufacturing the n-type GaN substrate 800, the seed substrate may be any one of C-plane sapphire, M-plane sapphire, A-plane sapphire, R-plane sapphire, GaAs, ZnO, MgO, spinel, Si, and Ge. The low temperature buffer layer 15 includes a low temperature GaN buffer layer, a low temperature AlN buffer layer, a low temperature Al _x Ga _1-x N buffer layer (0 <x <1), and a low temperature In _y Ga ₁ formed at a growth temperature of 450 ° C. to 600 ° C. _-y Any one of N buffer layers (0 <y ≦ 1) may be used. The dielectric film 31 may be any one of SiO ₂ film, SiN _x film, TiO ₂ film, and Al ₂ O ₃ film. The n-type GaN film 21 may be an n-type Al _z Ga _{1 -z} N film (0 <z <1).

The chlorine-doped n-type GaN thick film 41 may be a chlorine-doped n-type Al _w Ga _1-w N thick film (0 <w ≦ 1). The chlorine concentration may be 1 × 10 ¹⁴ / cm ³ or more as in the above embodiment, and the thick film may be 20 μm or more.

  In the method of manufacturing the n-type GaN substrate 800, particularly when the seed substrate is Si, the n-type GaN substrate 800 is manufactured as follows.

  First, an n-type AlGaN film 21 having a thickness of 1 μm is stacked on the Si seed substrate 11 (thickness 400 μm) by MOCVD, and taken out from the MOCVD apparatus. However, the low temperature buffer layer 15 shown in FIG. Further, according to the knowledge of the present inventors, the n-type AlGaN film 21 must be a nitride semiconductor film grown at a high temperature of at least 1000 ° C. and containing at least Al. Except for the above conditions, the nitride semiconductor did not grow on the Si seed substrate.

Next, as in the above manufacturing method, a dielectric film 31 is formed and processed into a stripe shape by a lithography technique. Subsequently, the wafer is set in an HVPE apparatus, and an n-type GaN thick film 41 is formed while doping chlorine and Si. The chlorine concentration may be 1 × 10 ¹⁴ / cm ³ or more as in the above embodiment, and the thick film may be 20 μm or more. Seed substrates that require the same method as the manufacturing method described above are 6H—SiC seed substrates, 4H—SiC seed substrates, and 3C—SiC seed substrates.

  Next, a method for manufacturing a nitride semiconductor laser device using the n-type GaN substrate 800 will be described.

FIG. 8B shows a nitride semiconductor laser structure, which includes an n-type GaN substrate 800, an n-type GaN buffer layer 801, an n-type Al _0.1 Ga _0.9 N cladding layer 802, an n-type GaN light guide layer 803, active The layer 804 includes a p-type Al _0.26 Ga _0.8 N carrier blocking layer 805, a p-type GaN light guide layer 806, a p-type Al _0.1 Ga _0.9 N cladding layer 807, and a p-type GaN contact layer 808.

The n-type GaN substrate 800 has the same chlorine concentration and Si concentration as the chlorine-doped n-type GaN thick film 41. Next, the n-type GaN substrate 800 was set in an MOCVD apparatus, and an n-type GaN buffer layer 801 having a thickness of 1 μm was formed at a growth temperature of 1050 ° C. The n-type GaN buffer layer 801 is intended to alleviate the surface distortion of the n-type GaN substrate 800 and improve the surface morphology and surface irregularities (flattening) that occur when the n-type GaN substrate 800 is peeled off from the seed substrate 11. It is not necessary to have a layer. However, when the n-type GaN thick film 41 is doped with chlorine, the surface morphology tends to deteriorate. Therefore, it is preferable to provide the n-type GaN buffer layer 801 as in the present embodiment. Further, the n-type GaN buffer layer 801 may be an n-type Al _x Ga _1-x N buffer layer (0 <x ≦ 0.3).

Next, an n-type Al _0.1 Ga _0.9 N cladding layer 802 having a thickness of 1.0 μm is grown. Further, an n-type GaN light guide layer 803 having a thickness of 0.1 μm is grown. After the growth of the n-type GaN optical guide layer 803, the substrate temperature is lowered to about 700 ° C. to 800 ° C., and a plurality of 4 nm thick In _0.15 Ga _0.85 N well layers and 10 nm thick In _0.26 Ga _0.74 N barrier layers are used. An active layer 804 (multi-quantum well structure. The active layer of this embodiment forms a three-period barrier layer and a well layer, and then grows the barrier layer) is grown. At that time, Si may be doped or not doped.

Next, the substrate temperature is raised again to 1050 ° C., and a carrier block layer 805 made of p-type Al _0.2 Ga _0.8 N having a thickness of 20 nm is grown. At this time, Mg may be doped or not doped. Further, even if the carrier block layer is not provided, no significant trouble occurs.

Thereafter, a p-type GaN light guide layer 806 having a thickness of 0.1 μm is grown while doping Mg. Further, a cladding layer 807 made of p-type Al _0.1 Ga _0.9 N having a thickness of 0.5 μm is grown while doping Mg. Finally, a contact layer 808 made of p-type GaN having a thickness of 0.1 μm was grown while doping Mg.

In this way, after growing the p-type GaN contact layer 808, the inside of the reactor of the MOCVD apparatus was changed to all nitrogen carrier gas and NH ₃ and the temperature was lowered at 60 ° C./min. When the substrate temperature reached 850 ° C., the supply amount of NH ₃ was stopped, the substrate temperature was waited for 5 minutes, and then the temperature was lowered to room temperature. The holding temperature of the substrate is preferably between 650 ° C. and 900 ° C., and the waiting time is preferably 3 minutes or more and 15 minutes or less. Further, the rate of arrival of the temperature drop is preferably 30 ° C./min or more. As a result of evaluating the growth film thus prepared by Raman measurement, the above-described method has already shown p-type characteristics after growth without performing the conventionally used p-type annealing. Further, the contact resistance due to the formation of the p-type electrode has also been reduced. As a result of the SIMS measurement, the residual hydrogen concentration was 3 × 10 ¹⁸ / cm ³ or less near the outermost surface of the p-type GaN contact layer 808.

According to the experiments by the inventors, when the substrate temperature was lowered to room temperature in the NH ₃ atmosphere after forming the growth film, the residual hydrogen concentration was high in the vicinity of the growth film outermost surface. It is considered that the residual hydrogen concentration is caused by the NH ₃ atmosphere after the growth is completed. This residual hydrogen is known to hinder the activation of Mg which is a p-type impurity. The residual hydrogen concentration is preferably 5 × 10 ¹⁹ / cm ³ or less.

Thus, after the growth of the p-type GaN contact layer 808, the carrier gas is replaced with N ₂ , the supply amount of NH ₃ is stopped, and the growth temperature is maintained for a predetermined time, thereby promoting the p-type growth and the growth film. The residual hydrogen concentration near the outermost surface was reduced and the contact resistance was reduced. As a method for further reducing the contact resistance due to the formation of the p-type electrode, it is preferable to remove the vicinity of the growth film outermost surface (the outermost surface of the p-type layer) by etching and form the p-type electrode on the removal surface. The layer thickness for removing the outermost surface of the growth film (the outermost surface of the p-type layer) is preferably 10 nm or more, and there is no particular upper limit, but the residual hydrogen concentration in the vicinity of the removal surface should be 5 × 10 ¹⁹ / cm ³ or less. Is preferred.

The active layer 804 in this embodiment has a multi-quantum well structure having three periods, but may have another periodic structure or a single quantum well structure having only a well layer. The active layer may be made of In _y Ga _1-y N (0 <y ≦ 1), and the In composition may be changed in accordance with a desired laser oscillation wavelength.

  The p-type impurity concentration of the p-type GaN contact layer 808 is preferably increased toward the formation position of the p-type electrode. This reduces the contact resistance due to p-type electrode formation. Further, in order to remove residual hydrogen in the p layer that hinders activation of Mg, which is a p-type impurity, a trace amount of oxygen may be mixed during the growth of the p-type layer.

  Hereinafter, the chip division of the wafer on which the nitride semiconductor laser element is formed will be described with reference to FIGS. 8C, 8D, 9A, and 9B. Here, the crystal growth side refers to the opposite side to the substrate side.

  First, the GaN substrate side of the wafer is polished by a polishing machine so that the chlorine-doped GaN substrate has a thickness of 100 μm and mirror-finished. Next, the wafer is etched with a mixed solution made of sulfuric acid containing hydrofluoric acid or hot phosphoric acid. This etching process is performed in order to remove surface distortion and oxide film generated by polishing, to reduce the contact resistance of the p-type and n-type electrodes and to prevent electrode peeling.

Next, using a reactive ion etching apparatus, the p-type Al _0.1 Ga _0.9 N cladding layer 807 is dug down to the front of the p-type GaN light guide layer 806 to form a ridge stripe structure (ridge portion 820), and refraction. An index-guided laser diode is fabricated. The stripe direction of the ridge was formed in the <1-100> direction of the nitride semiconductor (FIGS. 9A and 9B).

  Next, as in the fourth embodiment, the bottom of the split groove is located below the formation position of the active layer 804 on the crystal growth side surface (p-type GaN contact layer) by using the reactive ion etching method. In this manner, second split grooves 813 having a depth of 1 μm, a line width of 10 μm, and a pitch of 300 μm were formed (FIG. 9A). The second split groove was formed along the <1-100> direction, which is the same direction as the stripe direction.

Next, a SiO ₂ insulating film 809 is deposited, the outermost surface of the p-type GaN contact layer 808 of the ridge 820 is exposed, and Pd (10 nm) / Mo (10 nm is formed so as to cover the exposed portion (2 μm width). ) / Au (150 nm) are sequentially deposited to form the p-type electrode 810. After forming the p-type electrode 810, annealing was performed in a N ₂ atmosphere at 450 ° C. while introducing a small amount of oxygen. As a result, the contact resistance was reduced by forming the p-type electrode.

  Subsequently, the wafer is turned over, and an n-type electrode 811 made of Ti (15 nm) / Al (150 nm) is patterned on the GaN substrate side by lithography. The pattern is formed in order to confirm the formation position of the second dividing groove 813 from the GaN substrate side.

  Next, an adhesive sheet is affixed to the surface of the crystal growth side, and the GaN substrate side is pasted on a table of a dicer and fixed with a vacuum chuck. The formation position of the split groove is shown in FIG. After fixing, a dicer is used to form first split grooves 812 having a pitch of 300 μm, a depth of 20 μm, and a line width of 50 μm on the surface on the GaN substrate side. However, the first split groove 812 is formed such that the center of the line width of the first split groove 812 coincides with the center of the line width of the second split groove 813, and the direction of the split groove is nitriding. It is the <1-100> direction with respect to the physical semiconductor.

  Next, first split grooves 814 having a pitch of 500 μm, a depth of 20 μm, and a line width of 30 μm are formed by dicing in the <11-20> direction perpendicular to the direction of the first split grooves 812.

  After dicing, the wafer is taken out from the dicer apparatus, and then attached to the scriber table with the GaN substrate side facing up, and fixed with a vacuum chuck. After fixing, the scriber diamond needle is scribed once at a pitch of 500 μm, a depth of 3 μm, and a line width of 5 μm along the substantially center line on the bottom of the first split groove 814. In this way, the third split groove 815 is formed. However, the scribe direction is the <11-20> direction with respect to the nitride semiconductor.

  After scribing, the vacuum chuck is released, the wafer is removed from the table, and lightly cleaved from the GaN substrate side along the third split groove 815 with a braking device to form a mirror end face of the laser element (FIG. 8 (c)). )). Subsequently, chip division is performed in the same manner as described above along the direction of the first dividing groove 812 (FIG. 8D).

  In this way, a large number of laser element chips were obtained from a 2-inch φ wafer. Cracks, chipping, etc. did not occur on the mirror end face or cut surface of the chip, and the yield was 95% or more when a product having no external defect was taken out.

  When the mirror end face of the laser element is formed by cleavage, as in the present embodiment, the {1-100} face, which is the cleavage face of the nitride semiconductor, is used as the mirror end face in the <11-20> direction. It is desirable to form a dividing groove along. In addition, when the split groove is formed only on the substrate side without forming the split groove on the surface on the crystal growth side as in the second embodiment and the reference embodiment 2, the mirror end surface near the active layer becomes sharper. can do.

  Further, the division method according to the sixth embodiment and the second embodiment, or the division method according to the sixth embodiment and the reference embodiment 2 may be used.

  On the other hand, when the mirror end face of the laser element is formed by etching, it is desirable to form it by the methods of Embodiments 4 and 5 and Reference Embodiments 4, 5 or 7. This is because the mirror end face formation and the split groove formation for chip division can be formed simultaneously.

  When performing chip division excluding the formation of the mirror end face of the laser element, any one of Embodiments 1 to 5 and Reference Embodiments 1 to 7 may be used.

The effects obtained in this embodiment are the same as those in the above embodiment.
In this embodiment, the crystal growth is performed in the order of the n-type layer, the light-emitting layer, and the p-type layer from the substrate side, but conversely, the crystal may be grown in the order of the p-type layer, the light-emitting layer, and the n-type layer. As described above, the mirror end face formation and the chip division of the nitride semiconductor laser element can be obtained with high yield.

10 sapphire seed substrate, 11 seed substrate, 15 low-temperature buffer layer, 20, 21 n-type GaN film, 30, 31 dielectric film, 40, 41 chlorine-doped n-type GaN thick film, 600, 700 nitride semiconductor film, 100, 200, 300, 400, 500, 800 n-type GaN substrate, 102, 202, 302, 402, 502, 602, 702 n-type Al _x1 Ga _1-x1 N clad layer, 103, 203, 303, 403, 503 , 603, 703, 804 active layer, 104, 204, 304, 404, 504, 604, 704 p-type Al _x2 Ga _1-x2 N clad layer, 106, 206, 306, 406, 506, 606, 706, 811 n Type electrode 107, 207, 307, 407, 507, 607, 707, 810 P type electrode, 108, 208, 308, 408, 5 8,608,708 first split groove, 109,310,409,509,609,709 second split groove, 209 and 309 the third split groove, 802 n-type Al _0.1 Ga _0.9 N cladding layer, 803 n GaN optical guide layer, 805 p-type Al _0.2 Ga _0.8 N carrier blocking layer, 806 p-type GaN optical guide layer, 807 p-type Al _0.1 Ga _0.9 N cladding layer, 808 p-type GaN contact layer, 809 SiO ₂ insulating film, 812 First split groove, 813 Second split groove, 814 First split groove, 815 Third split groove.

Claims (15)

A nitride semiconductor for dividing a wafer in which a nitride semiconductor layer having a multilayer structure having an active layer sandwiched between a p-type layer and an n-type layer on a nitride semiconductor substrate doped with chlorine is divided into nitride semiconductor chips A chip manufacturing method comprising:
Forming a wide first dividing groove in a desired chip shape on the substrate side constituting one surface of the wafer;
A narrow second groove or chip groove is formed in a desired chip shape on the crystal growth side constituting the other surface of the wafer and at a position opposite to the position where the first groove is formed. Process,
A method for manufacturing a nitride semiconductor chip, comprising: dividing a region formed of a nitride semiconductor crystal into chips from the first dividing groove.   2. The method for manufacturing a nitride semiconductor chip according to claim 1, further comprising a step of forming a formation position of a bottom portion of the second split groove deeper than an active layer position of the wafer. 3.   Forming the bottom of the second dividing groove to a depth reaching the interface between the nitride semiconductor layer and the nitride semiconductor substrate of the wafer; or forming the bottom of the second dividing groove deeper than the interface. The method for producing a nitride semiconductor chip according to claim 1, further comprising a step.   4. The nitride semiconductor chip according to claim 1, further comprising a step of setting a distance between a bottom portion of the first split groove and a bottom portion of the second split groove to 150 μm or less. 5. Production method.   4. The method for manufacturing a nitride semiconductor chip according to claim 1, wherein a narrow third groove or chip groove is formed in the first groove. 5.   6. The method for manufacturing a nitride semiconductor chip according to claim 5, further comprising a step of setting the distance between the bottom of the second split groove and the bottom of the third split groove to 150 [mu] m or less.   The groove forming directions of the first split groove, the second split groove, and the third split groove are <11-20> direction, <1-100> direction, <0001> of the nitride semiconductor layer. 7. The method for manufacturing a nitride semiconductor chip according to claim 5, wherein the method is any one of a direction, a <0-111> direction, and a direction of 57.6 ° from the <01-10> direction. A manufacturing method in which a wafer in which a nitride semiconductor layer having a multilayer structure having an active layer sandwiched between a p-type layer and an n-type layer is laminated on a nitride semiconductor substrate doped with chlorine is divided into nitride semiconductor chips. There,
Forming a wide first dividing groove in a desired chip shape on the substrate side constituting one surface of the wafer;
Forming a narrow third split groove or chipped groove in a desired chip shape in the first split groove;
A method of manufacturing a nitride semiconductor chip comprising a step of dividing a region formed of a nitride semiconductor crystal using the first split groove and the third split groove or chip groove. .   The end faces when divided by chip division are the {1-100} plane, {11-20} plane, {0001} plane, {0-111} plane, {01-12} plane of the nitride semiconductor layer. 9. The method for manufacturing a nitride semiconductor chip according to claim 1, wherein the method is any one of the above. A manufacturing method for dividing a wafer in which a nitride semiconductor layer having a multilayer structure having an active layer sandwiched between a p-type layer and an n-type layer on a substrate is divided into nitride semiconductor chips or forming a mirror end face,
The substrate is an M-plane ({1-100}) nitride semiconductor substrate doped with chlorine;
When the shape of the nitride semiconductor chip to be divided is a rectangle, and the long side of the rectangle is L and the short side is S, the ratio of the long side to the short side (L / S) is 1.01 or more and 4 or less. In addition, the wafer has a wide width so that the direction of the long side L is the <0001> direction of the nitride semiconductor and the direction of the short side S is the <2-1-10> direction of the nitride semiconductor. Forming a first slit of
Forming a narrow second groove or chip groove in the wafer;
A step of dividing the region formed of the nitride semiconductor crystal into a rectangular shape by using the first dividing groove or the second dividing groove or chipping groove, and forming a rectangular shape; Manufacturing method.   Forming the first split groove in a desired chip shape on one surface of the wafer and forming the second split groove or chip groove in the desired chip shape on the other surface of the wafer; The method for manufacturing a nitride semiconductor chip according to claim 10, wherein:   12. The first dividing groove is formed on a substrate side, the second dividing groove or a chip groove is formed on a crystal growth side, and chips are divided from the second dividing groove. A method for producing a nitride semiconductor chip as described in 1. above.   11. The method for manufacturing a nitride semiconductor chip according to claim 10, wherein the first split groove and the second split groove or chipped groove are formed on one surface side of the wafer.   14. The method for manufacturing a nitride semiconductor chip according to claim 10, wherein a third narrow groove or a chip groove having a narrow width is formed in the first split groove. A wafer in which a nitride semiconductor layer having a multilayer structure having an active layer sandwiched between a p-type layer and an n-type layer is stacked on an M-plane ({1-100}) nitride semiconductor substrate doped with chlorine. An M-plane nitride semiconductor chip formed by dividing,
Has a rectangular shape,
The direction of the short side S of the rectangle is the <2-1-10> direction of the nitride semiconductor,
The direction of the long side L of the rectangle is the <0001> direction of the nitride semiconductor,
The M-plane nitride semiconductor chip, wherein the ratio of the long side L to the short side S is 1.01 or more and 4 or less.

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