JP2010091682A - Active matrix type organic el display device and method for driving the same - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an active matrix type organic EL display device in which improving highly accuracy can be performed, a gradation reproduction property is excellent, luminance variation can be suppressed, and display definition dignity is excellent; and to provide a method of driving the same. <P>SOLUTION: The active matrix type organic EL display device includes a plurality of image signal lines VL and a plurality of pixels. Each pixel has an organic EL diode OLED including an positive electrode connected to a high potential power source wiring, a P-channel type driving transistor DRT including a drain electrode connected to a low potential power source wiring, a capacity part Cs connected to a source electrode and a gate electrode of the driving transistor, an initialization transistor TCT switching whether initialization voltage Vini can be output ot not, and a write-in transistor SST switching whether image signal voltage Vsig supplied through the image signal line VL can be output or not. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to an active matrix organic EL display device and a method for driving an active matrix organic EL display device.

  In recent years, the demand for flat display devices typified by liquid crystal display devices has been rapidly increased by taking advantage of the features of thinness, light weight, and low power consumption. In particular, an active matrix display device in which a pixel switch having a function of electrically separating an on pixel and an off pixel and holding a video signal to the on pixel is provided in each pixel has crosstalk between adjacent pixels. Since a good display quality without any problem can be obtained, it has come to be used for various displays including portable information devices.

  As such a flat-type active matrix display device, an organic electroluminescence (EL) display device using a self-luminous element has attracted attention, and research and development has been actively conducted. The organic EL display device does not require a backlight that obstructs the reduction in thickness and weight, is suitable for moving image reproduction because of high-speed response, and further has a feature that it can be used even in a cold region because the luminance does not decrease at low temperatures.

The organic EL display device includes an organic EL element as a display element for each pixel and a pixel circuit that supplies a drive current to the display element, and performs a display operation by controlling the light emission luminance of the display element. As such an organic EL display device, a method of supplying image information to a pixel circuit by a voltage signal is known (see, for example, Patent Documents 1 and 2).
US Pat. No. 6,229,506 JP 2005-31630 A

However, the active matrix organic EL display device disclosed in Patent Document 1 has a problem in that local display unevenness occurs due to variations in the two capacitance ratios. In addition, since there are many elements such as transistors in each pixel, there is a problem that it is difficult to achieve high definition.
The present invention has been made in view of the above points, and an object of the present invention is to provide an active matrix organic EL display device capable of high definition, excellent gradation reproducibility, and excellent display quality capable of suppressing luminance unevenness, and An object of the present invention is to provide a driving method for an active matrix organic EL display device.

In order to solve the above problems, an active matrix organic EL display device according to an aspect of the present invention provides:
Multiple video signal lines;
A plurality of pixels connected to each of the video signal lines,
Each pixel is
An organic EL diode including an anode connected to a high-potential power wiring, a cathode disposed opposite to the anode, and an organic material layer sandwiched between the anode and the cathode;
A P-channel driving transistor including a source electrode connected to the cathode of the organic EL diode, a drain electrode connected to a low-potential power line, and a gate electrode;
A capacitor including a first electrode connected to a source electrode of the driving transistor and a second electrode connected to a gate electrode of the driving transistor;
Including a drain electrode connected to a source electrode of the driving transistor, a gate electrode connected to a first scanning signal line, and a source electrode to which an initialization voltage is supplied, and switching whether to output the initialization voltage, the driving An initialization transistor that switches whether to initialize the potential of the source electrode of the transistor; and
A video signal supplied via the video signal line, including a drain electrode connected to the gate electrode of the driving transistor, a source electrode connected to the video signal line, and a gate electrode connected to a second scanning signal line And a write transistor for switching whether to output a voltage.

In addition, an active matrix organic EL display device according to another aspect of the present invention includes:
Multiple video signal lines;
A plurality of pixels connected to each of the video signal lines,
Each pixel is
An organic EL diode including an anode connected to a high-potential power wiring, a cathode disposed opposite to the anode, and an organic material layer sandwiched between the anode and the cathode;
A P-channel driving transistor including a source electrode connected to the cathode of the organic EL diode, a drain electrode connected to a low-potential power line, and a gate electrode;
A capacitor including a first electrode and a second electrode connected to the gate electrode of the driving transistor;
A source electrode connected to the first electrode of the capacitor, a gate electrode connected to the first scanning signal line, and a drain electrode connected to the source electrode of the driving transistor, the potential of the source electrode of the driving transistor being An initialization transistor for switching whether to initialize, and
A source electrode connected to the high-potential power line, a gate electrode connected to the first scanning signal line, and a drain electrode connected to the gate electrode of the driving transistor, and the potential of the gate electrode of the driving transistor is A reset transistor that switches whether to set the potential of the high-potential power supply wiring,
A video supplied through the video signal line, including a drain electrode connected to the first electrode of the capacitor, a source electrode connected to the video signal line, and a gate electrode connected to the second scanning signal line And a write transistor for switching whether to output a signal voltage.

In addition, a driving method of an active matrix organic EL display device according to another aspect of the present invention includes:
A plurality of video signal lines; and a plurality of pixels connected to the video signal lines, each pixel including an anode connected to a high-potential power line, a cathode disposed opposite to the anode, and the anode And an organic EL diode including an organic material layer sandwiched between the cathode, a source electrode connected to the cathode of the organic EL diode, a drain electrode connected to a low-potential power wiring, and a P-channel type including a gate electrode A capacitor including a driving transistor, a first electrode connected to the source electrode of the driving transistor, and a second electrode connected to the gate electrode of the driving transistor, and a drain electrode connected to the source electrode of the driving transistor , Including a gate electrode connected to the first scanning signal line and a source electrode to which an initialization voltage is supplied, and switching whether to output the initialization voltage An initialization transistor for switching whether to initialize the potential of the source electrode of the driving transistor, a drain electrode connected to the gate electrode of the driving transistor, a source electrode connected to the video signal line, and a second scanning signal line And a write transistor that switches whether to output a video signal voltage supplied via the video signal line, and a driving method for an active matrix organic EL display device,
In the reset period, the initialization transistor is turned on, the initialization voltage Vini is applied to the source electrode of the drive transistor via the initialization transistor, and the potential of the source electrode of the drive transistor is set to the initialization potential Vini. And a reset voltage Vrst is applied to the gate electrode of the driving transistor to set the potential of the gate electrode of the driving transistor to the reset potential Vrst,
In the cancellation period following the reset period, the reset voltage is applied to the gate electrode of the drive transistor, the initialization transistor is switched to a non-conductive state, and the potential of the source electrode of the drive transistor is set to the reset potential. A difference Vrst−Vth from the threshold voltage Vth of the driving transistor is set.
In the write period following the cancel period, the video transistor is turned on, and the video signal voltage Vsig corresponding to the gradation of light emitted from the organic EL diode is supplied to the gate electrode of the drive transistor via the write transistor. And the potential of the source electrode of the driving transistor is set to Vrst−Vth−ΔV obtained by adding a variation (−ΔV) of the potential of the source electrode of the driving transistor caused by the application of the video signal voltage.
In the light emission period following the address period, when the address transistor is switched to a non-conductive state and the gain coefficient of the drive transistor is β, the output current of the drive transistor is Iel = ½ × β × (Vsig−Vrst + ΔV) ² Is applied to the organic EL diode to emit light.

In addition, a driving method of an active matrix organic EL display device according to another aspect of the present invention includes:
A plurality of video signal lines; and a plurality of pixels connected to the video signal lines, each pixel including an anode connected to a high-potential power line, a cathode disposed opposite to the anode, and the anode And an organic EL diode including an organic material layer sandwiched between the cathode, a source electrode connected to the cathode of the organic EL diode, a drain electrode connected to a low-potential power wiring, and a P-channel type including a gate electrode A capacitor including a driving transistor, a first electrode and a second electrode connected to the gate electrode of the driving transistor; a source electrode connected to the first electrode of the capacitor; and a first scanning signal line. A gate electrode and a drain electrode connected to the source electrode of the driving transistor, and an initial stage for switching whether to initialize the potential of the source electrode of the driving transistor A transistor, a source electrode connected to the high potential power line, a gate electrode connected to the first scanning signal line, and a drain electrode connected to the gate electrode of the driving transistor, A reset transistor for switching whether to set the potential to the potential of the high-potential power line, a drain electrode connected to the first electrode of the capacitor, a source electrode connected to the video signal line, and a second scanning signal line In a driving method of an active matrix organic EL display device, including a connected gate electrode, and a write transistor that switches whether to output a video signal voltage supplied via the video signal line,
In the reset period, the reset transistor is turned on, the potential of the gate electrode of the drive transistor is set to the same voltage potential PVDD as that of the high-potential power supply line through the reset transistor, and the source electrode of the drive transistor Is applied with a reset voltage Vrst to set the potential of the source electrode of the drive transistor to the reset potential Vrst,
In the cancellation period following the reset period, the initialization transistor is turned on, and the potential of the source electrode of the driving transistor is set to a difference PVDD−Vth between the voltage potential and the threshold voltage Vth of the driving transistor,
In the writing period following the cancellation period, the reset transistor and the initialization transistor are switched to a non-conductive state, the writing transistor is turned on, and a video signal voltage corresponding to the gradation of light emitted from the organic EL diode. Vsig is applied to the capacitor through the write transistor and stored in the capacitor, and the potential of the gate electrode of the drive transistor is set to Vsig + Vth,
In the light emission period following the address period, when the address transistor is switched to a non-conductive state and the gain coefficient of the drive transistor is β, the output current of the drive transistor Iel = ½ × β × (Vsig−PVDD) ² Is applied to the organic EL diode to emit light.

  According to the present invention, there is provided an active matrix organic EL display device and an active matrix organic EL display device having excellent display quality capable of high definition, excellent gradation reproducibility and suppressing luminance unevenness. Can be provided.

  Hereinafter, an active matrix organic EL display device and an active matrix organic EL display device driving method according to a first embodiment of the present invention will be described in detail with reference to the drawings.

  FIG. 1 is a plan view schematically showing the display device according to the first embodiment. FIG. 2 is a partial cross-sectional view schematically showing an example of a structure that can be employed in the display device of FIG. FIG. 3 is an equivalent circuit diagram of a pixel included in the display device of FIG. In FIG. 2, the display device is drawn such that its display surface, that is, the front surface or the light emitting surface faces downward, and the back surface faces upward.

  This display device is a bottom emission type organic EL display device adopting an active matrix driving method. As shown in FIG. 1, the organic EL display device includes a display panel DP, a video signal line driver XDR, scanning signal line drivers YDR1 and YDR2, and a video signal line driver XDR and scanning signal line drivers YDR1 and YDR2. And a controller 12 for controlling the display panel DP. The controller 12, the video signal line driver XDR, and the scanning signal line drivers YDR1 and YDR2 form a drive unit 10. In this embodiment, the display panel DP is an organic EL panel.

  As shown in FIGS. 1 and 2, the display panel DP includes an insulating substrate SUB such as a glass substrate, for example. The display panel DP includes m × n pixels PX arranged in a matrix on the substrate SUB and constituting the display region R1.

On the substrate SUB, as shown in FIG. 2, an undercoat layer UC is formed. For example, the undercoat layer UC is formed by laminating a SiN _X layer and a SiO _X layer in this order on the substrate SUB.

A channel layer SC is arranged on the undercoat layer UC. Each channel layer SC is, for example, a polysilicon layer including a p-type region and an n-type region. On the undercoat layer UC, lower electrodes (not shown) are further arranged. These lower electrodes are, for example, n ⁺ type polysilicon layers.

  The channel layer SC and the lower electrode are covered with a gate insulating film GI. The gate insulating film GI can be formed using, for example, TEOS (tetraethyl orthosilicate).

  On the gate insulating film GI, m scanning signal lines Sa (1 to m) and scanning signal lines Sb (1 to m), which are independently provided, are formed. As shown in FIG. 1, each of the scanning signal lines Sa and Sb extends in the row direction (X direction) of the pixel PX, which will be described later, and is arranged in the column direction (Y direction) of the pixel PX. The scanning signal lines Sa and Sb are made of, for example, MoW.

  On the gate insulating film GI, upper electrodes (not shown) are further arranged. These upper electrodes are made of, for example, MoW. The upper electrode can be formed in the same process as the scanning signal lines Sa and Sb.

  Each of the scanning signal lines Sa and Sb intersects the channel layer SC, and these intersecting portions constitute a thin film transistor. Further, the upper electrode intersects with the channel layer SC, and these intersecting portions also constitute a thin film transistor.

  Specifically, the thin film transistor formed by the intersection of the scanning signal line Sa and the channel layer SC is the initialization transistor TCT. The thin film transistor formed by the intersection of the scanning signal line Sb and the channel layer SC is the write transistor SST. The thin film transistor formed by the intersection of the upper electrode and the channel layer SC is the drive transistor DRT.

  In this example, the drive transistor DRT, the initialization transistor TCT, and the write transistor SST are top-gate P-channel thin film transistors. In FIG. 2, the portion indicated by reference symbol G is the gate electrode of the drive transistor DRT.

  The upper electrode faces the lower electrode. The upper electrode, the lower electrode, and the gate insulating film GI interposed therebetween constitute the capacitor Cs shown in FIGS. Here, the capacitor Cs is a capacitor.

The gate insulating film GI, the scanning signal lines Sa and Sb, and the upper electrode are covered with an interlayer insulating film II shown in FIG. The interlayer insulating film II is made of, for example, SiO _X formed by a plasma CVD method or the like.

  On the interlayer insulating film II, n video signal lines VL (1 to n) provided independently are formed. As shown in FIG. 1, each of the video signal lines VL extends in the Y direction and is arranged in the X direction. The video signal line VL is connected to the source electrode of the write transistor SST.

  On the interlayer insulating film II, the source electrode SE and the drain electrode DE shown in FIG. 2 are further formed. The source electrode SE and the drain electrode DE are connected to the source region and the drain region of the channel layer SC through contact holes provided in the interlayer insulating film II and the gate insulating film GI, respectively. The source electrode SE and the drain electrode DE are used for connection between elements included in the pixel PX.

  The drain electrode DE of the drive transistor DRT is electrically connected to a low potential power supply line (not shown). The low potential power supply wiring is set to a reference voltage potential PVSS which is a constant potential.

The video signal line VL, the source electrode SE, and the drain electrode DE have, for example, a three-layer structure of Mo / Al / Mo. These can be formed in the same process. The video signal line VL, the source electrode SE, and the drain electrode DE are covered with a passivation film PS shown in FIG. The passivation film PS is made of, for example, SiN _X.

  The pixel electrodes PE are arranged on the passivation film PS. Each pixel electrode PE is connected to the source electrode SE of the drive transistor DRT in FIG. 2 through a contact hole provided in the passivation film PS.

  In this example, the pixel electrode PE is a light-transmitting front electrode. Further, the pixel electrode PE is a cathode in this example. As a material of the pixel electrode PE, for example, a transparent conductive material such as ITO (Indium Tin Oxide) can be used.

  A partition insulating layer PI is further formed on the passivation film PS. In the partition insulating layer PI, a through hole is provided at a position corresponding to the pixel electrode PE, or a slit is provided at a position corresponding to a column or row formed by the pixel electrode PE. Here, as an example, the partition insulating layer PI has a through hole at a position corresponding to the pixel electrode PE. The partition insulating layer PI is, for example, an organic insulating layer. The partition insulating layer PI is formed using, for example, a photolithography technique.

  On the pixel electrode PE, an organic layer ORG including a light emitting layer is formed as an active layer. The light emitting layer is, for example, a thin film containing a luminescent organic compound whose emission color is red, green, or blue. The organic layer ORG can further include a hole injection layer, a hole transport layer, a hole blocking layer, an electron transport layer, an electron injection layer, and the like in addition to the light emitting layer.

  The partition insulating layer PI and the organic layer ORG are covered with the counter electrode CE. In this example, the counter electrode CE is an electrode connected to each other between the pixels PX, that is, a common electrode. In this example, the counter electrode CE is an anode and a light-reflecting back electrode.

  The counter electrode CE is electrically connected to a high-potential power supply line (not shown) through a contact hole provided in the passivation film PS and the partition insulating layer PI, for example. The high potential power supply wiring is set to a voltage potential PVDD which is a constant potential. Each organic EL diode OLED includes a pixel electrode PE, a counter electrode CE, and an organic material layer ORG sandwiched between both electrodes.

  Each pixel PX includes an organic EL diode OLED, a drive transistor DRT, a capacitor Cs, an initialization transistor TCT, and a write transistor SST. As described above, in this example, the drive transistor DRT, the initialization transistor TCT, and the write transistor SST are P-channel thin film transistors.

  The organic EL diode OLED and the drive transistor DRT are connected in series in this order between a high-potential power line and a low-potential power line (not shown). A power supply voltage PVDD is applied to the high potential power supply wiring, and a power supply voltage PVSS is applied to the low potential power supply wiring. The power supply voltage PVDD and the power supply voltage PVSS are constant voltages.

  When comparing the potential of the high potential power supply line and the potential of the low potential power supply line, the potential of the high potential power supply line is relatively high level, and the potential of the low potential power supply line is relatively low level. Therefore, the node ND1 of the high potential power supply wiring is a high potential power supply terminal, and the node ND2 of the low potential power supply wiring is a low potential power supply terminal. In this embodiment, the high potential power supply wiring is set to a potential of + 5V, and the low potential power supply wiring is set to a potential of -5V.

  Specifically, the counter electrode CE of the organic EL diode OLED is connected to the node ND1. The pixel electrode PE of the organic EL diode OLED is connected to the source electrode SE of the drive transistor DRT. The drain electrode DE of the drive transistor DRT is connected to the node ND2.

  The capacitor Cs is connected between the gate electrode G and the source electrode SE of the drive transistor DRT. The capacitor Cs includes a lower electrode as a first electrode connected to the source electrode SE of the driving transistor DRT and an upper electrode as a second electrode connected to the gate electrode G of the driving transistor DRT. The capacitor unit Cs holds a potential difference between the gate electrode G and the source electrode SE of the drive transistor DRT. The capacitor Cs holds the gate electrode G control potential of the drive transistor DRT determined by the video signal voltage Vsig described later.

  The initialization transistor TCT includes a drain electrode connected to the source electrode SE of the drive transistor DRT, a gate electrode connected to the scanning signal line Sa, and a source electrode supplied with the initialization voltage Vini. The initialization transistor TCT is turned on (conductive state) and turned off (non-conductive state) in response to the control signal TG supplied from the scanning signal line Sa. The initialization transistor TCT switches whether to output the initialization voltage Vini and switches whether to initialize the potential of the source electrode SE of the drive transistor DRT. The initialization transistor TCT regulates current leakage from the capacitor Cs.

  The write transistor SST includes a drain electrode connected to the gate electrode G of the drive transistor DRT, a source electrode connected to the video signal line VL, and a gate electrode connected to the scanning signal line Sb. The write transistor SST is turned on / off in response to a control signal SG supplied from the scanning signal line Sb. The write transistor SST switches whether to output the video signal voltage Vsig supplied via the video signal line VL.

  In this embodiment, the organic EL display device includes a plurality of switching units SW. The switching unit SW is connected to the video signal line VL outside the display region R1. The switching unit SW includes a changeover switch SW1 and a changeover switch SW2 that are respectively connected to the video signal lines. The changeover switch SW1 is used to change whether the video signal voltage Vsig is applied to the corresponding video signal line VL. The changeover switch SW2 switches whether to apply the reset voltage Vrst to the corresponding video signal line VL. The switching unit SW switches whether to apply the video signal voltage Vsig or the reset voltage Vrst to the video signal line VL under the control of the driving unit 10.

  In this example, the video signal line driver XDR and the scanning signal line drivers YDR1 and YDR2 are mounted on the substrate SUB by COG (chip on glass). The video signal line driver XDR and the scanning signal line drivers YDR1 and YDR2 may be mounted by TCP (tape carrier package) instead of COG mounting.

  On the other hand, the controller 12 shown in FIG. 1 is formed on a printed circuit board arranged outside the display panel DP, and controls the video signal line driver XDR and the scanning signal line drivers YDR1 and YDR2. The controller 12 receives a digital video signal and a synchronization signal supplied from the outside, and generates a vertical scanning control signal for controlling the vertical scanning timing and a horizontal scanning control signal for controlling the horizontal scanning timing based on the synchronizing signal.

  Then, the controller 12 supplies the vertical scanning control signal and the horizontal scanning control signal to the video signal line driver XDR and the scanning signal line drivers YDR1 and YDR2, respectively, and outputs the digital video signal in synchronization with the horizontal and vertical scanning timings. The signal line driver XDR is supplied.

  The video signal line driver XDR converts the video signal sequentially obtained in each horizontal scanning period into a video signal voltage Vsig by controlling the horizontal scanning control signal to be a video signal voltage Vsig. Supply in parallel. Further, the video signal line driver XDR may supply the reset voltage Vrst to the plurality of video signal lines VL via each changeover switch SW2.

  A scanning signal line Sb is connected to the scanning signal line driver YDR1, and a scanning signal line Sa is connected to the scanning signal line driver YDR2. The scanning signal line drivers YDR1 and YDR2 include a shift register, an output buffer, and the like. The horizontal scanning start pulse supplied from the outside is sequentially transferred to the next stage, and two kinds of pixels are supplied to the pixels PX in each row via an output buffer (not shown). Control signals, that is, control signals SG and TG are supplied.

  The scanning signal line drivers YDR1 and YDR2 may be formed so as to switch on / off of the changeover switches SW1 and SW2. For example, when the changeover switches SW1 and SW2 are formed of transistors, the scanning signal line drivers YDR1 and YDR2 may output control signals so as to turn on / off the changeover switches SW1 and SW2.

  For example, the scanning signal line drivers YDR1 and YDR2 generate a pulse having a width of one horizontal scanning period (Tw-Starta) corresponding to each horizontal scanning period from a start signal (STV1, STV2) and a clock (CKV1, CKV2). The pulses are output as control signals SG and TG.

  Next, the operation of the pixel PX when the organic EL diode OLED emits light (displays an image) will be described.

Example 1
First, the driving method of the organic EL display device of Example 1 of this embodiment will be described.

In the organic EL display device configured as described above, the operation of the pixel PX is divided into a reset operation, a cancel operation as an OC (offset cancel) operation, a write operation, and a light emission (holding) operation as a display operation. These series of operations are performed, for example, in one vertical scanning period.
Here, FIG. 4 is a schematic diagram showing on / off timings of the write transistor SST, the initialization transistor TCT, the changeover switch SW1, and the changeover switch SW2 in Example 1 of the first embodiment.

First, the reset operation will be described.
The reset operation is performed during the reset period.
FIG. 5 shows the pixel PX in the reset period.

  As shown in FIGS. 1, 3, 4, and 5, in the reset operation, the scanning signal line driver YDR <b> 2 turns on the initialization transistor TCT (on potential), which is a low-level control signal here. TG is output, and the scanning signal line driver YDR1 outputs an on-potential control signal SG for turning on the writing transistor SST. Further, the changeover switch SW1 is set to OFF and the changeover switch SW2 is set to ON.

For this reason, the initialization transistor TCT and the write transistor SST are set to ON. As a result, the initialization voltage Vini is applied to the source electrode of the drive transistor DRT via the initialization transistor TCT, the potential of the source electrode of the drive transistor DRT is set to the initialization potential Vini, and the changeover switch SW2, the video signal line A reset voltage Vrst is applied to the gate electrode of the drive transistor DRT via the VL and the write transistor SST, and the potential of the gate electrode of the drive transistor DRT is set to the reset potential Vrst. Then, the information of the previous frame is reset (initialized).
In this embodiment, the initialization voltage Vini is higher than the power supply voltage PVDD (the potential of the high potential power supply wiring).

Next, the cancel operation will be described.
The cancel operation is performed in a cancel period following the reset period.
FIG. 6 shows the pixel PX during the cancellation period.

  As shown in FIGS. 1, 3, 4, and 6, in the cancel operation, the output of the on-potential control signal SG is maintained from the scanning signal line driver YDR 1 to the write transistor SST, and from the scanning signal line driver YDR 2, A level (off potential) at which the initialization transistor TCT is turned off (here, a high level control signal TG) is output. Further, the changeover switch SW1 is kept off and the changeover switch SW2 is kept on.

  For this reason, the initialization transistor TCT is switched off. The potential of the gate electrode of the drive transistor DRT is fixed to the reset potential Vrst. The potential of the source electrode of the drive transistor DRT is shifted to the low potential side with the initialization potential Vini written in the reset period as an initial value. After the cancellation period, the reset potential Vrst and the threshold voltage Vth of the drive transistor DRT are shifted. Difference Vrst−Vth (in the case of a P-channel type driving transistor DRT).

Next, the write operation will be described.
The write operation is performed in the write period following the cancel period.
FIG. 7 shows the pixel PX in the writing period.

  As shown in FIG. 1, FIG. 3, FIG. 4, and FIG. 7, in the write operation, the output of the off-potential control signal TG is maintained from the scanning signal line driver YDR2 to the initialization transistor TCT, and the scanning signal line driver YDR1 The output of the on-potential control signal SG is maintained in the write transistor SST. Further, the changeover switch SW1 is turned on and the changeover switch SW2 is turned off.

  Thereby, the video signal voltage Vsig corresponding to the gradation of the light emitted from the organic EL diode OLED is applied to the gate electrode of the drive transistor DRT via the changeover switch SW1, the video signal line VL, and the write transistor SST. Then, the potential of the source electrode of the drive transistor DRT is set to Vrst−Vth−ΔV, which is obtained by adding the variation (−ΔV) of the potential of the source electrode of the drive transistor DRT caused by the application of the video signal voltage Vsig. Note that the absolute value of the ΔV potential increases as the mobility of the channel layer SC of the drive transistor DRT increases.

Next, the light emission operation will be described.
The light emission operation is performed in a light emission (holding) period as a display period following the writing period.
FIG. 8 shows the pixel PX in the light emission period.

  As shown in FIG. 1, FIG. 3, FIG. 4, and FIG. 8, in the light emission operation, the output of the off-potential control signal TG is maintained from the scanning signal line driver YDR2 to the initialization transistor TCT, and the scanning signal line driver YDR1 The off-potential control signal SG is output to the write transistor SST.

  For this reason, the write transistor SST is switched off. As a result, the voltage Vgs between the gate electrode and the source electrode of the drive transistor DRT becomes Vsig−Vrst + Vth + ΔV. Then, the output current Iel in the saturation region of the drive transistor DRT is applied to the organic EL diode OLED to emit light.

  Here, when the gain coefficient of the driving transistor DRT is β, the output current Iel is expressed by the following equation.

Iel = 1/2 × β × (Vsig−Vrst + ΔV) ²
Β is defined by the following equation.

β = μ × Co × W / L
W is the gate width of the driving transistor DRT, L is the gate length, μ is the carrier mobility, and Co is the gate capacitance per unit area.

(Example 2)
Next, a method for driving the organic EL display device according to Example 2 of this embodiment will be described.

  In the organic EL display device configured as described above, the operation of the pixel PX is divided into a reset operation, a cancel operation, a write operation, and a light emission (holding) operation. These series of operations are performed, for example, in one vertical scanning period. In particular, in the second embodiment, the write operation includes a video signal line write operation and a pixel write operation following the video signal line write operation. The video signal line write operation and the pixel write operation will be described in detail.

  FIG. 9 is a schematic diagram showing on / off timings of the write transistor SST, the initialization transistor TCT, the changeover switch SW1, and the changeover switch SW2 in Example 2 of the first embodiment.

First, the reset operation will be described.
The reset operation is performed during the reset period.
FIG. 10 shows the pixel PX in the reset period.

  As shown in FIGS. 1, 3, 9, and 10, first, in the reset operation, the initialization transistor TCT and the write transistor SST are set on, the changeover switch SW1 is turned off, and the changeover switch SW2 is set on. The

  As a result, the potential of the source electrode of the drive transistor DRT is set to the initialization potential Vini, and the potential of the gate electrode of the drive transistor DRT is set to the reset potential Vrst. Then, the information of the previous frame is reset (initialized).

Next, the cancel operation will be described.
The cancel operation is performed in a cancel period following the reset period.
FIG. 11 shows the pixel PX during the cancellation period.

  As shown in FIGS. 1, 3, 9, and 11, in the cancel operation, the initialization transistor TCT is switched off. For this reason, the potential of the source electrode of the drive transistor DRT becomes Vrst−Vth after the cancellation period ends.

Next, the video signal line writing operation will be described.
The video signal line write operation is performed in the video signal line write period following the cancel period.
FIG. 12 shows the pixel PX in the video signal line writing period.

  As shown in FIG. 1, FIG. 3, FIG. 9, and FIG. 12, in the video signal line writing operation, the scanning signal line driver YDR2 maintains the output of the off potential control signal TG to the initialization transistor TCT. The driver YDR1 outputs an off-potential control signal SG to the write transistor SST. Further, the changeover switch SW1 is turned on and the changeover switch SW2 is turned off.

  Thereby, the video signal voltage Vsig corresponding to the gradation of the light emitted from the organic EL diode OLED is applied to and written (stored) on the video signal line VL via the changeover switch SW1. For example, the video signal voltage Vsig can be held by using a stray capacitance (parasitic capacitance) generated in the video signal line VL and a wiring extending in parallel and adjacent to the video signal line VL.

  Here, the low-potential power supply wiring described above extends in parallel adjacent to the video signal line VL. Note that the wiring extending in parallel next to the video signal line VL is preferably a constant potential wiring such as a low-potential power supply wiring, but is not limited thereto, and may be a wiring having a constant potential during the writing period. Further, the video signal voltage Vsig may be held without using the stray capacitance. For example, the video signal voltage Vsig may be held by connecting a capacitor such as a capacitor to the video signal line VL. In addition, the video signal voltage Vsig may be held using a capacity of the video signal line VL itself.

Next, the pixel writing operation will be described.
The pixel writing operation is performed in a pixel writing period following the video signal line writing period. The pixel writing period is shorter than the video signal line writing period.
FIG. 13 shows the pixel PX in the pixel writing period.

  As shown in FIG. 1, FIG. 3, FIG. 9 and FIG. 13, in the pixel writing operation, the output of the off-potential control signal TG is maintained from the scanning signal line driver YDR2 to the initialization transistor TCT, and the scanning signal line driver YDR1. Thus, a control signal SG having an on-potential is output to the write transistor SST. Further, the changeover switch SW1 is turned off.

  Thus, the video signal voltage Vsig written to the video signal line VL can be applied to the gate electrode of the drive transistor DRT via the write transistor SST. Then, the potential of the source electrode of the drive transistor DRT is set to Vrst−Vth−ΔV, which is obtained by adding the variation (−ΔV) of the potential of the source electrode of the drive transistor DRT caused by the application of the video signal voltage Vsig.

  As described above, by independently performing the video signal line write operation and the pixel write operation, the current flowing between the source electrode and the drain electrode of the drive transistor DRT can be reduced during the video signal line write period. . For this reason, it becomes the drive method which can make the setting of a high current easy.

Next, the light emission operation will be described.
The light emission operation is performed in a light emission (holding) period as a display period following the pixel writing period.
FIG. 14 shows the pixel PX in the light emission period.

  As shown in FIGS. 1, 3, 9, and 14, in the light emitting operation, the write transistor SST is switched off. As a result, Vgs of the drive transistor DRT becomes Vsig−Vrst + Vth + ΔV. Then, the output current Iel in the saturation region of the drive transistor DRT is applied to the organic EL diode OLED to emit light.

  As described above, the output current Iel is expressed by the following equation.

Iel = 1/2 × β × (Vsig−Vrst + ΔV) ²
According to the organic EL display device and the organic EL display device driving method configured as described above, the pixel PX includes the organic EL diode OLED, the drive transistor DRT, the capacitor unit Cs, the initialization transistor TCT, and the writing. A transistor SST. An organic EL diode OLED is disposed on the high potential power line side, and a drive transistor DRT is disposed on the low potential power line side.

As a result, the output current Iel becomes a value that does not depend on the threshold voltage Vth, so that the influence of variations due to the threshold voltage Vth can be eliminated. Further, as described above, the value of ΔV increases as the mobility increases. The higher the mobility, the less the current flows, and the lower the mobility, the easier the current flows, so that the influence of mobility can be compensated. Furthermore, since the output current Iel has a value that does not depend on the voltage Vel of the organic EL diode OLED, the influence of the characteristics of the organic EL diode OLED can be eliminated.
In other words, it is possible to give the organic EL diode OLED a drive current Iel that corresponds to the gradation of the image and compensates for the influence of mobility.

Further, by independently performing the video signal line write operation and the pixel write operation, the video signal voltage Vsig is applied to the gate electrode of the drive transistor DRT during the video signal line write period which is shorter than the pixel write period. Can write. Thereby, the current flowing between the source electrode and the drain electrode of the drive transistor DRT can be reduced during the video signal line writing period. For this reason, it is possible to obtain a driving method capable of easily setting a high current.
Further, since the number of elements constituting the pixel PX is small, it is possible to achieve high definition.

  As described above, an active matrix organic EL display device and a driving method of the active matrix organic EL display device that can achieve high definition, have excellent gradation reproducibility, and have excellent display quality that can suppress luminance unevenness are obtained. be able to. Thereby, the problem of a display defect, a stripe unevenness, and a rough feeling can be eliminated.

  Next, an active matrix organic EL display device and a driving method of the active matrix organic EL display device according to the second embodiment of the present invention will be described in detail. In this embodiment, the same reference numerals are given to the same parts of the configuration of the active matrix organic EL display device as those in the above-described embodiment, and the detailed description thereof is omitted.

  As shown in FIGS. 1, 2, and 15, the organic EL display device includes a display panel DP that is an organic EL panel and a driving unit 10. The upper electrode, the lower electrode, and the gate insulating film GI interposed therebetween constitute the capacitive part Cs and the other capacitive part Cx shown in FIGS. Here, the capacitance parts Cs and Cx are capacitors.

  Each pixel PX includes an organic EL diode OLED, a drive transistor DRT, a capacitor Cs, an initialization transistor TCT, a write transistor SST, and a capacitor Cx. In this example, the drive transistor DRT, the initialization transistor TCT, and the write transistor SST are P-channel thin film transistors.

  The organic EL diode OLED and the drive transistor DRT are connected in series in this order between a high-potential power line and a low-potential power line (not shown). In this embodiment, the high potential power supply wiring is set to a potential of + 5V, and the low potential power supply wiring is set to a potential of -5V.

The capacitive part Cx is connected between the source electrode SE of the driving transistor DRT and the scanning signal line Sa. The capacitor Cs includes a lower electrode as a first electrode connected to the source electrode SE of the driving transistor DRT and an upper electrode as a second electrode connected to the scanning signal line Sa. As will be described later, the capacitor Cx starts the cancel operation by shifting the drive transistor DRT at the start of the cancel operation to the high potential side.
Note that the lower electrode of the capacitor Cx and the lower electrode of the capacitor Cs may be formed integrally.

  The initialization transistor TCT includes a drain electrode connected to the source electrode SE of the drive transistor DRT, a gate electrode connected to the scanning signal line Sa, and a source electrode connected to the high potential power supply wiring. The initialization transistor TCT is turned on / off in response to a control signal TG supplied from the scanning signal line Sa. The initialization transistor TCT switches whether to output the power supply voltage PVDD as an initialization voltage, and switches whether to initialize the potential of the source electrode SE of the drive transistor DRT. The initialization transistor TCT regulates current leakage from the capacitor Cs.

  Next, the operation of the pixel PX when the organic EL diode OLED emits light (displays an image) will be described. That is, a method for driving the organic EL display device according to the second embodiment will be described.

  In the organic EL display device configured as described above, the operation of the pixel PX is divided into a reset operation, a cancel operation as an OC (offset cancel) operation, a write operation, and a light emission (holding) operation as a display operation. These series of operations are performed, for example, in one vertical scanning period.

  Here, FIG. 16 is a schematic diagram showing on / off timings of the write transistor SST, the initialization transistor TCT, the changeover switch SW1, and the changeover switch SW2 in the second embodiment.

First, the reset operation will be described.
The reset operation is performed during the reset period.
FIG. 17 shows the pixel PX in the reset period.

  As shown in FIG. 1, FIG. 15, FIG. 16 and FIG. 17, in the reset operation, the scanning signal line driver YDR2 turns on the initialization transistor TCT at a level (on potential), in this case, a low level control signal. TG is output, and the scanning signal line driver YDR1 outputs an on-potential control signal SG for turning on the writing transistor SST. Further, the changeover switch SW1 is set to OFF and the changeover switch SW2 is set to ON.

  For this reason, the initialization transistor TCT and the write transistor SST are set to ON. Thus, the power supply voltage PVDD is applied to the source electrode of the drive transistor DRT via the initialization transistor TCT, and the potential of the source electrode of the drive transistor DRT is set as the initialization potential to the same voltage potential PVDD as that of the high potential power supply wiring. The reset voltage Vrst is applied to the gate electrode of the drive transistor DRT via the changeover switch SW2, the video signal line VL, and the write transistor SST, and the potential of the gate electrode of the drive transistor DRT is set to the reset potential Vrst. Then, the information of the previous frame is reset (initialized).

Next, the cancel operation will be described.
The cancel operation is performed in a cancel period following the reset period.
FIG. 18 shows the pixel PX during the cancellation period.

  As shown in FIG. 1, FIG. 15, FIG. 16 and FIG. 18, in the cancel operation, the output of the on-potential control signal SG to the write transistor SST is maintained from the scanning signal line driver YDR1, and the scanning signal line driver YDR2 A level (off potential) at which the initialization transistor TCT is turned off (here, a high level control signal TG) is output. Further, the changeover switch SW1 is kept off and the changeover switch SW2 is kept on.

  For this reason, the initialization transistor TCT is switched off. The potential of the gate electrode of the drive transistor DRT is fixed to the reset potential Vrst. The potential of the source electrode of the drive transistor DRT is shifted to the low potential side with PVDD + Cx / (Cs + Cx) × (VGH−VGL) as an initial value. After the cancellation period, the reset potential Vrst and the threshold voltage of the drive transistor DRT The difference from Vth is Vrst−Vth (in the case of a P-channel type driving transistor DRT). Here, VGH is the voltage value of the high-level control signal TG, and VGL is the voltage value of the low-level control signal TG.

Next, the write operation will be described.
The write operation is performed in the write period following the cancel period.
FIG. 19 shows the pixel PX in the writing period.

  As shown in FIGS. 1, 15, 16, and 19, in the write operation, the output of the off-potential control signal TG is maintained in the initialization transistor TCT from the scanning signal line driver YDR2, and from the scanning signal line driver YDR1. The output of the on-potential control signal SG is maintained in the write transistor SST. Further, the changeover switch SW1 is turned on and the changeover switch SW2 is turned off.

  Thereby, the video signal voltage Vsig corresponding to the gradation of the light emitted from the organic EL diode OLED is applied to the gate electrode of the drive transistor DRT via the changeover switch SW1, the video signal line VL, and the write transistor SST. Then, the potential of the source electrode of the drive transistor DRT is set to Vrst−Vth−ΔV, which is obtained by adding the variation (−ΔV) of the potential of the source electrode of the drive transistor DRT caused by the application of the video signal voltage Vsig. Note that the absolute value of the ΔV potential increases as the mobility of the channel layer SC of the drive transistor DRT increases.

Next, the light emission operation will be described.
The light emission operation is performed in a light emission (holding) period as a display period following the writing period.
FIG. 20 shows the pixel PX in the light emission period.

  As shown in FIG. 1, FIG. 15, FIG. 16, and FIG. 20, in the light emission operation, the output of the off-potential control signal TG is maintained from the scanning signal line driver YDR2 to the initialization transistor TCT, and the scanning signal line driver YDR1 The off-potential control signal SG is output to the write transistor SST.

  For this reason, the write transistor SST is switched off. As a result, Vgs of the drive transistor DRT becomes Vsig−Vrst + Vth + ΔV. Then, the output current Iel in the saturation region of the drive transistor DRT is applied to the organic EL diode OLED to emit light.

  Here, when the gain coefficient of the driving transistor DRT is β, the output current Iel is expressed by the following equation.

Iel = 1/2 × β × (Vsig−Vrst + ΔV) ²
According to the organic EL display device and the organic EL display device driving method configured as described above, the pixel PX includes the organic EL diode OLED, the drive transistor DRT, the capacitor unit Cs, the initialization transistor TCT, and the writing. It includes a transistor SST and another capacitor Cx. An organic EL diode OLED is disposed on the high potential power line side, and a drive transistor DRT is disposed on the low potential power line side.

As a result, the output current Iel becomes a value that does not depend on the threshold voltage Vth, so that the influence of variations due to the threshold voltage Vth can be eliminated. Further, as described above, the value of ΔV increases as the mobility increases. The higher the mobility, the less the current flows, and the lower the mobility, the easier the current flows, so that the influence of mobility can be compensated. Furthermore, since the output current Iel has a value that does not depend on the voltage Vel of the organic EL diode OLED, the influence of the characteristics of the organic EL diode OLED can be eliminated.
In other words, it is possible to give the organic EL diode OLED a drive current Iel that corresponds to the gradation of the image and compensates for the influence of mobility.

  Further, since the potential of the gate electrode of the driving transistor DRT can be changed depending on the capacitance ratio between the capacitor Cx and the capacitor Cs, the organic EL diode OLED can be further improved without adjusting the value of the video signal voltage Vsig. A drive current Iel according to the gradation of the image can be given.

Further, as described in the first embodiment, the writing operation may include a video signal line writing operation and a pixel writing operation following the video signal line writing operation. By independently performing the video signal line write operation and the pixel write operation, the video signal voltage Vsig is written to the gate electrode of the drive transistor DRT during the video signal line write period that is shorter than the pixel write period. Can do. Thereby, the current flowing between the source electrode and the drain electrode of the drive transistor DRT can be reduced during the video signal line writing period. For this reason, it is possible to obtain a driving method capable of easily setting a high current.
Further, since the number of elements constituting the pixel PX is small, it is possible to achieve high definition.

  As described above, an active matrix organic EL display device and a driving method of the active matrix organic EL display device that can achieve high definition, have excellent gradation reproducibility, and have excellent display quality that can suppress luminance unevenness are obtained. be able to. Thereby, the problem of a display defect, a stripe unevenness, and a rough feeling can be eliminated.

  Next, an active matrix organic EL display device and an active matrix organic EL display device driving method according to a third embodiment of the present invention will be described in detail. In this embodiment, the same reference numerals are given to the same parts of the active matrix organic EL display device as those in the first embodiment described above, and the detailed description thereof is omitted.

  As shown in FIGS. 1, 2, and 21, the organic EL display device includes a display panel DP that is an organic EL panel and a driving unit 10.

  Specifically, one of the thin film transistors formed by the intersection of the scanning signal line Sa and the channel layer SC is an initialization transistor TCT, and the other is a reset transistor IST. Note that the thin film transistor formed by the intersection of the scanning signal line Sb and the channel layer SC is the write transistor SST, and the thin film transistor formed by the intersection of the upper electrode and the channel layer SC is the drive transistor DRT. is there.

  In this example, the drive transistor DRT, the initialization transistor TCT, the reset transistor IST, and the write transistor SST are top-gate P-channel thin film transistors.

  Each pixel PX includes an organic EL diode OLED, a drive transistor DRT, a capacitor Cs, an initialization transistor TCT, a reset transistor IST, and a write transistor SST.

  The organic EL diode OLED and the drive transistor DRT are connected in series in this order between a high-potential power line and a low-potential power line (not shown). A power supply voltage PVDD is applied to the high potential power supply wiring, and a power supply voltage PVSS is applied to the low potential power supply wiring. In this embodiment, the high potential power supply wiring is set to a potential of + 5V, and the low potential power supply wiring is set to a potential of -5V.

  The capacitance unit Cs is connected to the gate electrode G of the drive transistor DRT. More specifically, the capacitance unit Cs includes a lower electrode as a first electrode and an upper electrode as a second electrode connected to the gate electrode G of the driving transistor DRT. The capacitor Cs holds the potential of the gate electrode G of the drive transistor DRT. The capacitor Cs holds the gate electrode G control potential of the drive transistor DRT determined by the video signal voltage Vsig described later.

  The initialization transistor TCT includes a source electrode connected to the lower electrode of the capacitor Cs, a gate electrode connected to the scanning signal line Sa, and a drain electrode connected to the source electrode SE of the driving transistor DRT. The initialization transistor TCT is turned on (conductive state) and turned off (non-conductive state) in response to the control signal TG supplied from the scanning signal line Sa. The initialization transistor TCT switches whether to initialize the potential of the source electrode SE of the drive transistor DRT. The initialization transistor TCT regulates current leakage from the capacitor Cs.

  The reset transistor IST includes a source electrode connected to the high potential power line, a gate electrode connected to the scanning signal line Sa, and a drain electrode connected to the gate electrode G of the driving transistor DRT. The reset transistor IST is turned on / off in response to a control signal TG supplied from the scanning signal line Sa. The reset transistor IST switches whether the potential of the gate electrode G of the drive transistor DRT is set to the same voltage potential PVDD as that of the high potential power supply wiring.

  The write transistor SST includes a drain electrode connected to the lower electrode of the capacitor Cs, a source electrode connected to the video signal line VL, and a gate electrode connected to the scanning signal line Sb. The write transistor SST is turned on / off in response to a control signal SG supplied from the scanning signal line Sb. The write transistor SST switches whether to output the video signal voltage Vsig supplied via the video signal line VL.

  Next, the operation of the pixel PX when the organic EL diode OLED emits light (displays an image) will be described. That is, a method for driving the organic EL display device according to the third embodiment will be described.

In the organic EL display device configured as described above, the operation of the pixel PX is divided into a reset operation, a cancel operation as an OC (offset cancel) operation, a write operation, and a light emission (holding) operation as a display operation. These series of operations are performed, for example, in one vertical scanning period.
Here, FIG. 22 is a schematic diagram showing on / off timings of the write transistor SST, the initialization transistor TCT, the reset transistor IST, the changeover switch SW1, and the changeover switch SW2 in the third embodiment.

First, the reset operation will be described.
The reset operation is performed during the reset period.
FIG. 23 shows the pixel PX in the reset period.

  As shown in FIG. 1, FIG. 21, FIG. 22 and FIG. 23, in the reset operation, the scanning signal line driver YDR2 turns on the initialization transistor TCT and the reset transistor IST (on potential). A level control signal TG is output, and an on-potential control signal SG for turning on the write transistor SST is output from the scanning signal line driver YDR1. Further, the changeover switch SW1 is set to OFF and the changeover switch SW2 is set to ON.

  For this reason, the initialization transistor TCT and the write transistor SST are set to ON. As a result, the potential of the gate electrode of the drive transistor DRT is set to the same voltage potential PVDD as that of the high potential power supply line via the reset transistor IST, and the changeover switch SW2, the video signal line VL, the write transistor SST, and the initialization transistor TCT are set. Then, the reset voltage Vrst is applied to the source electrode of the drive transistor DRT, and the potential of the source electrode of the drive transistor DRT is set to the reset potential Vrst. Then, the information of the previous frame is reset (initialized).

Next, the cancel operation will be described.
The cancel operation is performed in a cancel period following the reset period.
FIG. 24 shows the pixel PX during the cancellation period.

  As shown in FIGS. 1, 21, 22, and 24, in the cancel operation, the output of the on-potential control signal TG is maintained from the scanning signal line driver YDR2 to the initialization transistor TCT and the reset transistor IST. The line driver YDR1 outputs a level (off potential) for turning off the write transistor SST, in this case, a high level control signal SG.

  For this reason, the write transistor SST is switched off. The potential of the gate electrode of the drive transistor DRT is fixed to the voltage potential PVDD. The potential of the source electrode of the drive transistor DRT is shifted to the low potential side with the reset potential Vrst written in the reset period as an initial value. After the cancellation period, the voltage potential PVDD and the threshold voltage Vth of the drive transistor DRT Difference PVDD−Vth (in the case of a P-channel type drive transistor DRT).

Next, the write operation will be described.
The write operation is performed in the write period following the cancel period.
FIG. 25 shows the pixel PX in the writing period.

  As shown in FIGS. 1, 21, 22 and 25, in the write operation, the scanning signal line driver YDR2 outputs an off-potential control signal TG to the initialization transistor TCT and the reset transistor IST, and the scanning signal line driver A control signal SG having an on-potential is output from YDR1 to the write transistor SST. Further, the changeover switch SW1 is turned on and the changeover switch SW2 is turned off.

  For this reason, the initialization transistor TCT and the reset transistor IST are turned off and the writing transistor SST is turned on. As a result, the video signal voltage Vsig corresponding to the gradation of light emitted from the organic EL diode OLED is changed over to the changeover switch SW1. The voltage is applied to the capacitor Cs via the video signal line VL and the write transistor SST and stored in the capacitor Cs. Then, the potential of the gate electrode of the driving transistor DRT is set to Vsig + Vth.

Next, the light emission operation will be described.
The light emission operation is performed in a light emission (holding) period as a display period following the writing period.
FIG. 26 shows the pixel PX in the light emission period.

  As shown in FIG. 1, FIG. 21, FIG. 22 and FIG. 26, in the light emission operation, the output of the off potential control signal TG is maintained from the scanning signal line driver YDR2 to the initialization transistor TCT and the reset transistor IST. The line driver YDR1 outputs an off-potential control signal SG to the write transistor SST.

  For this reason, the write transistor SST is switched off. As a result, Vgs of the drive transistor DRT becomes Vsig + Vth−PVDD. Then, the output current Iel in the saturation region of the drive transistor DRT is applied to the organic EL diode OLED to emit light.

  Here, when the gain coefficient of the driving transistor DRT is β, the output current Iel is expressed by the following equation.

Iel = 1/2 × β × (Vsig−PVDD) ²
Β is defined by the following equation.

β = μ × Co × W / L
W is the gate width of the driving transistor DRT, L is the gate length, μ is the carrier mobility, and Co is the gate capacitance per unit area.

  According to the organic EL display device configured as described above and the driving method of the organic EL display device, the pixel PX includes the organic EL diode OLED, the drive transistor DRT, the capacitor Cs, the initialization transistor TCT, and the reset. A transistor IST and a write transistor SST are included. An organic EL diode OLED is disposed on the high potential power line side, and a drive transistor DRT is disposed on the low potential power line side.

As a result, the output current Iel becomes a value that does not depend on the threshold voltage Vth, so that the influence of variations due to the threshold voltage Vth can be eliminated. Further, since the output current Iel is a value that does not depend on the voltage Vel of the organic EL diode OLED, the influence of the characteristics of the organic EL diode OLED can be eliminated.
In other words, it is possible to give the organic EL diode OLED a drive current Iel that corresponds to the gradation of the image and compensates for the influence of mobility.

Further, as described in the first embodiment, the writing operation may include a video signal line writing operation and a pixel writing operation following the video signal line writing operation. By independently performing the video signal line writing operation and the pixel writing operation, the video signal voltage Vsig can be written to the pixel PX during the video signal line writing period that is shorter than the pixel writing period. Thereby, the current flowing between the source electrode and the drain electrode of the drive transistor DRT can be reduced during the video signal line writing period. For this reason, it is possible to obtain a driving method capable of easily setting a high current.
Further, since the number of elements constituting the pixel PX is small, it is possible to achieve high definition.

  As described above, an active matrix organic EL display device and a driving method of the active matrix organic EL display device that can achieve high definition, have excellent gradation reproducibility, and have excellent display quality that can suppress luminance unevenness are obtained. be able to. Thereby, the problem of a display defect, a stripe unevenness, and a rough feeling can be eliminated.

  Note that the present invention is not limited to the above-described embodiment as it is, and can be embodied by modifying the constituent elements without departing from the scope of the invention in the implementation stage. Various inventions can be formed by appropriately combining a plurality of constituent elements disclosed in the embodiments. For example, some components may be deleted from all the components shown in the embodiment. Furthermore, constituent elements over different embodiments may be appropriately combined.

For example, the reset voltage Vrst may be supplied to the pixel PX via a wiring different from the video signal line VL. In this case, for example, a multiplexer circuit may be connected to the video signal line VL instead of the switching unit SW. In the case of the 1/3 multiplexer circuit, each of the 3 video signal lines VL is connected to the 1/3 multiplexer circuit, and the video signal voltage Vsig is selectively given to any of the 3 video signal lines VL. It only has to be done.
The initialization transistor TCT, the write transistor SST, and the reset transistor IST may be formed of any one of N-channel and P-channel transistors.

The top view which shows roughly the organic electroluminescence display which concerns on the 1st, 2nd and 3rd embodiment of this invention. It is an expanded sectional view showing a part of the above-mentioned organic EL display, and especially a sectional view showing a drive transistor and an organic EL diode. The figure which shows the equivalent circuit of the pixel in the organic electroluminescence display which concerns on the said 1st Embodiment. FIG. 5 is a table showing on / off timings of a writing transistor, an initialization transistor, and two changeover switches in a method for driving an organic EL display device according to Example 1 of the first embodiment. FIG. 4 is a diagram illustrating an equivalent circuit of a pixel in a reset operation of the organic EL display device according to the first embodiment. FIG. 3 is a diagram illustrating an equivalent circuit of pixels in a cancel operation of the organic EL display device according to the first embodiment. FIG. 3 is a diagram showing an equivalent circuit of pixels in a write operation of the organic EL display device according to Example 1; FIG. 3 is a diagram illustrating an equivalent circuit of a pixel in a light emitting operation of the organic EL display device according to the first embodiment. FIG. 7 is a table showing on / off timings of a write transistor, an initialization transistor, and two changeover switches in a method for driving an organic EL display device according to Example 2 of the first embodiment. FIG. 10 is a diagram illustrating an equivalent circuit of a pixel in a reset operation of the organic EL display device according to the second embodiment. FIG. 6 is a diagram illustrating an equivalent circuit of a pixel in a cancel operation of the organic EL display device according to the second embodiment. FIG. 10 is a diagram illustrating an equivalent circuit of pixels in a video signal line writing operation of the organic EL display device according to the second embodiment. FIG. 10 is a diagram illustrating an equivalent circuit of pixels in a pixel writing operation of the organic EL display device according to the second embodiment. FIG. 10 is a diagram showing an equivalent circuit of pixels in a light emission operation of the organic EL display device according to Example 2; The figure which shows the equivalent circuit of the pixel in the organic electroluminescence display which concerns on the said 2nd Embodiment. The figure which showed the on-off timing of the writing transistor, the initialization transistor, and two changeover switches with the table | surface in the drive method of the organic electroluminescence display which concerns on the said 2nd Embodiment. The figure which shows the equivalent circuit of the pixel in the reset operation | movement of the organic electroluminescence display which concerns on the said 2nd Embodiment. The figure which shows the equivalent circuit of the pixel in the cancellation operation | movement of the organic electroluminescence display which concerns on the said 2nd Embodiment. The figure which shows the equivalent circuit of the pixel in the write-in operation | movement of the organic electroluminescence display which concerns on the said 2nd Embodiment. The figure which shows the equivalent circuit of the pixel in the light emission operation | movement of the organic electroluminescence display which concerns on the said 2nd Embodiment. The figure which shows the equivalent circuit of the pixel in the organic electroluminescence display which concerns on the said 3rd Embodiment. The figure which showed the on-off timing of the writing transistor, the initialization transistor, the reset transistor, and two changeover switches in the table | surface in the drive method of the organic electroluminescence display which concerns on the said 3rd Embodiment. The figure which shows the equivalent circuit of the pixel in the reset operation | movement of the organic electroluminescence display which concerns on the said 3rd Embodiment. The figure which shows the equivalent circuit of the pixel in the cancellation operation | movement of the organic electroluminescence display which concerns on the said 3rd Embodiment. The figure which shows the equivalent circuit of the pixel in the write-in operation | movement of the organic electroluminescence display which concerns on the said 3rd Embodiment. The figure which shows the equivalent circuit of the pixel in the light emission operation | movement of the organic electroluminescence display which concerns on the said 3rd Embodiment.

Explanation of symbols

  DP ... display panel, SUB ... substrate, R1 ... display region, PX ... pixel, TCT ... initialization transistor, SST ... write transistor, IST ... reset transistor, Cs, Cx ... capacitor, DRT ... drive transistor, G ... gate electrode , SE ... source electrode, DE ... drain electrode, OLED ... organic EL diode, PE ... pixel electrode, ORG ... organic substance layer, CE ... counter electrode, VL ... video signal line, Sa, Sb ... scanning signal line, 10 ... drive unit , YDR1, YDR2 ... scanning signal line driver, XDR ... video signal line driver, 12 ... controller, SW ... switching unit, SW1, SW2 ... changeover switch, TG, SG ... control signal, Vsig ... video signal voltage, Vini ... initialization Voltage (potential), Vrst ... Reset voltage (potential), Vth ... Threshold voltage, PVSS ... Reference voltage potential PVDD ... voltage potential, Iel ... output current, - [Delta] V ... potential variation, beta ... gain factor.

Claims (18)

Multiple video signal lines;
A plurality of pixels connected to each of the video signal lines,
Each pixel is
An organic EL diode including an anode connected to a high-potential power wiring, a cathode disposed opposite to the anode, and an organic material layer sandwiched between the anode and the cathode;
A P-channel driving transistor including a source electrode connected to the cathode of the organic EL diode, a drain electrode connected to a low-potential power line, and a gate electrode;
A capacitor including a first electrode connected to a source electrode of the driving transistor and a second electrode connected to a gate electrode of the driving transistor;
Including a drain electrode connected to a source electrode of the driving transistor, a gate electrode connected to a first scanning signal line, and a source electrode to which an initialization voltage is supplied, and switching whether to output the initialization voltage, the driving An initialization transistor that switches whether to initialize the potential of the source electrode of the transistor; and
A video signal supplied via the video signal line, including a drain electrode connected to the gate electrode of the driving transistor, a source electrode connected to the video signal line, and a gate electrode connected to a second scanning signal line An active matrix organic EL display device having a write transistor for switching whether to output a voltage. Each pixel is
And further including another capacitor including a first electrode connected to a source electrode of the driving transistor and a second electrode connected to the first scanning signal line,
The active matrix organic EL display device according to claim 1, wherein a source electrode of the initialization transistor is connected to the high-potential power line. Multiple video signal lines;
A plurality of pixels connected to each of the video signal lines,
Each pixel is
An organic EL diode including an anode connected to a high-potential power wiring, a cathode disposed opposite to the anode, and an organic material layer sandwiched between the anode and the cathode;
A P-channel driving transistor including a source electrode connected to the cathode of the organic EL diode, a drain electrode connected to a low-potential power line, and a gate electrode;
A capacitor including a first electrode and a second electrode connected to the gate electrode of the driving transistor;
A source electrode connected to the first electrode of the capacitor, a gate electrode connected to the first scanning signal line, and a drain electrode connected to the source electrode of the driving transistor, the potential of the source electrode of the driving transistor being An initialization transistor for switching whether to initialize, and
A source electrode connected to the high-potential power line, a gate electrode connected to the first scanning signal line, and a drain electrode connected to the gate electrode of the driving transistor, and the potential of the gate electrode of the driving transistor is A reset transistor that switches whether to set the potential of the high-potential power supply wiring,
A video supplied through the video signal line, including a drain electrode connected to the first electrode of the capacitor, a source electrode connected to the video signal line, and a gate electrode connected to the second scanning signal line An active matrix organic EL display device having a write transistor for switching whether to output a signal voltage. A driving unit connected to the plurality of pixels and the plurality of video signal lines;
The drive unit is
In the reset period, the initialization transistor is turned on, the initialization voltage Vini is applied to the source electrode of the drive transistor via the initialization transistor, and the potential of the source electrode of the drive transistor is set to the initialization potential Vini. And a reset voltage Vrst is applied to the gate electrode of the driving transistor to set the potential of the gate electrode of the driving transistor to the reset potential Vrst,
In the cancellation period following the reset period, the reset voltage is applied to the gate electrode of the drive transistor, the initialization transistor is switched to a non-conductive state, and the potential of the source electrode of the drive transistor is set to the reset potential. A difference Vrst−Vth from the threshold voltage Vth of the driving transistor is set.
In the write period following the cancel period, the video transistor is turned on, and the video signal voltage Vsig corresponding to the gradation of light emitted from the organic EL diode is supplied to the gate electrode of the drive transistor via the write transistor. And the potential of the source electrode of the driving transistor is set to Vrst−Vth−ΔV obtained by adding a variation (−ΔV) of the potential of the source electrode of the driving transistor caused by the application of the video signal voltage.
In the light emission period following the address period, when the address transistor is switched to a non-conductive state and the gain coefficient of the drive transistor is β, the output current of the drive transistor is Iel = ½ × β × (Vsig−Vrst + ΔV) ² The active matrix organic EL display device according to claim 1, wherein the organic EL diode is caused to emit light. A driving unit connected to the plurality of pixels and the plurality of video signal lines;
The drive unit is
In the reset period, the initialization transistor is made conductive, the potential of the source electrode of the drive transistor is set to the same voltage potential PVDD as that of the high-potential power supply line through the initialization transistor, and the drive transistor Applying a reset voltage Vrst to the gate electrode to set the potential of the gate electrode of the driving transistor to the reset potential Vrst;
In the cancellation period following the reset period, the reset voltage is applied to the gate electrode of the drive transistor, the initialization transistor is switched to a non-conductive state, and the potential of the source electrode of the drive transistor is set to the reset potential. A difference Vrst−Vth from the threshold voltage Vth of the driving transistor is set.
In the write period following the cancel period, the video transistor is turned on, and the video signal voltage Vsig corresponding to the gradation of light emitted from the organic EL diode is supplied to the gate electrode of the drive transistor via the write transistor. And the potential of the source electrode of the driving transistor is set to Vrst−Vth−ΔV obtained by adding a variation (−ΔV) of the potential of the source electrode of the driving transistor caused by the application of the video signal voltage.
In the light emission period following the address period, when the address transistor is switched to a non-conductive state and the gain coefficient of the drive transistor is β, the output current of the drive transistor is Iel = ½ × β × (Vsig−Vrst + ΔV) ² The active matrix organic EL display device according to claim 2, wherein the organic EL diode is caused to emit light. A driving unit connected to the plurality of pixels and the plurality of video signal lines;
The drive unit is
In the reset period, the reset transistor is turned on, the potential of the gate electrode of the drive transistor is set to the same voltage potential PVDD as that of the high-potential power supply line through the reset transistor, and the source electrode of the drive transistor Is applied with a reset voltage Vrst to set the potential of the source electrode of the drive transistor to the reset potential Vrst,
In the cancellation period following the reset period, the initialization transistor is turned on, and the potential of the source electrode of the driving transistor is set to a difference PVDD−Vth between the voltage potential and the threshold voltage Vth of the driving transistor,
In the writing period following the cancellation period, the reset transistor and the initialization transistor are switched to a non-conductive state, the writing transistor is turned on, and a video signal voltage corresponding to the gradation of light emitted from the organic EL diode. Vsig is applied to the capacitor through the write transistor and stored in the capacitor, and the potential of the gate electrode of the drive transistor is set to Vsig + Vth,
In the light emission period following the address period, when the address transistor is switched to a non-conductive state and the gain coefficient of the drive transistor is β, the output current of the drive transistor Iel = ½ × β × (Vsig−PVDD) ² The active matrix organic EL display device according to claim 3, wherein the organic EL diode is caused to emit light. The writing period includes a video signal line writing period, and a pixel writing period following the video signal line writing period,
The drive unit is
During the video signal line write period, the video transistor is turned off and the video signal voltage Vsig corresponding to the gradation of light emitted from the organic EL diode is applied to the video signal line. Remember,
During the pixel writing period, the application of the video signal voltage to the video signal line is stopped, the writing transistor is switched to a conductive state, and the video signal voltage stored in the video signal line is passed through the writing transistor. Vrst−Vth−ΔV, which is applied to the gate electrode of the driving transistor, and the potential of the source electrode of the driving transistor is added to the potential variation (−ΔV) of the source electrode of the driving transistor caused by the application of the video signal voltage. The active matrix type organic EL display device according to claim 4 or 5, wherein The writing period includes a video signal line writing period, and a pixel writing period following the video signal line writing period,
The drive unit is
During the video signal line write period, the video transistor is turned off and the video signal voltage Vsig corresponding to the gradation of light emitted from the organic EL diode is applied to the video signal line. Remember,
In the pixel writing period, the reset transistor and the initialization transistor are switched to a non-conductive state, the write transistor is switched to a conductive state, and the video signal voltage stored in the video signal line is transferred to the capacitor via the write transistor. The active matrix organic EL display device according to claim 6, wherein the active matrix type organic EL display device is applied to a portion and stored in the capacitor portion, and the potential of the gate electrode of the driving transistor is set to Vsig + Vth.   9. The active matrix organic EL display device according to claim 7, wherein the pixel writing period is shorter than the video signal line writing period. A plurality of switching units that are connected to the plurality of video signal lines and switch whether to apply the video signal voltage Vsig or the reset voltage Vrst to the corresponding video signal lines;
The drive unit is
7. The device according to claim 4, wherein when the reset voltage Vrst is applied to the pixel, the write transistor is turned on, and the reset voltage provided by the switching unit is applied via the video signal line and the write transistor. The active matrix organic EL display device according to any one of the above items.   3. The active matrix organic EL display device according to claim 1, wherein the initialization transistor and the writing transistor are formed of any one of an N-channel transistor and a P-channel transistor.   4. The active matrix organic EL display device according to claim 3, wherein the initialization transistor, the write transistor, and the reset transistor are formed of any one of an N-channel type and a P-channel type transistor.   The active matrix organic EL display device according to claim 1, wherein the initialization voltage is higher than a potential of the high potential power supply wiring. A plurality of video signal lines; and a plurality of pixels connected to the video signal lines, each pixel including an anode connected to a high-potential power line, a cathode disposed opposite to the anode, and the anode And an organic EL diode including an organic material layer sandwiched between the cathode, a source electrode connected to the cathode of the organic EL diode, a drain electrode connected to a low-potential power wiring, and a P-channel type including a gate electrode A capacitor including a driving transistor, a first electrode connected to the source electrode of the driving transistor, and a second electrode connected to the gate electrode of the driving transistor, and a drain electrode connected to the source electrode of the driving transistor , Including a gate electrode connected to the first scanning signal line and a source electrode to which an initialization voltage is supplied, and switching whether to output the initialization voltage An initialization transistor for switching whether to initialize the potential of the source electrode of the driving transistor, a drain electrode connected to the gate electrode of the driving transistor, a source electrode connected to the video signal line, and a second scanning signal line And a write transistor that switches whether to output a video signal voltage supplied via the video signal line, and a driving method for an active matrix organic EL display device,
In the reset period, the initialization transistor is turned on, the initialization voltage Vini is applied to the source electrode of the drive transistor via the initialization transistor, and the potential of the source electrode of the drive transistor is set to the initialization potential Vini. And a reset voltage Vrst is applied to the gate electrode of the driving transistor to set the potential of the gate electrode of the driving transistor to the reset potential Vrst,
In the cancellation period following the reset period, the reset voltage is applied to the gate electrode of the drive transistor, the initialization transistor is switched to a non-conductive state, and the potential of the source electrode of the drive transistor is set to the reset potential. A difference Vrst−Vth from the threshold voltage Vth of the driving transistor is set.
In the write period following the cancel period, the video transistor is turned on, and the video signal voltage Vsig corresponding to the gradation of light emitted from the organic EL diode is supplied to the gate electrode of the drive transistor via the write transistor. And the potential of the source electrode of the driving transistor is set to Vrst−Vth−ΔV obtained by adding a variation (−ΔV) of the potential of the source electrode of the driving transistor caused by the application of the video signal voltage.
In the light emission period following the address period, when the address transistor is switched to a non-conductive state and the gain coefficient of the drive transistor is β, the output current of the drive transistor is Iel = ½ × β × (Vsig−Vrst + ΔV) ² Is applied to the organic EL diode to emit light, and the driving method of the active matrix organic EL display device. Each pixel further includes another capacitor portion including a first electrode connected to a source electrode of the driving transistor and a second electrode connected to the first scanning signal line, and the source of the initialization transistor In the driving method of the active matrix organic EL display device connected to the high-potential power supply wiring,
In the reset period, the initialization transistor is turned on, and the potential of the source electrode of the drive transistor is set to the same voltage potential PVDD as the high-potential power supply wiring as the initialization potential via the initialization transistor. 15. The driving method for an active matrix organic EL display device according to claim 14, wherein a reset voltage Vrst is applied to the gate electrode of the driving transistor to set the potential of the gate electrode of the driving transistor to the reset potential Vrst. A plurality of video signal lines; and a plurality of pixels connected to the video signal lines, each pixel including an anode connected to a high-potential power line, a cathode disposed opposite to the anode, and the anode And an organic EL diode including an organic material layer sandwiched between the cathode, a source electrode connected to the cathode of the organic EL diode, a drain electrode connected to a low-potential power wiring, and a P-channel type including a gate electrode A capacitor including a driving transistor, a first electrode and a second electrode connected to the gate electrode of the driving transistor; a source electrode connected to the first electrode of the capacitor; and a first scanning signal line. A gate electrode and a drain electrode connected to the source electrode of the driving transistor, and an initial stage for switching whether to initialize the potential of the source electrode of the driving transistor A transistor, a source electrode connected to the high potential power line, a gate electrode connected to the first scanning signal line, and a drain electrode connected to the gate electrode of the driving transistor, A reset transistor for switching whether to set the potential to the potential of the high-potential power line, a drain electrode connected to the first electrode of the capacitor, a source electrode connected to the video signal line, and a second scanning signal line In a driving method of an active matrix organic EL display device, including a connected gate electrode, and a write transistor that switches whether to output a video signal voltage supplied via the video signal line,
In the reset period, the reset transistor is turned on, the potential of the gate electrode of the drive transistor is set to the same voltage potential PVDD as that of the high-potential power supply line through the reset transistor, and the source electrode of the drive transistor Is applied with a reset voltage Vrst to set the potential of the source electrode of the driving transistor to the reset potential Vrst,
In the cancellation period following the reset period, the initialization transistor is turned on, and the potential of the source electrode of the driving transistor is set to a difference PVDD−Vth between the voltage potential and the threshold voltage Vth of the driving transistor,
In the writing period following the cancellation period, the reset transistor and the initialization transistor are switched to a non-conductive state, the writing transistor is turned on, and a video signal voltage corresponding to the gradation of light emitted from the organic EL diode. Vsig is applied to the capacitor through the write transistor and stored in the capacitor, and the potential of the gate electrode of the drive transistor is set to Vsig + Vth,
In the light emission period following the address period, when the address transistor is switched to a non-conductive state and the gain coefficient of the drive transistor is β, the output current of the drive transistor Iel = ½ × β × (Vsig−PVDD) ² Is applied to the organic EL diode to emit light, and the driving method of the active matrix organic EL display device. The writing period includes a video signal line writing period, and a pixel writing period following the video signal line writing period,
During the video signal line write period, the video transistor is turned off and the video signal voltage Vsig corresponding to the gradation of light emitted from the organic EL diode is applied to the video signal line. Remember,
During the pixel writing period, the application of the video signal voltage to the video signal line is stopped, the writing transistor is switched to a conductive state, and the video signal voltage stored in the video signal line is passed through the writing transistor. Vrst−Vth−ΔV, which is applied to the gate electrode of the driving transistor, and the potential of the source electrode of the driving transistor is added to the potential variation (−ΔV) of the source electrode of the driving transistor caused by the application of the video signal voltage. The method for driving an active matrix organic EL display device according to claim 14 or 15, wherein The writing period includes a video signal line writing period, and a pixel writing period following the video signal line writing period,
During the video signal line write period, the video transistor is turned off and the video signal voltage Vsig corresponding to the gradation of light emitted from the organic EL diode is applied to the video signal line. Remember,
In the pixel writing period, the reset transistor and the initialization transistor are switched to a non-conductive state, the write transistor is switched to a conductive state, and the video signal voltage stored in the video signal line is transferred to the capacitor via the write transistor. The driving method of an active matrix organic EL display device according to claim 16, wherein the potential is applied to a portion and stored in the capacitor portion, and the potential of the gate electrode of the driving transistor is set to Vsig + Vth.

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