JP2010080115A - Flat-face display device and spacer - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a flat-face display device having a constitution and a structure, capable of reducing relative luminance fluctuations of pixels along a spacer. <P>SOLUTION: In the flat-face display device, an anode panel AP and a cathode panel CP are jointed at an outer periphery part, and a space SP pinched by the cathode panel CP and the anode panel AP is held in vacuum, with a spacer 40 arranged in between the anode panel AP and the cathode panel CP. The spacer 40 is structured of a spacer base material 41, made of a ceramic material and an antistatic film 43 formed on its side face; here, if the electrical resistance value between a top-end face of the spacer base material facing the anode panel and a lower end face of the spacer base material facing the cathode panel is R<SB>B</SB>, and the electrical resistance value between a spacer top-end face facing the anode panel and a spacer lower-end face facing the cathode panel is R<SB>A</SB>, relation R<SB>A</SB>/R<SB>B</SB>≥0.9 is satisfied. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a spacer used in a flat display device and a flat display device in which such a spacer is incorporated.

  As an image display device that can replace the mainstream cathode ray tube (CRT), various types of flat display devices have been studied. Examples of such a flat display device include a liquid crystal display device (LCD), an electroluminescence display device (ELD), and a plasma display device (PDP). In addition, development of a flat display device incorporating a cathode panel equipped with an electron-emitting device is also in progress. Here, as the electron-emitting device, a cold cathode field electron-emitting device, a metal / insulating film / metal-type device (also called MIM device), and a surface conduction electron-emitting device are known. A flat display device incorporating a cathode panel provided with the electron-emitting device is attracting attention from the viewpoint of high resolution, high-speed response, high-luminance color display, and low power consumption.

  A cold cathode field emission display device (hereinafter sometimes abbreviated as “display device”), which is a flat display device incorporating a cold cathode field emission device as an electron emission device, generally has a plurality of cold cathode field fields. A cathode panel provided with an electron-emitting device (hereinafter sometimes abbreviated as “field-emitting device”), and an anode panel having a phosphor region that emits light when excited by collision with electrons emitted from the field-emitting device; However, it has a configuration in which the cathode panel and the anode panel are joined to each other through a joining member at the peripheral edge portion through a space maintained at a high vacuum. Here, the cathode panel has electron emission regions corresponding to the sub-pixels arranged in a two-dimensional matrix, and each electron emission region is provided with one or a plurality of field emission elements. Examples of field emission devices include Spindt type, flat type, edge type, and planar type.

  As an example, a schematic partial end view of a typical display device having a Spindt-type field emission device is shown in FIG. 1, and the cathode panel CP and a part of the anode panel AP when the cathode panel CP and the anode panel AP are disassembled are shown in FIG. FIG. 3 shows a schematic exploded perspective view. The Spindt-type field emission device constituting this display device was formed on the cathode 10 formed on the support 10, the insulating layer 12 formed on the support 10 and the cathode 11, and the insulating layer 12. A gate electrode 13 and an opening 14 provided in the gate electrode 13 and the insulating layer 12 (a first opening 14A provided in the gate electrode 13 and a second opening 14B provided in the insulating layer 12); It is composed of a conical electron emission portion 15 formed on the cathode electrode 11 located at the bottom of the opening 14. An interlayer insulating layer 16 is formed on the insulating layer 12, and a focusing electrode 17 is formed on the interlayer insulating layer 16.

  In this display device, the cathode electrode 11 has a strip shape extending in the column direction (Y direction), and the gate electrode 13 has a strip shape extending in a row direction (X direction) different from the Y direction. In general, the cathode electrode 11 and the gate electrode 13 are formed in directions in which the projected images of both the electrodes 11 and 13 are orthogonal to each other. An overlapping region where the strip-shaped cathode electrode 11 and the strip-shaped gate electrode 13 overlap is an electron emission region EA. The electron emission area EA is an effective area EF of the cathode panel CP (a central display area that performs a display function, which is a practical function as a flat display device), and the invalid area NF corresponds to the effective area EF. They are usually arranged in a two-dimensional matrix within the outer area and surrounding the effective area EF in a frame shape.

  On the other hand, the anode panel AP has phosphor regions 22 having a predetermined pattern on the substrate 20 (specifically, a red light-emitting phosphor region 22R, a green light-emitting phosphor region 22G, and a blue light-emitting phosphor region 22B). The phosphor region 22 is formed and covered with the anode electrode 24. In addition, a space between these phosphor regions 22 is embedded with a light absorbing layer (black matrix) 23 made of a light absorbing material such as carbon to prevent the occurrence of color turbidity and optical crosstalk in the display image. ing. Further, each of the phosphor regions 22 is surrounded by the partition walls 21, and the planar shape of the partition walls 21 is a lattice shape (cross-beam shape). In the figure, reference numeral 140 represents a spacer extending in the row direction (X direction), reference numeral 25 represents a spacer holding portion, and reference numeral 26 represents a joining member. However, in FIG. 1, the spacer is indicated by reference numeral 40 instead of reference numeral 140. Further, in FIG. 3, illustration of the partition walls and the spacers is omitted.

One subpixel is constituted by an electron emission area EA on the cathode panel side and a phosphor area 22 on the anode panel side facing (facing to) the electron emission area EA. In the effective area EF, pixels (pixels) are arranged on the order of hundreds of thousands to millions, for example. In a display device for color display, one pixel (one pixel) includes a set of a red light emitting subpixel, a green light emitting subpixel, and a blue light emitting subpixel. Then, the anode panel AP and the cathode panel CP are arranged so that the electron emission region EA and the phosphor region 22 are opposed to each other, joined at the peripheral portion via the joining member 26, and then exhausted and sealed. Thus, a display device can be manufactured. A space SP surrounded by the anode panel AP, the cathode panel CP, and the bonding member 26 is in a high vacuum (for example, 1 × 10 ⁻³ Pa or less). Therefore, unless the spacer 140 is disposed between the anode panel AP and the cathode panel CP, the display device is damaged by the atmospheric pressure. The spacer 140 includes a spacer base material 141 and an antistatic film 143 formed on the side surface of the spacer base material 141. However, in FIG. 1, the spacer base material 141 and the antistatic film 143 are alternatively denoted by reference numerals 41 and 43.

  The spacer base material 141 constituting the conventional spacer 140 is made of ceramics such as mullite, alumina, barium titanate, or a high resistance rigid material such as glass. Both ends of the spacer 140 are in contact with the anode electrode 24 and the focusing electrode 17, respectively. Therefore, a potential difference (voltage) between the voltage applied to the anode electrode 24 and the voltage applied to the focusing electrode 17 is applied between both ends of the spacer 140. Depending on the type of the display device, the cathode panel side of the spacer 140 is in contact with the gate electrode 13. In this case, a potential difference (voltage) between the voltage applied to the anode electrode and the voltage applied to the gate electrode is applied between both ends of the spacer 140. Therefore, the spacer 140 is basically required to have a high resistance so that an excessive current does not flow through the spacer 140. Further, the potential difference (voltage) at both ends of the spacer 140 needs to be divided equally between both ends of the spacer 140. Therefore, it is preferable that the specific resistance of the high-resistance rigid material constituting the spacer base material 141 is a value within a predetermined range and is as uniform as possible. For example, JP 2003-524280 A discloses various ceramic materials as the high resistance rigid material.

5A and 5B schematically show the trajectory of the electron beam in the pixel located in the vicinity of the spacer 140. FIG. As shown in FIG. 5A, the electrons emitted from the electron emission portion 15 go to the phosphor region 22. A part of the electrons that have passed through the anode electrode 24 in the anode panel AP and collided with the phosphor region 22 are scattered backward by the phosphor region 22. Hereinafter, these electrons are referred to as “backscattered electrons”. Some of the backscattered electrons collide with the side surface of the spacer 140 (see FIG. 5B). When electrons collide with the side surface of the spacer 140, secondary electrons are emitted from the surface. When there is a difference between the amount of electrons colliding with the spacer 140 and the amount of secondary electrons emitted from the spacer 140, the spacer 140 is charged and affects the trajectory of the electrons. Therefore, an antistatic film 143 made of a material having a secondary electron emission coefficient close to 1, for example, an antistatic film 143 made of CrO _x is provided on the side surface of the spacer base material 141. Other materials that make up the antistatic film 143 (materials whose secondary electron emission coefficient is close to 1) include semimetals such as graphite, oxides, borides, carbides, sulfides, and nitrides. For example, various materials are disclosed in JP-T-2004-500688.

Special table 2003-524280 gazette JP-T-2004-500688

By the way, in such an antistatic film 143, the antistatic film 143 made of CrO _x is subjected to a reducing action due to collision of backscattered electrons for a long period of time. Arise. When an undesired change in the electrical resistance value of the antistatic film 143 occurs, a change occurs in the trajectory of the electron beam emitted from the electron emission region in the vicinity of the spacer 140, and as a result, along the spacer 140. There is a problem in that a relative luminance change occurs between the remaining pixels and pixels located in other portions.

  Accordingly, an object of the present invention is to provide a flat panel display having a configuration and structure capable of reducing the relative luminance change of pixels along the spacer, and a spacer used in the flat panel display. .

  In order to achieve the above object, a flat display device according to the first or second aspect of the present invention includes an anode panel in which a phosphor region and an anode electrode are provided on a substrate, and two on a support. A cathode panel having electron emission regions arranged in a three-dimensional matrix is joined at the outer periphery, and a space sandwiched between the cathode panel and the anode panel is maintained in a vacuum, and a spacer is connected to the anode panel. It is a flat type display device arranged between the cathode panel. Further, the spacer according to the first aspect or the second aspect of the present invention for achieving the above object includes an anode panel in which a phosphor region and an anode electrode are provided on a substrate, and a two-dimensional structure on a support. A cathode panel having electron emission regions arranged in a matrix is joined at the outer periphery, and is used in a flat display device in which a space sandwiched between the cathode panel and the anode panel is maintained in a vacuum. The spacer is disposed between the anode panel and the cathode panel.

The spacer in the flat display device according to the first aspect of the present invention or the spacer according to the first aspect of the present invention (hereinafter collectively referred to as “the spacer according to the first aspect of the present invention”). Etc.))
(A) a spacer substrate made of a ceramic material, and
(B) an antistatic film formed on the side surface of the spacer substrate;
Consists of
R _B is the electrical resistance value between the spacer substrate upper end surface facing the anode panel and the spacer substrate lower end surface facing the cathode panel, and the spacer upper end surface facing the anode panel and the spacer lower end surface facing the cathode panel When the electric resistance value between is R _A ,
R _A / R _B ≧ 0.9
Satisfied.

The electrical resistance value R _B between the spacer base material upper end surface facing the anode panel and the spacer base material lower end surface facing the cathode panel is a measurement of the electrical resistance value of the spacer base material itself, that is, an antistatic film is applied. It can obtain | require by the measurement of the electrical resistance value of the spacer base material before forming. In general, the electrical resistance value R _A of the spacer is the same as or lower than the electrical resistance value R _B of the spacer base material if the manufacturing variation is ignored, so the upper limit of R _A / R _B is It is “1” when manufacturing variations are ignored.

In addition, the spacer in the flat display device according to the second aspect of the present invention, or the spacer according to the second aspect of the present invention (hereinafter collectively referred to as “the spacer according to the second aspect of the present invention”). Etc.))
(A) a spacer substrate made of a ceramic material, and
(B) an antistatic film formed on the side surface of the spacer substrate;
Consists of
When the surface roughness of the spacer side surface is _Ra (unit: μm) and the average thickness of the antistatic film is t (unit: nm),
t ≦ 7.1 · R _a +1.4
Satisfied. Note that the surface roughness _Ra is based on the provisions of JIS B0601: 2001.

In the spacer or the like according to the second aspect of the present invention, the electric resistance value between the spacer base upper end surface facing the anode panel and the spacer base lower end surface facing the cathode panel is R _B , the anode panel R _A is the electrical resistance value between the spacer upper surface facing the cathode and the spacer lower surface facing the cathode panel.
R _A / R _B ≧ 0.9
Is preferably satisfied.

  In the spacer according to the first aspect of the present invention, or the spacer according to the second aspect of the present invention including the above-mentioned preferred form, the antistatic film has an electric resistance value that does not change even by collision of electrons. Or it is preferable to comprise from a material with little change, for example, silicon, such as a polycrystalline silicon or an amorphous silicon, can be mentioned. A natural oxide film may be formed on the outermost surface of the antistatic film made of silicon. Even in this case, it is assumed that the antistatic film is made of silicon (Si).

Between the antistatic film and the spacer substrate, for example, silicon oxide (SiO _x ), silicon nitride (SiN _y ), silicon oxynitride (SiO _x N _y ), or partially stabilized zirconium oxide An underlayer made of (ZrO ₂ ) may be formed. Partially as stabilized zirconium oxide (partially stabilized zirconia), _{specifically, ZrO 2 -Y 2 O 3,} ZrO 2 -CaO, ZrO 2 -CeO 2, ZrO 2 -MgO, a ZrO ₂ -SiO ₂ Can be mentioned. Although not limited, it is desirable that the thickness of the underlayer is 4 × 10 ⁻⁹ m or more and 2 × 10 ⁻⁷ m or less. It is desirable that the undercoat layer covers 95% or more of the side surface of the spacer base material. However, it is not essential to form the underlayer.

  The spacer according to the first aspect of the present invention including the preferred embodiment and configuration described above, or the like according to the second aspect of the present invention (hereinafter, these are collectively referred to simply as “the spacer according to the present invention”). In some cases, the antistatic film and the underlayer are formed by various physical vapor deposition methods such as vacuum deposition including electron beam deposition and hot filament deposition, sputtering, ion plating, and laser ablation. (PVD method): It can be formed (film formation) by a known method such as various chemical vapor deposition (CVD) methods.

  In the spacer of the present invention, as a ceramic material constituting the spacer substrate, aluminum silicate compounds such as mullite, aluminum oxide such as alumina, barium titanate, lead zirconate titanate, zirconia (zirconium oxide), cordiolite, Mention may be made of borosilicate barium, iron silicate, glass ceramic materials. In addition, the spacer base material includes titanium oxide, chromium oxide, magnesium oxide, iron oxide, vanadium oxide, nickel oxide, molybdenum oxide, niobium oxide, tungsten oxide, metal oxides such as gold and Precious metals such as platinum; metal carbides such as titanium carbide, tungsten carbide, and nickel carbide; metal salts such as ammonium molybdate, or a mixture thereof may be included. These materials may be referred to as “reducing substances” or “conductivity-imparting materials” for convenience.

  In the spacer or the like of the present invention, an end electrode layer can be formed on the upper and lower end surfaces of the spacer base material. Here, the end electrode layer formed on the upper end surface (top surface) of the spacer substrate is in contact with the anode electrode, and the end electrode layer formed on the lower end surface (bottom surface) of the spacer substrate is an electrode, for example, It is in contact with a focusing electrode described later. For example, the spacer may be fixed by being sandwiched between partition walls provided in the anode panel, or, for example, a spacer holding portion may be formed on the anode panel and / or the cathode panel and fixed by the spacer holding portion. do it.

  In the flat display device of the present invention including the preferred embodiment and configuration described above, or the spacer of the present invention (hereinafter, these may be collectively referred to simply as “the present invention”), one row. The spacer may be composed of a single spacer or may be composed of a plurality of spacers.

The spacer substrate is, for example,
(A) Using ceramic powder as a dispersoid, adding a binder to prepare a slurry for a green sheet,
(B) After forming (shaping) the green sheet slurry to obtain a green sheet,
(C) firing the green sheet;
Can be manufactured.

  The ceramic material constituting the spacer base material is formed by sintering the ceramic powder in the green sheet slurry. The ceramics mentioned above can be mentioned as a material which comprises the ceramic powder used as the dispersoid of the slurry for green sheets. In addition, you may add the reducing material (conductivity provision material) mentioned above to the slurry for green sheets as a dispersoid as needed. The reducing material does not necessarily have conductivity in the green sheet slurry. The reducing substance may have a chemical composition that changes when the green sheet is fired, or may have a chemical composition that does not change by firing. Specifically, by firing the green sheet, the reducing substance in the green sheet is also fired, but it is sufficient that the fired reducing substance exhibits conductivity. Examples of the material constituting the binder added to the green sheet slurry include organic binder materials (for example, acrylic emulsion, polyvinyl alcohol (PVA), polyethylene glycol) or inorganic binder materials (for example, water glass). be able to.

In a flat panel display device, a substrate that constitutes a cathode panel or a substrate that constitutes an anode panel may be any glass substrate, surface only if the surfaces of these substrates facing each other are composed of insulating members. Examples of the glass substrate, quartz substrate, quartz substrate having an insulating film formed on the surface, and semiconductor substrate having an insulating film formed on the surface include glass substrate from the viewpoint of reducing the manufacturing cost. It is preferable to use a substrate or a glass substrate having an insulating film formed on the surface. As glass substrates, high strain point glass, low alkali glass, soda glass (Na ₂ O · CaO · SiO ₂ ), borosilicate glass (Na ₂ O · B ₂ O ₃ · SiO ₂ ), forsterite (2MgO · SiO ₂₎ ), Lead glass (Na ₂ O · PbO · SiO ₂ ), and alkali-free glass.

  In the flat display device, cold cathode field emission devices (field emission devices), metal / insulating film / metal type devices (MIM devices), and surface conduction electron emission devices are listed as electron emission devices constituting the electron emission region. be able to. Further, as a flat display device, a flat display device (cold cathode field electron emission display device) provided with a cold cathode field emission device, a flat display device incorporating an MIM element, and a surface conduction electron emission device are incorporated. And a flat display device.

Here, when the flat display device is a cold cathode field emission display device including a field emission device, the field emission device is:
(A) a cathode electrode formed on a support;
(B) an insulating layer formed on the support and the cathode electrode;
(C) a gate electrode formed on the insulating layer;
(D) an opening provided in a portion of the gate electrode and the insulating layer located in an overlapping region where the cathode electrode and the gate electrode overlap, and an exposed portion of the cathode electrode at the bottom; and
(E) an electron emission portion provided on the cathode electrode exposed at the bottom of the opening, the electron emission being controlled by application of a voltage to the cathode electrode and the gate electrode;
Consists of.

  The type of the field emission device is not particularly limited, and a Spindt-type field emission device (a field emission device in which a conical electron emission portion is provided on the cathode electrode positioned at the bottom of the opening) or a flat type field emission device An element (a field emission element in which a substantially planar electron emission portion is provided on a cathode electrode positioned at the bottom of an opening) can be given. In the cathode panel, it is preferable that the projected image of the gate electrode and the projected image of the cathode electrode be orthogonal from the viewpoint of simplifying the structure of the cold cathode field emission display. Here, the gate electrode may extend in the row direction (X direction), and the cathode electrode may extend in the column direction (Y direction). In the cathode panel, an overlapping region where the gate electrode and the cathode electrode overlap constitutes an electron emission region, and the electron emission regions are arranged in a two-dimensional matrix, and each electron emission region has one or a plurality of field emission elements. An element is provided.

  In the cold cathode field emission display device, a strong electric field generated by the voltage applied to the gate electrode and the cathode electrode is applied to the electron emission portion during actual display operation. Electrons are emitted. The electrons are attracted to the anode panel by the anode electrode provided on the anode panel, and collide with the phosphor region. As a result of the collision of electrons with the phosphor region, the phosphor region emits light and can be recognized as an image.

In the cold cathode field emission display, the cathode electrode is connected to the cathode electrode control circuit, the gate electrode is connected to the gate electrode control circuit, and the anode electrode is connected to the anode electrode control circuit. Note that these control circuits can be constituted by known circuits. During actual display operation, the voltage (anode voltage) V _A applied from the anode electrode control circuit to the anode electrode is normally constant, and can be set to, for example, 5 kilovolts to 15 kilovolts. Alternatively, when the distance between the anode panel and the cathode panel is d ₀ (where 0.5 mm ≦ d ₀ ≦ 10 mm), the value of V _A / d ₀ (unit: kilovolt / mm) is 0. It is desirable to satisfy 5 or more and 20 or less, preferably 1 or more and 10 or less, and more preferably 4 or more and 8 or less. During actual display operation of the cold cathode field emission display device, for example, with respect to the voltage V _C applied to the cathode electrode and the voltage V _G applied to the gate electrode, a voltage modulation method or a pulse width modulation method is adopted as a gradation control method. can do.

A field emission device can be generally manufactured by the following method.
(1) forming a cathode electrode on a support;
(2) forming an insulating layer on the entire surface (on the support and the cathode electrode);
(3) forming a gate electrode on the insulating layer;
(4) forming an opening in a portion of the gate electrode and the insulating layer in a region where the cathode electrode and the gate electrode overlap, and exposing the cathode electrode at the bottom of the opening;
(5) A step of forming an electron emission portion on the cathode electrode located at the bottom of the opening.

Alternatively, the field emission device can be manufactured by the following method.
(1) forming a cathode electrode on a support;
(2) forming an electron emission portion on the cathode electrode;
(3) forming an insulating layer on the entire surface (on the support and the electron emission portion or on the support, the cathode electrode and the electron emission portion);
(4) forming a gate electrode on the insulating layer;
(5) A step of forming an opening in a portion of the gate electrode and the insulating layer in the overlapping region of the cathode electrode and the gate electrode, and exposing the electron emission portion at the bottom of the opening.

  When a focusing electrode (focus electrode) is provided, an interlayer insulating layer is further provided on the gate electrode and the insulating layer, and a focusing electrode is provided on the interlayer insulating layer, or above the gate electrode. The focusing electrode may be provided with a focusing electrode. Here, the focusing electrode is an electrode for converging the trajectory of emitted electrons that are emitted from the opening and directed toward the anode electrode, thereby improving the luminance and preventing optical crosstalk between adjacent pixels. It is. In a so-called high voltage type cold cathode field emission display, the potential difference between the anode electrode and the cathode electrode is on the order of several kilovolts or more and the distance between the anode electrode and the cathode electrode is relatively long. The electrode is particularly effective. A relatively negative voltage (for example, 0 volts) is applied to the focusing electrode from the focusing electrode control circuit. The focusing electrode does not necessarily have to be individually formed so as to surround each of the electron emission portion or the electron emission region provided in the overlapping region where the cathode electrode and the gate electrode overlap, for example, the electron emission portion or The electron emission regions may be extended along a predetermined arrangement direction, or the electron emission portion or the electron emission region may be surrounded by a single convergence electrode (that is, the convergence electrode may be formed in the entire effective region). In this case, a single sheet-like structure covering the plurality of electron emission portions or electron emission regions can be provided with a common convergence effect. Note that an opening (third opening) is provided in the focusing electrode and the interlayer insulating layer.

  Here, the effective area is a central display area that performs a display function that is a practical function as a flat display device, and the ineffective area is located outside the effective area, and the effective area is framed. Besieged.

As constituent materials for the gate electrode, cathode electrode, focusing electrode, and end electrode layer, chromium (Cr), aluminum (Al), tungsten (W), niobium (Nb), tantalum (Ta), molybdenum (Mo), copper ( Metals such as Cu), gold (Au), silver (Ag), titanium (Ti), nickel (Ni), cobalt (Co), zirconium (Zr), iron (Fe), platinum (Pt), zinc (Zn) Various metals including these metals; alloys (such as MoW) or compounds (such as TiW; nitrides such as TiN and WN; silicides such as WSi ₂ , MoSi ₂ , TiSi ₂ and TaSi ₂ ); silicon (Si And the like; carbon thin films such as diamond; and conductive metal oxides such as ITO (indium oxide-tin), indium oxide, and zinc oxide. The gate electrode, the cathode electrode, the focusing electrode, and the end electrode layer can have a single layer structure or a laminated structure of these materials. In addition, as a method of forming these electrodes and end electrode layers, for example, various PVD methods including vacuum deposition methods such as an electron beam deposition method and a hot filament deposition method, a sputtering method, an ion plating method, and a laser ablation method; Various printing methods including screen printing method, ink jet printing method, metal mask printing method; plating method (electroplating method and electroless plating method); lift-off method; sol-gel method, etc. A combination of a method and an etching method can also be mentioned. Here, by appropriately selecting the formation method, it is possible to directly form a patterned strip-shaped cathode electrode, gate electrode, and focusing electrode.

  In the Spindt-type field emission device, as the material constituting the electron emission portion, molybdenum, molybdenum alloy, tungsten, tungsten alloy, titanium, titanium alloy, niobium, niobium alloy, tantalum, tantalum alloy, chromium, chromium alloy, and And at least one material selected from the group consisting of silicon (polysilicon and amorphous silicon) containing impurities. The electron emission portion of the Spindt-type field emission device can be formed by various PVD methods such as a sputtering method and a vacuum deposition method, and various CVD methods.

In the flat field emission device, it is preferable that the material constituting the electron emission portion is composed of a material having a work function Φ smaller than that of the material constituting the cathode electrode. What is necessary is just to determine based on the work function of the material which comprises a cathode electrode, the electric potential difference between a gate electrode and a cathode electrode, the magnitude | size of the emission electron current density requested | required, etc. Alternatively, the material constituting the electron emission portion may be appropriately selected from materials in which the secondary electron gain δ of the material is larger than the secondary electron gain δ of the conductive material constituting the cathode electrode. Good. In the flat type field emission device, carbon, more specifically, amorphous diamond or graphite, a carbon nanotube structure (carbon nanotube and / or graphite nanofiber), as a particularly preferable constituent material of the electron emission portion, Examples thereof include ZnO whiskers, MgO whiskers, SnO ₂ whiskers, MnO whiskers, Y ₂ O ₃ whiskers, NiO whiskers, ITO whiskers, In ₂ O ₃ whiskers, and Al ₂ O ₃ whiskers. In addition, the material which comprises an electron emission part does not necessarily need to be provided with electroconductivity.

  Planar shape of the first opening (opening formed in the gate electrode) or the second opening (opening formed in the insulating layer) (shape when the opening is cut in a virtual plane parallel to the support surface) ) Can be any shape such as a circle, an ellipse, a rectangle, a polygon, a rounded rectangle, a rounded polygon. The formation of the first opening can be performed by, for example, anisotropic etching, isotropic etching, a combination of anisotropic etching and isotropic etching, or, depending on the method of forming the gate electrode, The first opening can also be formed directly. The second opening can also be formed by, for example, anisotropic etching, isotropic etching, or a combination of anisotropic etching and isotropic etching. The formation of the third opening provided in the focusing electrode and the interlayer insulating layer can be performed in the same manner.

  In the field emission device, depending on the structure of the field emission device, one electron emission portion may exist in one opening, or a plurality of electron emission portions may exist in one opening. In addition, a plurality of first openings are provided in the gate electrode, one second opening communicating with the first opening is provided in the insulating layer, and one or more are provided in one second opening provided in the insulating layer. There may be an electron emission portion.

In the field emission device, a resistor thin film may be formed between the cathode electrode and the electron emission portion. By forming the resistor thin film, the operation of the field emission device can be stabilized, the electron emission characteristics can be made uniform, and the leakage current between the cathode electrode and the gate electrode can be suppressed. As a material constituting the resistor thin film, a carbon resistor material such as silicon carbide (SiC) or SiCN, a semiconductor resistor material such as SiN or amorphous silicon, a high melting point such as ruthenium oxide (RuO ₂ ), tantalum oxide, or tantalum nitride. Examples thereof include metal oxides and refractory metal nitrides. Examples of the method of forming the resistor thin film include various printing methods such as a sputtering method, various CVD methods, and a screen printing method. The electric resistance value per one electron emitting portion may be about 1 × 10 ⁵ to 1 × 10 ¹¹ Ω, preferably several MΩ to several tens of gigaΩ.

Insulating layer, as a constituent material of the interlayer insulating _{layer, SiO 2, BPSG, PSG,} BSG, AsSG, PbSG, SiON, SOG ( spin on glass), low-melting glass, SiO ₂ based materials such glass paste; SiN-based materials; polyimide These insulating resins can be used alone or in appropriate combination. For forming the insulating layer and the interlayer insulating layer, known processes such as various printing methods such as various CVD methods, coating methods, sputtering methods, and screen printing methods can be used.

In the flat display device, as a configuration example of the anode electrode and the phosphor region,
(1) A configuration in which an anode electrode is formed on a substrate and a phosphor region is formed on the anode electrode. (2) A configuration in which a phosphor region is formed on the substrate and an anode electrode is formed on the phosphor region. Can be mentioned. In the configuration (1), a so-called metal back film that is electrically connected to the anode electrode may be formed on the phosphor region. In the configuration (2), a metal back film may be formed on the anode electrode. The metal back film can also serve as the anode electrode.

The anode electrode may be composed of one anode electrode as a whole, or may be composed of a plurality of anode electrode units. In the latter case, it is preferable that the anode electrode unit and the anode electrode unit are electrically connected by an anode electrode resistor layer. The material constituting the anode electrode resistor layer includes carbon-based materials such as carbon, silicon carbide (SiC), and SiCN; SiN-based materials; ruthenium oxide (RuO ₂ ), tantalum oxide, tantalum nitride, chromium oxide, titanium oxide, and the like. Examples thereof include melting point metal oxides and high melting point metal nitrides; semiconductor materials such as amorphous silicon; ITO. It is also possible to realize a stable desired sheet resistance value by combining a plurality of films such as laminating a carbon thin film having a low resistance value on the SiC resistance film. Examples of the sheet resistance value of the anode electrode resistor layer include 1 × 10 ⁻¹ Ω / □ to 1 × 10 ¹⁰ Ω / □, preferably 1 × 10 ³ Ω / □ to 1 × 10 ⁸ Ω / □. it can. The number of anode electrode units [UN] may be two or more. For example, when the total number of phosphor regions arranged in a straight line is [un], [UN] = [un], or , [Un] = u · [UN] (u is an integer of 2 or more, preferably 10 ≦ u ≦ 100, more preferably 20 ≦ u ≦ 50), or spacers arranged at a constant interval. The number of pixels can be a number obtained by adding 1, or the number of pixels or the number of subpixels can be matched, or the number of pixels or the number of subpixels can be an integer. The size of each anode electrode unit may be the same regardless of the position of the anode electrode unit, or may vary depending on the position of the anode electrode unit. An anode electrode resistor layer may be formed on one anode electrode as a whole. As described above, if the anode electrode is divided into anode electrode units having a smaller area, instead of being formed over almost the entire effective area, the static electricity between the anode electrode unit and the electron emission area is formed. The electric capacity can be reduced. As a result, the occurrence of discharge can be reduced, and the occurrence of damage to the anode electrode and the electron emission region due to the discharge can be effectively reduced.

  When the anode electrode is composed of an anode electrode unit and a partition wall (described later) is formed, the anode electrode unit may be formed so as to extend from each phosphor region to the partition wall side surface. it can. The anode electrode unit may be formed from each phosphor region to the middle of the side wall of the partition wall.

The anode electrode (including the anode electrode unit) may be formed using a conductive material layer. As a method for forming the conductive material layer, for example, vacuum deposition methods such as electron beam deposition method and hot filament deposition method, various PVD methods such as sputtering method, ion plating method and laser ablation method; various CVD methods; various methods including screen printing method Examples thereof include printing method; metal mask printing method; lift-off method; sol-gel method. That is, a conductive material layer is formed, and based on lithography technology and etching technology, this conductive material layer can be patterned to form an anode electrode. Alternatively, the anode electrode can be obtained by forming a conductive material based on various PVD methods or various printing methods through a mask or screen having an anode electrode pattern. The anode electrode resistor layer can also be formed by the same or similar method as the anode electrode. That is, an anode electrode resistor layer may be formed from a resistor material, and the anode electrode resistor layer may be patterned based on a lithography technique and an etching technique, or a mask or a screen having an anode electrode resistor layer pattern. The anode electrode resistor layer can be obtained by forming the resistor material through various PVD methods and various printing methods. 3 × 10 ⁻⁸ m (30 nm) to 1 as the average thickness of the anode electrode on the substrate (or above the substrate) (when the partition is provided as described later, the average thickness of the anode electrode on the top surface of the partition) Examples include x10 ⁻⁶ m (1 μm), preferably 5 × 10 ⁻⁸ m (50 nm) to 5 × 10 ⁻⁷ m (0.5 μm).

As the constituent material of the anode electrode, aluminum (Al), molybdenum (Mo), chromium (Cr), tungsten (W), niobium (Nb), tantalum (Ta), gold (Au), silver (Ag), titanium (Ti ), Cobalt (Co), zirconium (Zr), iron (Fe), platinum (Pt), zinc (Zn), etc .; alloys or compounds containing these metal elements (for example, nitrides such as TiN, WSi ₂ , MoSi ₂ , TiSi ₂ , TaSi _2, etc.); silicon (Si), semiconductors; diamond, graphite and other carbon thin films; ITO (indium oxide-tin), indium oxide, zinc oxide, etc., conductive metal oxides Can be illustrated. When the anode electrode resistor layer is formed, the anode electrode is preferably made of a conductive material that does not change the electric resistance value of the anode electrode resistor layer. For example, the anode electrode resistor layer is made of silicon carbide (SiC). When comprised, it is preferable to comprise an anode electrode from molybdenum (Mo) or aluminum (Al).

  The phosphor region may be composed of monochromatic phosphor particles or may be composed of three primary color phosphor particles. The arrangement pattern of the phosphor regions is, for example, a dot shape. Specifically, when the flat display device is a color display, examples of the arrangement and arrangement of the phosphor regions include a delta arrangement, a stripe arrangement, a diagonal arrangement, and a rectangle arrangement. That is, one row of the phosphor regions arranged in a straight line is occupied by the row occupied by the red light emitting phosphor region, the row occupied by the green light emitting phosphor region, and the blue light emitting phosphor region. May be composed of a row in which a red light-emitting phosphor region, a green light-emitting phosphor region, and a blue light-emitting phosphor region are sequentially arranged. Here, the phosphor region is defined as a phosphor region that generates one bright spot on the anode panel. One pixel (one pixel) is composed of a set of one red light emitting phosphor region, one green light emitting phosphor region, and one blue light emitting phosphor region, and one subpixel is one phosphor. The region is composed of one red light emitting phosphor region, one green light emitting phosphor region, or one blue light emitting phosphor region. A gap between adjacent phosphor regions may be filled with a light absorption layer (black matrix) for the purpose of improving contrast.

  For the phosphor region, a luminescent crystal particle composition prepared from luminescent crystal particles is used. For example, a red photosensitive luminescent crystal particle composition (red light-emitting phosphor slurry) is applied to the entire surface and exposed. And developing to form a red light emitting phosphor region, and then applying a green photosensitive luminescent crystal particle composition (green light emitting phosphor slurry) to the entire surface, exposing and developing, and then producing a green light emitting phosphor. A region is formed, and further, a blue photosensitive luminescent crystal particle composition (blue light emitting phosphor slurry) is coated on the entire surface, exposed and developed to form a blue light emitting phosphor region. be able to. Alternatively, each phosphor region may be formed by a screen printing method, an ink jet printing method, a float coating method, a sedimentation coating method, a phosphor film transfer method, or the like. The average thickness of the phosphor region on the substrate is not limited, but is desirably 3 μm to 20 μm, preferably 5 μm to 10 μm. The phosphor material constituting the luminescent crystal particles can be appropriately selected and used from conventionally known phosphor materials. In the case of color display, a phosphor material whose color purity is close to the three primary colors specified by NTSC, white balance is achieved when the three primary colors are mixed, the afterglow time is short, and the afterglow time of the three primary colors is almost equal. It is preferable to combine them.

  It is preferable from the viewpoint of improving the contrast of the display image that the light absorption layer that absorbs light from the phosphor region is formed between adjacent phosphor regions or between a partition wall and a substrate described later. Here, the light absorption layer functions as a so-called black matrix. As a material constituting the light absorption layer, it is preferable to select a material that absorbs 90% or more of light from the phosphor region. Such materials include carbon, metal thin films (eg, chromium, nickel, aluminum, molybdenum, etc., or alloys thereof), metal oxides (eg, chromium oxide), metal nitrides (eg, chromium nitride), heat resistance Materials such as photosensitive organic resins, glass pastes, glass pastes containing conductive particles such as black pigments and silver, and specifically, photosensitive polyimide resins, chromium oxides, and chromium oxide / chromium laminated films Can be illustrated. In the chromium oxide / chromium laminated film, the chromium film is in contact with the substrate. The light absorption layer depends on the material used, for example, a combination of a vacuum deposition method, a sputtering method and an etching method, a combination of a vacuum deposition method, a sputtering method, a spin coating method and a lift-off method, various printing methods, a lithography technique, etc. Thus, it can be formed by a method selected as appropriate.

  In order to prevent an electron recoiled from the phosphor region or a secondary electron emitted from the phosphor region from entering another phosphor region, so-called optical crosstalk (color turbidity) is generated. It is preferable to provide a partition wall. Examples of the partition wall forming method include a screen printing method, a dry film method, a photosensitive method, a casting method, and a sandblast forming method. Here, in the screen printing method, an opening is formed in a portion of the screen corresponding to a portion where a partition is to be formed, and the partition forming material on the screen is passed through the opening using a squeegee, and the partition is formed on the substrate. In this method, after the formation material layer is formed, the partition wall formation material layer is fired. The dry film method is a method of laminating a photosensitive film on a substrate, removing the photosensitive film at the part where the partition wall is to be formed by exposure and development, embedding the partition wall forming material in the opening generated by the removal, and baking. . The photosensitive film is burned and removed by baking, and the partition wall-forming material embedded in the openings remains to form partition walls. The photosensitive method is a method in which a barrier rib-forming material layer having photosensitivity is formed on a substrate, the barrier rib-forming material layer is patterned by exposure and development, and then fired (cured). The casting method (embossing molding method) is a method of forming a partition wall forming material layer by extruding a partition wall forming material made of a paste-like organic material or inorganic material onto a substrate from a mold (cast), and then forming the partition wall. In this method, the forming material layer is fired. The sand blast forming method is, for example, forming a partition wall forming material layer on a substrate using a screen printing or a metal mask printing method, a roll coater, a doctor blade, a nozzle discharge type coater, and the like, and forming a partition after drying. In this method, the part of the partition wall forming material layer to be covered is covered with a mask layer, and then the exposed part of the partition wall forming material layer is removed by sandblasting. After the partition wall is formed, the partition wall may be polished to flatten the top surface of the partition wall.

  As a planar shape of the part surrounding the phosphor region in the partition wall (corresponding to the inner contour line of the projected image of the partition wall side surface and a kind of opening region), a rectangular shape, a circular shape, an elliptical shape, an oval shape, a triangular shape, Examples include pentagonal or more polygonal shapes, rounded triangular shapes, rounded rectangular shapes, rounded polygons, etc., and linear shapes extending parallel to two sides of the phosphor region (Rod-like shape). By arranging these planar shapes (planar shapes of the opening regions) in a two-dimensional matrix, a lattice-like partition is formed. This two-dimensional matrix-like arrangement may be arranged, for example, like a cross or like a zigzag.

Examples of the partition wall forming material include photosensitive polyimide resin, lead glass colored with a metal oxide such as cobalt oxide, SiO ₂ , and a low melting point glass paste. A protective layer (for example, made of SiO ₂ , SiON, or AlN) is provided on the surface (top surface and side surface) of the partition wall to prevent an electron beam from colliding with the partition wall and releasing gas from the partition wall. It may be formed.

The cathode panel and the anode panel are joined at the peripheral part, but the joining may be performed by using an adhesive layer as a joining member, or a rod-like or frame-like (frame-like) insulating rigidity such as glass or ceramics. You may carry out using the joining member which consists of the frame body comprised from material and an adhesive layer. When using a joining member consisting of a frame and an adhesive layer, the height of the frame is appropriately selected, so that the cathode panel and the anode panel are compared with the case where a joining member consisting only of the adhesive layer is used. It is possible to set the facing distance between the longer. As a constituent material of the adhesive layer, frit glass such as B ₂ O ₃ —PbO-based frit glass and SiO ₂ —B ₂ O ₃ —PbO-based frit glass is generally used, but the melting point is about 120 to 400 ° C. A so-called low melting point metal material may be used. As such low melting point metal materials, In (indium: melting point 157 ° C.); indium-gold low melting point alloy; Sn ₈₀ Ag ₂₀ (melting point 220 to 370 ° C.), Sn ₉₅ Cu ₅ (melting point 227 to 370 ° C.) Tin (Sn) high-temperature solder such as Pb _97.5 Ag _2.5 (melting point 304 ° C.), Pb _94.5 Ag _5.5 (melting point 304 to 365 ° C.), Pb _97.5 Ag _1.5 Sn _1.0 (melting point 309 ° C.) (Pb) high temperature solder; zinc (Zn) high temperature solder such as Zn ₉₅ Al ₅ (melting point 380 ° C.); Sn ₅ Pb ₉₅ (melting point 300 to 314 ° C.), Sn ₂ Pb ₉₈ (melting point 316 to 322 ° C.) Examples thereof include tin-lead based standard solder such as C); brazing material such as Au ₈₈ Ga ₁₂ (melting point 381 ° C.) (the above subscripts all represent atomic%).

  When joining the three members of the cathode panel, the anode panel, and the joining member, the three members may be joined at the same time, or in the first stage, either the cathode panel or the anode panel and the joining member are joined, In the second stage, the other of the cathode panel or the anode panel and the joining member may be joined. If the three-party simultaneous bonding or the second stage bonding is performed in a high vacuum atmosphere, the space surrounded by the cathode panel, the anode panel, and the bonding member becomes a vacuum simultaneously with the bonding. Alternatively, after the three members are joined, the space surrounded by the cathode panel, the anode panel, and the joining member can be evacuated to create a vacuum. When exhausting after joining, the atmosphere pressure during joining may be either normal pressure or reduced pressure, and the gas constituting the atmosphere may be nitrogen gas or a gas belonging to Group 0 of the periodic table (for example, Ar gas) ) Is preferable, but it can also be performed in the atmosphere.

  When exhaust is performed, the exhaust can be performed through an exhaust pipe called a tip pipe connected in advance to the cathode panel and / or the anode panel. The exhaust pipe is typically a glass pipe, or a metal or alloy having a low coefficient of thermal expansion [for example, an iron (Fe) alloy containing 42 wt% nickel (Ni), 42 wt% nickel (Ni), A hollow tube made of an iron (Fe) alloy containing 6 wt% chromium (Cr)], and the above-mentioned frit glass or After being joined using a low melting point metal material and the space has reached a predetermined degree of vacuum, it is sealed off by thermal fusion or sealed by crimping. In addition, if the whole flat display device is once heated and then cooled before sealing, it is preferable because residual gas can be released into the space, and this residual gas can be removed out of the space by exhaust. .

  In the present invention, when the number of pixels is M × N, as (M, N), specifically, VGA (640, 480), S-VGA (800, 600), XGA (1024, 768), APRC (1152,900), S-XGA (1280,1024), U-XGA (1600,1200), HD-TV (1920,1080), Q-XGA (2048,1536), (1920,1035), Some of the image display resolutions such as (720, 480) and (1280, 960) can be exemplified, but are not limited to these values.

In the flat display device or spacer according to the first aspect of the present invention, when the electric resistance value of the spacer base material is R _B and the electric resistance value of the spacer is R _A , R _A / R _B ≧ 0 .9 is satisfied. That is, the value of R _A / R _B is approximately 1, and there is no change in the electric resistance value before and after the formation of the antistatic film, or even a slight decrease. In a flat display device incorporating a spacer having such characteristics, a stable operation can be achieved even for a long time use, and the change in the electron beam trajectory due to the charging of the spacer is small. The relative luminance change of the pixels along the spacer can be reduced. In the flat display device or spacer according to the second aspect of the present invention, the surface roughness of the side surface of the spacer and the average thickness t of the antistatic film are defined. This also makes it possible for a flat display device incorporating a spacer to achieve a stable operation even for a long time of use, and to have little change in the electron beam trajectory caused by the charging of the spacer. The relative luminance change of the pixels along the line can be reduced.

  Hereinafter, the present invention will be described based on examples with reference to the drawings. Prior to that, a common outline of flat-type display devices in examples 1 to 2 will be described below. Here, the flat display device in the embodiment is a cold cathode field emission display device (hereinafter abbreviated as a display device). In the display device according to the embodiment, the strip-shaped gate electrode (for example, scanning electrode) 13 extends in the row direction (X direction), and the strip-shaped cathode electrode (for example, data electrode) 11 extends in the column direction (Y direction). Yes. FIG. 1 shows a schematic partial end view of the display device of the example, and FIGS. 2A and 2B show schematic cross-sectional views of the spacer. FIG. 3 shows a schematic exploded perspective view of a part of the cathode panel CP and the anode panel AP when the cathode panel CP and the anode panel AP are disassembled.

  The display device according to the embodiment includes an anode panel AP in which the phosphor region 22 and the anode electrode 24 are provided on the substrate 20, and 2 on the support 10 along the row direction (X direction) and the column direction (Y direction). A cathode panel CP having electron emission areas EA arranged in a dimensional matrix is joined at the outer periphery. A space SP sandwiched between the cathode panel CP and the anode panel AP is maintained in a vacuum, and a spacer is disposed between the anode panel AP and the cathode panel CP.

In addition, the spacers in the examples are the anode panel AP in which the phosphor region 22 and the anode electrode 24 are provided on the substrate 20, and the row direction (X direction) and the column direction (Y direction) on the support 10. A cathode panel CP having electron emission regions EA arranged in a two-dimensional matrix is joined at the outer periphery, and a space SP sandwiched between the cathode panel CP and the anode panel AP is held in a vacuum. A spacer used in the display device and disposed between the anode panel AP and the cathode panel CP.

Here, the display device according to the embodiment includes an effective area EF and an invalid area NF surrounding the effective area EF. The effective area EF is a display area located substantially in the center that performs a practical image display function as a display device. The effective area EF is surrounded by an ineffective area NF that surrounds the frame. The space SP sandwiched between the cathode panel CP, the anode panel AP, and the joining member 26 is maintained in a vacuum (pressure: for example, 10 ⁻³ Pa or less). The ineffective area NF of the cathode panel CP is provided with a through hole (not shown) for evacuation, and in this through hole, an exhaust pipe (not shown) called a chip tube that is sealed after evacuation. Is attached.

In the embodiment, the cold cathode field emission device (field emission device) constituting the electron emission region is constituted by, for example, a Spindt type field emission device. Spindt-type field emission devices
(A) a strip-shaped cathode electrode 11 formed on the support 10;
(B) an insulating layer 12 formed on the support 10 and the cathode electrode 11;
(C) a strip-shaped gate electrode 13 formed on the insulating layer 12;
(D) An opening 14 (provided in the gate electrode 13) provided in a portion of the gate electrode 13 and the insulating layer 12 located in the overlapping region where the cathode electrode 11 and the gate electrode 13 overlap, with the cathode electrode 11 exposed at the bottom. 14A of 1st opening parts, 2nd opening part 14B provided in the insulating layer 12, and,
(E) an electron emitting portion 15 provided on the cathode electrode 11 exposed at the bottom of the opening 14 and whose electron emission is controlled by applying a voltage to the cathode electrode 11 and the gate electrode 13;
It is composed of Here, the shape of the electron emission portion 15 is a conical shape. An interlayer insulating layer 16 is formed on the insulating layer 12, and a focusing electrode 17 is formed on the interlayer insulating layer 16.

  In the display device of the embodiment, the cathode electrode 11 (for example, the data electrode) and the gate electrode 13 (for example, the scanning electrode) are arranged in directions (column direction, Y direction, and row) in which the projected images of the electrodes 11 and 13 are orthogonal to each other. Are formed in a strip shape in each direction (X direction), and a plurality of regions (corresponding to an area corresponding to one sub-pixel (sub-pixel) and an electron emission area EA) in which projected images of both electrodes overlap. Field emission devices are provided. For simplification of the drawing, FIG. 1 shows two electron emission portions 15 in each electron emission area EA. The electron emission areas EA are usually arranged in a two-dimensional matrix as described above in the effective area EF (area that functions as an actual display portion) of the cathode panel CP.

  The anode panel AP includes a substrate 20, a phosphor region 22 formed on the substrate 20 and having a predetermined pattern, and an anode electrode 24 formed thereon. One sub-pixel (one sub-pixel) includes an electron emission area EA and a phosphor area 22 on the anode panel side facing the electron emission area EA. In the effective area EF, the sub-pixels are arranged on the order of several hundred thousand to several million, for example. A light absorption layer (black matrix) 23 is formed on the substrate 20 between the phosphor region 22 and the phosphor region 22 in order to prevent color turbidity of the display image and occurrence of optical crosstalk. ing. The anode electrode 24 is made of aluminum (Al) having a thickness of about 0.3 μm, is in the form of a thin sheet that covers the effective region EF, and is provided so as to cover the phosphor region 22. In FIG. 3, illustration of the partition walls, the spacers, and the spacer holding portions is omitted. In the case of a color display device, one pixel (one pixel) is composed of a set of one red light emitting phosphor region 22R, one green light emitting phosphor region 22G, and one blue light emitting phosphor region 22B. Has been. A grid-like partition wall 21 surrounding each phosphor region 22 is formed on the substrate 20. Each phosphor region 22 is surrounded by a partition wall 21. The planar shape (corresponding to the inner contour line of the projected image of the partition wall side surface and a kind of opening region) of the portion surrounding the phosphor region 22 in the lattice-shaped partition wall 21 is a rectangular shape (rectangle), and these planes The shape (planar shape of the opening region) is arranged in a two-dimensional matrix (more specifically, a cross beam), and a lattice-like partition wall 21 is formed. A part of the partition functions as the spacer holding part 25.

  The flat spacers are arranged in a plurality of columns along the row direction (X direction). In addition, several tens to several hundreds of gate electrodes 13 are sandwiched between the spacers. The upper end surface (top surface) and the lower end surface (bottom surface) of the spacer are parallel to the XY plane, the side surfaces are parallel to the XZ plane, and the end surfaces are parallel to the YZ plane. The spacer is held by the spacer holding portion 25.

In the display device according to the embodiment, the cathode electrode 11 is connected to the cathode electrode control circuit 31, the gate electrode 13 is connected to the gate electrode control circuit 32, and the focusing electrode is provided. Connected to a circuit (not shown), the anode electrode 24 is connected to an anode electrode control circuit 33. At the time of actual display operation of the display device, the anode voltage V _A applied from the anode electrode control circuit 33 to the anode electrode 24 is normally constant, for example, 5 kilovolts to 15 kilovolts, specifically, for example, 9 kilovolts. (For example, d ₀ = 2.0 mm). On the other hand, regarding the voltage V _C applied to the cathode electrode 11 and the voltage V _G applied to the gate electrode 13 during the actual display operation of the display device,
(1) A method in which the voltage V _C applied to the cathode electrode 11 is constant and the voltage V _G applied to the gate electrode 13 is changed. (2) The voltage V _C applied to the cathode electrode 11 is changed and applied to the gate electrode 13. changing the voltage V _C is applied the voltage V _G to the method (3) a cathode electrode 11, fixed to, and, any method to change the voltage V _G applied to the gate electrode 13 may be employed but, In the display device in the embodiment, the above-described method (2) is adopted.

That is, during the actual display operation of the display device, a relatively negative voltage (V _C ) is applied to the cathode electrode 11 from the cathode electrode control circuit 31, and a relatively positive voltage (V _G ) is applied to the gate electrode 13. When a focusing electrode is applied from the electrode control circuit 32, 0 V, for example, is applied to the focusing electrode from the focusing electrode control circuit, and a positive voltage (a voltage higher than that of the gate electrode 13) is applied to the anode electrode 24. An anode voltage V _A ) is applied from the anode electrode control circuit 33. In such a display device, when an image is displayed by a line sequential driving method, for example, a video signal is input from the cathode electrode control circuit 31 to the cathode electrode 11 and a scanning signal is input from the gate electrode control circuit 32 to the gate electrode 13. . When the cathode electrode 11 is a scan electrode and the gate electrode 13 is a data electrode, a scan signal is input from the cathode electrode control circuit 31 to the cathode electrode 11 and a video signal is input from the gate electrode control circuit 32 to the gate electrode 13. You can enter. Electrons are emitted from the electron emitter 15 based on the quantum tunnel effect due to an electric field generated when a voltage is applied between the cathode electrode 11 and the gate electrode 13, and the electrons are attracted to the anode electrode 24. It passes through and collides with the phosphor region 22. As a result, the phosphor region 22 is excited to emit light, and a desired image can be obtained. That is, the operation of this display device is basically controlled by the voltage V _G applied to the gate electrode 13 and the voltage V _C applied to the cathode electrode 11. The cathode electrode 11 is driven by a cathode electrode drive driver, and the gate electrode 13 is driven by a gate electrode drive driver. The cathode electrode control circuit 31, the gate electrode control circuit 32, the anode electrode control circuit 33, and the drive driver can be composed of known circuits.

  Example 1 relates to a flat display device and a spacer according to the first aspect of the present invention.

As shown in FIG. 2A, the spacer 40 of Example 1 has a schematic cross-sectional view.
(A) a spacer base material 41 made of a ceramic material, and
(B) an antistatic film 43 formed on the side surface of the spacer substrate 41;
It is composed of Here, the antistatic film 43 is made of silicon (specifically, amorphous silicon).

  The spacer base 41 has an upper end surface 42A on the anode panel side and a lower end surface 42B on the cathode panel side. Furthermore, end electrode layers 45A and 45B made of platinum (Pt) are formed on the upper end surface 42A and the lower end surface 42B. Alternatively, a nickel-vanadium alloy can be used as the material constituting the end electrode layers 45A and 45B. The end electrode layer 45 </ b> A formed on the upper end surface 42 </ b> A of the spacer base material 41 is in contact with the anode electrode 24, and the end electrode layer 45 </ b> B formed on the lower end surface 42 </ b> B of the spacer base material 41 is in contact with the convergence electrode 17. In Example 1, the spacer base material 41 has a dimension of 30 mm in the longitudinal direction (X direction in FIG. 1), 100 μm in the thickness direction (Y direction in FIG. 1), and 2 in the height direction (Z direction in FIG. 1). However, the present invention is not limited to these. The same applies to the spacer in Example 2 described later.

In Example 1, the spacer base material 41 was made of aluminum oxide (Al ₂ O ₃ ), and the antistatic film 43 made of amorphous silicon was formed thereon by sputtering. The side surface of the spacer base material 41 was ground using free abrasive grains, and as shown in Table 1, the surface roughness _Ra was 0.0089 μm and 0.098 μm. Further, an antistatic film 43 having an average film thickness t shown in Table 1 was formed on the side surface of the obtained spacer base material 41. In Table 1, the surface roughness is indicated by “R _a ”, and the average film thickness t is indicated by “film thickness”.

Then, to measure the electric resistance value R _B between the lower end surface of the spacer base material 41 facing the upper end surface and the cathode panel CP of the spacer base material 41 facing the anode panel AP. Furthermore, the electric resistance value _RA between the upper end surface of the spacer 40 facing the anode panel AP and the lower end surface of the spacer 40 facing the cathode panel CP was measured. Table 1 shows the measurement results and the calculation results of R _A / R _B.

  Further, when these spacers 40 are incorporated into the display device and a high voltage is applied to the anode electrode 24 to operate the display device, it is examined whether or not an abnormality such as excessive current flowing through the spacers 40 has occurred. It was. The result is shown in the section of “High voltage application” in Table 1. “No abnormality” means that no abnormality occurred even when a voltage of 15 kilovolts was applied to the anode electrode 24. Further, in the spacer in which the voltage is described, it means that an abnormality has occurred when the voltage is applied to the anode electrode 24. Furthermore, the movement deviation of the electron beam from the electron emission region adjacent to the spacer was examined. The result is shown in the section of “electron trajectory deviation” in Table 1. “No abnormality” means that no movement deviation of the electron beam was observed even when the display device was operated for 10,000 hours. In addition, in the spacer in which numerals are written, it means that the movement deviation of the electron beam has occurred after the operation time has elapsed.

From Table 1, the spacers of Example 1-A, Example 1-B, Example 1-C, and Example 1-D that satisfy R _A / R _B ≧ 0.9 ”And“ Electron orbit shift ”were not abnormal. On the other hand, Comparative Example 1-A, Comparative Example 1-B, Comparative Example 1-C, Comparative Example 1-D, Comparative Example 1-E, In the Comparative Example 1-F, the value of R _A / R _B It was below 0.9, and an abnormality occurred in at least one of “high voltage application” and “electron orbit shift”.

Further, in Example 1, the surface roughness R _a of the spacer base material 41 is 0.0089Myuemu, average thickness t is 1.5nm or less Example 1-A of the antistatic film 43, Example 1-B, and a surface roughness R _a of the spacer base material 41 is 0.098Myuemu, average of the antistatic film 43 thickness t is 2nm or less example 1-C, and in example 1-D No abnormality occurred in “high voltage application” and “electron orbit shift”. On the other hand, the surface roughness R _a of the spacer base material 41 is 0.0089Myuemu, average thickness t is 2nm or more Comparative Example 1-A of the antistatic film 43, Comparative Example 1-B, Comparative Example 1-C, and a surface roughness R _a of the spacer base material 41 is 0.098Myuemu, average thickness t is 3nm or more Comparative example 1-D antistatic film 43, Comparative example 1-E, in Comparative example 1-F In this case, an abnormality occurred in at least one of “high voltage application” and “electron orbit shift”. That is, the spacer specification is t ≦ 7.1 · R _a +1.4.
When satisfying the above, it was found that no abnormality occurred in “high voltage application” and “electron orbit shift”.

The second embodiment is a modification of the first embodiment. As shown in FIG. 2B, the spacer 50 of Example 2 is a schematic cross-sectional view.
(A) a spacer substrate 51 made of a ceramic material, and
(B) an antistatic film 53 formed on the side surface of the spacer substrate 51;
It is composed of Here, the antistatic film 53 is also made of silicon (specifically, amorphous silicon) as in the first embodiment.

  In the spacer base 51, as in the first embodiment, end electrode layers 55A and 55B made of platinum (Pt) are formed on the upper end surface 52A and the lower end surface 52B. The end electrode layer 55A formed on the upper end surface 52A of the spacer base material 51 is in contact with the anode electrode 24, and the end electrode layer 55B formed on the lower end surface 52B of the spacer base material 51 is in contact with the convergence electrode 17.

In Example 2, the spacer base material 51 is made of aluminum oxide (Al ₂ O ₃ ) added with 1% by weight of TiO _x , and the entire surface of the side surface of the spacer base material 51 is formed by sputtering. An underlayer 54 made of 4 nm of SiO ₂ was formed, and an antistatic film 53 made of amorphous silicon was formed thereon by sputtering. As in Example 1, the side surface of the spacer substrate 51 was ground using loose abrasive grains, and as shown in Table 1, the surface roughness _Ra was 0.24 μm and 0.51 μm. Further, an antistatic film 53 having an average film thickness t shown in Table 1 was formed on the obtained underlayer 54.

Then, to measure the electric resistance value R _B between the upper and bottom surfaces of the spacer base material 51 facing the cathode panel CP of the spacer base material 51 facing the anode panel AP. Furthermore, the electrical resistance value _RA between the upper end surface of the spacer 50 facing the anode panel AP and the lower end surface of the spacer 50 facing the cathode panel CP was measured. Table 1 shows the measurement results and the calculation results of R _A / R _B. Incidentally, unlike the first embodiment, because although TiO _X is added to the spacer base material 51, the electric resistance R _B in Example 2, than the electric resistance value R _B in Example 1, 2 orders of magnitude The value is low.

  Furthermore, these spacers 50 were incorporated in the display device, and as in Example 1, a high voltage was applied to the anode electrode 24 to examine whether or not an abnormality occurred when the display device was operated. The results are shown in the “High voltage application” section of Table 1. Furthermore, the movement deviation of the electron beam from the electron emission region adjacent to the spacer was examined. The results are shown in the “Electron orbit shift” section of Table 1.

From Table 1, in the spacers of Example 2-A, Example 2-B, Example 2-C, Example 2-D, and Example 2-E that satisfy R _A / R _B ≧ 0.9. No abnormality occurred in “high voltage application” and “electron orbit shift”. On the other hand, Comparative Example 2-A, Comparative Example 2-B, Comparative Example 2-C, Comparative Example 2-D, In the Comparative Example 2-E, the value of R _A / R _B is less than 0.9 Therefore, an abnormality occurred in at least one of “high voltage application” and “electron orbit shift”.

Further, in Example 2, the surface roughness R _a of the spacer base material 51 is 0.24 .mu.m, the average thickness t is 3nm or less Example 2-A of the antistatic film 53, Example 2 B, example 2-C, as well, the surface roughness R _a of the spacer base material 51 is 0.51 .mu.m, the average thickness t of the antistatic film 53 is 5nm or less in example 2-D, example 2 In E, no abnormality occurred in “high voltage application” and “electron orbit shift”. On the other hand, the surface roughness R _a of the spacer base material 51 is 0.24 .mu.m, the average thickness t of the antistatic film 53 is 4nm or more Comparative Example 2-A, 2-B, 2-C, as well, a spacer group surface roughness R _a of the timber 51 is 0.51 .mu.m, the average thickness t is 8nm or more Comparative example 2-D antistatic film 53, in Comparative example 2-E, "high voltage", An abnormality occurred in at least one of the “electron orbit shifts”. That is, the spacer specification is t ≦ 7.1 · R _a +1.4.
When satisfying the above, it was found that no abnormality occurred in “high voltage application” and “electron orbit shift”.

Incidentally, FIG. 4 shows a graph of the average thickness t of the surface roughness R _a and the antistatic film of the spacer base material obtained from Examples and Comparative Examples.

[Table 1]

In Example 1 or Example 2, by forming ultrathin antistatic films 43 and 53, the electric resistance value of antistatic films 43 and 53 constitutes the antistatic film based on the quantum size effect. It is estimated that the value of R _A / R _B can be maintained at 0.9 or more as a result of the higher electric resistance value when the material to be in the bulk state. As a result, the current flowing from the upper end surface to the lower end surface of the spacer base materials 40 and 50 takes two paths: a path flowing through the spacer base materials 41 and 51 and a path flowing through the antistatic films 43 and 53. Therefore, even when the display device is used for a long time, stable operation can be achieved, and the change of the electron beam trajectory due to the charging of the spacer is small, and the relative luminance change of the pixels along the spacer is reduced. It is believed that it can be reduced. Further, even when thick average film thickness of the antistatic film 43 and 53, if the surface roughness R _a of the side surface of the spacer base material 41, 51 Arakere, thin portion is formed in the antistatic film 43 and 53 As a result, it is presumed that, together with the quantum size effect, the antistatic films 43 and 53 as a whole can maintain a high electrical resistance value. As a result, the current flowing from the upper end surface to the lower end surface of the spacer base materials 40 and 50 takes two paths: a path flowing through the spacer base materials 41 and 51 and a path flowing through the antistatic films 43 and 53. Therefore, even when the display device is used for a long time, stable operation can be achieved, and the change of the electron beam trajectory due to the charging of the spacer is small, and the relative luminance change of the pixels along the spacer is reduced. It is believed that it can be reduced.

  Hereinafter, a method for manufacturing the display device of Example 2 will be described.

[Step-200]
First, a green sheet slurry is prepared. Alumina powder (Alcoa Incorporated) and titania powder (Kanto Chemical Co., Ltd.) pulverized and classified so as to have an average particle size of 1 to 2 μm are mixed to 99: 1, and polyvinyl butyral resin A binder and a surfactant are added, dispersed in a mixed solvent of toluene and ethanol, and stirred by a ball mill to obtain a green sheet slurry.

[Step-210]
Next, a green sheet is obtained from the slurry for the green sheet. In Example 2, the prepared green sheet slurry was formed into a sheet having a thickness of about 100 μm by the blade coating method and sufficiently dried at 100 ° C., but the green sheet was obtained. However, the present invention is not limited thereto.

[Step-220]
Thereafter, the green sheet is fired to obtain a ceramic material. A ceramic material was obtained by placing the above sheet on a molybdenum setter and firing it for about 1 hour in an atmosphere of 1650 ° C. and nitrogen: hydrogen = 1: 3. Absent.

[Step-230]
Next, the spacer base material 51 is obtained by cutting the ceramic material. In Example 2, as described above, the dimensions of the spacer substrate 51 are 30 mm in the longitudinal direction (X direction in FIG. 1), 100 μm in the thickness direction (Y direction in FIG. 1), and the height direction (Z in FIG. 1). (Direction) is 2.0 mm, but is not limited thereto.

[Step-240]
Next, the base layer 54 and the antistatic film 53 are sequentially formed (film formation) on both side surfaces of the spacer base material 51. Specifically, the spacer base material 51 in which the end electrode layers 55A and 55B are formed on the upper end surface 52A and the lower end surface 52B based on the lift-off method and the sputtering method is placed on the pedestal. The underlayer 54 made of SiO ₂ is formed based on the sputtering method exemplified below, and then the antistatic film 53 made of Si is formed based on the sputtering method exemplified below. Thereafter, the spacer substrate 51 having the base layer 54 and the antistatic film 53 formed on one side surface is removed from the pedestal. Then, the base layer 54 and the antistatic film 53 are also formed on the other side surface of the spacer base material 51 by the same method.

[Sputtering conditions for underlayer 54]
Spacer base material temperature: No heating Deposition rate: 0.05 nm / second Pressure: 0.2 Pa
Process gas: Ar
Sputtering method: RF sputtering [Sputtering conditions for antistatic film 53]
Spacer base material temperature: No heating Deposition rate: 0.05 nm / second Pressure: 0.1 Pa
Process gas: Ar
Sputtering method: RF sputtering

[Step-250]
Next, the display device shown in FIG. 1 is assembled. Specifically, the anode panel AP and the cathode panel CP are arranged so that the phosphor region 22 and the electron emission region EA face each other with the spacer 50 interposed therebetween. The anode panel AP and the cathode panel CP (more specifically, the support body 10 and the substrate 20) are joined together at the peripheral edge via a joining member (including a frame body) 26, for example. At the time of joining, frit glass is applied to the joining portion between the joining member 26 and the anode panel AP and the joining portion between the joining member 26 and the cathode panel CP, and the frit glass is dried by pre-baking, and then the anode panel AP. Then, the cathode panel CP and the bonding member 26 are bonded together, and main baking is performed at about 450 ° C. for 10 to 30 minutes. Thereafter, the space SP surrounded by the anode panel AP, the cathode panel CP, the joining member 26 and the frit glass is exhausted through a through hole (not shown) and a tip tube (not shown), and the pressure of the space SP is 10 ^{When the} pressure reaches about ^-4 Pa, the tip tube is sealed by heat melting or pressure welding. In this manner, the space SP surrounded by the anode panel AP, the cathode panel CP, and the bonding member 26 can be evacuated. Thereafter, wiring with necessary external circuits is performed, and the display device of Example 2 can be completed. In addition, the display apparatus of Example 1 can also be manufactured by the same method.

  As mentioned above, although this invention was demonstrated based on the preferable Example, this invention is not limited to these Examples. The configurations and structures of the flat display device, cathode panel and anode panel, cold cathode field emission display device, cold cathode field emission device, and spacer described in the embodiments are examples, and can be changed as appropriate. A manufacturing method of the anode panel, the cathode panel, the cold cathode field emission display, the cold cathode field emission device, and the spacer is also an example, and can be appropriately changed. Furthermore, various materials used in the manufacture of the anode panel, cathode panel, and spacer are also examples, and can be changed as appropriate. The display device has been described by taking color display as an example, but it may also be a single color display. Moreover, it can also be set as the base layer which has the laminated structure which laminated | stacked the material from which a base layer differs two or more layers.

  As long as the antistatic film made of silicon is formed on the side surface of the spacer base material, it is not essential to provide a base layer. That is, by setting the film formation condition of the antistatic film to an appropriate condition (specifically, for example, increasing the temperature of the spacer base material during the film formation of the antistatic film), even without providing an underlayer, An antistatic film made of silicon can be formed directly on the side surface of the spacer substrate.

  In the field emission device, a mode in which one electron emission portion corresponds to one opening has been described. However, depending on the structure of the field emission device, a mode in which a plurality of electron emission portions correspond to one opening. Alternatively, one electron emission portion may correspond to a plurality of openings. Alternatively, a plurality of first openings may be provided in the gate electrode, a second opening connected to the plurality of first openings related to the insulating layer may be provided, and one or a plurality of electron emission portions may be provided. .

The electron emission region can also be constituted by an electron emission element commonly called a surface conduction electron emission element. This surface conduction electron-emitting device is formed on a support made of glass, for example, tin oxide (SnO ₂ ), gold (Au), indium oxide (In ₂ O ₃ ) / tin oxide (SnO ₂ ), carbon, palladium oxide ( A pair of electrodes made of a conductive material such as (PdO), having a very small area and arranged with a predetermined gap (gap) are formed in a matrix. A carbon thin film is formed on each electrode. The row direction wiring is connected to one electrode of the pair of electrodes, and the column direction wiring is connected to the other electrode of the pair of electrodes. By applying a voltage to the pair of electrodes, an electric field is applied to the carbon thin films facing each other across the gap, and electrons are emitted from the carbon thin film. By causing the electrons to collide with the phosphor region on the anode panel, the phosphor region is excited to emit light, and a desired image can be obtained. Alternatively, the electron emission region can be formed from a metal / insulating film / metal type element.

FIG. 1 is a schematic partial end view of a flat panel display device of Example 1, specifically, a cold cathode field emission display device provided with a cold cathode field emission device. 2A and 2B are schematic cross-sectional views of the spacers of Example 1 and Example 2, respectively. FIG. 3 is a schematic exploded perspective view of a part of the cathode panel and the anode panel when the cathode panel and the anode panel are disassembled. Figure 4 is a graph showing the relationship between the average thickness t of the surface roughness R _a and the antistatic film of the spacer base material obtained from Examples and Comparative Examples. FIGS. 5A and 5B are diagrams schematically showing an electron beam trajectory in a pixel located in the vicinity of a spacer in a cold cathode field emission display.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 ... Support body, 11 ... Cathode electrode, 12 ... Insulating layer, 13 ... Gate electrode, 14, 14A, 14B ... Opening part, 15 ... Electron emission part, 16 ... Interlayer insulating layer, 17 ... convergence electrode, 20 ... substrate, 21 ... partition, 22, 22R, 22G, 22B ... phosphor region, 23 ... light absorption layer (black matrix), 24 ... Anode electrode, 25 ... Spacer holding part, 26 ... Joint member, 31 ... Cathode electrode control circuit, 32 ... Gate electrode control circuit, 33 ... Anode electrode control circuit, 40 , 50 ... spacer, 41, 51 ... spacer base material, 42A, 52A ... upper end surface of spacer base material, 42B, 52B ... lower end surface of spacer base material, 43, 53 ... charging Prevention film, 54... Underlayer, 45A, 45B 55A, 55B · · · end electrode layer, EA · · · electron emitting region, EF · · · effective area, NF · · · invalid region, SP · · · space

Claims (8)

An anode panel in which a phosphor region and an anode electrode are provided on a substrate, and a cathode panel having electron emission regions arranged in a two-dimensional matrix on a support are joined at the outer periphery, and the cathode panel A space between the anode panel and the anode panel is maintained in a vacuum, and a spacer is a flat display device disposed between the anode panel and the cathode panel,
The spacer
(A) a spacer substrate made of a ceramic material, and
(B) an antistatic film formed on the side surface of the spacer substrate;
Consists of
R _B is the electrical resistance value between the spacer substrate upper end surface facing the anode panel and the spacer substrate lower end surface facing the cathode panel, and the spacer upper end surface facing the anode panel and the spacer lower end surface facing the cathode panel When the electric resistance value between is R _A ,
R _A / R _B ≧ 0.9
A flat display device that satisfies the above requirements.   The flat display device according to claim 1, wherein the antistatic film is made of silicon. An anode panel in which a phosphor region and an anode electrode are provided on a substrate, and a cathode panel having electron emission regions arranged in a two-dimensional matrix on a support are joined at the outer periphery, and the cathode panel A space between the anode panel and the anode panel is maintained in a vacuum, and a spacer is a flat display device disposed between the anode panel and the cathode panel,
The spacer
(A) a spacer substrate made of a ceramic material, and
(B) an antistatic film formed on the side surface of the spacer substrate;
Consists of
When the surface roughness of the spacer side surface is _Ra (unit: μm) and the average thickness of the antistatic film is t (unit: nm),
t ≦ 7.1 · R _a +1.4
A flat display device that satisfies the above requirements. R _B is the electrical resistance value between the spacer substrate upper end surface facing the anode panel and the spacer substrate lower end surface facing the cathode panel, and the spacer upper end surface facing the anode panel and the spacer lower end surface facing the cathode panel When the electric resistance value between is R _A ,
R _A / R _B ≧ 0.9
The flat display device according to claim 3, wherein:   4. The flat display device according to claim 3, wherein the antistatic film is made of silicon. An anode panel in which a phosphor region and an anode electrode are provided on a substrate, and a cathode panel having electron emission regions arranged in a two-dimensional matrix on a support are joined at the outer periphery, and the cathode panel Used in a flat display device in which a space sandwiched between the anode panel and the anode panel is maintained in a vacuum, and is a spacer disposed between the anode panel and the cathode panel,
(A) a spacer substrate made of a ceramic material, and
(B) an antistatic film formed on the side surface of the spacer substrate;
Consists of
R _B is the electrical resistance value between the spacer substrate upper end surface facing the anode panel and the spacer substrate lower end surface facing the cathode panel, and the spacer upper end surface facing the anode panel and the spacer lower end surface facing the cathode panel When the electric resistance value between is R _A ,
R _A / R _B ≧ 0.9
Spacer that satisfies An anode panel in which a phosphor region and an anode electrode are provided on a substrate, and a cathode panel having electron emission regions arranged in a two-dimensional matrix on a support are joined at the outer periphery, and the cathode panel Used in a flat display device in which a space sandwiched between the anode panel and the anode panel is maintained in a vacuum, and is a spacer disposed between the anode panel and the cathode panel,
(A) a spacer substrate made of a ceramic material, and
(B) an antistatic film formed on the side surface of the spacer substrate;
Consists of
When the surface roughness of the spacer side surface is _Ra (unit: μm) and the average thickness of the antistatic film is t (unit: nm),
t ≦ 7.1 · R _a +1.4
Spacer that satisfies R _B is the electrical resistance value between the spacer substrate upper end surface facing the anode panel and the spacer substrate lower end surface facing the cathode panel, and the spacer upper end surface facing the anode panel and the spacer lower end surface facing the cathode panel When the electric resistance value between is R _A ,
R _A / R _B ≧ 0.9
The spacer according to claim 7 satisfying

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