JP2010067835A - Method of manufacturing electronic component mounted with wiring board and electronic component mounted with wiring board - Google Patents

Method of manufacturing electronic component mounted with wiring board and electronic component mounted with wiring board Download PDF

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JP2010067835A
JP2010067835A JP2008233504A JP2008233504A JP2010067835A JP 2010067835 A JP2010067835 A JP 2010067835A JP 2008233504 A JP2008233504 A JP 2008233504A JP 2008233504 A JP2008233504 A JP 2008233504A JP 2010067835 A JP2010067835 A JP 2010067835A
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electronic component
wiring board
insulating member
wiring
main surface
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JP5575383B2 (en
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Takeshi Tsunoda
剛 角田
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Dai Nippon Printing Co Ltd
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Dai Nippon Printing Co Ltd
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Abstract

<P>PROBLEM TO BE SOLVED: To provide an electronic component mounting wiring board composed by filling a part between an electronic component and a wiring pattern with an insulating member without forming a gap, improving the adhesion of the electronic component and the wiring pattern, and preventing the peeling of the electronic component from the wiring pattern. <P>SOLUTION: An electronic component built-in type two-layer wiring board composed by embedding an electronic component so as to expose at least a part of at least one main surface in an insulating member disposed between a pair of wiring patterns is formed. On the exposed side of the electronic component of the two-layer wiring board, a wiring board having the insulating member is laminated, and the exposed part of the electronic component of the two-layer wiring board is embedded with the insulating member. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

本発明は、配線パターン間に配置された絶縁部材中に電子部品が埋設されてなる電子部品実装配線板の製造方法、及びその電子部品実装配線板に関する。   The present invention relates to a method for manufacturing an electronic component mounting wiring board in which an electronic component is embedded in an insulating member disposed between wiring patterns, and the electronic component mounting wiring board.

近年の電子機器の高性能化・小型化の流れの中、回路部品の高密度、高機能化が一層求められている。かかる観点より、回路部品を搭載したモジュールにおいても、高密度、高機能化への対応が要求されている。このような要求に答えるべく、現在では配線板を多層化することが盛んに行われている。   In recent years, electronic devices are required to have higher density and higher functionality in the trend of higher performance and smaller size. From this point of view, even modules with circuit components are required to support high density and high functionality. In order to meet such demands, multilayering of wiring boards is currently being actively performed.

このような多層化配線板においては、複数の配線パターンを互いに略平行となるようにして配置し、前記配線パターン間に絶縁部材を配し、半導体部品などの電子部品は前記絶縁部材中に前記配線パターンの少なくとも1つと電気的に接続するようにして埋設するとともに、前記絶縁部材間を厚さ方向に貫通した層間接続体(ビア)を形成し、前記複数の配線パターンを互いに電気的に接続するようにしている(例えば、特許文献1参照)。   In such a multilayer wiring board, a plurality of wiring patterns are arranged so as to be substantially parallel to each other, an insulating member is disposed between the wiring patterns, and an electronic component such as a semiconductor component is placed in the insulating member. It is embedded so as to be electrically connected to at least one of the wiring patterns, and an interlayer connection (via) penetrating the insulating members in the thickness direction is formed to electrically connect the plurality of wiring patterns to each other. (For example, refer to Patent Document 1).

従来、上述した電子部品内蔵配線板は、例えばBit(ビー・スクエア・イット)によって製造していた。この製造方法は、以下のような工程に従って目的とする電子部品内蔵配線板を得る。すなわち、絶縁部材(プリプレグ)を介して互いに略平行となるように配置された一対の配線パターンを有し、これらの配線パターンが適宜層間接続体によって厚さ方向に電気的に接続されてなる配線基板上に、前記配線パターンと電気的に接続するようにして電子部品を配置して、電子部品搭載型の配線基板を形成するとともに、同様な構成の電子部品非搭載型の配線基板を準備し、これらの配線基板同士を加熱下で加圧して積層させることによって形成する(例えば、非特許文献1参照)。 Conventionally, the electronic component built-in wiring board described above has been manufactured by, for example, B 2 it (B Square It). This manufacturing method obtains a target electronic component built-in wiring board according to the following steps. That is, a wiring having a pair of wiring patterns arranged so as to be substantially parallel to each other via an insulating member (prepreg), and these wiring patterns are appropriately electrically connected in the thickness direction by an interlayer connector. An electronic component is arranged on the substrate so as to be electrically connected to the wiring pattern to form an electronic component mounting type wiring substrate, and an electronic component non-mounting type wiring substrate having the same configuration is prepared. These wiring boards are formed by pressurizing and laminating each other under heating (for example, see Non-Patent Document 1).

前記配線基板同士を積層させる際には、前記配線基板を加熱することから前記絶縁部材(プリプレグ)が流動化するようになり、前記絶縁部材(プリプレグ)によって前記電子部品との間に形成された空隙、特に前記電子部品と前記配線パターンとの空隙が充填されるようになる。   When laminating the wiring boards, the insulating board (prepreg) is fluidized by heating the wiring boards, and is formed between the electronic components by the insulating board (prepreg). A gap, in particular, a gap between the electronic component and the wiring pattern is filled.

しかしながら、上記電子部品の大きさが縮小するにつれて、溶融した前記絶縁部材の前記空隙への回り込みが不十分となり、前記空隙を完全に埋設することができなくなってきている。このため、前記電子部品と前記配線パターンとの間には、上記空隙が残存してしまう結果となっていた。   However, as the size of the electronic component is reduced, the melted insulating member does not sufficiently wrap around the gap, and the gap cannot be completely buried. For this reason, the gap remains between the electronic component and the wiring pattern.

一方、実装工程における加熱によって前記はんだ材がリフローしてしまうと、前記電子部品と前記配線パターンとの間には上記絶縁部材が存在せずに空隙となっていることから、前記空隙を基点としたデラミ(膨れ、剥離)の発生する可能性が高まるとともに、前記空隙部内のはんだ材がリフローしてしまい、電子部品内蔵配線板の短絡の原因となってしまうという問題があった。   On the other hand, when the solder material is reflowed due to heating in the mounting process, the insulating member does not exist between the electronic component and the wiring pattern, and thus the gap is used as a base point. As a result, the possibility of occurrence of delamination (swelling and peeling) increases, and the solder material in the gap portion reflows, causing a short circuit of the electronic component built-in wiring board.

特開2003−197849号JP 2003-197849 A ビルドアップ多層プリント配線板技術(2000年6月20日、日刊工業新聞社発行)Build-up multilayer printed wiring board technology (June 20, 2000, published by Nikkan Kogyo Shimbun)

本発明は、電子部品と配線パターンとの間を、空隙を形成することなく絶縁部材で充填し、前記電子部品と前記配線パターンとの密着力を向上させて、前記電子部品の前記配線パターンからの剥離を防止してなる電子部品内蔵配線板を提供することを目的とする。   According to the present invention, the gap between the electronic component and the wiring pattern is filled with an insulating member without forming a gap, and the adhesion between the electronic component and the wiring pattern is improved. An object of the present invention is to provide a wiring board with a built-in electronic component that prevents peeling of the electronic component.

上記目的を達成すべく、本発明は、
一対の第1の配線パターン間に配置した第1の絶縁部材中に、少なくとも一方の主面の少なくとも一部が露出するようにして電子部品が埋設されてなる、電子部品内蔵型の2層配線基板を形成する工程と、
第2の絶縁部材の一方の主面に第2の配線パターンが形成されるとともに、前記第2の絶縁部材を貫通し、前記第2の配線パターンと電気的に接続されてなる層間接続体を有する配線基板を形成する工程と、
前記2層配線基板の、少なくとも前記電子部品の前記少なくとも一方の主面が露出した側に、前記配線基板の前記第2の絶縁部材が位置するとともに、前記層間接続体が前記第1の配線パターンと電気的に接続するようにして、前記2層配線基板と前記配線基板とを加熱下積層する工程と、
を具えることを特徴とする、電子部品実装配線板の製造方法に関する。
In order to achieve the above object, the present invention provides:
Electronic component built-in type two-layer wiring in which an electronic component is embedded in a first insulating member disposed between a pair of first wiring patterns so that at least a part of at least one main surface is exposed. Forming a substrate;
A second wiring pattern is formed on one main surface of the second insulating member, and an interlayer connection body is formed through the second insulating member and electrically connected to the second wiring pattern. Forming a wiring board having,
The second insulating member of the wiring board is located on the side of the two-layer wiring board on which at least one main surface of the electronic component is exposed, and the interlayer connector is the first wiring pattern. A step of laminating the two-layer wiring board and the wiring board under heating so as to be electrically connected to each other;
It is related with the manufacturing method of the electronic component mounting wiring board characterized by including.

また、本発明は、一対の第1の配線パターン間に配置した第1の絶縁部材中に、少なくとも一方の主面の少なくとも一部が露出するようにして電子部品が埋設されてなる、電子部品内蔵型の2層配線基板と、
第2の絶縁部材の一方の主面に第2の配線パターンが形成されるとともに、前記第2の絶縁部材を貫通し、前記第2の配線パターンと電気的に接続されてなる層間接続体を有し、前記第2の絶縁部材が、前記電子部品の、露出した前記少なくとも一方の主面の前記少なくとも一部と接触するとともに、前記層間接続体が前記第1の配線パターンと電気的に接続するようにして前記2層配線基板上に積層されてなる配線基板と、
を具えることを特徴とする、電子部品実装配線板に関する。
The present invention also provides an electronic component in which an electronic component is embedded in a first insulating member disposed between a pair of first wiring patterns so that at least a part of at least one main surface is exposed. Built-in two-layer wiring board,
A second wiring pattern is formed on one main surface of the second insulating member, and an interlayer connection body is formed through the second insulating member and electrically connected to the second wiring pattern. The second insulating member is in contact with the at least part of the exposed at least one main surface of the electronic component, and the interlayer connection body is electrically connected to the first wiring pattern. A wiring board laminated on the two-layer wiring board,
It is related with the electronic component mounting wiring board characterized by comprising.

本発明によれば、従来のように電子部品を配線パターン上に搭載した配線基板に代えて、前記電子部品を絶縁部材中に埋設し、その少なくとも一方の主面の少なくとも一部が露出してなる電子部品内蔵型の2層配線基板を準備し、この2層配線基板の、前記電子部品の前記主面が露出した側に、従来構成の配線基板における絶縁部材が位置するようにして、前記2層配線基板及び前記配線基板を加熱下、積層するようにしている。   According to the present invention, instead of a wiring board on which an electronic component is mounted on a wiring pattern as in the prior art, the electronic component is embedded in an insulating member, and at least a part of at least one main surface thereof is exposed. An electronic component built-in type two-layer wiring board is prepared, and the insulating member in the wiring board having the conventional configuration is positioned on the side of the two-layer wiring board on which the main surface of the electronic component is exposed. The two-layer wiring board and the wiring board are laminated while being heated.

この場合、前記電子部品の前記露出した主面上には、前記配線基板の前記絶縁部材が流動化して流れ込むようになる。一方、前記電子部品は前記2層配線基板の絶縁部材中に埋設されているので、前記電子部品の露出していない側の主面は前記絶縁部材に接触している。したがって、前記2層配線基板と前記配線基板とを積層した際に、前記電子部品の周囲は前記2層配線基板の絶縁部材と前記配線基板の絶縁部材とで隙間なく囲まれるようになる。   In this case, the insulating member of the wiring board flows and flows onto the exposed main surface of the electronic component. On the other hand, since the electronic component is embedded in the insulating member of the two-layer wiring board, the main surface on the unexposed side of the electronic component is in contact with the insulating member. Therefore, when the two-layer wiring board and the wiring board are stacked, the periphery of the electronic component is surrounded by the insulating member of the two-layer wiring board and the insulating member of the wiring board without a gap.

結果として、前記電子部品は前記絶縁部材で強固に保持されるようになるので、前記電子部品と前記配線パターンとを接続しているはんだ材等が、上述した積層工程における加熱によってリフローした場合においても、前記電子部品が前記配線パターンから剥離してしまうようなことがない。結果として、得られた電子部品内蔵配線板が不良化してしまうという恐れがない。   As a result, since the electronic component is firmly held by the insulating member, the solder material connecting the electronic component and the wiring pattern is reflowed by heating in the above-described laminating process. However, the electronic component does not peel off from the wiring pattern. As a result, there is no fear that the obtained electronic component built-in wiring board will be defective.

以上、本発明によれば、電子部品と配線パターンとの間を、空隙を形成することなく絶縁部材で充填し、前記電子部品と前記配線パターンとの密着力を向上させて、前記電子部品の前記配線パターンからの剥離を防止してなる電子部品内蔵配線板を提供することができる。   As described above, according to the present invention, the gap between the electronic component and the wiring pattern is filled with the insulating member without forming a gap, and the adhesion between the electronic component and the wiring pattern is improved. An electronic component built-in wiring board that prevents peeling from the wiring pattern can be provided.

以下、本発明の具体的特徴について、発明を実施するための最良の形態に基づいて説明する。   Hereinafter, specific features of the present invention will be described based on the best mode for carrying out the invention.

図1〜15は、本発明の電子部品実装配線板の製造方法の一例を示す工程図である。なお、図1〜9は、電子部品内蔵型の2層配線基板の製造方法に関する工程図である。   1 to 15 are process diagrams showing an example of a method of manufacturing an electronic component mounting wiring board according to the present invention. 1 to 9 are process diagrams relating to a method of manufacturing a two-layer wiring board with a built-in electronic component.

最初に、図1に示すように、金属製の支持体11を準備し、この支持体11上に例えば銅箔からなる金属箔12を形成し、さらに導体ランド13を形成する。金属箔12は例えばメッキ法によって形成することができる。導体ランド13は例えば導電ペーストを用い、スクリーン印刷によって形成することができる。特に導電性ペーストを用いた場合には、ペースト材料の弾性により応力緩和を生ぜしめることができ、信頼性を向上させることができる。   First, as shown in FIG. 1, a metal support 11 is prepared, a metal foil 12 made of, for example, copper foil is formed on the support 11, and a conductor land 13 is further formed. The metal foil 12 can be formed by, for example, a plating method. The conductor land 13 can be formed by screen printing using, for example, a conductive paste. In particular, when a conductive paste is used, stress relaxation can be caused by the elasticity of the paste material, and reliability can be improved.

次いで、図2に示すように、導体ランド13上に半田等の導電性の接続部材14を介して電子部品21を固定し、支持板11上に、金属箔12及び導体ランド13を介して電子部品21を配置し、電子部品積層体15を得る。   Next, as shown in FIG. 2, an electronic component 21 is fixed on the conductor land 13 via a conductive connection member 14 such as solder, and the electronic component 21 is placed on the support plate 11 via the metal foil 12 and the conductor land 13. The component 21 is arrange | positioned and the electronic component laminated body 15 is obtained.

次いで、図3に示すように、金属製の追加の支持体31を準備し、この支持体31上に例えば銅箔からなる金属箔32を形成し、次いで、図4に示すように、例えばスクリーン印刷により導電性材料からなる円錐状のバンプ33Aを形成する。次いで、図5に示すように、バンプ33Aが貫通するようにしてプリプレグ34Aを形成し、プリプレグ積層体35を得る。   Next, as shown in FIG. 3, an additional support 31 made of metal is prepared, and a metal foil 32 made of, for example, copper foil is formed on the support 31, and then, for example, a screen is formed as shown in FIG. A conical bump 33A made of a conductive material is formed by printing. Next, as shown in FIG. 5, the prepreg 34 </ b> A is formed so that the bumps 33 </ b> A penetrate, and the prepreg laminate 35 is obtained.

次いで、図6に示すように、プリプレグ積層体35を上下反転させ、バンプ33Aが電子部品積層体15の金属箔12と接触するようにして、電子部品積層体15とプリプレグ積層体35とを積層し、図7に示すように、支持板11及び31を介して上下方向から加熱加圧プレスする。この際、プリプレグ34Aは硬化して絶縁部材34となるとともに、バンプ33Aは層間接続体33となる。   Next, as shown in FIG. 6, the prepreg laminate 35 is turned upside down, and the electronic component laminate 15 and the prepreg laminate 35 are laminated so that the bumps 33 </ b> A are in contact with the metal foil 12 of the electronic component laminate 15. Then, as shown in FIG. 7, heating and pressing are performed from above and below through the support plates 11 and 31. At this time, the prepreg 34 </ b> A is cured to become the insulating member 34, and the bump 33 </ b> A becomes the interlayer connector 33.

その後、図8に示すように、支持体11及び31を除去した後、図9に示すように、金属箔12及び32をフォトリソグラフィの技術によってパターニングし、一対の配線パターン41及び42を形成して、電子部品内蔵型の2層配線基板40を形成する。   Then, as shown in FIG. 8, after removing the support bodies 11 and 31, as shown in FIG. 9, the metal foils 12 and 32 are patterned by the photolithography technique, and a pair of wiring patterns 41 and 42 are formed. Thus, the electronic component built-in type two-layer wiring board 40 is formed.

なお、図8から明らかなように、電子部品21は、例えばサブミクロン程度のオーダの大きさであるため、上述した加熱加圧操作において、プリプレグ34Aの、電子部品21と金属箔12との空隙36への回り込みが不十分となり、空隙36を完全に埋設することができないばかりでなく、場合によってはそのまま残存するようになる。したがって、図9に示すような2層配線基板40を形成した後は、空隙36が開放され、電子部品21の下側に位置する主面21Aが露出するようになる。   As is clear from FIG. 8, the electronic component 21 has a size on the order of, for example, a sub-micron, so that the gap between the electronic component 21 and the metal foil 12 in the prepreg 34A in the heating and pressing operation described above. The wrap around 36 becomes insufficient, and the air gap 36 cannot be completely buried, but in some cases, it remains as it is. Therefore, after forming the two-layer wiring board 40 as shown in FIG. 9, the gap 36 is opened, and the main surface 21 </ b> A located on the lower side of the electronic component 21 is exposed.

また、本例では、電子部品21は、導体ランド13上に固定されているため、その主面21Aが露出した側で、主面21Aの表面レベルが配線パターン42の表面レベルより低くなって、窪んだ状態となっている。一方、電子部品21は、接続部材14及び導体ランド13を介して配線パターン42と電気的に接続されている。   In this example, since the electronic component 21 is fixed on the conductor land 13, the surface level of the main surface 21A is lower than the surface level of the wiring pattern 42 on the side where the main surface 21A is exposed. It is in a depressed state. On the other hand, the electronic component 21 is electrically connected to the wiring pattern 42 via the connection member 14 and the conductor land 13.

なお、電子部品21は、例えばコンデンサ及びサーミスタなどの受動部品とすることができるが、その他、IC、トランジスタ、ダイオードなどの能動部品とすることもできる。電子部品21が能動部品の場合は、例えば図2に示す工程において、電子部品21と金属箔12との隙間にアンダーフィル樹脂を注入する場合があるので、電子部品21を受動部品とした場合に比較して上述のような空隙36が形成される可能性は減少する。   The electronic component 21 can be a passive component such as a capacitor and a thermistor, but can also be an active component such as an IC, a transistor, or a diode. When the electronic component 21 is an active component, for example, in the process shown in FIG. 2, an underfill resin may be injected into the gap between the electronic component 21 and the metal foil 12. In comparison, the possibility of forming the air gap 36 as described above is reduced.

したがって、本例の製造方法は、電子部品21が受動部品の場合に特に好ましく用いることができる。しかしながら、電子部品21が能動部品の場合でも空隙36の形成を完全に排除できるものではないので、本例の製造方法はこのような場合においても適用することができる。   Therefore, the manufacturing method of this example can be particularly preferably used when the electronic component 21 is a passive component. However, even when the electronic component 21 is an active component, the formation of the gap 36 cannot be completely eliminated, and therefore the manufacturing method of this example can be applied even in such a case.

一方、図10に示すように、例えば銅箔などの金属箔51を準備し、この金属箔51上に例えばスクリーン印刷により導電性材料からなる円錐状のバンプ52Aを形成する。次いで、図11に示すように、バンプ52Aが貫通するようにしてプリプレグ53Aを形成する。次いで、図12に示すように、プリプレグ53A上に例えば銅箔などの金属箔54を配置し、その後、加熱加圧プレスを実施してプリプレグ53Aを硬化し、両面金属(銅)箔張り板を形成する。   On the other hand, as shown in FIG. 10, a metal foil 51 such as a copper foil is prepared, and a conical bump 52A made of a conductive material is formed on the metal foil 51 by, for example, screen printing. Next, as shown in FIG. 11, a prepreg 53A is formed so that the bump 52A penetrates. Next, as shown in FIG. 12, a metal foil 54 such as a copper foil is placed on the prepreg 53A, and then a heat and pressure press is performed to cure the prepreg 53A, and a double-sided metal (copper) foil-clad plate is formed. Form.

次いで、図13に示すように、金属箔54に対してフォトリソグラフィによるパターニングを施し、配線パターン55を形成し、この配線パターン55上に円錐状のバンプ56Aを例えばスクリーン印刷によって形成する。次いで、バンプ56Aを貫通するようにしてプリプレグ57Aを形成し、層間接続体(バンプ)を有する配線基板60を得る。   Next, as shown in FIG. 13, the metal foil 54 is patterned by photolithography to form a wiring pattern 55, and conical bumps 56A are formed on the wiring pattern 55 by, for example, screen printing. Next, the prepreg 57A is formed so as to penetrate the bump 56A, and the wiring board 60 having the interlayer connection body (bump) is obtained.

次いで、図14に示すように、図9で得られた2層配線基板40を上下反転するとともに、2層配線基板40の上方から図13で得られた配線基板60を、バンプ56Aが配線パターン41に電気的に接触するようにして積層するとともに、2層配線基板40の下方から図13で得られた配線基板60を上下反転させて、バンプ56Aが配線パターン42に電気的に接触するようにして積層する。   Next, as shown in FIG. 14, the two-layer wiring board 40 obtained in FIG. 9 is turned upside down and the wiring board 60 obtained in FIG. The wiring board 60 obtained in FIG. 13 is turned upside down from below the two-layer wiring board 40 so that the bumps 56A are in electrical contact with the wiring pattern 42. To be laminated.

次いで、図15に示すように、図14で得た積層体に対して上下方向から加熱加圧し、金属箔51をパターニングして配線パターン58とし、目的とする電子部品内蔵配線板70を得る。この際、プリプレグ57Aは硬化し、絶縁部材57及びなる。一方、上方に位置する配線基板60のプリプレグ57Aは流動化して、2層配線基板21の主面21Aが露出してなる空隙36に回り込んで埋設するようになる。   Next, as shown in FIG. 15, the laminate obtained in FIG. 14 is heated and pressed from above and below, and the metal foil 51 is patterned to form a wiring pattern 58, thereby obtaining a target electronic component built-in wiring board 70. At this time, the prepreg 57 </ b> A is cured to form the insulating member 57. On the other hand, the prepreg 57A of the wiring board 60 positioned above is fluidized and embeds around the gap 36 where the main surface 21A of the two-layer wiring board 21 is exposed.

したがって、電子部品21の露出した主面21Aは絶縁部材57に接触し、絶縁部材57によって隙間なく囲まれるようになる。結果として、電子部品21は絶縁部材57で強固に保持されるようになるので、電子部品21と配線パターン42とを接続している接合部材14等が、実装工程における加熱によってリフローした場合においても、電子部品21と配線パターン42との間には絶縁部材57が存在して空隙が形成されていないので、空隙を基点としたデラミ(膨れ、剥離)の発生や、はんだ材のリフローによって電子部品内蔵配線板70が不良化してしまうという恐れがない。   Therefore, the exposed main surface 21A of the electronic component 21 comes into contact with the insulating member 57 and is surrounded by the insulating member 57 without a gap. As a result, since the electronic component 21 is firmly held by the insulating member 57, even when the joining member 14 or the like connecting the electronic component 21 and the wiring pattern 42 is reflowed by heating in the mounting process. Since the insulating member 57 exists between the electronic component 21 and the wiring pattern 42 and no gap is formed, the electronic component is caused by the occurrence of delamination (swelling or peeling) based on the gap or the reflow of the solder material. There is no fear that the built-in wiring board 70 becomes defective.

なお、従来のBit(ビー・スクエア・イット)では、電子部品21の下方に形成された空隙36が開放されることがない。したがって、本例の図14に示す工程に示すように、上下方向から配線基板を積層するようにしても、空隙36にプリプレグが回り込むようなことがない。 In the conventional B 2 it (B Square It), the gap 36 formed below the electronic component 21 is not opened. Therefore, as shown in the step shown in FIG. 14 of this example, the prepreg does not wrap around the gap 36 even if the wiring boards are stacked from above and below.

結果として、電子部品内蔵配線板を製造した後も、上述のように空隙36が残存することになり、電子部品21と配線パターン42とを接合する接合部材14が、上述した積層工程における加熱によってリフローしてしまうと、電子部品21と配線パターン42との間には絶縁部材が存在せずに空隙となっていることから、電子部品21と配線パターン42とみ密着力が一時的に極めて小さくなる場合がある。このため、電子部品21が配線パターン42から剥離してしまい、得られた電子部品内蔵配線板70が不良化してしまう。   As a result, even after the electronic component built-in wiring board is manufactured, the gap 36 remains as described above, and the bonding member 14 that bonds the electronic component 21 and the wiring pattern 42 is heated by the above-described laminating process. When the reflow is performed, there is no insulating member between the electronic component 21 and the wiring pattern 42, and a gap is formed between the electronic component 21 and the wiring pattern 42. There is a case. For this reason, the electronic component 21 peels from the wiring pattern 42, and the obtained electronic component built-in wiring board 70 becomes defective.

以上、本発明を上記具体例に基づいて詳細に説明したが、本発明は上記具体例に限定されるものではなく、本発明の範疇を逸脱しない限りにおいて、あらゆる変形や変更が可能である。   The present invention has been described in detail based on the above specific examples. However, the present invention is not limited to the above specific examples, and various modifications and changes can be made without departing from the scope of the present invention.

例えば、上記具体例においては、配線基板60を2層構造の配線基板としているが、目的とする電子部品実装配線板の種類に応じて任意の数とすることができ、単層構造あるいは3層以上の構造とすることができる。   For example, in the above specific example, the wiring board 60 is a wiring board having a two-layer structure, but any number can be used depending on the type of the electronic component mounting wiring board, and a single-layer structure or a three-layer structure. It can be set as the above structure.

本発明の電子部品内蔵配線板の製造方法の一例における一工程を示す図である。It is a figure which shows 1 process in an example of the manufacturing method of the electronic component built-in wiring board of this invention. 同じく、本発明の電子部品内蔵配線板の製造方法の一例における一工程を示す図である。Similarly, it is a figure which shows one process in an example of the manufacturing method of the electronic component built-in wiring board of this invention. 同じく、本発明の電子部品内蔵配線板の製造方法の一例における一工程を示す図である。Similarly, it is a figure which shows one process in an example of the manufacturing method of the electronic component built-in wiring board of this invention. 同じく、本発明の電子部品内蔵配線板の製造方法の一例における一工程を示す図である。Similarly, it is a figure which shows one process in an example of the manufacturing method of the electronic component built-in wiring board of this invention. 同じく、本発明の電子部品内蔵配線板の製造方法の一例における一工程を示す図である。Similarly, it is a figure which shows one process in an example of the manufacturing method of the electronic component built-in wiring board of this invention. 同じく、本発明の電子部品内蔵配線板の製造方法の一例における一工程を示す図である。Similarly, it is a figure which shows one process in an example of the manufacturing method of the electronic component built-in wiring board of this invention. 同じく、本発明の電子部品内蔵配線板の製造方法の一例における一工程を示す図である。Similarly, it is a figure which shows one process in an example of the manufacturing method of the electronic component built-in wiring board of this invention. 同じく、本発明の電子部品内蔵配線板の製造方法の一例における一工程を示す図である。Similarly, it is a figure which shows one process in an example of the manufacturing method of the electronic component built-in wiring board of this invention. 同じく、本発明の電子部品内蔵配線板の製造方法の一例における一工程を示す図である。Similarly, it is a figure which shows one process in an example of the manufacturing method of the electronic component built-in wiring board of this invention. 同じく、本発明の電子部品内蔵配線板の製造方法の一例における一工程を示す図である。Similarly, it is a figure which shows one process in an example of the manufacturing method of the electronic component built-in wiring board of this invention. 同じく、本発明の電子部品内蔵配線板の製造方法の一例における一工程を示す図である。Similarly, it is a figure which shows one process in an example of the manufacturing method of the electronic component built-in wiring board of this invention. 同じく、本発明の電子部品内蔵配線板の製造方法の一例における一工程を示す図である。Similarly, it is a figure which shows one process in an example of the manufacturing method of the electronic component built-in wiring board of this invention. 同じく、本発明の電子部品内蔵配線板の製造方法の一例における一工程を示す図である。Similarly, it is a figure which shows one process in an example of the manufacturing method of the electronic component built-in wiring board of this invention. 同じく、本発明の電子部品内蔵配線板の製造方法の一例における一工程を示す図である。Similarly, it is a figure which shows one process in an example of the manufacturing method of the electronic component built-in wiring board of this invention. 同じく、本発明の電子部品内蔵配線板の製造方法の一例における一工程を示す図である。Similarly, it is a figure which shows one process in an example of the manufacturing method of the electronic component built-in wiring board of this invention.

符号の説明Explanation of symbols

11,31 支持板
12,32,51,55 金属箔
13 導体ランド
14 接続部材
15 電子部品積層体
21 電子部品
33A,52A,56A バンプ
34,53,57 絶縁部材
34A,53A,57A プリプレグ
35 プリプレグ積層体
36 空隙
40 電子部品内蔵型の2層配線基板
41,42,55,58 配線パターン
DESCRIPTION OF SYMBOLS 11, 31 Support plate 12, 32, 51, 55 Metal foil 13 Conductor land 14 Connection member 15 Electronic component laminated body 21 Electronic component 33A, 52A, 56A Bump 34, 53, 57 Insulating member 34A, 53A, 57A Prepreg 35 Prepreg lamination Body 36 Air gap 40 Electronic component built-in type two-layer wiring board 41, 42, 55, 58 Wiring pattern

Claims (6)

一対の第1の配線パターン間に配置した第1の絶縁部材中に、少なくとも一方の主面の少なくとも一部が露出するようにして電子部品が埋設されてなる、電子部品内蔵型の2層配線基板を形成する工程と、
第2の絶縁部材の一方の主面に第2の配線パターンが形成されるとともに、前記第2の絶縁部材を貫通し、前記第2の配線パターンと電気的に接続されてなる層間接続体を有する配線基板を形成する工程と、
前記2層配線基板の、少なくとも前記電子部品の前記少なくとも一方の主面が露出した側に、前記配線基板の前記第2の絶縁部材が位置するとともに、前記層間接続体が前記第1の配線パターンと電気的に接続するようにして、前記2層配線基板と前記配線基板とを加熱下積層する工程と、
を具えることを特徴とする、電子部品実装配線板の製造方法。
Electronic component built-in type two-layer wiring in which an electronic component is embedded in a first insulating member disposed between a pair of first wiring patterns so that at least a part of at least one main surface is exposed. Forming a substrate;
A second wiring pattern is formed on one main surface of the second insulating member, and an interlayer connection body is formed through the second insulating member and electrically connected to the second wiring pattern. Forming a wiring board having,
The second insulating member of the wiring board is located on the side of the two-layer wiring board on which at least one main surface of the electronic component is exposed, and the interlayer connector is the first wiring pattern. A step of laminating the two-layer wiring board and the wiring board under heating so as to be electrically connected to each other;
A method for producing an electronic component mounting wiring board, comprising:
前記2層配線基板において、前記電子部品は、前記少なくとも一方の主面が露出した側で、前記第1の配線パターンと電気的に接続されており、前記電子部品の前記少なくとも一方の主面の表面レベルが前記第1の配線パターンの表面レベルよりも低く、窪んでいることを特徴とする、請求項1に記載の電子部品実装配線板の製造方法。   In the two-layer wiring board, the electronic component is electrically connected to the first wiring pattern on a side where the at least one main surface is exposed, and the electronic component is formed on the at least one main surface of the electronic component. 2. The method of manufacturing an electronic component-mounted wiring board according to claim 1, wherein the surface level is lower than the surface level of the first wiring pattern and is recessed. 前記電子部品は受動部品であることを特徴とする、請求項1又は2に記載の電子部品実装配線板の製造方法。   The method of manufacturing an electronic component mounting wiring board according to claim 1, wherein the electronic component is a passive component. 一対の第1の配線パターン間に配置した第1の絶縁部材中に、少なくとも一方の主面の少なくとも一部が露出するようにして電子部品が埋設されてなる、電子部品内蔵型の2層配線基板と、
第2の絶縁部材の一方の主面に第2の配線パターンが形成されるとともに、前記第2の絶縁部材を貫通し、前記第2の配線パターンと電気的に接続されてなる層間接続体を有し、前記第2の絶縁部材が、前記電子部品の、露出した前記少なくとも一方の主面の前記少なくとも一部と接触するとともに、前記層間接続体が前記第1の配線パターンと電気的に接続するようにして前記2層配線基板上に積層されてなる配線基板と、
を具えることを特徴とする、電子部品実装配線板。
Electronic component built-in type two-layer wiring in which an electronic component is embedded in a first insulating member disposed between a pair of first wiring patterns so that at least a part of at least one main surface is exposed. A substrate,
A second wiring pattern is formed on one main surface of the second insulating member, and an interlayer connection body is formed through the second insulating member and electrically connected to the second wiring pattern. The second insulating member is in contact with the at least part of the exposed at least one main surface of the electronic component, and the interlayer connection body is electrically connected to the first wiring pattern. A wiring board laminated on the two-layer wiring board,
An electronic component mounting wiring board, comprising:
前記配線基板の前記第2の絶縁部材は、前記2層配線基板において、前記電子部品が、前記少なくとも一方の主面が露出した側で、前記第1の配線パターンと電気的に接続され、前記電子部品の前記少なくとも一方の主面の表面レベルが前記第1の配線パターンの表面レベルよりも低く、窪んでいる部分を埋設していることを特徴とする、請求項4に記載の電子部品実装配線板。   The second insulating member of the wiring board is electrically connected to the first wiring pattern on the side where the at least one main surface is exposed in the two-layer wiring board, 5. The electronic component mounting according to claim 4, wherein a surface level of the at least one main surface of the electronic component is lower than a surface level of the first wiring pattern, and a recessed portion is embedded. Wiring board. 前記電子部品は受動部品であることを特徴とする、請求項4又は5に記載の電子部品実装配線板。   The electronic component mounting wiring board according to claim 4, wherein the electronic component is a passive component.
JP2008233504A 2008-09-11 2008-09-11 Manufacturing method of electronic component mounting wiring board and electronic component mounting wiring board Expired - Fee Related JP5575383B2 (en)

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Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005072415A (en) * 2003-08-27 2005-03-17 Dainippon Printing Co Ltd Wiring board incorporating component and manufacturing method thereof

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005072415A (en) * 2003-08-27 2005-03-17 Dainippon Printing Co Ltd Wiring board incorporating component and manufacturing method thereof

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