JP2010067665A - Semiconductor device inspection method, and semiconductor device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device inspection method for highly reliably managing rewriting times in a test process concerning each semiconductor device, and to provide the semiconductor device. <P>SOLUTION: The method inspects an IC chip having a memory circuit 23 which rewrites data, and includes: a process for preparing a main storage area 31 used by a user and a storage area 33 for a test in the memory circuit 23, and performing a data rewriting test with respect to the main storage area 31; and a process for recording times of the actually performed data rewriting with respect to the main storage area 31 in the process for performing the rewriting test in the storage area 33 for the test. By the method, times of the data rewriting actually performed in the test process before delivery are correctly managed concerning each IC chip. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a semiconductor device inspection method and a semiconductor device, and more particularly, to a technique that enables reliable management of the number of rewrites in a test process for each semiconductor device.

As a kind of nonvolatile memory, an EEPROM (erasable programmable read only memory) is known. The EEPROM is a ROM in which data can be rewritten (that is, rewritten). Usually, the guaranteed number of rewrites is 100,000 times or more.
On the other hand, some products equipped with a non-volatile memory do not need to be rewritten frequently (for example, they are rewritten only several times). In such a product, it is possible to use a nonvolatile memory that has a guaranteed number of rewrites of several times to several tens of times and can be manufactured relatively inexpensively. As one of such nonvolatile memories, MTP (multiple time programmable memory) is known (for example, refer to Patent Document 1). The MTP is made on the assumption that the number of rewrites by the user is about several to 10 times, and is used, for example, for adjusting the characteristics of a driver circuit for driving and controlling a liquid crystal display (LCD). There is.
JP 2007-103640 A

By the way, even in a non-volatile memory having a guaranteed number of rewrites of several times to several tens of times such as MTP, the rewrite function can be performed by a pre-shipment inspection process in the same manner as other non-volatile memories that can be rewritten about 100,000 times. A test (that is, a data rewrite test) is performed.
Here, in a non-volatile memory having a guaranteed number of rewrites of several times to several tens of times such as MTP, the ratio of “the number of rewrites in the test process” to “the number of guaranteed rewrites” is large. For example, for an MTP with a guaranteed number of rewrites of 10, if the number of rewrites in the test process is 5, the remaining guaranteed number of times is 5. That is, half of the guaranteed number of rewrites is spent in the test process. For this reason, in order to guarantee with high reliability the number of times of rewriting on the user side (that is, the number of times of rewriting after shipment), it is necessary to manage the number of times of rewriting actually performed in the test process. Here, normally, since a fixed number of times of rewriting is performed in each test process, the determined number of times may be regarded as the number of times of rewriting actually performed.

However, when some trouble occurs in the test process, there is a possibility that the number of rewrites cannot be accurately grasped for each IC chip formed on the wafer. For example, when the inspection apparatus stops abnormally during the rewriting test for one wafer, it is possible to distinguish between an IC chip that has already been rewritten and an IC chip that has not yet been rewritten. Therefore, there is a possibility that the number of rewrites of each IC chip cannot be accurately grasped.
Accordingly, the present invention has been made in view of such circumstances, and provides a semiconductor device inspection method and a semiconductor device that can reliably manage the number of rewrites in a test process for each semiconductor device. With the goal.

  [Invention 1] In order to achieve the above object, an inspection method for a semiconductor device according to Invention 1 is an inspection method for a semiconductor device including a nonvolatile memory capable of rewriting data. A main storage area to be used and a secondary storage area are prepared, and a step of performing a data rewrite test on the main storage area and a step of performing the rewrite test are actually performed on the main storage area. And a step of recording the number of data rewrites performed in the secondary storage area. Here, the “nonvolatile memory” is a type of storage device that keeps stored contents even after the supply of power is stopped.

According to such a method, it is possible to accurately manage the number of data rewrites actually performed in the test process before shipment for each semiconductor device. This management can be performed before dicing or after dicing. Therefore, it is possible to reliably guarantee the “number of rewritable times” by the user for each semiconductor device.
For example, even when the number of data rewrites increased due to re-measurement in the test process, or when semiconductor devices with different data rewrite times are mixed in one wafer, it was actually performed in the test process. The number of data rewrites is recorded in a secondary storage area which is a part of the semiconductor device, and the number of data rewrites in the test process is always associated with the semiconductor device. Accordingly, the number of data rewrites can be accurately grasped not only before dicing but also after dicing.

[Invention 2] The semiconductor device inspection method of Invention 2 is the semiconductor device inspection method of Invention 1, wherein the semiconductor device inspection method determines the quality of the semiconductor device based on the number of rewrites of the data recorded in the secondary storage area. Is further provided.
According to such a method, a semiconductor device that has been rewritten more than a specified number of times in a data rewrite test can be treated as a defective product.

  [Invention 3] The semiconductor device inspection method of Invention 3 is the semiconductor device inspection method of Invention 1 or Invention 2, wherein the step of performing the data rewrite test writes the first data to the main storage area. A first test step and a second test step of writing second data to the main storage area, and the step of recording the number of times data is rewritten is the first test step. The first recording step of recording the number of times of rewriting of the data actually performed on the main storage area in the first area of the secondary storage area, and the actual number of times for the main storage area in the second test step And a second recording step of recording the number of data rewrites performed in the second area of the secondary storage area. Here, the “first data” and the “second data” may be the same data or different data. For example, the “first data” and the “second data” may be data in which the arrangements of 0 and 1 are completely matched in binary, or may be data that do not match.

According to such a method, for each semiconductor device, the number of rewrites in the test step 1 and the number of rewrites in the test step 2 are recorded separately in the secondary storage area. That is, the number of rewrites is recorded for each test process, and a breakdown of the number of rewrites is recorded. Therefore, the number of data rewrites can be managed in more detail, and the “number of rewrites” by the user can be more reliably guaranteed.
Further, according to the above method, for example, when rewriting is performed more than a specified number of times in the first test process, the semiconductor device can be treated as a defective product without being tested in the second test process. it can. Thereby, since the efficiency of the inspection process can be increased, it is possible to contribute to the reduction of the inspection cost.

[Invention 4] A semiconductor device of Invention 4 is a semiconductor device including a nonvolatile memory capable of rewriting data, wherein the nonvolatile memory is connected to a main storage area used by a user and the main storage area. And a secondary storage area for recording the number of times data is actually rewritten in the main storage area in the step of performing the data rewrite test.
With such a configuration, it is possible to accurately manage the number of data rewrites actually performed in the test process before shipment for each semiconductor device. This management can be performed before dicing or after dicing. Therefore, it is possible to reliably guarantee the “number of rewritable times” by the user for each semiconductor device.

  For example, even when the number of data rewrites increased due to re-measurement in the test process, or when semiconductor devices with different data rewrite times are mixed in one wafer, it was actually performed in the test process. The number of data rewrites is recorded in a secondary storage area which is a part of the semiconductor device, and the number of data rewrites in the test process is always associated with the semiconductor device. Accordingly, the number of data rewrites can be accurately grasped not only before dicing but also after dicing.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. Note that, in each drawing described below, parts having the same configuration are denoted by the same reference numerals, and redundant description thereof is omitted.
FIG. 1 is a diagram illustrating a configuration example of an inspection object according to an embodiment of the present invention. FIG. 1A illustrates an example of a wafer 1 on which a plurality of IC chips 11 are formed, and FIG. ) Shows a configuration example of the IC chip 11, and FIG. 1C shows a configuration example of the memory circuit 23 included in the IC chip 11.

  As shown in FIG. 1A, a plurality of IC chips 11 according to an embodiment of the present invention are formed on the surface of a wafer 1, for example. These IC chips 11 are divided (i.e., diced) into individual chips after, for example, probe inspection. As shown in FIG. 1B, each of these IC chips 11 includes, for example, a driver circuit 21 for driving and controlling a liquid crystal display (LCD), and adjusting the characteristics of the driver circuit 21. The memory circuit 23 used for the above and other circuits 25 are included.

Further, as shown in FIG. 1C, the memory circuit 23 is used by a user (for example, a main storage area 31 into which a program for adjusting characteristics and the like is written by the user), and the main storage area 31. And a test storage area 33 for recording a history of tests performed on the test. Here, the memory circuit 23 is a non-volatile memory that can be manufactured at a relatively low cost as compared with a memory that can be rewritten several times to several tens of times and has a number of rewrites exceeding 100,000, for example. Consists of memory. For example, the main storage area 31 and the test storage area 33 are composed of MTPs that can be rewritten several times to several tens of times.
Although not shown in FIG. 1 (b), between the driver circuit 21 and the memory circuit 23, between the memory circuit 23 and the other circuit 25, and between the other circuit 25 and the driver circuit 21, respectively. Wiring is provided, and each circuit 21, 23, 25 can exchange signals with each other through such wiring. Next, an inspection method for the above-described IC chip 11 will be described.

FIG. 2 is a flowchart showing an inspection method of the IC chip 11 according to the embodiment of the present invention. Here, each of a plurality of IC chips 11 formed on the wafer 1 is subjected to an inspection process including a test process 1, a repair / bake process, and a test process 2 to determine whether the product is good or bad (that is, as a product). The case of determining whether the product is a pass product or a reject product will be described.
First, in step (S) 1 of FIG. 2, the test storage area 33 is initialized (that is, data is cleared). This initialization is performed, for example, for each IC chip 11 built in the wafer 1 during the initial measurement. Next, in step (S) 2 of FIG. 2, a rewrite test is performed on the main storage area 31. Here, test data (first data) is actually written in the main storage area 31.

  Next, in step (S) 3 of FIG. 2, the number of data rewrites actually performed on the main storage area 31 is recorded in the test storage area 33. Here, the data in the test storage area 33 is read, and the read data is incremented (that is, a process of adding 1) and written to the test storage area 33. For example, for an arbitrary IC chip 11, when the number of executions of step (S) 2 is one, the number of rewrites “0” is read from the test storage area 33, and 1 is added to the read data “0”. The rewrite count “1” is written in the test storage area 33.

  FIG. 3 is a diagram (part 1) illustrating a configuration example of the test storage area 33. As shown in FIG. 3, the test storage area 33 includes, for example, a first area 41 for recording the number of rewrites in the test process 1 and a second area 42 for recording the number of rewrites in the test process 2. Is prepared. In step (S) 3 in FIG. 2, the number of rewrites is written in the first area 41 of the test storage area 33.

  The first area 41 and the second area 42 have a capacity sufficient to record the number of rewrites assumed in the test steps 1 and 2, respectively. For example, when the number of times of rewriting (that is, a specified number of times described later) to be determined as a defective product in the test process 1 is 4, information indicating 0 to 4 in decimal number can be recorded in the first area 41. And a capacity of 3 bits or more. For example, when the first area 41 has a capacity of 3 bits, the number of rewrites “1” is written as 001 in binary. The same applies to the second area 42. For example, when the specified number of times of the test process 2 is 3, the second area 42 is recorded with 2 bits or more so that information indicating 0 to 3 in decimal number can be recorded. Keep the capacity of. For example, when the second area 42 has a capacity of 2 bits, the number of rewrites “1” is written as 01 in binary. If the second area 42 has a capacity of 3 bits, the number of rewrites “1” is written as 001 in binary.

Next, in step (S) 4 of FIG. 2, it is determined whether or not the number of rewrites written in the first area 41 of the test storage area 33 is equal to or greater than the specified number. This determination is performed by, for example, an inspection apparatus that individually inspects a plurality of IC chips 11 built in the wafer 1. If the number of rewrites is less than the specified number, the process proceeds to step (S) 5 in FIG. If the number of rewrites is equal to or greater than the specified number, the process proceeds to step (S) 12 in FIG. Here, it is assumed that the specified number of times in the test process 1 is set to 4, for example, and the number of times written in the first area 41 is 1, and the process proceeds to step (S) 5.
In addition, when it progresses to step (S) 12, the said IC chip 11 will be recognized as a disqualified product. For the IC chip 11 certified as a rejected product based on the result of the test process 1, the repair / bake process in step (S) 6 and the test process 2 consisting of steps (S) 7 to 10 may be omitted. Therefore, it is possible to contribute to the reduction of the inspection cost.

  Next, in step (S) 5 of FIG. 2, it is determined whether or not it is necessary to rewrite the first data in the main storage area 31 again. This determination is made, for example, by examining whether or not the first data is correctly written in the main storage area 31 and determining based on the result. Alternatively, another test (for example, investigating whether or not the characteristic adjustment of the driver circuit 21 is appropriate) is performed on the IC chip 11, and the necessity of rewriting may be determined based on the result. . Furthermore, it is possible to investigate whether or not any trouble or the like has occurred in the test process 1, and to determine whether rewriting is necessary based on the investigation result. Such a determination is made, for example, by the above-described inspection apparatus. If it is determined in step (S) 5 that rewriting is unnecessary, the test process 1 including steps (S) 1 to 5 is terminated, and the process proceeds to step (S) 6 in FIG.

  When it is determined that rewriting is necessary, the process returns to step (S) 2 in FIG. When the process returns to step (S) 2, the data rewrite test is performed again on the main storage area 31. In the subsequent step (S) 3, for example, the number of rewrites “1” is incremented, and the number of rewrites “2” (for example, 011 in binary) is stored in the first area 41 of the test storage area 33. Will write.

  Next, in step (S) 6 of FIG. 2, the IC chip 11 is subjected to, for example, repair or / and baking. Here, the repair is a step of adjusting the characteristics of the driver circuit 21 by trimming, for example. Baking is an acceleration test for guaranteeing and confirming that data written in the memory circuit 23 is kept correctly, and is performed by heating the wafer 1 to a certain temperature for a certain time. . Such a repair / bake process can be performed, for example, after the test process 1 is performed on all of the plurality of IC chips 11 formed in the wafer 1. Moreover, the test process 2 which consists of step (S) 7-10 of FIG. 2 can be performed with respect to each IC chip 11 after performing a repair / baking process.

  Next, in step (S) 7 of FIG. 2, a rewrite test is performed on the main storage area 31. Here, the test data (second data) is actually written in the main storage area 31. The above-mentioned “first data” and “second data” may be the same data or different data. For example, the “first data” and the “second data” may be data in which the arrangements of 0 and 1 are completely matched in binary, or may be data that do not match.

  Next, in step (S) 8 of FIG. 2, the number of data rewrites actually performed on the main storage area 31 is recorded in the test storage area 33. Here, for example, as shown in FIG. 3, data is read from the second area 42 in the test storage area 33, and the read data is incremented and written to the second area 42. For example, for an arbitrary IC chip 11, when the number of executions of step (S) 7 is one, the number of rewrites “0” is read from the second area 42, 1 is added to the read data “0”, The number of rewrites “1” (for example, 001 in binary) is written in the second area 42.

  Next, in step (S) 9 of FIG. 2, it is determined whether or not the number of rewrites written in the second area 42 is equal to or more than a specified number. This determination is performed by, for example, the inspection apparatus described above. If the number of rewrites is less than the specified number, the process proceeds to step (S) 10 in FIG. If the number of rewrites is equal to or greater than the specified number, the process proceeds to step (S) 12. Here, it is assumed that the specified number of times in the test process 2 is set to 3, for example, and the number of times written in the second area 42 is 1, and the process proceeds to step (S) 10.

  Next, in step (S) 10 of FIG. 2, it is determined whether or not the second data needs to be rewritten to the main storage area 31. This determination is made, for example, by examining whether or not the second data has been correctly written in the main storage area 31 and determining based on the result. Alternatively, another test (for example, investigating whether or not the characteristic adjustment of the driver circuit 21 is appropriate) is performed on the IC chip 11, and the necessity of rewriting may be determined based on the result. . Furthermore, it may be investigated whether or not any trouble or the like has occurred in the test process 2, and it may be determined whether or not rewriting is necessary based on the investigation result. Such a determination is made, for example, by the above-described inspection apparatus. If it is determined in step (S) 10 that rewriting is unnecessary, the test process 2 including steps (S) 7 to 10 is terminated, and the process proceeds to step (S) 11 in FIG.

In step (S) 11, the IC chip 11 is certified as an acceptable product based on the results of the test steps 1 and 2. The accepted product is, for example, only the IC chip 11 in which the number of rewrites in the test process 1 is 3 or less and the number of rewrites in the test process 2 is 2 or less. In the present embodiment, only such an acceptable product proceeds to the next shipping process.
As described above, according to the embodiment of the present invention, it is possible to accurately manage the number of data rewrites actually performed in the test process before shipment for each IC chip 11. This management can be performed before dicing the wafer 1 or after dicing the wafer 1. Therefore, it is possible to reliably guarantee the “number of rewritable times” by the user for each IC chip 11. For example, even when the number of data rewrites increases due to re-measurement in the test process, or even when IC chips 11 having different data rewrite times are mixed in one wafer 1, it is actually performed in the test process. The number of times data is rewritten is recorded in the test storage area 33 that is a part of the IC chip 11, and the number of times data is rewritten in the test process is always associated with the IC chip 11. Accordingly, the number of data rewrites can be accurately grasped not only before dicing but also after dicing.

Further, according to the above embodiment, for each IC chip 11, the number of rewrites in the test process 1 is recorded in the first area 41 of the test storage area 33, and the number of rewrites in the test process 2 is stored in the test memory. It is recorded in the second area 42 of the area 33. That is, the number of data rewrites is recorded for each test process, and a breakdown of the number of rewrites is recorded. Therefore, the number of data rewrites can be managed in more detail, and the “number of rewrites” by the user can be more reliably guaranteed.
Further, according to the above embodiment, for example, when rewriting is performed more than a specified number of times in the first test process, the IC chip 11 is processed as a defective product without being tested in the second test process. be able to. Thereby, since the efficiency of the inspection process can be increased, it is possible to contribute to the reduction of the inspection cost.

In this embodiment, the IC chip 11 corresponds to the “semiconductor device” of the present invention, the memory circuit 23 corresponds to the “nonvolatile memory” of the present invention, and the test storage area 33 corresponds to the “secondary storage area” of the present invention. It corresponds to.
In the above embodiment, for example, as shown in FIG. 2, the case where the two test steps 1 and 2 are performed with the repair / bake process interposed therebetween is described, but the present invention is not limited to this. For example, the number of test steps may be one, or three or more.

  In the above embodiment, the case where the number of data rewrites is recorded for each test process has been described. However, the present invention is not limited to this. For example, the number of rewrites in the test process 1 and the number of rewrites in the test process 2 may be accumulated, and the accumulated value may be recorded in the test storage area 33. In that case, the specified number of times that is a criterion for determining the quality of the IC chip 11 is, for example, “the specified number of times in the test step 1 is three times, and the specified number of times in the test step 2 is five times”. It is better to set the number to increase as Even with such a method, defective products can be sorted out at an early stage, so that the efficiency of the inspection process can be increased as in the above embodiment.

  Alternatively, for example, as shown in FIG. 4, the number of rewrites in the test steps 1, 2, 3, 4... Is recorded in the areas 41, 42, 43, 44. The cumulative value of the number of rewrites in steps 1, 2, 3, 4,... May be recorded in the area 51 of the test storage area. As shown in FIG. 4, the capacities of the areas 41, 42, 43, 44... 51 in the test storage area 33 are not limited to 3 bits, but may be 2 bits or 4 bits. .. Is larger than the value recorded in the areas 41, 42, 43, 44..., So that the capacity of the area 51 is set to at least the capacity of the areas 41, 42, 43, 44. It is preferable.

The figure which shows the structural example of the to-be-inspected object which concerns on embodiment of this invention. The flowchart which shows the test | inspection method of IC chip 11 which concerns on embodiment of this invention. The figure which shows the structural example of the memory area 33 for a test (the 1). The figure which shows the structural example of the memory area 33 for a test (the 2).

Explanation of symbols

  1 Wafer, 11 IC chip, 21 Driver circuit, 23 Memory circuit, 25 Other circuit, 31 Main storage area, 33 Test storage area, 41 to 44, 51 area (One area of test storage area)

Claims (4)

A method for inspecting a semiconductor device including a nonvolatile memory capable of rewriting data,
In the nonvolatile memory, a main storage area used by a user and a secondary storage area are prepared,
Performing a data rewrite test on the main storage area;
And a step of recording the number of data rewrites actually performed on the main storage area in the step of performing the rewrite test in the sub storage area.   The method for inspecting a semiconductor device according to claim 1, further comprising: determining whether the semiconductor device is acceptable based on the number of times of rewriting the data recorded in the secondary storage area. The step of performing the data rewrite test includes:
A first test step of writing first data to the main storage area;
A second test step of writing second data to the main storage area,
The step of recording the number of rewrites of the data,
A first recording step of recording the number of rewrites of the data actually performed on the main storage area in the first test step in the first area of the sub storage area;
A second recording step of recording the number of times of rewriting of the data actually performed on the main storage area in the second test step in the second area of the sub storage area. A method for inspecting a semiconductor device according to claim 1. A semiconductor device including a nonvolatile memory capable of rewriting data,
The nonvolatile memory is
Main storage used by the user;
And a secondary storage area for recording the number of data rewrites actually performed on the main storage area in the step of performing a data rewrite test on the main storage area.

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