JP2010043874A - Connect board and electronic componenet inspection device using the same - Google Patents

Connect board and electronic componenet inspection device using the same Download PDF

Info

Publication number
JP2010043874A
JP2010043874A JP2008206285A JP2008206285A JP2010043874A JP 2010043874 A JP2010043874 A JP 2010043874A JP 2008206285 A JP2008206285 A JP 2008206285A JP 2008206285 A JP2008206285 A JP 2008206285A JP 2010043874 A JP2010043874 A JP 2010043874A
Authority
JP
Japan
Prior art keywords
mounting component
electrode pad
substrate
electronic component
connect
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2008206285A
Other languages
Japanese (ja)
Inventor
Nobuo Sugiyama
信夫 杉山
Shoichi Koshikawa
正一 越川
Masahiro Takagi
正弘 高木
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yokowo Co Ltd
Original Assignee
Yokowo Co Ltd
Yokowo Mfg Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yokowo Co Ltd, Yokowo Mfg Co Ltd filed Critical Yokowo Co Ltd
Priority to JP2008206285A priority Critical patent/JP2010043874A/en
Publication of JP2010043874A publication Critical patent/JP2010043874A/en
Pending legal-status Critical Current

Links

Images

Abstract

<P>PROBLEM TO BE SOLVED: To provide a connect board without deteriorating the characteristics of a built-in electronic component and hardly restricted by the performance such as capacitance of the built-in electronic component. <P>SOLUTION: A first board member 10 is overlaid on a second board member 20. In the first board member 10, a probe pin pad 13 is formed on a major surface 12 and a first contact electrode pad 14 is formed on a surface of opposite thereto, the pad 13 is connected with the first contact electrode pad 14 via a through-conductor part 11, and a land 15 for mounting component to be connected to the adjacent through-conductor part 11 is formed on the surface opposite the major surface 12. In the second board member 20, a motherboard connection pad 23 is formed on a major surface 22 and a second contact electrode pad 24 formed on a surface opposite thereto, and the pad 23 is connected with the second contact electrode pad 24 via a through-conductor part 21. A bypass capacitor 30 connected between the lands 15 for mounting component is housed in a mounting component housing recessed part 25 formed on a surface opposite the major surface 22. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

本発明は、チップ型電子部品を内蔵したコネクト基板及びこれを用いた電子部品検査装置に関する。   The present invention relates to a connect substrate incorporating a chip-type electronic component and an electronic component inspection apparatus using the same.

一般に、半導体集積回路等の被検査電子部品の電子回路等の検査を行う電子部品検査装置は、被検査電子部品の電極に先端が接触するプローブを有する電子部品検査用ソケットと、被検査電子部品の電気的特性を計測する測定回路等を搭載したマザーボードとの間を接続するために、両者間にコネクト基板を介在させることが行われている。   Generally, an electronic component inspection apparatus that inspects an electronic circuit of an electronic component to be inspected such as a semiconductor integrated circuit has an electronic component inspection socket having a probe whose tip is in contact with an electrode of the electronic component to be inspected, and the electronic component to be inspected In order to connect to a mother board on which a measurement circuit for measuring the electrical characteristics of the board is mounted, a connect substrate is interposed between the two.

被検査電子部品の動作の高速化等に伴い、被検査電子部品への電源供給ラインに生じるノイズが問題となってきている。   As the operation speed of the electronic component to be inspected is increased, noise generated in the power supply line to the electronic component to be inspected has become a problem.

この電源供給経路のノイズ除去のために従来はマザーボードの上面又は下面に大容量コンデンサからなるバイパスコンデンサを表面実装している。   In order to eliminate noise in the power supply path, a bypass capacitor consisting of a large-capacitance capacitor is conventionally surface-mounted on the upper or lower surface of the motherboard.

また、コネクト基板としての多層基板に薄膜状のコンデンサを内蔵することも提案されている。   It has also been proposed to incorporate a thin film capacitor in a multilayer substrate as a connect substrate.

マザーボードにバイパスコンデンサを表面実装する構成は、被検査電子部品の電源入力電極にバイパスコンデンサを直結することが理想的であるのに対し、前記電源入力電極(又はそれに接続する電源供給ライン)からバイパスコンデンサまでの経路が長くなり、その経路長に起因するインダクタンスによりバイパスコンデンサの効果が損なわれる問題があり、また、マザーボードにバイパスコンデンサを表面実装するスペースを確保することが設計上困難な場合も考えられる。   In the configuration in which the bypass capacitor is surface-mounted on the motherboard, it is ideal that the bypass capacitor is directly connected to the power input electrode of the electronic component to be inspected, whereas the bypass is bypassed from the power input electrode (or the power supply line connected thereto). There is a problem that the length of the path to the capacitor becomes long, the effect of the bypass capacitor is impaired by the inductance due to the path length, and it may be difficult to design a space for mounting the bypass capacitor on the motherboard. It is done.

多層基板に薄膜状のコンデンサを内蔵する構成は、薄膜状コンデンサの静電容量を十分に大きくできないきらいがある。   The configuration in which the thin film capacitor is built in the multilayer substrate has a tendency that the capacitance of the thin film capacitor cannot be sufficiently increased.

電子部品内蔵の多層基板の例としては、下記特許文献1及び特許文献2がある。
特開2007−53328号公報 特公平6−32378号公報 特許文献1はチップコンデンサを内蔵した状態で多層基板を焼成する構成であり、焼成によってチップコンデンサの容量が低下するおそれがあり、容量の信頼性が低い問題がある。特許文献2においてもチップコンデンサを内蔵した状態で多層基板を焼成する構成であり、同様の問題があると思われる。
Examples of the multilayer substrate with built-in electronic components include the following Patent Document 1 and Patent Document 2.
JP 2007-53328 A Japanese Patent Publication No. 6-32378 discloses a structure in which a multilayer substrate is fired in a state in which a chip capacitor is incorporated. There is a possibility that the capacity of the chip capacitor is reduced by firing, and there is a problem that the reliability of the capacity is low. Patent Document 2 also has a configuration in which the multilayer substrate is fired in a state where the chip capacitor is incorporated, and it seems that there is a similar problem.

上記のように、従来技術では、多層基板に内蔵できる電子部品に制約があったり、あるいは内蔵した電子部品の特性が劣化する問題があった。   As described above, in the conventional technology, there is a problem that there are restrictions on electronic components that can be embedded in the multilayer substrate, or characteristics of the embedded electronic components are deteriorated.

本発明はこうした状況を認識してなされたものであり、その目的は、内蔵電子部品の特性を劣化させることなく、また内蔵電子部品の静電容量等の性能に制約を受けることの少ない、コネクト基板及びこれを用いた電子部品検査装置を提供することにある。   The present invention has been made in view of such a situation, and the object of the present invention is to make a connection without deteriorating the characteristics of the built-in electronic component and being less restricted by the performance of the built-in electronic component such as capacitance. It is an object of the present invention to provide a substrate and an electronic component inspection apparatus using the substrate.

本発明のある態様はコネクト基板であり、
第1の表面電極パッドを第1の主面に、前記第1の主面の反対面に第1のコンタクト電極パッドをそれぞれ形成し、前記第1の表面電極パッドと前記第1のコンタクト電極パッドとを第1の貫通導体部で接続し、隣合う前記第1の貫通導体部に接続する対をなした実装部品用ランドを前記第1の主面の反対面に形成した第1の基板部材と、
第2の表面電極パッドを第2の主面に、前記第2の主面の反対面に第2のコンタクト電極パッドを形成し、前記第2の表面電極パッドと前記第2のコンタクト電極パッドとを第2の貫通導体部で接続した第2の基板部材と、
前記第1又は第2の主面の反対面に形成された実装部品収納凹部に収納され前記対をなした実装部品用ランド間に接続されたチップ型電子部品とを備え、
前記第1及び第2のコンタクト電極同士を当接、接触させて前記第1及び第2の基板部材を一体化したことを特徴としている。
One aspect of the present invention is a connect substrate,
The first surface electrode pad is formed on the first main surface, and the first contact electrode pad is formed on the surface opposite to the first main surface, and the first surface electrode pad and the first contact electrode pad are formed. Are connected to each other by the first penetrating conductor portion, and a pair of mounting component lands that are connected to the adjacent first penetrating conductor portion are formed on the opposite surface of the first main surface. When,
Forming a second surface electrode pad on the second main surface and a second contact electrode pad on the opposite side of the second main surface; and the second surface electrode pad, the second contact electrode pad, A second substrate member connected by a second through conductor portion;
A chip type electronic component housed in a mounting component housing recess formed on the opposite surface of the first or second main surface and connected between the paired mounting component lands;
The first and second contact electrodes are brought into contact with each other and brought into contact with each other to integrate the first and second substrate members.

前記態様において、前記実装部品収納凹部は、前記第2の基板部材における前記第2の主面の反対面に形成されていてもよい。   In the above aspect, the mounting component storage recess may be formed on a surface opposite to the second main surface of the second substrate member.

前記態様において、前記実装部品収納凹部は、前記第1の基板部材における前記第1の主面の反対面に形成されており、前記実装部品収納凹部の底部に前記対をなした実装部品用ランドが形成されていてもよい。   In the above aspect, the mounting component storage recess is formed on a surface opposite to the first main surface of the first board member, and the mounting component land that forms the pair with the bottom of the mounting component storage recess. May be formed.

前記態様において、前記実装部品収納凹部は、前記第1の基板部材における前記第1の主面の反対面に形成されており、前記実装部品収納凹部の底部に前記実装部品用ランドの一方が、前記実装部品収納凹部の上部に前記実装部品用ランドの他方が形成されていてもよい。   In the above aspect, the mounting component storage recess is formed on a surface opposite to the first main surface of the first board member, and one of the mounting component lands is formed at the bottom of the mounting component storage recess. The other of the mounting component lands may be formed on the mounting component storage recess.

前記態様において、前記チップ型電子部品は前記対をなした実装部品用ランドに半田接続されていてもよい。   In the above aspect, the chip-type electronic component may be solder-connected to the paired mounting component lands.

前記態様において、前記第1の貫通導体部と前記実装部品用ランドとが前記第1の基板部材の内部導体で接続されていてもよい。   The said aspect WHEREIN: The said 1st penetration conductor part and the said land for mounting components may be connected by the internal conductor of the said 1st board | substrate member.

前記態様において、隣合う前記第1の貫通導体部の一方がグランド導体部であり、前記チップ型電子部品がバイパスコンデンサであってもよい。   In the above aspect, one of the adjacent first through conductor portions may be a ground conductor portion, and the chip-type electronic component may be a bypass capacitor.

本発明の別の態様は、電子部品検査装置であり、前記コネクト基板と、被検査電子部品の電極に先端が接触するプローブを有する電子部品検査用ソケットと、マザーボードとを備え、
前記マザーボード上に前記コネクト基板を介在して前記ソケットが搭載され、前記第1の表面電極パッドが前記プローブの後端に接触し、前記第2の表面電極パッドが前記マザーボードの電極に接触したことを特徴としている。
Another aspect of the present invention is an electronic component inspection apparatus, comprising the connect substrate, an electronic component inspection socket having a probe whose tip contacts an electrode of the electronic component to be inspected, and a motherboard.
The socket is mounted on the motherboard with the connect substrate interposed therebetween, the first surface electrode pad is in contact with the rear end of the probe, and the second surface electrode pad is in contact with the electrode of the motherboard. It is characterized by.

なお、以上の構成要素の任意の組合せ、本発明の表現を方法やシステムなどの間で変換したものもまた、本発明の態様として有効である。   It should be noted that any combination of the above-described constituent elements, and those obtained by converting the expression of the present invention between methods and systems are also effective as aspects of the present invention.

本発明に係るコネクト基板によれば、焼成済みの第1及び第2の基板部材の相互の対向面に実装部品収納凹部が予め形成してあり、前記実装部品収納凹部にチップ型電子部品を収納するため、焼成に伴なって内蔵するチップ型電子部品の特性を劣化させることがなく、また多様なチップ型電子部品を内蔵可能で、薄膜コンデンサ等のように静電容量等の制約を受けることもない。   According to the connect substrate of the present invention, the mounting component storage recess is formed in advance on the mutually facing surfaces of the fired first and second substrate members, and the chip-type electronic component is stored in the mounting component storage recess. Therefore, it does not deteriorate the characteristics of the built-in chip type electronic components as it is fired, and various chip type electronic components can be built in, and it is subject to restrictions such as capacitance like thin film capacitors. Nor.

また、本発明に係る電子部品検査装置によれば、コネクト基板内にチップ型電子部品を内蔵しておくことで、マザーボート側の電子部品配置の自由度が大きくなる。さらに、チップ型電子部品としてバイパスコンデンサを内蔵させれば、マザーボード側にバイパスコンデンサを配置する場合よりも被検査電子部品の電源端子に接近した位置でバイパスコンデンサを接続でき、バイパスコンデンサを設けた効果が向上する。   Further, according to the electronic component inspection apparatus according to the present invention, by incorporating the chip-type electronic component in the connect substrate, the degree of freedom of electronic component arrangement on the mother board side is increased. In addition, if a bypass capacitor is built in as a chip-type electronic component, the bypass capacitor can be connected at a position closer to the power supply terminal of the electronic component to be inspected than when the bypass capacitor is arranged on the motherboard side. Will improve.

以下、図面を参照しながら本発明の好適な実施の形態を詳述する。なお、各図面に示される同一または同等の構成要素、部材、処理等には同一の符号を付し、適宜重複した説明は省略する。また、実施の形態は発明を限定するものではなく例示であり、実施の形態に記述されるすべての特徴やその組み合わせは必ずしも発明の本質的なものであるとは限らない。   Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the drawings. In addition, the same code | symbol is attached | subjected to the same or equivalent component, member, process, etc. which are shown by each drawing, and the overlapping description is abbreviate | omitted suitably. In addition, the embodiments do not limit the invention but are exemplifications, and all features and combinations thereof described in the embodiments are not necessarily essential to the invention.

図1乃至図3を用いて本発明の第1の実施の形態を説明する。図1(A),(B),(C)はコネクト基板1の完成状態を、図2(A),(B),(C)は第1の基板部材を、図3(A),(B),(C)は第2の基板部材をそれぞれ示す。   A first embodiment of the present invention will be described with reference to FIGS. FIGS. 1A, 1B, and 1C show the completed state of the connect substrate 1, FIGS. 2A, 2B, and 2C show the first substrate member, and FIGS. B) and (C) respectively show the second substrate member.

これらの図において、第1の基板部材10は貫通孔に銀、銅等の金属ペーストを充填して同時焼成したLTCC(Low Temperature Co-fired Ceramic)であり、貫通孔に金属ペーストを充填した部分が焼結して第1の貫通導体部(ビアホール)11となっている。また、第1の基板部材10の第1の主面12には第1の表面電極パッドとしてのプローブピンパッド13が形成され、反対面に第1のコンタクト電極パッド14が形成され、両者が第1の貫通導体部11で接続されている。   In these drawings, the first substrate member 10 is LTCC (Low Temperature Co-fired Ceramic) in which a through-hole is filled with a metal paste such as silver or copper and is simultaneously fired, and the portion in which the through-hole is filled with the metal paste. The first through conductor portion (via hole) 11 is sintered. Further, a probe pin pad 13 as a first surface electrode pad is formed on the first main surface 12 of the first substrate member 10, and a first contact electrode pad 14 is formed on the opposite surface. 1 through conductor portions 11.

また、図2(B)の拡大部分に示すように、隣合う貫通導体部11に内部導体16で接続する対をなした実装部品用導体ランド15が主面12の反対面に形成されている。前記隣合う貫通導体部11は、例えば一方が電源供給ライン、他方がグランドラインである。また、実装部品用導体ランド15はコンタクト電極パッド14に対して隙間をあけて形成されている。これは、実装部品用導体ランド15にチップ型電子部品としてのバイパスコンデンサ30を半田付けする際に、半田がコンタクト電極パッド14に流れ込まないようにするためである。コンタクト電極パッド14を小径にすることで、バイパスコンデンサ30の実装面積を確保することが容易である。   Further, as shown in the enlarged portion of FIG. 2B, a pair of mounting component conductor lands 15 connected to the adjacent through conductor portions 11 by the internal conductor 16 is formed on the opposite surface of the main surface 12. . For example, one of the adjacent through conductor portions 11 is a power supply line and the other is a ground line. The mounting component conductor land 15 is formed with a gap with respect to the contact electrode pad 14. This is to prevent solder from flowing into the contact electrode pad 14 when soldering the bypass capacitor 30 as a chip-type electronic component to the mounting component conductor land 15. By making the contact electrode pad 14 small in diameter, it is easy to secure the mounting area of the bypass capacitor 30.

貫通導体部11と実装部品用導体ランド15とを接続する内部導体16は基板部材10の内層により配線されているものであり、貫通導体部11と同様の材質でLTCCと同時焼成により形成される(基板部材10は複数層の未焼成LTCCを積層後に焼成する製法とするため、内層に内部導体16を形成可能である)。   The internal conductor 16 that connects the through conductor portion 11 and the mounting component conductor land 15 is wired by the inner layer of the substrate member 10, and is formed of the same material as the through conductor portion 11 by simultaneous firing with LTCC. (Because the substrate member 10 has a manufacturing method in which a plurality of unfired LTCCs are fired after being laminated, the internal conductor 16 can be formed in the inner layer).

対をなした実装部品用導体ランド15間にはバイパスコンデンサ30が半田リフロー等により半田付けされる。半田付け工程は図2(B)を反転した状態、つまりバイパスコンデンサ30が基板10の上になった状態で行う。   A bypass capacitor 30 is soldered between the paired mounting component conductor lands 15 by solder reflow or the like. The soldering process is performed with the state shown in FIG. 2B inverted, that is, with the bypass capacitor 30 on the substrate 10.

第2の基板部材20は貫通孔に銀、銅等の金属ペーストを充填して同時焼成したLTCCであり、貫通孔に金属ペーストを充填した部分が焼結して第2の貫通導体部(ビアホール)21となっている。また、第2の基板部材20の第2の主面22には第2の表面電極パッドとしてのマザーボード接続パッド23が形成され、反対面に第2のコンタクト電極パッド24が形成され、両者が第2の貫通導体部21で接続されている。   The second substrate member 20 is LTCC in which a through-hole is filled with a metal paste such as silver or copper and fired at the same time. The portion filled with the metal paste in the through-hole is sintered to form a second through-conductor portion (via hole). ) 21. Further, a motherboard connection pad 23 as a second surface electrode pad is formed on the second main surface 22 of the second substrate member 20, and a second contact electrode pad 24 is formed on the opposite surface. Two through conductor portions 21 are connected.

また、前記反対面には実装部品収納凹部(キャビティ)25が形成されている。実装部品収納凹部25は実装部品用導体ランド15及びバイパスコンデンサ30を収容可能な寸法で、かつ第2のコンタクト電極パッド24に接しない形状で、本実施の形態では円形開口を有するものとしている。基板部材20は複数層の未焼成LTCCを積層後に焼成する製法とするため、実装部品収納凹部25となる抜き穴を有する未焼成LTCC層と前記抜き穴の無い未焼成LTCC層とを積層後に焼成することで実装部品収納凹部25を形成可能である。   A mounting component storage recess (cavity) 25 is formed on the opposite surface. The mounting component storage recess 25 has a size that can store the mounting component conductor land 15 and the bypass capacitor 30 and has a shape that does not contact the second contact electrode pad 24, and has a circular opening in the present embodiment. Since the substrate member 20 has a manufacturing method in which a plurality of unfired LTCC layers are fired after being laminated, the unfired LTCC layer having an open hole that becomes the mounting component housing recess 25 and the unfired LTCC layer without the open hole are fired after being laminated. By doing so, the mounting component housing recess 25 can be formed.

第1及び第2の基板部材10,20の積層時の位置ずれを考慮して、第1のコンタクト電極パッド14よりも第2のコンタクト電極パッド24の径を大きく設定している。   The diameter of the second contact electrode pad 24 is set larger than that of the first contact electrode pad 14 in consideration of the positional deviation when the first and second substrate members 10 and 20 are stacked.

第1及び第2の基板部材10,20の積層は、図1(B)に示すように、両者の第1のコンタクト電極パッド14と第2のコンタクト電極パッド24とが対面、当接するように、基板部材10,20側のガイド穴(図示せず)とこれに挿通される位置決めピン等の手段を用いて両基板部材を位置合わせして重ね合わせ、図示しないビス等で機械的に一体化することにより行う。これによって第1の表面電極パッドとしてのプローブピンパッド13と第2の表面電極パッドとしてのマザーボード接続パッド23とが第1及び第2の貫通導体部11,21で接続され、かつバイパスコンデンサ30を内蔵したコネクト基板1が得られる。第1及び第2の基板部材10,20がそれぞれ有する第1のコンタクト電極パッド14及び第2のコンタクト電極パッド24は鏡面仕上げによって平坦度が極めて良好に維持されており、両基板10,20の機械的な一体化によって第1のコンタクト電極パッド14と第2のコンタクト電極パッド24間の電気的接続が確保される。また、実装部品収納凹部25内にチップ型電子部品としてのバイパスコンデンサ30が収納される。プローブピンパッド13及びマザーボード接続パッド23はほぼ同径(形状寸法がほぼ同じ)で、平面的な位置は合致している。   As shown in FIG. 1B, the first and second substrate members 10 and 20 are laminated so that the first contact electrode pad 14 and the second contact electrode pad 24 face each other and come into contact with each other. The two board members are aligned and overlapped using means such as guide holes (not shown) on the board member 10 and 20 side and positioning pins inserted through the guide holes, and mechanically integrated with screws (not shown). To do. As a result, the probe pin pad 13 as the first surface electrode pad and the motherboard connection pad 23 as the second surface electrode pad are connected by the first and second through conductor portions 11 and 21, and the bypass capacitor 30 is connected. The built-in connect substrate 1 is obtained. The first contact electrode pad 14 and the second contact electrode pad 24 included in each of the first and second substrate members 10 and 20 are maintained with extremely good flatness by mirror finishing, and the two substrate substrates 10 and 20 have a flatness. The electrical connection between the first contact electrode pad 14 and the second contact electrode pad 24 is ensured by mechanical integration. In addition, a bypass capacitor 30 as a chip-type electronic component is stored in the mounting component storage recess 25. The probe pin pad 13 and the motherboard connection pad 23 have substantially the same diameter (the shape dimensions are substantially the same), and the planar positions are matched.

なお、バイパスコンデンサ30をコネクト基板1の表裏の主面12,22に表面実装しないのは、コネクト基板1の性質上、主面12,22のプローブピンパッド13及びマザーボード接続パッド23は相手側基板等とコンタクトを行うために平坦でなければならない(突出不可である)からであり、このため、2枚の基板部材10,20の重ね合わせ構造として内部に実装部品収納凹部25を設け、ここにバイパスコンデンサ30を配置している。   The bypass capacitor 30 is not surface-mounted on the front and back main surfaces 12 and 22 of the connect substrate 1 because of the nature of the connect substrate 1, the probe pin pads 13 and the motherboard connection pads 23 on the main surfaces 12 and 22 are on the mating substrate. For this reason, it must be flat (cannot project), and therefore, a mounting component housing recess 25 is provided inside as an overlapping structure of the two board members 10, 20. A bypass capacitor 30 is arranged.

本実施の形態によれば、下記の効果を奏することができる。   According to the present embodiment, the following effects can be achieved.

(1) 本実施の形態のコネクト基板1によれば、焼成済みの第1及び第2の基板部材10,20の相互の対向面に実装部品収納凹部25が予め形成してあり、実装部品収納凹部25にチップ型電子部品としてのバイパスコンデンサ30を収納するため、焼成に伴なって内蔵するバイパスコンデンサ30の特性を劣化させることがなく、静電容量の信頼性が高い。また、基板上又は基板内に薄膜コンデンサを形成する場合のように静電容量の制約を受けることが無く、十分大きな静電容量のバイパスコンデンサ30を電源供給ラインとなる貫通導体部11と、この隣のグランドラインとなる貫通導体部11との間に接続可能である。このため、電源ラインのノイズ除去効果の向上が可能である。 (1) According to the connect substrate 1 of the present embodiment, the mounting component storage recess 25 is formed in advance on the mutually facing surfaces of the fired first and second substrate members 10 and 20, and the mounting component storage Since the bypass capacitor 30 serving as a chip-type electronic component is housed in the recess 25, the characteristics of the bypass capacitor 30 built in during firing are not deteriorated, and the capacitance is highly reliable. Further, there is no restriction on the capacitance as in the case of forming a thin film capacitor on or in the substrate, and the through-conductor portion 11 serving as a power supply line is connected to the bypass capacitor 30 having a sufficiently large capacitance. It can be connected between the penetrating conductor portion 11 serving as an adjacent ground line. For this reason, the noise removal effect of the power supply line can be improved.

(2) 電子部品検査装置に用いる場合、第1の表面電極パッドとしてのプローブピンパッド13の直下となる位置にバイパスコンデンサ30を接続でき、また第1及び第2の貫通導体部11,21のインダクタンスとバイパスコンデンサ30の静電容量とによってLCノイズフィルタを等価的に構成できる。被検査電子部品の電源端子に接続するプローブピンに近接した側でノイズ除去を図ることが可能で、マザーボード側にバイパスコンデンサを設ける場合よりも被検査電子部品の電源端子側でのノイズ除去効果に優れている。 (2) When used in an electronic component inspection apparatus, the bypass capacitor 30 can be connected to a position directly below the probe pin pad 13 as the first surface electrode pad, and the first and second through conductor portions 11 and 21 can be connected. An LC noise filter can be equivalently configured by the inductance and the capacitance of the bypass capacitor 30. It is possible to eliminate noise on the side close to the probe pin connected to the power supply terminal of the electronic component to be inspected. Are better.

図4を用いて本発明の第2の実施の形態を説明する。この場合、実装部品収納凹部25を第2の基板部材20に設ける代わりに第1の基板部材10に設けている。すなわち、第1の基板部材10の第1の主面12の反対面に実装部品収納凹部25が形成され、その底部(底面)に一対の実装部品用導体ランド15が形成されている。   A second embodiment of the present invention will be described with reference to FIG. In this case, the mounting component housing recess 25 is provided in the first board member 10 instead of being provided in the second board member 20. That is, the mounting component housing recess 25 is formed on the surface opposite to the first main surface 12 of the first substrate member 10, and a pair of mounting component conductor lands 15 is formed on the bottom (bottom surface) thereof.

対をなした実装部品用導体ランド15間にはチップ型電子部品としてのバイパスコンデンサ30が半田リフロー等により半田付けされる。半田付け工程は図4を反転した状態、つまりバイパスコンデンサ30が基板10の上になった状態で行う。   A bypass capacitor 30 as a chip-type electronic component is soldered between the paired mounting component conductor lands 15 by solder reflow or the like. The soldering process is performed in a state where FIG. 4 is reversed, that is, in a state where the bypass capacitor 30 is on the substrate 10.

この第2の実施の形態の場合も、第1の実施の形態と同様の効果が得られる。   In the case of the second embodiment, the same effect as that of the first embodiment can be obtained.

図5を用いて本発明の第3の実施の形態を説明する。この場合、第1の基板部材10に対して実装部品収納凹部45が縦長に(基板厚み方向に深く)形成され、実装部品収納凹部45の底部(底面)に実装部品用導体ランド15の一方が、実装部品収納凹部45の上部(但し主面12の反対面よりは引っ込んだ位置)に実装部品用導体ランド15の他方が形成されている。   A third embodiment of the present invention will be described with reference to FIG. In this case, the mounting component storage recess 45 is formed vertically (deeply in the board thickness direction) with respect to the first board member 10, and one of the mounting component conductor lands 15 is formed on the bottom (bottom surface) of the mounting component storage recess 45. The other of the mounting component conductor lands 15 is formed in the upper portion of the mounting component storage recess 45 (however, the position retracted from the opposite surface of the main surface 12).

そして、チップ型電子部品としてのバイパスコンデンサ30を実装部品収納凹部45内に縦方向に配置して、半田リフロー等により半田付けを行う。半田付け工程は図5を反転した状態、つまりバイパスコンデンサ30が基板10の上になった状態で行う。   Then, the bypass capacitor 30 as a chip-type electronic component is disposed in the mounting component housing recess 45 in the vertical direction and soldered by solder reflow or the like. The soldering process is performed in a state where FIG. 5 is reversed, that is, in a state where the bypass capacitor 30 is on the substrate 10.

この第3の実施の形態の場合も、第1の実施の形態と同様の効果が得られる。さらに、一対の実装部品用導体ランド15の配置面積を小さくできるため、第1の表面電極パッドとしてのプローブピンパッド13の配列間隔が小さくなったときに有効である。   In the case of the third embodiment, the same effect as that of the first embodiment can be obtained. Furthermore, the arrangement area of the pair of mounting component conductor lands 15 can be reduced, which is effective when the arrangement interval of the probe pin pads 13 as the first surface electrode pads is reduced.

図6及び図7は本発明の第4の実施の形態であって、電子部品検査装置を構成した場合を示す。   6 and 7 show a fourth embodiment of the present invention, which shows a case where an electronic component inspection apparatus is configured.

この電子部品検査装置は、測定回路等(図示省略)が搭載されたマザーボード50と、被検査電子部品100の端子電極101に先端が接触するプローブピン61を有する電子部品検査用ソケット60とを、第1の実施の形態で示したコネクト基板1を介在させて重ね、ビス75等で機械的に一体化したものである。   This electronic component inspection apparatus includes a mother board 50 on which a measurement circuit or the like (not shown) is mounted, and an electronic component inspection socket 60 having probe pins 61 whose tips are in contact with the terminal electrodes 101 of the electronic component 100 to be inspected. The connecting substrate 1 shown in the first embodiment is interposed and overlapped, and mechanically integrated with a screw 75 or the like.

被検査電子部品100の電極101は、これに一端が接触するソケット60に設けられたプローブピン61、プローブピン61の他端が接触するコネクト基板1のプローブピンパッド13、第1及び第2の貫通導体部11,21、マザーボード接続パッド23、及びこれに接触するマザーボード50上の電極パッド51の経路でマザーボード50側の測定回路等に電気的に接続される。   The electrode 101 of the electronic component 100 to be inspected includes a probe pin 61 provided on a socket 60 that contacts one end thereof, a probe pin pad 13 of the connect substrate 1 that contacts the other end of the probe pin 61, and first and second electrodes. It is electrically connected to a measurement circuit or the like on the motherboard 50 side through paths of the through conductor portions 11 and 21, the motherboard connection pad 23, and the electrode pads 51 on the motherboard 50 in contact therewith.

この電子部品検査装置によれば、コネクト基板1内の十分静電容量の大きなバイパスコンデンサ30を被検査電子部品100の端子電極101に近い位置に接続することができ、被検査電子部品100の端子電極101に電源電圧を供給する場合、その電源電圧に重畳したノイズを効果的に除去して電源電圧の安定化を図ることができる。また、電源ラインとなる貫通導体部11,21のインダクタンスに起因する電源電圧の立ち上がりの遅れを端子電極101に近い位置に接続されたバイパスコンデンサ30で緩和できる。   According to the electronic component inspection apparatus, the bypass capacitor 30 having a sufficiently large capacitance in the connect substrate 1 can be connected to a position close to the terminal electrode 101 of the electronic component 100 to be inspected. When a power supply voltage is supplied to the electrode 101, noise superimposed on the power supply voltage can be effectively removed to stabilize the power supply voltage. Further, the delay in rising of the power supply voltage caused by the inductance of the through conductor portions 11 and 21 serving as the power supply line can be mitigated by the bypass capacitor 30 connected to a position close to the terminal electrode 101.

なお、構造上ソケット60にバイパスコンデンサ30を実装することは不可能であり、コネクト基板1内にバイパスコンデンサ30を設けることが最善策であると言える。   It is impossible to mount the bypass capacitor 30 on the socket 60 because of the structure, and it can be said that the bypass capacitor 30 is provided in the connect substrate 1 as the best policy.

以上、実施の形態を例に本発明を説明したが、実施の形態の各構成要素や各処理プロセスには請求項に記載の範囲で種々の変形が可能であることは当業者に理解されるところである。以下、変形例について触れる。   The present invention has been described above by taking the embodiment as an example. However, it is understood by those skilled in the art that various modifications can be made to each component and each processing process of the embodiment within the scope of the claims. By the way. Hereinafter, modifications will be described.

第1又は第2の実施の形態における実装部品収納凹部25の開口形状は円形の場合を例示したが、長円形、楕円形、方形等であってもよい。   The opening shape of the mounting component storage recess 25 in the first or second embodiment is exemplified as a circular shape, but may be an oval shape, an oval shape, a rectangular shape, or the like.

図6及び図7の電子部品検査装置では、第1の実施の形態のコネクト基板を用いたが、その代わりに第2又は第3の実施の形態に係るコネクト基板を用いてもよい。   In the electronic component inspection apparatus shown in FIGS. 6 and 7, the connect substrate according to the first embodiment is used. Instead, the connect substrate according to the second or third embodiment may be used.

各実施の形態では、チップ型電子部品としてバイパスコンデンサをコネクト基板に内蔵させたが、用途に応じてチップ抵抗やチップインダクタ等をコネクト基板に内蔵させるように構成してもよい。   In each embodiment, the bypass capacitor is built in the connect substrate as a chip-type electronic component. However, a chip resistor, a chip inductor, or the like may be built in the connect substrate depending on the application.

コネクト基板に各種チップ型電子部品を内蔵させることで、コネクト基板と接続するマザーボード等の接続相手側基板の搭載部品を少なくして設計の自由度を向上させることも可能となる。   By incorporating various chip-type electronic components in the connect substrate, it is possible to improve the degree of design freedom by reducing the number of components mounted on the connection partner substrate such as a mother board connected to the connect substrate.

本発明に係る第1の実施の形態のコネクト基板の完成状態であって、(A)はコネクト基板の平面図、(B)は正断面図、(C)は底面図である。It is a completed state of the connect substrate of the first embodiment according to the present invention, in which (A) is a plan view of the connect substrate, (B) is a front sectional view, and (C) is a bottom view. 第1の実施の形態で用いる第1の基板部材及びこれに搭載されるチップ型電子部品であって、(A)は平面図、(B)は正断面図、(C)は底面図である。BRIEF DESCRIPTION OF THE DRAWINGS It is the 1st board | substrate member used by 1st Embodiment, and the chip-type electronic component mounted in this, Comprising: (A) is a top view, (B) is a front sectional view, (C) is a bottom view. . 第1の実施の形態で用いる第2の基板部材であって、(A)は平面図、(B)は正断面図、(C)は底面図である。It is a 2nd board | substrate member used by 1st Embodiment, Comprising: (A) is a top view, (B) is a front sectional view, (C) is a bottom view. 本発明に係る第2の実施の形態のコネクト基板を示す正断面図である。It is a front sectional view showing a connect substrate according to a second embodiment of the present invention. 本発明に係る第3の実施の形態のコネクト基板を示す正断面図である。It is a front sectional view showing a connect substrate according to a third embodiment of the present invention. 本発明に係る第4の実施の形態であって、第1の実施の形態のコネクト基板を用いた電子部品検査装置の分解斜視図である。FIG. 6 is an exploded perspective view of an electronic component inspection apparatus using the connect substrate according to the first embodiment, according to the fourth embodiment of the present invention. 前記電子部品検査装置の要部断面図である。It is principal part sectional drawing of the said electronic component inspection apparatus.

符号の説明Explanation of symbols

1 コネクト基板
10 第1の基板部材
11 第1の貫通導体部
13 プローブピンパッド
14 第1のコンタクト電極パッド
15 実装部品用導体ランド
16 内部導体
20 第2の基板部材
21 第2の貫通導体部
23 マザーボード接続パッド
24 第2のコンタクト電極パッド
25,45 実装部品収納凹部
30 バイパスコンデンサ
50 マザーボード
51 電極パッド
60 電子部品検査用ソケット
61 プローブピン
100 被検査電子部品
101 端子電極
DESCRIPTION OF SYMBOLS 1 Connect board | substrate 10 1st board | substrate member 11 1st penetration conductor part 13 Probe pin pad 14 1st contact electrode pad 15 Conductor land for mounting components 16 Internal conductor 20 2nd board | substrate member 21 2nd penetration conductor part 23 Motherboard connection pad 24 Second contact electrode pad 25, 45 Mounting component storage recess 30 Bypass capacitor 50 Motherboard 51 Electrode pad 60 Electronic component inspection socket 61 Probe pin 100 Electronic component to be inspected 101 Terminal electrode

Claims (8)

第1の表面電極パッドを第1の主面に、前記第1の主面の反対面に第1のコンタクト電極パッドをそれぞれ形成し、前記第1の表面電極パッドと前記第1のコンタクト電極パッドとを第1の貫通導体部で接続し、隣合う前記第1の貫通導体部に接続する対をなした実装部品用ランドを前記第1の主面の反対面に形成した第1の基板部材と、
第2の表面電極パッドを第2の主面に、前記第2の主面の反対面に第2のコンタクト電極パッドを形成し、前記第2の表面電極パッドと前記第2のコンタクト電極パッドとを第2の貫通導体部で接続した第2の基板部材と、
前記第1又は第2の主面の反対面に形成された実装部品収納凹部に収納され前記対をなした実装部品用ランド間に接続されたチップ型電子部品とを備え、
前記第1及び第2のコンタクト電極同士を当接、接触させて前記第1及び第2の基板部材を一体化した、コネクト基板。
The first surface electrode pad is formed on the first main surface, and the first contact electrode pad is formed on the surface opposite to the first main surface, and the first surface electrode pad and the first contact electrode pad are formed. Are connected to each other by the first penetrating conductor portion, and a pair of mounting component lands that are connected to the adjacent first penetrating conductor portion are formed on the opposite surface of the first main surface. When,
Forming a second surface electrode pad on the second main surface and a second contact electrode pad on the opposite side of the second main surface; and the second surface electrode pad, the second contact electrode pad, A second substrate member connected by a second through conductor portion;
A chip type electronic component housed in a mounting component housing recess formed on the opposite surface of the first or second main surface and connected between the paired mounting component lands;
A connect substrate in which the first and second contact members are brought into contact with each other and brought into contact with each other to integrate the first and second substrate members.
請求項1に記載のコネクト基板において、前記実装部品収納凹部は、前記第2の基板部材における前記第2の主面の反対面に形成されている、コネクト基板。   2. The connect substrate according to claim 1, wherein the mounting component housing recess is formed on a surface opposite to the second main surface of the second substrate member. 請求項1に記載のコネクト基板において、前記実装部品収納凹部は、前記第1の基板部材における前記第1の主面の反対面に形成されており、前記実装部品収納凹部の底部に前記対をなした実装部品用ランドが形成されている、コネクト基板。   2. The connect board according to claim 1, wherein the mounting component storage recess is formed on a surface opposite to the first main surface of the first board member, and the pair is disposed at a bottom of the mounting component storage recess. Connected board with formed mounting component lands. 請求項1に記載のコネクト基板において、前記実装部品収納凹部は、前記第1の基板部材における前記第1の主面の反対面に形成されており、前記実装部品収納凹部の底部に前記実装部品用ランドの一方が、前記実装部品収納凹部の上部に前記実装部品用ランドの他方が形成されている、コネクト基板。   2. The connect board according to claim 1, wherein the mounting component storage recess is formed on a surface opposite to the first main surface of the first substrate member, and the mounting component is provided at a bottom of the mounting component storage recess. One of the lands for connection is a connect substrate in which the other of the lands for mounting components is formed above the mounting component storage recess. 請求項1乃至4に記載のコネクト基板において、前記チップ型電子部品は前記対をなした実装部品用ランドに半田接続されている、コネクト基板。   5. The connect substrate according to claim 1, wherein the chip-type electronic component is solder-connected to the paired mounting component lands. 請求項1乃至5に記載のコネクト基板において、前記第1の貫通導体部と前記実装部品用ランドとが前記第1の基板部材の内部導体で接続されている、コネクト基板。   6. The connect substrate according to claim 1, wherein the first through conductor portion and the mounting component land are connected by an internal conductor of the first substrate member. 請求項1乃至6に記載のコネクト基板において、隣合う前記第1の貫通導体部の一方がグランド導体部であり、前記チップ型電子部品がバイパスコンデンサである、コネクト基板。   7. The connect substrate according to claim 1, wherein one of the adjacent first through conductor portions is a ground conductor portion, and the chip electronic component is a bypass capacitor. 請求項1乃至7に記載のコネクト基板と、
被検査電子部品の電極に先端が接触するプローブを有する電子部品検査用ソケットと、 マザーボードとを備え、
前記マザーボード上に前記コネクト基板を介在して前記ソケットが搭載され、前記第1の表面電極パッドが前記プローブの後端に接触し、前記第2の表面電極パッドが前記マザーボードの電極に接触した、電子部品検査装置。
The connect substrate according to claim 1,
An electronic component inspection socket having a probe whose tip contacts the electrode of the electronic component to be inspected, and a motherboard,
The socket is mounted on the motherboard via the connect substrate, the first surface electrode pad is in contact with the rear end of the probe, and the second surface electrode pad is in contact with the electrode of the motherboard, Electronic component inspection equipment.
JP2008206285A 2008-08-08 2008-08-08 Connect board and electronic componenet inspection device using the same Pending JP2010043874A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2008206285A JP2010043874A (en) 2008-08-08 2008-08-08 Connect board and electronic componenet inspection device using the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008206285A JP2010043874A (en) 2008-08-08 2008-08-08 Connect board and electronic componenet inspection device using the same

Publications (1)

Publication Number Publication Date
JP2010043874A true JP2010043874A (en) 2010-02-25

Family

ID=42015375

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008206285A Pending JP2010043874A (en) 2008-08-08 2008-08-08 Connect board and electronic componenet inspection device using the same

Country Status (1)

Country Link
JP (1) JP2010043874A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120025861A1 (en) * 2010-08-02 2012-02-02 Samsung Electronics Co., Ltd. Test socket and test device having the same
KR101131105B1 (en) 2010-12-16 2012-04-03 주식회사 세미콘테스트 Semiconductor test apparatus
JP2014025761A (en) * 2012-07-25 2014-02-06 Micronics Japan Co Ltd Probe card and inspection device
CN106796252A (en) * 2014-08-22 2017-05-31 李诺工业股份有限公司 Test jack

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120025861A1 (en) * 2010-08-02 2012-02-02 Samsung Electronics Co., Ltd. Test socket and test device having the same
KR101131105B1 (en) 2010-12-16 2012-04-03 주식회사 세미콘테스트 Semiconductor test apparatus
WO2012081864A2 (en) * 2010-12-16 2012-06-21 주식회사 세미콘테스트 Semiconductor test apparatus
WO2012081864A3 (en) * 2010-12-16 2012-10-18 주식회사 세미콘테스트 Semiconductor test apparatus
TWI448707B (en) * 2010-12-16 2014-08-11 Semicontest Co Ltd Semiconductor test apparatus
JP2014025761A (en) * 2012-07-25 2014-02-06 Micronics Japan Co Ltd Probe card and inspection device
CN106796252A (en) * 2014-08-22 2017-05-31 李诺工业股份有限公司 Test jack
JP2017524146A (en) * 2014-08-22 2017-08-24 リーノ インダストリアル インコーポレイテッド Test socket
US10338100B2 (en) 2014-08-22 2019-07-02 Leeno Industrial Inc. Test socket
CN106796252B (en) * 2014-08-22 2020-02-14 李诺工业股份有限公司 Test socket

Similar Documents

Publication Publication Date Title
US10122953B2 (en) Imaging module
JP2002026513A (en) Electronic parts, its manufacturing method, assembled electronic parts, electronic parts mounting structure, and electronic device
JP6512335B1 (en) Coil component and method of manufacturing the same
JP2014110423A (en) Circuit board with built-in electronic component and manufacturing method therefor
JP2010043874A (en) Connect board and electronic componenet inspection device using the same
JP4329762B2 (en) Chip type electronic component built-in multilayer board
JP2007250867A (en) Capacitor sheet and electronic circuit board
US10869382B2 (en) Interposer and electronic apparatus
JP6759947B2 (en) Capacitor parts
JP2005302854A (en) Double-sided board with built-in components, double-sided wiring board with built-in components, and its manufacturing method
JP5627391B2 (en) Multiple wiring board
JP2005197354A (en) Semiconductor module and its manufacturing method
JP6323622B2 (en) Component mounting board
JP2007129046A (en) Mounting structure of capacitor array
JP2008034672A (en) Method for mounting chip component, and electronic module
JPH10335822A (en) Multilayered ceramic circuit board
JP4424591B2 (en) Electronic component storage package
JP4140631B2 (en) Manufacturing method of electronic parts
JP6610072B2 (en) Multilayer capacitor and wiring board
JP2008078290A (en) Printed circuit board and method for manufacturing the same
JP2004119660A (en) Laminated electronic component
JP2015065207A (en) Ceramic substrate end face electrode for surface-mounted electronic component
JP2002100697A (en) Electronic component and electronic device provided with the same
JP2005251956A (en) Semiconductor module and method for manufacturing the same
JP2009289977A (en) Electronic component module