JP2010041293A - Trimming method of filter circuit - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a trimming method for easily trimming a high speed filter circuit with comparatively short time constant. <P>SOLUTION: A pulse detection circuit 11 which is constituted so as to continue outputting a detection signal to be active when it is detected that an output state of a pulse signal changes is arranged on an output terminal of the filter circuit 4. Then, when a pulse signal with predetermined pulse width is input while gradually changing the time constant of the filter circuit 4 in the fixed direction, trimming is completed with a time constant set in the filter circuit 4 at the point when the pulse detection circuit 11 outputs the detection signal. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a trimming method for a filter circuit in which whether or not to output a pulse signal is determined according to the pulse width of the input pulse signal.

  FIG. 13 shows an example of a filter circuit configured using a counter. The filter circuit 1 includes a clock generation circuit 2 and a digital circuit 3 including a counter, and counts a period in which a signal supplied to the input terminal IN is at a high level based on clock pulses supplied from the clock generation circuit 2. To do. When the count value is equal to or greater than a predetermined value, a one-shot pulse signal is output.

In this case, in order to trim the frequency characteristic of the filter circuit 1, the frequency of the clock pulse supplied from the clock generation circuit 2 is trimmed. When the clock generation circuit 2 is configured to generate and output clock pulses digitally using, for example, a digital PLL, trimming can be performed by changing the setting data.
However, the filter circuit 1 as described above has a problem in that the filter time (allowed pulse width of the input signal) is shortened, and a digital error becomes relatively large as the period of the clock pulse approaches. To solve the problem, it is necessary to increase the clock pulse speed.

Therefore, when the filter time is short, an analog filter circuit 4 using a CR time constant is used as shown in FIG. The filter circuit 4 constitutes an input stage, and P and N channel MOSFETs 5 and 6 connected to the power supply side and the ground side, respectively, and a variable resistance element 7 connected between the drains of the FETs 5 and 6 and the drain of the FET 6. And a capacitor 8 connected between the gate and the ground, and a NOT gate 9 connected to the drain of the FET 6 to form an output stage.
Although not related to the filter circuit, Patent Document 1 discloses a technique for trimming the oscillation frequency of the CR oscillation circuit (laser trimming).
JP 2006-119871 A

In the filter circuit 4 as described above, the resistance value of the variable resistance element 7 may be trimmed. However, as in the filter circuit 1, the trimming is continuously performed while changing the setting data so that the adjustment point of the resistance value can be easily performed. It cannot be executed in a form that can be recognized.
The present invention has been made in view of the above circumstances, and an object thereof is to provide a trimming method capable of easily performing trimming on a high-speed filter circuit having a relatively short time constant.

  According to the filter circuit trimming method according to claim 1, the pulse is configured to continuously output the detection signal that becomes active when it detects that the output state of the pulse signal has changed to the output terminal of the filter circuit. An output detection circuit is arranged. When a pulse signal with a predetermined pulse width is input while gradually changing the time constant of the filter circuit in a certain direction, trimming is performed with the time constant set in the filter circuit when the pulse output detection circuit outputs the detection signal. Complete. Therefore, it is possible to easily determine the timing for completing the trimming by using the detection signal output from the pulse output detection circuit as a trigger.

  According to the filter circuit trimming method of the second aspect, since the RS flip-flop is used for the pulse output detection circuit, when the level of the output terminal of the filter circuit is changed by trimming, the change is made according to the change. If the RS flip-flop is set or reset, a detection signal can be output.

  According to the filter circuit trimming method of the third aspect, since the D flip-flop is used for the pulse output detection circuit, when the level of the output terminal of the filter circuit is changed by trimming, the change is made in accordance with the change. If the D flip-flop is triggered, a detection signal can be output.

  According to the filter circuit trimming method of claim 4, as the pulse output detection circuit, the count operation is performed by a clock signal having a cycle shorter than a predetermined interval for inputting the pulse signal to the filter circuit, and the pulse signal is output from the filter circuit. Use the counter to be reset when it is done. That is, while the pulse signal is continuously output from the filter circuit at a predetermined interval, the counter continues to be reset, so that the counter does not count up. When the pulse signal is no longer output from the filter circuit due to the trimming, the counter is not reset continuously and counts up. Accordingly, the detection signal can be output. Therefore, it is possible to cope with the case where trimming is performed in the direction of increasing the time constant of the filter circuit.

  According to the filter circuit trimming method of the fifth aspect, when the filter circuit is configured as a semiconductor integrated circuit, the pulse output detection circuit is configured on the same substrate as the filter circuit. In other words, when the circuits are connected to each other by the external wiring, the resistance value and the stray capacitance become extremely large. For this reason, when the pulse width is narrow, it is assumed that the pulse disappears due to the influence thereof. Therefore, if the pulse output detection circuit is configured on the same substrate as the filter circuit, the pulse signal output from the filter circuit can be prevented from being affected by wiring resistance and stray capacitance, and trimming can be performed with high accuracy. it can.

According to the filter circuit trimming method of claim 6, the filter circuit includes a capacitor connected between a signal line through which a pulse signal is transmitted and a predetermined reference potential point, and between a power supply and the signal line. A plurality of series circuits composed of a combination of semiconductor switching elements connected to each other and resistance elements having different resistance values, a plurality of logic gates for switching on and off the plurality of semiconductor switching elements in accordance with an input pulse signal, and the plurality of these And a memory configured to supply the on / off setting data to the logic gate.
That is, when the filter circuit is configured as described above, the time constant of the filter circuit can be changed according to the data to be written in the memory, which is very suitable for a configuration in which trimming is performed automatically. Therefore, the trimming operation can be easily performed.

  According to the filter circuit trimming method of the seventh aspect, when the filter circuit according to the sixth aspect is a normal rotation side filter unit, the signal corresponding to the normal rotation side filter unit is transmitted with an inverted signal of the pulse signal. Similarly, the line is also provided as an inversion side filter section, and on / off setting data by the memory is given in common to those corresponding to the resistance elements having the same resistance value for each of the normal side and inversion side logic gates, and is supplied to the output stage. The present invention is intended to include an RS flip-flop whose set and reset are controlled by the output of the forward filter section and the output of the reverse filter section. With this configuration, the output of a minute pulse can be prevented.

(First embodiment)
Hereinafter, a first embodiment of the present invention will be described with reference to FIGS. The same parts as those in FIGS. 13 and 14 are denoted by the same reference numerals, description thereof is omitted, and different parts will be described below. In this embodiment, the pulse detection circuit 11 is connected to the output terminal of the filter circuit 4, and the filter circuit 4 is trimmed while monitoring the signal output state from the output terminal TRM of the pulse detection circuit 11.
A pulse signal having a constant width is continuously supplied to the input terminal IN of the filter circuit 4 at a constant period. The pulse detection circuit 11 is configured to set the output terminal TRM to a high level when a pulse signal is output from the filter circuit 4, and to set the output terminal TRM to a low level when no pulse signal is output. .

  Next, the operation of this embodiment will be described with reference to FIGS. FIG. 2 shows a case where trimming is performed in a direction in which the resistance value of the variable resistance element 7 constituting the filter circuit 4 is gradually increased. At this time, the pulse width of the signal applied to the input terminal IN of the filter circuit 4 is set to a critical value that prevents passage. Since the time constant of the filter circuit 4 is initially set to be small, the filter circuit 4 outputs a pulse signal from the start of trimming, and the pulse detection circuit 11 sets the output terminal TRM to high level.

  In this state, when the resistance value of the variable resistance element 7 is gradually increased, the filter circuit 4 stops outputting a pulse signal from a certain point in time, and the pulse detection circuit 11 changes the output terminal TRM to the low level. Therefore, since the resistance value of the variable resistance element 7 at the time when the output terminal TRM changes from the high level to the low level corresponds to the adjustment target value, the trimming may be terminated at that time.

  On the other hand, FIG. 3 shows a case where trimming is performed in such a direction that the resistance value of the variable resistance element 7 constituting the filter circuit 4 is gradually reduced. At this time, the pulse width of the signal applied to the input terminal IN of the filter circuit 4 is set to a critical value that allows passage. Since the time constant of the filter circuit 4 is initially set to be small, the filter circuit 4 does not output a pulse signal from the time when trimming is started, and the pulse detection circuit 11 sets the output terminal TRM to a low level.

In this state, when the resistance value of the variable resistance element 7 is gradually decreased, the filter circuit 4 outputs a pulse signal from a certain point in time, and the pulse detection circuit 11 changes the output terminal TRM to a high level. Therefore, since the resistance value of the variable resistance element 7 at the time when the output terminal TRM changes from the low level to the high level corresponds to the adjustment target value, the trimming may be finished at that time.
In this case, the trimming test apparatus is used to adjust the resistance value of the variable resistance element 7 stepwise and to stop trimming when the pulse detection circuit 11 changes the signal level of the output terminal TRM. This can be done automatically.

  As described above, according to the present embodiment, when detecting that the output state of the pulse signal has changed to the output terminal of the filter circuit 4, the pulse detection circuit 11 configured to continue outputting the detection signal that becomes active. Place. When a pulse signal having a predetermined pulse width is input while the time constant of the filter circuit 4 is gradually changed in a certain direction, the time constant set in the filter circuit 4 at the time when the pulse detection circuit 11 outputs the detection signal. Trimming was completed. Therefore, it is possible to easily determine the timing for completing the trimming with the output of the detection signal from the pulse detection circuit 11 as a trigger.

(Second embodiment)
4 and 5 show a second embodiment of the present invention, and the differences from the first embodiment will be described. The second embodiment shows a specific configuration example of the pulse detection circuit 11 corresponding to the case shown in FIG. 3 of the first embodiment. The pulse detection circuit 11A shown in FIG. 4A is a case where it is configured by an RS flip-flop, and the pulse detection circuit 11B shown in FIG. 4B is a case where it is configured by a D flip-flop.

  In the case of FIG. 4A, the output terminal OUT of the filter circuit 4 is connected to the set terminal S of the RS flip-flop, and in the case of FIG. 4B, the output terminal OUT of the filter circuit 4 is connected to the clock terminal of the D flip-flop. When connected, the input terminal D is fixed at a high level. With such a configuration, trimming is performed in a direction in which the resistance value of the variable resistance element 7 is gradually reduced, and when the filter circuit 4 starts outputting the pulse signal from a certain point, the pulse detection circuits 11A and 11B are started from that point. Changes the output terminal TRM to high level (see FIG. 5).

  As described above, according to the second embodiment, since the RS flip-flop is used for the pulse detection circuit 11A, when the level of the output terminal of the filter circuit 4 is changed by performing trimming, the RS is changed according to the change. A detection signal can be output by setting or resetting the flip-flop. In addition, since a D flip-flop is used for the pulse detection circuit 11B, when the level of the output terminal of the filter circuit 4 changes due to trimming, the detection can be performed by triggering the D flip-flop according to the change. A signal can be output.

(Third embodiment)
6 and 7 show a third embodiment of the present invention. The third embodiment shows a specific configuration example of the pulse detection circuit 11 that can correspond to either of FIGS. 2 and 3 of the first embodiment. The pulse detection circuit 11C includes a counter 13 formed by connecting, for example, five D flip-flops 12 in series, and the input terminal D of the first stage D flip-flop 12 is set to a high level. A clock pulse A having a cycle shorter than the cycle of the pulse signal input to the filter circuit 4 is applied to the clock terminal CK of each D flip-flop 12, and the output terminal OUT of the filter circuit 4 is connected to the reset terminal R. Is connected.

  Next, the operation of the third embodiment will be described with reference to FIG. When the clock pulse A is output for five cycles from the state where the counter 13 is reset, the output terminal TRM becomes high level. Therefore, when the resistance value of the variable resistance element 7 is gradually increased, while the filter circuit 4 is outputting the pulse signal periodically (less than 5 cycles of the clock pulse A) from the start of trimming, the counter 13 is Since it is reset, the output terminal TRM maintains the low level.

  If the resistance value of the variable resistance element 7 is gradually increased from that state, the filter circuit 4 does not output a pulse signal from a certain point in time, and the counter 13 is not reset. Then, since the pulse detection circuit 11C changes the output terminal TRM to the high level, the trimming should be finished at that time (therefore, the level change of the output terminal TRM is opposite to that in FIG. 2).

  On the other hand, when the resistance value of the variable resistance element 7 is gradually reduced, the counter 13 is not reset from the start of trimming, and the output terminal TRM maintains the high level. In this state, when the resistance value of the variable resistance element 7 is gradually decreased, the filter circuit 4 outputs a pulse signal from a certain point in time, and the counter 13 is periodically reset. Then, since the pulse detection circuit 11C changes the output terminal TRM to the low level, the trimming may be terminated at that time.

  As described above, according to the third embodiment, the pulse detection circuit 11C performs the counting operation with the clock signal having a cycle shorter than the predetermined interval for inputting the pulse signal to the filter circuit 4, and outputs the pulse signal from the filter circuit 4. If the counter 13 is reset, the trimming is performed in the direction in which the time constant of the filter circuit 4 is increased. In this case, the present invention can also be applied to the filter circuit 1 shown in FIG.

(Fourth embodiment)
FIGS. 8 and 9 show a fourth embodiment of the present invention, and show the structure of a filter circuit that can more easily switch resistance values in trimming. The filter circuit 21 replaces the P-channel MOSFET 5 included in the filter circuit 4 with a plurality of P-channel MOSFETs 22 (a to e, semiconductor switching elements), and between the drain of each FET 22 and the drain of the FET 6 (semiconductor switching element). In addition, resistance elements 23 to 27 having different resistance values are respectively connected. The resistance values of these resistance elements 23 to 27 are set to values that are sequentially doubled, such as 2R, 4R, 8R, and 16R, where R is the resistance value of the resistance element 23, for example.

  The output terminals of AND gates 28 (a to e, logic gates) are connected to the gates of the FETs 22 (a to e), and one input terminal of the AND gate 28 (a to e) is connected to a filter. The circuit 21 is connected in common to the input terminal IN. The other input terminal of the AND gate 28 (a to e) is connected to each data output terminal of the memory circuit 29. The AND gate 28 has a negative logic at the side connected to the input terminal IN and the output terminal.

  Next, the operation of the fourth embodiment will be described with reference to FIG. The memory circuit 29 can write data from the outside via an input terminal, and outputs 5-bit data according to each AND gate 28 (a to e). Therefore, by selectively setting the 5-bit data output from the memory circuit 29 to “1”, for example, as shown in FIG. 9, the time constant of the filter circuit 21 is set according to the resistance values of the resistance elements 23 to 27. It can be changed by 2 or 1/2. Of course, two or more resistance elements may be set to be connected in parallel.

As described above, according to the fourth embodiment, the filter circuit 21 is connected between the capacitor 8 connected between the signal line through which the pulse signal is transmitted and the ground (predetermined potential), and between the power source and the signal line. A plurality of series circuits composed of combinations of FETs 22a to 22e connected to each other and resistance elements 23 to 27 having different resistance values, and a plurality of AND gates 28a to 28e for switching on / off of the FET 22 in accordance with an input pulse signal; Trimming is performed by a memory circuit 29 that supplies ON / OFF setting data to the plurality of AND gates 28.
That is, when the filter circuit 21 is configured as described above, the time constant of the filter circuit 22 can be changed according to the data to be written in the memory circuit 29. Therefore, the trimming is performed automatically. Is suitable. Therefore, the trimming operation can be easily performed.

(5th Example)
10 and 11 show a fifth embodiment of the present invention. In the fifth embodiment, for example, when the filter circuit 4 in the first embodiment is configured as a part of the semiconductor integrated circuit 31, the pulse detection circuit 11 is configured on the same semiconductor substrate, whereby the same semiconductor integrated circuit 31 is configured. The case where it is made a part of is shown. In FIG. 10, the trimming test apparatus 32 is also illustrated, and the trimming test apparatus 32 adjusts the time constant of the filter circuit 4 on the semiconductor integrated circuit 31 side. The trimming test apparatus 32 is supplied with a detection signal TRM output from the pulse detection circuit 11 on the semiconductor integrated circuit 31 side, and determines the completion of the trimming operation with reference to the output state of the detection signal TRM. To do.

  FIG. 11 shows a case where the pulse detection circuit 11 is arranged on the trimming test apparatus 32 side for comparison. In this case, the output terminal OUT of the filter circuit 4 and the pulse detection circuit 11 are connected by the external wiring 33. As shown in FIG. 10, the external wiring 33 has extremely large wiring resistance and stray capacitance as compared with the case where both are mounted on the semiconductor integrated circuit 31. Therefore, if configured as shown in FIG. 10, it is possible to avoid the pulse signal output from the filter circuit 4 from being affected by the wiring resistance and stray capacitance, and to perform trimming with high accuracy.

(Sixth embodiment)
FIG. 12 shows a sixth embodiment of the present invention, and the differences from the fourth embodiment will be described. In the filter circuit 41 of the sixth embodiment, the filter circuit 21 of the fourth embodiment is a set-side filter unit 21S (forward rotation filter unit), and the same configuration is separately used as a reset side filter unit 21R (inversion side filter unit). Deploy. An input signal is input to the reset-side filter unit 21R from the terminal IN via the NOT gate 42, and output signals of the filter units 21R and 21S are respectively input to the set terminal S and the reset terminal R of the RS flip-flop 43. The output terminal Q of the RS flip-flop 43 is connected to the input terminal of the pulse detection circuit 11. Data common to the filter unit 21S is supplied from the memory circuit 29 to the AND gates 28a to 28e of the filter unit 21R.

  When the filter circuit 41 configured as described above is used, the reset-side filter unit 21R acts on the rising side of the input signal. As a result, the filtering function of the filter circuit 41 as a whole acts more strongly and becomes smaller. It is possible to prevent an input signal having a small pulse width.

The present invention is not limited to the embodiments described above and shown in the drawings, and the following modifications or expansions are possible.
You may apply not only to a low-pass filter but to a high-pass filter and a band pass filter.
The number of bits of the counter in the third embodiment may be changed as appropriate.
In the fourth embodiment, the predetermined potential applied to one terminal of the capacitor 8 is not limited to the ground, and may be any potential as long as it is stable.

The figure which is a 1st Example of this invention and shows the state which trims a filter circuit using a pulse detection circuit Timing chart showing the case where trimming is performed in the direction of gradually increasing the resistance value of the variable resistance element constituting the filter circuit. FIG. 2 equivalent diagram in the case of trimming in the direction of gradually decreasing the resistance value FIG. 4 is a diagram illustrating a specific configuration example of a pulse detection circuit according to the second embodiment of the present invention. 3 equivalent diagram FIG. 4 equivalent view showing a third embodiment of the present invention. 2 equivalent diagram The figure which is 4th Example of this invention and shows the structure of the filter circuit made into trimming object Diagram explaining trimming FIG. 5 is a diagram showing a semiconductor integrated circuit and a trimming test apparatus according to a fifth embodiment of the present invention. The figure which shows the state which has arranged the pulse detection circuit on the trimming test device side for comparison FIG. 8 equivalent view showing the sixth embodiment of the present invention. 1 equivalent diagram showing the prior art The figure which shows the specific structural example of a filter circuit

Explanation of symbols

  In the drawings, 4 is a filter circuit, 6 is an N-channel MOSFET (semiconductor switching element), 8 is a capacitor, 11 is a pulse detection circuit (pulse output detection circuit), 13 is a counter, 21 is a filter circuit, and 21S is a set-side filter unit. (Forward rotation side filter unit), 21R is a reset side filter unit (inversion side filter unit), 22 is a P channel MOSFET (semiconductor switching element), 23 to 27 are resistance elements, 28 is an AND gate (logic gate), 29 is A memory circuit, 31 is a semiconductor integrated circuit, 32 is a trimming test apparatus, 41 is a filter circuit, and 43 is an RS flip-flop.

Claims (7)

In a method of trimming a filter circuit in which whether or not to output the pulse signal is determined according to the pulse width of the input pulse signal,
When detecting that the output state of the pulse signal has changed at the output terminal of the filter circuit, a pulse output detection circuit configured to continue outputting a detection signal that becomes active is disposed,
When a pulse signal having a predetermined pulse width is input while gradually changing the time constant of the filter circuit in a certain direction,
A trimming method for a filter circuit, wherein trimming is completed by a time constant set in the filter circuit when the pulse output detection circuit outputs the detection signal.   2. The filter circuit trimming method according to claim 1, wherein an RS flip-flop is used for the pulse output detection circuit.   2. The trimming method for a filter circuit according to claim 1, wherein a D flip-flop is used for the pulse output detection circuit.   The pulse output detection circuit performs a count operation with a clock signal having a cycle shorter than a predetermined interval for inputting the pulse signal to the filter circuit, and the count state is reset when the pulse signal is output from the filter circuit. 2. The trimming method for a filter circuit according to claim 1, wherein a counter is used.   5. The device according to claim 1, wherein, when the filter circuit is configured as a semiconductor integrated circuit, the pulse output detection circuit is configured on the same substrate as the filter circuit. 6. Filter circuit trimming method. The filter circuit is
A capacitor connected between a signal line through which a pulse signal is transmitted and a potential point to which a predetermined reference potential is applied;
A plurality of series circuits composed of a combination of a semiconductor switching element connected between a power source and the signal line and a resistance element having a different resistance value;
A plurality of logic gates for switching on and off the plurality of semiconductor switching elements according to an input pulse signal;
6. The filter circuit trimming method according to claim 1, wherein the filter circuit trimming method comprises a memory configured to supply the on / off setting data to the plurality of logic gates. When the capacitor, the plurality of series circuits, and the plurality of logic gates are used as a forward filter section,
The filter circuit is
A configuration corresponding to the normal rotation side filter unit is also provided as an inversion side filter unit for a signal line through which an inverted signal of the pulse signal is transmitted,
The memory provides the on / off setting data in common to each of the logic gates on the normal rotation side and the reverse side corresponding to the resistance elements having the same resistance value,
The output stage includes an RS flip-flop whose set and reset are controlled by the output of the normal filter unit and the output of the reverse filter unit. Filter circuit trimming method.

Images