JP2010021747A - Direct up-conversion transmitter and operation method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To reduce the increase of an area occupied by a chip in an IC. <P>SOLUTION: A direct up-conversion transmitter includes first and second base band variable gain amplifiers 108_I, Q, first and second transmission mixers 109_I, Q, an adder 110, an RF variable gain amplifier 111, a voltage controlled oscillator 112, a 90° phase shifter 113, a control part 114, and a D/A converter 115. A pair of base band signals I and Q for transmission are supplied to input terminals of the first and second base band variable gain amplifiers 108_I, Q. A gain control signal having the small number of bits is supplied from the control part 114 to the first and second base band variable gain amplifiers 108_I , Q to set the gains. An RF control signal having the large number of bits is supplied from the control part 114 to the D/A converter 115. An analog RF control signal generated by the D/A converter 115 is supplied to the RF variable gain amplifier 111 to set the gain. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a direct up-conversion transmitter and a method for operating the direct up-conversion transmitter, and more particularly to a technique useful for reducing an increase in the area occupied by a chip inside a semiconductor integrated circuit.

  With the advancement of wireless communication systems, power amplifiers, which are bottlenecks for longer talk times and more complex multimedia services of wireless communication terminals, are demanding more stringent specifications for efficiency. In a CDMA communication system, a precise gain control step of 0.25 dB must be satisfied. Furthermore, for low cost and highly integrated solutions, the transmitter is implemented with a CMOS process that employs direct I / Q conversion.

  Non-Patent Document 1 below describes a CDMA communication device in which a baseband filter, a baseband variable gain amplifier (VGA), a direct up converter, an RF variable gain amplifier (RFVGA), and a driver amplifier (DA) are integrated. ing. The transmission D / A converter (TxDAC) of the baseband LSI chip generates quadrature differential I and Q baseband analog signals from the reference current (Iref) supplied from the transmission RFIC. The baseband signal is supplied to a secondary baseband filter, and the filtered baseband signal is supplied to a baseband variable gain amplifier (BBVGA) controlled by a digital gain control signal. The output of the BBVGA is up-converted to an RF frequency by a single sideband up-converter composed of two cross-coupled Gilbert cell mixers (Mixers). The RF output of the upconverter is supplied to the input of an RF variable gain amplifier (RFVGA) controlled by a digital gain control signal, and the differential output of the RFVGA is converted to a single-ended signal at the input of the driver amplifier (DA) through a transformer. Converted. The output of DA is supplied to an RF power amplifier (PA) through an RF SAW filter outside the transmission RFIC. Note that a local signal for transmission generated from a transmission voltage controlled oscillator (TxVCO) outside the CDMA communication device is supplied to the mixer.

  Gain control is realized by digital discrete steps, coarse gain control is executed by BBVGA, RFVGA, and DA, and precise gain control of the TxDAC / Iref block compensates the coarse gain curve to a linear 0.25 dB gain characteristic. Is. Both coarse gain control and precise gain control are realized by a look-up table (LUT). The gain control at four locations of TxDAC / Iref, BBVGA, RFVGA, and DA is controlled by a binary weight by a look-up table (LUT). In order to increase the transmitter output power proportional to the power control code (PDF) in dB, the gain code supplied to each gain stage must increase exponentially with respect to the PDF, so a look-up table ( LUT) is used to implement this exponential function. Since CDMA 1x requires control of output power in 0.25 dB steps, it is necessary to design to reduce the quantization error of each gain stage. This quantization error is particularly large at low output power levels. The gain curve is divided into sections, each section is linear and adjusted by a digital algorithm to compensate for quantization errors.

  Non-Patent Document 1 below also describes that the gain step measured by correcting the quantization error satisfies a gain control step of approximately 0.25 dB step except for two large steps.

Junxion Deng et al, “A dual-band high efficiency CMOS transmitter for wireless CDMA application”, 2007 IEEE Radio Frequency Integrated PP3. 25-28.

  Prior to the present invention, the present inventors engaged in the development of an RF semiconductor integrated circuit (hereinafter referred to as RFIC) that supports the CDMA communication system.

  CDMA (Code Division Multiple Access) mobile phones, unlike conventional time division multiple access (GDMA) such as GSM (Global Systems for Mobile communications), transmit power because of code division multiplexing. It must be strictly managed to secure more channels. The most stringent standard is that the error of the transmission power in the closed loop is within +/− 0.5 dB. In order to satisfy this standard, in Japan, the transmission power control signal supplied to the RFIC is an analog signal and is based on a 9 to 10-bit precision D / A converter for generating the transmission power control analog signal. A method incorporated in a band LSI has been studied.

  On the other hand, in the global development trend such as 3CDMA of WCDMA, the interface between RFIC and baseband LSI is called digital interface (DigRF) and tends to be digitized. 3GPP is an abbreviation for 3rd Generation Partnership Project. In this digital interface, transmission / reception baseband I and Q signals, RFIC control signals, and the like are all digital signals.

  A digital signal of a power control code (PDF) can be supplied from the baseband LSI to the lookup table LUT for output power control of 0.25 dB step described in Non-Patent Document 1. Further, the transmission D / A converter TxDAC for supplying the transmission I and Q baseband analog signals can be moved from the baseband LSI chip to the transmission RFIC. By doing so, the transmission I and Q baseband signals between the baseband LSI chip and the transmission RFIC become digital signals, so that digitalization by a digital interface (DigRF) can be realized.

  On the other hand, the inventors studied the integration of a transmission frequency synthesizer PLL including a transmission voltage controlled oscillator (TxVCO) in the development of an RFIC incorporating a WCDMA transmission function prior to the present invention. However, it is necessary to take measures against leakage (leakage) of the transmission local signal generated by the transmission voltage controlled oscillator (TxVCO) to each part of the RFIC. In particular, direct up-conversion (DUC) transmitters that realize low cost and highly integrated solutions are generated from the frequency of the local signal for transmission supplied to the carrier input terminal of the transmission Gilbert cell mixer and the output of the mixer. The frequency of the output RF signal is equal.

  In order to suppress leakage at the output terminal of the mixer, it is connected to the output terminal of the mixer rather than the gain step number of the baseband variable gain amplifier (BBVGA) connected to the baseband input terminal of the transmitting Gilbert cell mixer. It is necessary to increase the number of gain steps of the RF variable gain amplifier (RFVGA). That is, by increasing the gain step number of the RF variable gain amplifier (RFVGA) of 0.25 dB step, the signal attenuation amount in the RF variable gain amplifier (RFVGA) can be increased, so that the RF variable gain amplifier (RFVGA) Leakage can be sufficiently attenuated. However, an RF variable gain amplifier (RFVGA) with a large number of gain steps is connected to a large number of gain setting resistors at the source terminal of a high-frequency operation MOS transistor for amplifying a 2 MHz RF transmission signal by a large number of CMOS switches. This can be achieved.

  However, since this realization method uses a large number of devices that perform high-frequency operation, in order to reduce the parasitic effect of high-frequency operation, a chip inside the RFIC of an RF variable gain amplifier (RFVGA) having a large gain step number is used. The problem that the occupied area becomes extremely large has been clarified by the study of the present inventors.

  The present invention has been made as a result of the study of the present inventors prior to the present invention as described above.

  Therefore, an object of the present invention is to reduce an increase in the area occupied by a chip inside a semiconductor integrated circuit (IC).

  The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

  A typical one of the inventions disclosed in the present application will be briefly described as follows.

  That is, a typical direct up-conversion transmitter according to the present invention includes first and second baseband signal variable gain amplifiers (108_I, Q), first and second transmission mixers (109_I, Q), and addition. , A high-frequency signal variable gain amplifier (111), a transmission voltage controlled oscillator (112), a 90-degree phase shifter (113), a control unit (114), and a D / A converter (115).

  A pair of transmission baseband signals (I, Q) are supplied to the input terminals of the first and second baseband signal variable gain amplifiers (108_I, Q). The amplified signals of the first and second baseband signal variable gain amplifiers (108_I, Q) are supplied to the first and second transmission mixers (109_I, Q), and the RF transmission signal is supplied from the adder (110). Is generated. The RF transmission signal at the output of the adder (110) is amplified by the high frequency signal variable gain amplifier (111), and an RF transmission amplification signal is generated from the output of the high frequency signal variable gain amplifier.

  A digital control input signal is supplied to the control unit (114), the first baseband gain control signal and the second baseband gain control signal having a predetermined number of bits from the control unit, and a bit larger than the predetermined number of bits. An RF gain control signal having a number is generated.

  The first and second baseband gain control signals generated from the controller are supplied to the first and second baseband signal variable gain amplifiers (108_I, Q), respectively, and the first and second The gain of the baseband signal variable gain amplifier (108_I, Q) can be set. The RF gain control signal having the large number of bits generated from the control unit is supplied to the D / A converter (115), and an analog RF gain control signal is generated from the D / A converter. The analog RF gain control signal generated from the D / A converter is supplied to the high-frequency signal variable gain amplifier (111), and the gain of the high-frequency signal variable gain amplifier can be set (see FIG. 1).

  The effects obtained by the representative ones of the inventions disclosed in the present application will be briefly described as follows. That is, an increase in the chip occupation area inside the IC can be reduced.

<Typical embodiment>
First, an outline of a typical embodiment of the invention disclosed in the present application will be described. The reference numerals of the drawings referred to with parentheses in the outline description of the representative embodiments merely exemplify what are included in the concept of the components to which the reference numerals are attached.

  [1] A direct up-conversion transmitter according to a representative embodiment of the present invention includes a first baseband signal variable gain amplifier (108_I), a second baseband signal variable gain amplifier (108_Q), and a first transmission mixer. (109_I), second transmission mixer (109_Q), adder (110), high-frequency signal variable gain amplifier (111), transmission voltage-controlled oscillator (112), 90-degree phase shifter (113), control unit (114), A D / A converter (115) is provided.

  A pair of transmission baseband signals (I, Q) is supplied to the input terminal of the first baseband signal variable gain amplifier (108_I) and the input terminal of the second baseband signal variable gain amplifier (108_Q).

  The first transmission local signal generated from the output of the transmission voltage controlled oscillator (112) is supplied to the 90-degree phase shifter (113), so that the first transmission local signal is transmitted from the 90-degree phase shifter (113). A second transmission local signal that is approximately 90 degrees out of phase with the signal is generated.

  The first baseband amplified signal output from the first baseband signal variable gain amplifier (108_I) is supplied to one input terminal of the first transmission mixer (109_I), and is supplied from the transmission voltage controlled oscillator (112). The first transmission local signal is supplied to the other input terminal of the first transmission mixer (109_I).

  The second baseband amplification signal output from the second baseband signal variable gain amplifier (108_Q) is supplied to one input terminal of the second transmission mixer (109_Q), and the 90-degree phase shifter (113) The second transmission local signal is supplied to the other input terminal of the second transmission mixer (109_Q).

  The first RF component of the output of the first transmission mixer (109_I) and the second RF component of the output of the second transmission mixer (109_Q) are synthesized by the adder (110), thereby the adder (110). An RF transmission signal is generated from the output of.

  The RF transmission signal at the output of the adder (110) is amplified by the high frequency signal variable gain amplifier (111), thereby generating an RF transmission amplification signal from the output of the high frequency signal variable gain amplifier.

  By supplying a digital control input signal to the control unit (114), a first baseband gain control signal, a second baseband gain control signal having a predetermined number of bits from the control unit, and the predetermined number of bits. An RF gain control signal having a larger number of bits is generated.

  The first and second baseband gain control signals generated from the controller are supplied to the first and second baseband signal variable gain amplifiers (108_I, Q), respectively, so that the first and second baseband gain control signals are supplied to the first and second baseband signal variable gain amplifiers (108_I, Q), respectively. The gain of the second baseband signal variable gain amplifier (108_I, Q) can be set.

  By supplying the RF gain control signal having the large number of bits generated from the control unit to the D / A converter (115), an analog RF gain control signal is generated from the D / A converter. The

  The analog RF gain control signal generated from the D / A converter is supplied to the high frequency signal variable gain amplifier (111), whereby the gain of the high frequency signal variable gain amplifier can be set (FIG. 1). reference).

  According to the embodiment, the high-frequency signal variable gain amplifier (111) controlled by the RF gain control signal having a large number of bits is not a digital direct control as described in Non-Patent Document 1, but a D / A conversion. It is controlled by analog control by an analog signal generated from the output of the device (115). Accordingly, the analog-controlled high-frequency signal variable gain amplifier (111) can be integrated with a small chip occupation area by the RFIC (100). Further, since the frequency of the digital RF signal gain control signal supplied to the D / A converter (115) is considerably lower than the frequency of the RF transmission signal, the D / A converter (115) is also a small chip using the RFIC (100). Integration in the occupied area is possible.

  In a preferred embodiment, each of the first and second baseband signal variable gain amplifiers (108_I, Q) includes a plurality of resistors (R10, R11... R14) and has the predetermined number of bits. A variable resistance circuit (1082) controlled by a baseband gain control signal is included (see FIG. 3).

  In a more preferred embodiment, each of the first and second baseband signal variable gain amplifiers (108_I, Q) includes an amplifier (1083) connected to the variable resistance circuit (1082) (FIG. 3).

  In an even more preferred embodiment, the high-frequency signal variable gain amplifier (111) includes an amplification transistor (Q6, Q7), and the analog RF gain control generated from the D / A converter (115). The DC bias current of the amplification transistor is controlled by the signal (see FIG. 4).

  In a specific embodiment, the RF transmission amplification signal generated from the output of the high-frequency signal variable gain amplifier (111) is a transmission signal of a CDMA communication system.

  In a most specific embodiment, the first and second baseband signal variable gain amplifiers (108_I, Q), the first and second transmission mixers (109_I, Q), and the adder (110 ), The high-frequency signal variable gain amplifier (111), the transmission voltage controlled oscillator (112), the 90-degree phase shifter (113), the control unit (114), and the D / A converter (115) are semiconductor integrated It is integrated in the circuit (100) (see FIG. 1).

  [2] A representative embodiment of another aspect of the present invention includes a first baseband signal variable gain amplifier (108_I), a second baseband signal variable gain amplifier (108_Q), a first transmission mixer (109_I), Second transmission mixer (109_Q), adder (110), high frequency signal variable gain amplifier (111), transmission voltage controlled oscillator (112), 90-degree phase shifter (113), control unit (114), D / A conversion Is a method of operating a direct up-conversion transmitter comprising a device (115).

  A pair of transmission baseband signals (I, Q) is supplied to the input terminal of the first baseband signal variable gain amplifier (108_I) and the input terminal of the second baseband signal variable gain amplifier (108_Q).

  The first transmission local signal generated from the output of the transmission voltage controlled oscillator (112) is supplied to the 90-degree phase shifter (113), so that the first transmission local signal is transmitted from the 90-degree phase shifter (113). A second transmission local signal that is approximately 90 degrees out of phase with the signal is generated.

  The first baseband amplified signal output from the first baseband signal variable gain amplifier (108_I) is supplied to one input terminal of the first transmission mixer (109_I), and is supplied from the transmission voltage controlled oscillator (112). The first transmission local signal is supplied to the other input terminal of the first transmission mixer (109_I).

  The second baseband amplification signal output from the second baseband signal variable gain amplifier (108_Q) is supplied to one input terminal of the second transmission mixer (109_Q), and the 90-degree phase shifter (113) The second transmission local signal is supplied to the other input terminal of the second transmission mixer (109_Q).

  The first RF component of the output of the first transmission mixer (109_I) and the second RF component of the output of the second transmission mixer (109_Q) are synthesized by the adder (110), thereby the adder (110). An RF transmission signal is generated from the output of.

  The RF transmission signal at the output of the adder (110) is amplified by the high frequency signal variable gain amplifier (111), thereby generating an RF transmission amplification signal from the output of the high frequency signal variable gain amplifier.

  By supplying a digital control input signal to the control unit (114), a first baseband gain control signal, a second baseband gain control signal having a predetermined number of bits from the control unit, and the predetermined number of bits. An RF gain control signal having a larger number of bits is generated.

  The first and second baseband gain control signals generated from the controller are supplied to the first and second baseband signal variable gain amplifiers (108_I, Q), respectively, so that the first and second baseband gain control signals are supplied to the first and second baseband signal variable gain amplifiers (108_I, Q), respectively. The gain of the second baseband signal variable gain amplifier (108_I, Q) can be set.

  By supplying the RF gain control signal having the large number of bits generated from the control unit to the D / A converter (115), an analog RF gain control signal is generated from the D / A converter. The

  The analog RF gain control signal generated from the D / A converter is supplied to the high frequency signal variable gain amplifier (111), whereby the gain of the high frequency signal variable gain amplifier can be set (FIG. 1). reference).

<< Description of Embodiment >>
Next, the embodiment will be described in more detail. In all the drawings for explaining the best mode for carrying out the invention, components having the same functions as those in the above-mentioned drawings are denoted by the same reference numerals, and repeated description thereof is omitted.

<Configuration of direct up conversion transmitter>
FIG. 1 is a diagram illustrating a configuration of a direct up conversion (DUC) transmitter having a WCDMA transmission function according to an embodiment of the present invention.

  A direct up-conversion (DUC) transmitter shown in FIG. 1 includes an RFIC (100), a baseband LSI (101), a SAW filter (102), an RF power amplifier (103), a DC / DC converter (104), a duplexer. It consists of a ksar (105) and an antenna (106). Note that SAW means Surface Acoustic Wave.

  The RFIC (100) includes a quadrature modulator (107), a high frequency signal variable gain amplifier (111), a transmission voltage control oscillator (112), a 90-degree phase shifter (113), a control unit (114), and a D / A converter. (115). The quadrature modulator (107) includes an I-system baseband signal variable gain amplifier (108_I) for an analog transmission baseband signal I supplied from the baseband LSI (101), an I-system transmission mixer (109_I), and A Q-system baseband signal variable gain amplifier (108_Q) for an analog transmission baseband signal Q supplied from the baseband LSI (101) and a Q-system transmission mixer (109_Q) are included.

  The analog transmission baseband signal I and the analog transmission baseband signal Q are supplied to the input terminal of the I-system baseband signal variable gain amplifier (108_I) and the input terminal of the Q-system baseband signal variable gain amplifier (108_Q), respectively. . A digital control input signal is supplied from the baseband LSI (101) to the SPI input terminal of the control unit (114), thereby being supplied to the I-system and Q-system baseband signal variable gain amplifiers (108_I, Q). 2-bit I-system and Q-system baseband signal gain control signals are generated. The gains of the I-system and Q-system baseband signal variable gain amplifiers (108_I, Q) are controlled by the 2-bit I-system and Q-system baseband signal gain control signals. Note that SPI is an abbreviation for Serial Port Interface. As another embodiment of the present invention, a transmission D / A converter TxDAC for supplying transmission I and Q baseband analog signals can be formed inside the RFIC (100). Therefore, the transmission I and Q baseband signals between the baseband LSI chip and the RFIC (100) are digital signals, and a digital interface (DigRF) can be realized.

  The I system and Q system baseband amplified signals of the I system and Q system baseband signal variable gain amplifiers (108_I, Q) are supplied to one input terminal of the I system and Q system transmission mixers (109_I, Q). Then, the other input terminal of the I-system transmission mixer (109_I) is supplied with the I-system transmission local signal generated from the transmission voltage controlled oscillator (112), and the other input of the Q-system transmission mixer (109_Q). A Q-system transmission local signal generated from the 90-degree phase shifter (113) is supplied to the terminal. The I-system RF transmission signal output from the I-system transmission mixer (109_I) and the Q-system RF transmission signal output from the Q-system transmission mixer (109_Q) are vector-synthesized by the adder (110), and the adder (110 ) Output vector synthesized RF transmission signal is amplified by a high frequency signal variable gain amplifier (111).

  A 7-bit digital RF signal gain control signal from the control unit (114) is supplied to the input terminal of the D / A converter (115), and is generated from the output terminal of the D / A converter (115). The gain of the high-frequency signal variable gain amplifier (111) is controlled by the analog RF signal gain control signal.

  The RF transmission signal generated by the high frequency signal variable gain amplifier (111) of the RFIC (100) is amplified by the RF power amplifier (103) through the SAW filter (102), and the RF transmission output signal of the RF power amplifier (103) is obtained. Is supplied to the antenna (106) via the duplexer (105).

  In the WCDMA communication mode of the cellular phone terminal, the RF power amplifier (103) is activated by supplying a high-level mode control signal (Mode control) from the control unit (114) to the RF power amplifier (103). In other communication modes such as GSM of the cellular phone terminal, the mode control signal becomes low level and the RF power amplifier (103) is deactivated.

  A power supply voltage control signal (Vcc control) is supplied from the control unit (114) to the DC / DC converter (104) connected between the battery voltage Vbatt of the mobile phone terminal and the RF power amplifier (103). When the RF transmission power of the RF power amplifier (103) is low, the DC / DC converter (104) to the RF power amplifier (103) responds to the low level power supply voltage control signal (Vcc control) of the control unit (114). The level of the supplied power supply voltage (Vcc) is lowered, and the power added efficiency PAE is improved. PAE is an abbreviation for Power Added Efficiency.

  In the transmitter according to the embodiment of the present invention shown in FIG. 1 described above, the 2-bit I-system and Q-system of the control unit (114) to which the digital control input signal from the baseband LSI (101) is supplied, respectively. The transmission gain is controlled by a control signal of 9 bits in total including a baseband signal gain control signal and a 7-bit digital RF signal gain control signal. In particular, the countermeasure for the leakage of the local signal which becomes a problem due to the built-in voltage control oscillator (112) for transmission of the RFIC (100) is a high-frequency signal variable gain controlled by a digital RF signal gain control signal having a large bit number of 7 bits. It can be solved by a large signal attenuation at the amplifier (111). Further, since the gain and the large signal attenuation amount of the high-frequency signal variable gain amplifier (111) are controlled by the analog RF signal gain control signal generated from the output terminal of the D / A converter (115), the high-frequency signal variable gain is controlled. The chip occupation area of the RFIC (100) of the amplifier (111) can be reduced.

  Since the local signal from the transmission voltage controlled oscillator (112) leaks to the baseband side input terminals of the I-system and Q-system transmission mixers (109_I, Q), the I-system and Q-system transmission mixers (109_I, Q) This causes self-mixing of the local leak signal. Accordingly, a DC error component leaks from the output of the I-system and Q-system transmission mixers (109_I, Q), and this DC error component degrades the adjacent channel power ratio ACPR. ACPR is an abbreviation for Adjacent Channel Power Ratio. Further, the local signal from the transmission voltage controlled oscillator (112) leaks directly to the RF output terminals of the I-system and Q-system transmission mixers (109_I, Q).

  The total gain of the I-system and Q-system baseband signal variable gain amplifiers (108_I, Q) and the high-frequency signal variable gain amplifier (111) of the DUC transmitter of FIG. The gain state can be controlled. In the gain control from the full gain state, the precise gain control of the lower 2 bits is executed by the I and Q baseband signal variable gain amplifiers (108_I and Q) in the preceding stage, and then the coarse gain of the upper 7 bits. The control is executed by the high-frequency signal variable gain amplifier (111) at the subsequent stage, and can finally be controlled to the minimum gain state.

  In order to reduce the leakage of the DC error component and the leakage of the local signal in the minimum gain state, the I and Q baseband signal variable gain amplifiers of the previous stage within the control range of the control signal of 9 bits in total ( The signal attenuation amount of the high-frequency signal variable gain amplifier (111) at the subsequent stage is set larger than the signal attenuation amount of 108_I, Q). Therefore, the high-frequency signal variable in the subsequent stage is more variable than the number of bits of the 2-bit I and Q baseband signal gain control signal for controlling the gain of the I and Q baseband signal variable gain amplifiers (108_I and Q) in the previous stage. The number of bits of the 7-bit digital RF signal gain control signal for controlling the gain of the gain amplifier (111) is set large.

  The latter high-frequency signal variable gain amplifier (111) having a large signal attenuation is not a digital direct control as described in Non-Patent Document 1, but an analog RF generated from the output of the D / A converter (115). It is controlled by analog control using a signal gain control signal. Therefore, the analog-controlled high-frequency signal variable gain amplifier (111) can be integrated with the RFIC (100) with a small chip occupation area. Further, since the frequency of the 7-bit digital RF signal gain control signal supplied to the D / A converter (115) is considerably lower than the frequency of the RF transmission signal of about 2 MHz, the D / A converter (115) is also used. RFIC (100) can be integrated with a small chip occupation area.

≪Baseband signal variable gain amplifier≫
FIG. 3 is a diagram showing the configuration of the I-system and Q-system baseband signal variable gain amplifiers (108_I, Q) of the RFIC (100) of the DUC transmitter shown in FIG.

  As shown in FIG. 3, the baseband signal variable gain amplifier (108) is responsive to the 2-bit baseband signal gain control signal of the control unit (114) to provide four gain control signals D11, D12, D13, and D14. A decoder (1081) for generating the other four gain control signals D21, D22, D23, and D24 is included. The baseband signal variable gain amplifier (108) shown in FIG. 3 includes a variable signal attenuator (1082) and an output amplifier (1083).

  A non-inverted I-system baseband input signal I and an inverted I-system baseband input signal / I are supplied from the baseband LSI (101) to the variable signal attenuator (1082). A resistor R10, a resistor R11, a resistor R12, a resistor R13, and a resistor R14 are connected in series between the non-inverted I-system baseband input signal I and the ground voltage GND, and the inverted I-system baseband input signal I and the ground voltage are connected. A resistor R20, a resistor R21, a resistor R22, a resistor R23, and a resistor R24 are connected in series with the GND. A source / drain current path of the MOS transistor Q11 whose gate is controlled by the gain control signal D11 of the decoder (1081) is connected between the voltage dividing node and the non-inverting output node of the resistor R10 and the resistor R11. A source / drain current path of the MOS transistor Q12 whose gate is controlled by the gain control signal D12 of the decoder (1081) is connected between the voltage dividing node of the resistor R12 and the non-inverting output node. The source / drain current path of the MOS transistor Q13 whose gate is controlled by the gain control signal D13 of the decoder (1081) is connected between the voltage dividing node and the non-inverting output node of the resistor R12 and the resistor R13. A source / drain current path of the MOS transistor Q14 whose gate is controlled by the gain control signal D14 of the decoder (1081) is connected between the voltage dividing node of the resistor R14 and the non-inverting output node. A source / drain current path of the MOS transistor Q21 whose gate is controlled by the gain control signal D21 of the decoder (1081) is connected between the voltage dividing node and the inverted output node of the resistor R20 and the resistor R21. A source / drain current path of the MOS transistor Q22 whose gate is controlled by the gain control signal D22 of the decoder (1081) is connected between the voltage dividing node of R22 and the inverted output node. A source / drain current path of the MOS transistor Q23 whose gate is controlled by the gain control signal D23 of the decoder (1081) is connected between the voltage dividing node and the inverted output node of the resistor R22 and the resistor R23. A source / drain current path of the MOS transistor Q24 whose gate is controlled by the gain control signal D24 of the decoder (1081) is connected between the voltage dividing node of R24 and the inverted output node.

  In response to the 2-bit baseband signal gain control signal B [1: 0] of the control unit (114), the decoder (1081) receives the following combinations of gain control signals D11, D12, D13, D14, D21, D22, D23, and D24 are generated.

B [1: 0] D11 D12 D13 D14 D21 D22 D23 D24
“00” “0” “0” “0” “1” “0” “0” “0” “1”
“01” “0” “0” “1” “0” “0” “0” “1” “0”
“10” “0” “1” “0” “0” “0” “1” “0” “0”
“11” “1” “0” “0” “0” “1” “0” “0” “0”
Accordingly, in response to the code of the 2-bit baseband signal gain control signal B [1: 0] of the control unit 114 changing to “00”, “01”, “10”, “11”, The amplitude of the baseband signal between the non-inverting output node and the inverting output node of the variable signal attenuator (1082) increases.

  The output amplifier (1083) includes P-channel MOS transistors Q3 and Q4 whose gates are connected to the non-inverting output node and the inverting output node of the variable signal attenuator (1082), load resistors R3 and R4, and a pair of current sources Io, Io. The sources of the P-channel MOS transistors Q3 and Q4 are connected to the power supply voltage Vcc through a pair of current sources Io and Io. The drains of the P-channel MOS transistors Q3 and Q4 are connected to a pair of output terminals OUT and / OUT, and are connected to the ground voltage GND through load resistors R3 and R4.

  Therefore, the gains of the I and Q system baseband signal variable gain amplifiers (108_I, Q) shown in FIG. 3 are the codes of the 2-bit baseband signal gain control signals B [1: 0] of the control unit (114). It can be controlled by the variable signal attenuation of the responding variable signal attenuator (1082).

≪High-frequency signal variable gain amplifier≫
FIG. 4 is a diagram showing the configuration of the high-frequency signal variable gain amplifier (111) of the RFIC (100) of the DUC transmitter shown in FIG.

  As shown in FIG. 4, the high-frequency signal variable gain amplifier 111 has P-channel MOS transistors Q6 and Q7 whose gates are connected to a non-inverting input terminal IN and an inverting input terminal / IN, load resistors R6 and R7, N A first current mirror CM1 including channel MOS transistors Q8 and Q9 and a second current mirror CM2 including P channel MOS transistors Q10 and Q11 are included.

  The gain of the high-frequency signal variable gain amplifier (111) is determined by the conductance of the P-channel MOS transistors Q6 and Q7, and this conductance is determined by the DC bias current of the P-channel MOS transistors Q6 and Q7. This DC bias current is directly proportional to the output current which is an analog RF signal gain control signal from the output of the D / A converter (115) supplied via the first current mirror CM1 and the second current mirror CM2. It is determined. When the output current of the D / A converter (115) is small in response to the 7-bit digital RF signal gain control signal code of the control unit (114), the gain of the high-frequency signal variable gain amplifier (111) is small. On the other hand, when the output current of the D / A converter (115) is large, the gain of the high-frequency signal variable gain amplifier (111) is controlled to a large value. As described above, the high-frequency signal variable gain amplifier (111) is controlled by the output analog RF signal gain control signal of the D / A converter (115) instead of the digital direct control as described in Non-Patent Document 1 above. . Therefore, the analog-controlled high-frequency signal variable gain amplifier (111) can be integrated with the RFIC (100) with a small chip occupation area.

≪Change in total gain of DUC transmitter≫
FIG. 5 is a digital diagram in which the total gain of the I-system and Q-system baseband signal variable gain amplifiers (108_I, Q) and the high-frequency signal variable gain amplifier (111) of the DUC transmitter shown in FIG. It is a figure which shows a mode that it changes with the change (Tx power control bit) of RF signal gain control signal.

  5 represents the digital RF signal gain control signal of a total of 9 bits, the left vertical axis in FIG. 5 represents the transmission output, and the right vertical axis in FIG. 5 represents the adjacent channel power ratio (ACPR). Yes.

  The characteristic L1 in FIG. 5 indicates that the total gain changes with a large change width of 1 dB in response to the code of the upper 7-bit digital RF signal gain control signal of the control unit (114). The large change width of 1 dB of the characteristic L1 in FIG. 5 is realized by the gain change of the high-frequency signal variable gain amplifier (111) at the subsequent stage of the DUC transmitter.

  The characteristic L2 in FIG. 5 indicates that the total gain changes with a small change width of 0.25 dB in response to the code of the low-order 2-bit digital RF signal gain control signal of the control unit (114). The small change width of 0.25 dB of the characteristic L2 in FIG. 5 is realized by the gain change of the baseband signal variable gain amplifiers (108_I, Q) of the I and Q systems at the front stage of the DUC transmitter.

  Accordingly, the total gain of the DUC transmitter shown in FIG. 1 in response to the code of the digital RF signal gain control signal of 9 bits in total by the control unit (114) is 0. As shown by the characteristic L3 in FIG. It will change in 25 dB steps. As a result, the adjacent channel power ratio (ACPR) indicating the distortion characteristic of the transmission signal of the DUC transmitter can be set to a sufficiently low value.

≪DUC transmitter total gain error≫
As described at the beginning, in the 3GPP standard, it is necessary to suppress an error in transmission power within a range of −0.5 dB to +0.5 dB.

  FIG. 2 is a diagram illustrating a transmission power error characteristic of the DUC transmitter according to the embodiment of the present invention described in FIG. 1, FIG. 3, FIG. 4, and FIG.

The horizontal axis in FIG. 2 indicates the total transmission gain of the DUC transmitter having a total of 512 steps controlled by the digital RF signal gain control signal of 9 bits in total, and the vertical axis in FIG. 2 indicates the error in transmission power. It can be understood that the transmission power error is substantially suppressed in the range of −0.5 dB to +0.5 dB so as to satisfy the specifications L _2H and L _2L of the 3GPP standard.

《Dual mode RFIC》
FIG. 6 is a diagram showing a configuration of a dual mode RFIC 10 that supports both the GSM communication system and the WCDMA communication system according to a specific embodiment of the present invention.

  The RFIC 10 shown in FIG. 6 includes a WCDMA reception block 101, a GSM reception block 102, a first local signal generation block 103, and a GSM / WCDMA / baseband reception processing block 104. The RFIC 10 includes a GSM transmission block 105, a second local signal generation block 106, a WCDMA transmission block 107, and a GSM / WCDMA / baseband transmission processing block 108.

  The RFIC 10 of FIG. 6 is supplied with RF reception signals of the WCDMA communication system and the GSM communication system from the antenna 14 of the mobile phone terminal via the front end module 13. The GSM transmission signal and the WCDMA transmission signal formed from the RFIC 10 in FIG. 6 are supplied to the antenna 14 of the mobile phone terminal via the GSM / RF power amplifier module 11, the WCDMA / RF power amplifier module 12, and the front end module 13. .

<< Reception of WCDMA >>
A WCDMA reception signal of band 1 (2110 to 2170 MHz) received by the antenna 14 of the mobile phone terminal is first supplied to the antenna switch 1300 of the front end module 13. Thereafter, the WCDMA reception signal of band 1 is supplied to the low noise amplifier 1010 for band 1 of the WCDMA reception block 101 of the RFIC 10 via the duplexer 1301 for band 1 and the matching circuit 1308. The band 1 WCDMA reception signal amplified by the low noise amplifier 1010 is supplied to the first reception mixer 1013 via the band pass filter 151 for band 1. The first reception mixer 1013 is supplied with the band 1 reception local signal (2110 to 2170 MHz) generated from the first local signal generation block 103. Accordingly, the first reception mixer 1013 performs direct down conversion (DDC) of the band 1 WCDMA reception amplification signal. Band 1 WCDMA reception analog baseband signals I and Q formed by DDC are passed through variable gain amplifiers 1041_I, Q, 1043_I, Q, 1045_I, Q, low-pass filters 1042_I, Q, 1044_I, Q, 1046_I, Q. The A / D converters 1047_I and Q are supplied. The band 1 WCDMA reception digital baseband signals RxDB_I and RxDB_Q converted from the A / D converters 1047_I and Q are supplied to a baseband signal processing unit (not shown) formed of another LSI.

  A band 9 (1749.9 to 1879.9 MHz) WCDMA reception signal received by the antenna 14 is first supplied to the antenna switch 1300 of the front end module 13. Thereafter, the WCDMA reception signal of the band 9 is supplied to the low noise amplifier 1011 for the band 9 of the WCDMA reception block 101 of the RFIC 10 via the duplexer 1302 for the band 9 of the front end module 13 and the matching circuit 1309. The The band 9 WCDMA reception signal amplified by the low noise amplifier 1011 is supplied to the second reception mixer 1014 via the band pass filter 152 for the band 9. The second reception mixer 1014 is supplied with the band 9 reception local signal (1749.9 to 1879.9 MHz) generated from the first local signal generation block 103. Accordingly, the second reception mixer 1014 performs direct down conversion (DDC) of the band 9 WCDMA reception amplification signal. Band 9 WCDMA reception analog baseband signals I and Q formed by DDC are passed through variable gain amplifiers 1041_I, Q, 1043_I, Q, 1045_I, Q, low-pass filters 1042_I, Q, 1044_I, Q, 1046_I, Q. The A / D converters 1047_I and Q are supplied. The band 9 WCDMA received digital baseband signals RxDB_I and RxDB_Q converted from the A / D converters 1047_I and Q are supplied to a baseband signal processing unit (not shown) formed of another LSI.

  The WCDMA reception signal of band 6 (875 to 885 MHz) received by the antenna 14 is first supplied to the antenna switch 1300 of the front end module 13. Thereafter, the WCDMA reception signal of band 6 is supplied to the low noise amplifier 1012 for band 1 of the WCDMA reception block 101 of the RFIC 10 via the duplexer 1303 for band 6 of the front end module 13 and the matching circuit 1310. The The band 6 WCDMA reception signal amplified by the low noise amplifier 1012 is supplied to the third reception mixer 1015 via the band pass filter 153 for band 6. The third reception mixer 1015 is supplied with the band 6 reception local signal (875 to 885 MHz) generated from the first local signal generation block 103. Therefore, the third reception mixer 1015 performs direct down conversion (DDC) of the band 6 WCDMA reception amplification signal. Band 6 WCDMA reception analog baseband signals I and Q formed by DDC are passed through variable gain amplifiers 1041_I, Q, 1043_I, Q, 1045_I, Q, low-pass filters 1042_I, Q, 1044_I, Q, 1046_I, Q. The A / D converters 1047_I and Q are supplied. The band 6 WCDMA reception digital baseband signals RxDB_I and RxDB_Q converted from the A / D converters 1047_I and Q are supplied to a baseband signal processing unit (not shown) formed of another LSI.

<< Reception of GSM >>
A reception signal of DCS 1800 (1805 to 1850 MHz) received by the antenna 14 of the mobile phone terminal is first supplied to the antenna switch 1300 of the front end module 13. Thereafter, the received signal of DCS 1800 is supplied to low noise amplifier 1020 for DCS 1800 of GSM receiving block 102 of RFIC 10 via surface acoustic wave filter 1304 and matching circuit 1311. The DCS 1800 reception signal amplified by the low noise amplifier 1020 is supplied to the fourth reception mixer 1024. The fourth reception mixer 1024 is supplied with the DCS 1800 reception local signal (1805 to 1850 MHz) generated from the first local signal generation block 103. Accordingly, the fourth reception mixer 1024 performs direct down conversion (DDC) of the received signal of the DCS 1800. Received analog baseband signals I and Q of DCS 1800 of band 6 formed by DDC are passed through variable gain amplifiers 1041_I, Q, 1043_I, Q, 1045_I, Q, low-pass filters 1042_I, Q, 1044_I, Q, 1046_I, Q And supplied to the A / D converters 1047_I and Q. The received digital baseband signals RxDB_I and RxDB_Q of the DCS 1800 converted from the A / D converters 1047_I and Q are supplied to a baseband signal processing unit (not shown) composed of another LSI.

  A reception signal of PCS 1900 (1930 to 1990 MHz) received by the antenna 14 of the mobile phone terminal is first supplied to the antenna switch 1300 of the front end module 13. Thereafter, the reception signal of the PCS 1900 is supplied to the low noise amplifier 1021 for the PCS 1900 of the GSM reception block 102 of the RFIC 10 via the surface acoustic wave filter 1305 and the matching circuit 1312. The PCS 1900 reception signal amplified by the low noise amplifier 1021 is supplied to the fourth reception mixer 1024. The fourth reception mixer 1024 is supplied with a PCS 1900 reception local signal (1930 to 1990 MHz) generated from the first local signal generation block 103. Accordingly, the fourth reception mixer 1024 performs direct down conversion (DDC) of the PCS 1900 reception signal. The received analog baseband signals I and Q of the PCS 1900 formed by the DDC are converted to A / V via the variable gain amplifiers 1041_I, Q, 1043_I, Q, 1045_I, Q, low-pass filters 1042_I, Q, 1044_I, Q, 1046_I, Q. The D converters 1047_I and Q are supplied. The received digital baseband signals RxDB_I and RxDB_Q of the PCS 1900 converted from the A / D converters 1047_I and Q are supplied to a baseband signal processing unit (not shown) composed of another LSI.

  A GSM850 (869 to 894 MHz) reception signal received by the antenna 14 of the mobile phone terminal is first supplied to the antenna switch 1300 of the front end module 13. Thereafter, the received signal of GSM850 is supplied to low noise amplifier 1022 for GSM850 of GSM receiving block 102 of RFIC 10 via surface acoustic wave filter 1306 and matching circuit 1313. The GSM850 reception signal amplified by the low noise amplifier 1022 is supplied to the fifth reception mixer 1025. The fifth reception mixer 1025 is supplied with a GSM850 reception local signal (869 to 894 MHz) generated from the first local signal generation block 103. Therefore, the fifth reception mixer 1025 performs direct down conversion (DDC) of the GSM850 received signal. The received analog baseband signals I and Q of the GSM850 formed by the DDC are converted to A / V via the variable gain amplifiers 1041_I, Q, 1043_I, Q, 1045_I, Q, and the low-pass filters 1042_I, Q, 1044_I, Q, 1046_I, Q. The D converters 1047_I and Q are supplied. The GSM850 received digital baseband signals RxDB_I and RxDB_Q converted from the A / D converters 1047_I and Q are supplied to a baseband signal processing unit (not shown) formed of another LSI.

  A reception signal of EGSM (GSM 900: 925 to 950 MHz) received by the antenna 14 of the mobile phone terminal is first supplied to the antenna switch 1300 of the front end module 13. Thereafter, the EGSM reception signal is supplied to the low noise amplifier 1023 for EGSM of the GSM reception block 102 of the RFIC 10 via the surface acoustic wave filter 1307 and the matching circuit 1314. The EGSM reception signal amplified by the low noise amplifier 1023 is supplied to the fifth reception mixer 1025. The fifth reception mixer 1025 is supplied with an EGSM reception local signal (925 to 950 MHz) generated from the first local signal generation block 103. Accordingly, the fifth reception mixer 1025 performs direct down conversion (DDC) of the received signal of EGSM. The received analog baseband signals I and Q of the EGSM formed by the DDC are converted to A / V via the variable gain amplifiers 1041_I, Q, 1043_I, Q, 1045_I, Q, and the low-pass filters 1042_I, Q, 1044_I, Q, 1046_I, Q. The D converters 1047_I and Q are supplied. The EGSM received digital baseband signals RxDB_I and RxDB_Q converted from the A / D converters 1047_I and Q are supplied to a baseband signal processing unit (not shown) constituted by another LSI.

《GSM transmission》
The transmission digital baseband signals TxDB_I and TxDB_Q of EGSM and GSM850 supplied from the baseband signal processing unit (not shown) to the RFIC 10 are converted by D / A converters 1081 and 1082 of the GSM / WCDMA / baseband transmission processing block 108. It is converted into a transmission analog baseband signal.

  DCS 1800 and PCS 1900 transmission digital baseband signals TxDB_I and TxDB_Q supplied to the RFIC 10 from a baseband signal processing unit (not shown) are also converted by the D / A converters 1081 and 1082 of the GSM / WCDMA baseband transmission processing block 108. It can be converted to a transmitted analog baseband signal.

  The transmission analog baseband signal of EGSM and GSM850 or the transmission analog baseband signal of DCS 1800 and PCS 1900 is supplied to mixer 1050 of GSM transmission block 105. The GSM transmission block 105 is configured by an offset PLL circuit format, and an IF mixer 1050 is supplied with an intermediate frequency local signal of approximately 80 MHz generated from the frequency divider 1034 of the first local signal generation block 103. Accordingly, the transmission IF signal generated from the IF mixer 1050 is supplied to one input terminal of the phase comparator 1052 via the low-pass filter 1051. The output of the phase comparator 1052 is supplied to the transmission voltage controlled oscillator 1054 through the low pass filter 1053. Since the outputs of the frequency dividers 1055 and 1056 connected to the output of the transmission voltage controlled oscillator 1054 are supplied to the other input terminal of the phase comparator 1052 via the feedback circuit 1057, they are generated from the transmission voltage controlled oscillator 1054. The phase of the RF transmission signal matches the phase of the transmission IF signal generated from the F mixer 1050. Therefore, in GSM communication of any one of EGSM, GSM850, DCS1800, and PCS1900, the RF transmission signal generated from the transmission voltage controlled oscillator 1054 includes accurate phase information by phase modulation of the transmission analog baseband signal.

  When any one of the EGSM, GSM850, DCS1800, and PCS1900 GSM communication includes phase information by phase modulation and amplitude information by amplitude modulation, the amplitude information of the transmission IF signal generated from the IF mixer 1050 is low-pass. The signal is supplied to one input terminal of the feedforward circuit 1058 through the filter 1051.

  A part of the RF transmission amplification signal of the first RF power amplifier 111 that amplifies the EGSM and GSM850 RF transmission signals is supplied to the other input terminal of the feedforward circuit 1058 via the first power coupler and the feedback circuit 1057. . The output signal of the feedforward circuit 1058 is supplied to the transmission power control circuit 110 of the GSM / RF power amplifier module 11 via the control circuit 1059. Control circuit 1059 so that the amplitude information of the transmission IF signal supplied to one input terminal and the other input terminal of feedforward circuit 1058 matches a part of the RF transmission amplification signal of first RF power amplifier 111. The transmission power control circuit 110 controls the amplification gain of the first RF power amplifier 111. Part of the RF transmission amplified signal of the second RF power amplifier 112 that amplifies the DCS 1800 and PCS 1900 RF transmission signals is supplied to the other input terminal of the feedforward circuit 1058 via the second power coupler and the feedback circuit 1057. . The output signal of the feedforward circuit 1058 is supplied to the transmission power control circuit 110 of the GSM / RF power amplifier module 11 via the control circuit 1059. The control circuit 1059 so that the amplitude information of the transmission IF signal supplied to one input terminal and the other input terminal of the feedforward circuit 1058 coincides with a part of the RF transmission amplification signal of the second RF power amplifier 112. The transmission power control circuit 110 controls the amplification gain of the second RF power amplifier 112. Therefore, when any one of the EGSM, GSM850, DCS1800, and PCS1900 GSM communications includes phase information based on phase modulation and amplitude information based on amplitude modulation, the RF transmission signal generated from the transmission voltage controlled oscillator 1054 is It includes accurate phase information by phase modulation of the transmission analog baseband signal and accurate amplitude information by amplitude modulation.

  The transmission power control circuit 110 controls the power supply voltage level supplied to the first and second RF power amplifiers 111 and 112 in response to the output level of the control circuit 1059 of the GSM transmission block 105 of the offset PLL. In addition, the amplification gain of the second RF power amplifiers 111 and 112 is controlled.

  The frequency of the RF transmission signal of EGSM is set to 889 to 915 MHz, and the frequency of the RF transmission signal of GSM850 is set to 824 to 849 MHz. Further, the frequency of the RF transmission signal of DCS 1800 is set to 1710 to 1785 MHz, and the frequency of the RF transmission signal of PCS 1900 is set to 1850 to 1910 MHz.

<< Transmission of WCDMA >>
The transmission digital baseband signals TxDB_I and TxDB_Q of the WCDMA band 1 or 6 or 9 supplied from the baseband signal processing unit (not shown) to the RFIC 10 are the D / D of the GSM / WCDMA baseband transmission processing block 108. The A converters 1081 and 1082 are supplied. The WCDMA band 1, band 6, or band 9 transmission analog baseband signal converted by the D / A converters 1081 and 1082 is supplied to the multiplexer 1082.

  The WCDMA band 6 transmission analog baseband signal is supplied from the multiplexer 1082 to the first transmission mixer 1073 via the low-pass filter 1070 and the other multiplexer 1072. The first transmission mixer 1073 is supplied with the band 6 transmission local signal (830 to 840 MHz) generated from the second local signal generation block 106. Accordingly, the first transmission mixer 1073 performs direct up-conversion (DUC) of the band 6 WCDMA transmission analog baseband signal. The band 6 WCDMA / RF transmission signal formed by DUC and set to a frequency of 830 to 840 MHz is supplied to the WCDMA / RF power amplifier module 12 via the variable gain amplifier 1075 and the driver amplifier 1077. In the WCDMA RF power amplifier module 12, the band 6 WCDMA RF transmission signal is amplified by the RF power amplifier 1220 through the surface acoustic wave bandpass filter 1210 for the band 6. The band 6 WCDMA / RF transmission amplification signal from the RF power amplifier 1220 is supplied to the antenna 14 of the mobile phone terminal via the band 6 isolator 1317, duplexer 1303, and antenna switch 1300.

  In the RFIC shown in FIG. 6, the low pass filter 1070 includes the I and Q baseband variable gain amplifiers (108_I, Q) shown in FIGS. 1 and 3, and the baseband variable gain amplifiers (108_I, The gain of Q) is controlled by the low-order 2-bit digital RF signal gain control signal of the control unit 114 as in FIG.

  In the RFIC shown in FIG. 6, the variable gain amplifier 1075 is composed of the high frequency signal variable gain amplifier (111) shown in FIGS. 1 and 4, and the gain of the high frequency signal variable gain amplifier (111) is the same as in FIG. It is controlled by the analog output signal of the D / A converter (115) which responds to the upper 7 bits digital RF signal gain control signal from the control unit (114).

  Therefore, in the RFIC WCDMA band 6 transmission operation shown in FIG. 6, the I and Q baseband variable gain amplifiers, the first transmission mixer 1073, and the variable gain amplifier 1075 inside the low pass filter 1070 are shown in FIG. The I and Q baseband variable gain amplifiers (108_I, Q), the transmission mixer (109_I, Q), and the high frequency signal variable gain amplifier (111) shown in FIG.

  The transmission analog baseband signal of WCDMA band 9 is supplied from the multiplexer 1082 to the second transmission mixer 1074 via the other low-pass filter 1071 and the other multiplexer 1072. The second transmission mixer 1074 is supplied with a band 9 transmission local signal (1749.9 to 1784.9 MHz) generated from the second local signal generation block 106. Accordingly, the second transmission mixer 1074 performs direct up-conversion (DUC) of the band 9 WCDMA transmission analog baseband signal. The band 9 WCDMA / RF transmission signal formed by DUC and set to a frequency of 1749.9 to 1784.9 MHz is supplied to the WCDMA / RF power amplifier module 12 via the variable gain amplifier 1076 and the driver amplifier 1078. . In the WCDMA / RF power amplifier module 12, the band 9 WCDMA / RF transmission signal is amplified by the RF power amplifier 1221 through the surface acoustic wave bandpass filter 1211 for the band 9. The band 9 WCDMA / RF transmission amplification signal from the RF power amplifier 1221 is supplied to the antenna 14 of the mobile phone terminal via the isolator 1318, the duplexer 1302, and the antenna switch 1300 for the band 9.

  In the RFIC shown in FIG. 6, the low-pass filter 1071 includes the I and Q baseband variable gain amplifiers (108_I, Q) shown in FIGS. 1 and 3, and the baseband variable gain amplifiers (108_I, The gain of Q) is controlled by the low-order 2-bit digital RF signal gain control signal of the control unit 114 as in FIG.

  In the RFIC shown in FIG. 6, the variable gain amplifier 1076 is composed of the high frequency signal variable gain amplifier (111) shown in FIGS. 1 and 4, and the gain of the high frequency signal variable gain amplifier (111) is the same as in FIG. It is controlled by the analog output signal of the D / A converter (115) which responds to the upper 7 bits digital RF signal gain control signal from the control unit (114).

  Accordingly, in the transmission operation of the RFIC WCDMA band 9 shown in FIG. 6, the I and Q baseband variable gain amplifiers, the second transmission mixer 1074, and the variable gain amplifier 1076 inside the low-pass filter 1071 are shown in FIG. The I and Q baseband variable gain amplifiers (108_I, Q), the transmission mixer (109_I, Q), and the high frequency signal variable gain amplifier (111) shown in FIG.

  The WCDMA band 1 transmission analog baseband signal is supplied from the multiplexer 1082 to the second transmission mixer 1074 via the other low-pass filter 1071 and the other multiplexer 1072. The second transmission mixer 1074 is supplied with the band 1 transmission local signal (1920 to 1980 MHz) generated from the second local signal generation block 106. Accordingly, the second transmission mixer 1074 performs direct up-conversion (DUC) of the band 1 WCDMA transmission analog baseband signal. The band 1 WCDMA / RF transmission signal formed by DUC and having a frequency set to 1920 to 1980 MHz is supplied to the WCDMA / RF power amplifier module 12 via the variable gain amplifier 1076 and the driver amplifier 1079. In the WCDMA RF power amplifier module 12, the band 1 WCDMA RF transmission signal is amplified by the RF power amplifier 1222 through the surface acoustic wave bandpass filter 1212 for band 1. The band 1 WCDMA / RF transmission amplification signal from the RF power amplifier 1222 is supplied to the antenna 14 of the mobile phone terminal via the band 1 isolator 1319, duplexer 1301, and antenna switch 1300.

  Accordingly, even in the RFIC WCDMA band 1 transmission operation shown in FIG. 6, the I and Q baseband variable gain amplifiers, the second transmission mixer 1074, and the variable gain amplifier 1076 inside the low-pass filter 1071 are shown in FIG. The I and Q baseband variable gain amplifiers (108_I, Q), the transmission mixer (109_I, Q), and the high frequency signal variable gain amplifier (111) shown in FIG.

  Although the invention made by the present inventor has been specifically described based on the embodiments, it is needless to say that the present invention is not limited thereto and can be variously modified without departing from the gist thereof.

  For example, the direct up-conversion transmitter of the present invention is not limited to being mounted on a mobile phone, and can also be applied to a transmitter mounted on a wireless LAN terminal, for example.

  Further, the RFIC and the baseband LSI can be integrated on an integrated one chip.

FIG. 1 is a diagram showing a configuration of a direct up-conversion transmitter having a WCDMA transmission function according to an embodiment of the present invention. FIG. 2 is a diagram illustrating a transmission power error characteristic of the DUC transmitter according to the embodiment of the present invention described in FIG. 1, FIG. 3, FIG. 4, and FIG. FIG. 3 is a diagram showing the configuration of the RFIC I-system and Q-system baseband signal variable gain amplifiers of the DUC transmitter shown in FIG. FIG. 4 is a diagram showing the configuration of the RFIC high frequency signal variable gain amplifier of the DUC transmitter shown in FIG. FIG. 5 shows the change of the digital RF signal gain control signal in which the total gain of the baseband signal variable gain amplifier and the high frequency signal variable gain amplifier of the I system and Q system of the DUC transmitter shown in FIG. It is a figure which shows a mode that it changes. FIG. 6 is a diagram showing a configuration of a dual mode RFIC 10 that supports both the GSM communication system and the WCDMA communication system according to a specific embodiment of the present invention.

Explanation of symbols

100 RFIC
101 Baseband LSI
DESCRIPTION OF SYMBOLS 102 SAW filter 103 RF power amplifier 104 DC / DC converter 105 Duplexer 106 Antenna 107 Quadrature modulator 108_I I system baseband signal variable gain amplifier 108_Q Q system baseband signal variable gain amplifier 109_I I system transmission mixer 109_Q Q system transmission Mixer 110 Adder 112 Transmission voltage controlled oscillator 113 90 degree phase shifter 114 Control unit 115 D / A converter

Claims (12)

First baseband signal variable gain amplifier, second baseband signal variable gain amplifier, first transmission mixer, second transmission mixer, adder, high frequency signal variable gain amplifier, transmission voltage controlled oscillator, 90 degree phase shifter, control unit A D / A converter,
A pair of transmission baseband signals are supplied to an input terminal of the first baseband signal variable gain amplifier and an input terminal of the second baseband signal variable gain amplifier,
The first transmission local signal generated from the output of the transmission voltage controlled oscillator is supplied to the 90-degree phase shifter so that the 90-degree phase shifter has a phase difference of approximately 90 degrees from the first transmission local signal. A second transmit local signal is generated;
The first baseband amplified signal output from the first baseband signal variable gain amplifier is supplied to one input terminal of the first transmission mixer, and the first transmission local signal from the transmission voltage controlled oscillator is the first transmission signal. Supplied to the other input terminal of one transmission mixer,
The second baseband amplified signal output from the second baseband signal variable gain amplifier is supplied to one input terminal of the second transmission mixer, and the second transmission local signal from the 90-degree phase shifter is the second transmission signal. Supplied to the other input terminal of the transmission mixer,
An RF transmission signal is generated from the output of the adder by combining the first RF component of the output of the first transmission mixer and the second RF component of the output of the second transmission mixer by the adder,
The RF transmission signal at the output of the adder is amplified by the high frequency signal variable gain amplifier, thereby generating an RF transmission amplified signal from the output of the high frequency signal variable gain amplifier,
By supplying a digital control input signal to the control unit, a first baseband gain control signal and a second baseband gain control signal having a predetermined number of bits from the control unit, and a bit larger than the predetermined number of bits. An RF gain control signal having a number is generated;
The first and second baseband gain control signals generated from the control unit are supplied to the first and second baseband signal variable gain amplifiers, respectively, so that the first and second baseband gain signals are supplied. The gain of the signal variable gain amplifier can be set,
The RF gain control signal having the large number of bits generated from the control unit is supplied to the D / A converter, thereby generating an analog RF gain control signal from the D / A converter,
Direct up-conversion transmission in which the gain of the high-frequency signal variable gain amplifier can be set by supplying the analog RF gain control signal generated from the D / A converter to the high-frequency signal variable gain amplifier Machine.   The first and second baseband signal variable gain amplifiers each include a variable resistance circuit having a plurality of resistors and controlled by a baseband gain control signal having the predetermined number of bits. Direct up-conversion transmitter as described.   The direct up-conversion transmitter according to claim 2, wherein each of the first and second baseband signal variable gain amplifiers includes an amplifier connected to the variable resistance circuit.   4. The high frequency signal variable gain amplifier includes an amplification transistor, and a DC bias current of the amplification transistor is controlled by the analog RF gain control signal generated from the D / A converter. Direct up-conversion transmitter as described.   The direct up-conversion transmitter according to claim 4, wherein the RF transmission amplification signal generated from an output of the high-frequency signal variable gain amplifier is a transmission signal of a CDMA communication system.   The first and second baseband signal variable gain amplifiers, the first and second transmission mixers, the adder, the high frequency signal variable gain amplifier, the transmission voltage controlled oscillator, the 90 degree phase shifter, the control 8. The direct up-conversion transmitter according to claim 7, wherein the D / A converter is integrated in a semiconductor integrated circuit. First baseband signal variable gain amplifier, second baseband signal variable gain amplifier, first transmission mixer, second transmission mixer, adder, high frequency signal variable gain amplifier, transmission voltage controlled oscillator, 90 degree phase shifter, control unit , A method for operating a direct up-conversion transmitter equipped with a D / A converter,
A pair of transmission baseband signals are supplied to an input terminal of the first baseband signal variable gain amplifier and an input terminal of the second baseband signal variable gain amplifier,
The first transmission local signal generated from the output of the transmission voltage controlled oscillator is supplied to the 90-degree phase shifter so that the 90-degree phase shifter has a phase difference of approximately 90 degrees from the first transmission local signal. A second transmit local signal is generated;
The first baseband amplified signal output from the first baseband signal variable gain amplifier is supplied to one input terminal of the first transmission mixer, and the first transmission local signal from the transmission voltage controlled oscillator is the first transmission signal. Supplied to the other input terminal of one transmission mixer,
The second baseband amplified signal output from the second baseband signal variable gain amplifier is supplied to one input terminal of the second transmission mixer, and the second transmission local signal from the 90-degree phase shifter is the second transmission signal. Supplied to the other input terminal of the transmission mixer,
An RF transmission signal is generated from the output of the adder by combining the first RF component of the output of the first transmission mixer and the second RF component of the output of the second transmission mixer by the adder,
The RF transmission signal at the output of the adder is amplified by the high frequency signal variable gain amplifier, thereby generating an RF transmission amplified signal from the output of the high frequency signal variable gain amplifier,
By supplying a digital control input signal to the control unit, a first baseband gain control signal and a second baseband gain control signal having a predetermined number of bits from the control unit, and a bit larger than the predetermined number of bits. An RF gain control signal having a number is generated;
The first and second baseband gain control signals generated from the control unit are supplied to the first and second baseband signal variable gain amplifiers, respectively, so that the first and second baseband gain signals are supplied. The gain of the signal variable gain amplifier can be set,
The RF gain control signal having the large number of bits generated from the control unit is supplied to the D / A converter, thereby generating an analog RF gain control signal from the D / A converter,
Direct up-conversion transmission in which the gain of the high-frequency signal variable gain amplifier can be set by supplying the analog RF gain control signal generated from the D / A converter to the high-frequency signal variable gain amplifier How the machine works.   8. Each of the first and second baseband signal variable gain amplifiers includes a variable resistance circuit having a plurality of resistors and controlled by a baseband gain control signal having the predetermined number of bits. The operation method of the described direct up conversion transmitter.   9. The method of operating a direct up-conversion transmitter according to claim 8, wherein each of the first and second baseband signal variable gain amplifiers includes an amplifier connected to the variable resistance circuit.   10. The high frequency signal variable gain amplifier includes an amplification transistor, and a DC bias current of the amplification transistor is controlled by the analog RF gain control signal generated from the D / A converter. The operation method of the described direct up conversion transmitter.   The operation method of the direct up-conversion transmitter according to claim 10, wherein the RF transmission amplification signal generated from the output of the high-frequency signal variable gain amplifier is a transmission signal of a CDMA communication system.   The first and second baseband signal variable gain amplifiers, the first and second transmission mixers, the adder, the high frequency signal variable gain amplifier, the transmission voltage controlled oscillator, the 90 degree phase shifter, the control 12. The method of operating a direct up-conversion transmitter according to claim 11, wherein the D / A converter is integrated in a semiconductor integrated circuit.

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