JP2009538549A5 - - Google Patents

Download PDF

Info

Publication number
JP2009538549A5
JP2009538549A5 JP2009507984A JP2009507984A JP2009538549A5 JP 2009538549 A5 JP2009538549 A5 JP 2009538549A5 JP 2009507984 A JP2009507984 A JP 2009507984A JP 2009507984 A JP2009507984 A JP 2009507984A JP 2009538549 A5 JP2009538549 A5 JP 2009538549A5
Authority
JP
Japan
Prior art keywords
circuit
output
logic
elements
inverter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2009507984A
Other languages
English (en)
Japanese (ja)
Other versions
JP5158607B2 (ja
JP2009538549A (ja
Filing date
Publication date
Priority claimed from US11/740,180 external-priority patent/US7504851B2/en
Priority claimed from US11/740,168 external-priority patent/US7505304B2/en
Application filed filed Critical
Priority claimed from PCT/US2007/067622 external-priority patent/WO2007127917A2/en
Publication of JP2009538549A publication Critical patent/JP2009538549A/ja
Publication of JP2009538549A5 publication Critical patent/JP2009538549A5/ja
Application granted granted Critical
Publication of JP5158607B2 publication Critical patent/JP5158607B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

JP2009507984A 2006-04-27 2007-04-27 耐故障性非同期回路 Active JP5158607B2 (ja)

Applications Claiming Priority (11)

Application Number Priority Date Filing Date Title
US79612506P 2006-04-27 2006-04-27
US60/796,125 2006-04-27
US81733506P 2006-06-28 2006-06-28
US81750806P 2006-06-28 2006-06-28
US60/817,508 2006-06-28
US60/817,335 2006-06-28
US11/740,168 2007-04-25
US11/740,180 2007-04-25
US11/740,180 US7504851B2 (en) 2006-04-27 2007-04-25 Fault tolerant asynchronous circuits
US11/740,168 US7505304B2 (en) 2006-04-27 2007-04-25 Fault tolerant asynchronous circuits
PCT/US2007/067622 WO2007127917A2 (en) 2006-04-27 2007-04-27 Fault tolerant asynchronous circuits

Publications (3)

Publication Number Publication Date
JP2009538549A JP2009538549A (ja) 2009-11-05
JP2009538549A5 true JP2009538549A5 (enExample) 2010-06-17
JP5158607B2 JP5158607B2 (ja) 2013-03-06

Family

ID=38656414

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009507984A Active JP5158607B2 (ja) 2006-04-27 2007-04-27 耐故障性非同期回路

Country Status (4)

Country Link
EP (1) EP2020085B1 (enExample)
JP (1) JP5158607B2 (enExample)
KR (1) KR101060270B1 (enExample)
WO (1) WO2007127917A2 (enExample)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7505304B2 (en) 2006-04-27 2009-03-17 Achronix Semiconductor Corporation Fault tolerant asynchronous circuits
US7504851B2 (en) 2006-04-27 2009-03-17 Achronix Semiconductor Corporation Fault tolerant asynchronous circuits
WO2011155532A1 (ja) * 2010-06-11 2011-12-15 国立大学法人京都工芸繊維大学 フリップフロップ回路、半導体装置および電子機器
FR2998688B1 (fr) * 2012-11-29 2014-12-26 Electricite De France Procede de durcissement logique par partitionnement d'un circuit electronique
JP6310933B2 (ja) * 2013-10-16 2018-04-11 株式会社日立製作所 半導体装置
CN109991531B (zh) * 2019-03-28 2021-12-24 西北核技术研究所 低概率条件下大气中子单粒子效应截面测量方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4785204A (en) * 1985-06-21 1988-11-15 Mitsubishi Denki Kabushiki Kaisha Coincidence element and a data transmission path
JP4904154B2 (ja) * 2003-07-14 2012-03-28 フルクラム・マイクロシステムズ・インコーポレーテッド 非同期スタティックランダムアクセスメモリ
US7157934B2 (en) * 2003-08-19 2007-01-02 Cornell Research Foundation, Inc. Programmable asynchronous pipeline arrays
WO2006026676A2 (en) * 2004-08-30 2006-03-09 California Institute Of Technology Seu-tolerant qdi circuits
US7301362B2 (en) * 2005-03-14 2007-11-27 California Institute Of Technology Duplicated double checking production rule set for fault-tolerant electronics

Similar Documents

Publication Publication Date Title
US7504851B2 (en) Fault tolerant asynchronous circuits
US7505304B2 (en) Fault tolerant asynchronous circuits
Jha et al. Testing and reliable design of CMOS circuits
KR101918865B1 (ko) 감지 회로를 사용한 패리티 결정을 위한 장치들 및 방법들
JP4904154B2 (ja) 非同期スタティックランダムアクセスメモリ
JP2009538549A5 (enExample)
US9041429B2 (en) Sequential state elements for triple-mode redundant state machines, related methods, and systems
WO2015187771A2 (en) Apparatuses and methods for performing an exclusive or operation using sensing circuitry
Han et al. A fault-tolerant technique using quadded logic and quadded transistors
CN103413571B (zh) 存储器和利用该存储器实现检错纠错的方法
TW201406064A (zh) 用於絕緣層覆矽cmos技術之單一事件暫態及擾亂之緩解
Safarulla et al. Design of soft error tolerance technique for FPGA based soft core processors
KR101060270B1 (ko) 내고장성 비동기식 회로
Eftaxiopoulos et al. Low leakage radiation tolerant CAM/TCAM cell
US6516449B2 (en) Methodology to create integrated circuit designs by replication maintaining isomorphic input output and fault behavior
US10229748B1 (en) Memory interface latch with integrated write-through function
US9830978B2 (en) Write-tracking circuit for memory
CN204993301U (zh) 能够抵抗双节点翻转的时域加固锁存器
WO2006016403A1 (ja) 半導体記憶装置
CN113098449A (zh) 一种高鲁棒性的三节点翻转自恢复锁存器
US20190164623A1 (en) Memory interface latch with integrated write-through and fence functions
US7242633B1 (en) Memory device and method of transferring data in memory device
Abdel-Hafeez et al. A double data rate 8T-cell SRAM architecture for systems-on-chip
Ćirić et al. Partial error tolerance for bit-plane FIR filter architecture
Zandevakili et al. Memristor-Based hybrid fault tolerant structure with concurrent reconfigurability