JP2009512382A5 - - Google Patents

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Publication number
JP2009512382A5
JP2009512382A5 JP2008536072A JP2008536072A JP2009512382A5 JP 2009512382 A5 JP2009512382 A5 JP 2009512382A5 JP 2008536072 A JP2008536072 A JP 2008536072A JP 2008536072 A JP2008536072 A JP 2008536072A JP 2009512382 A5 JP2009512382 A5 JP 2009512382A5
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JP
Japan
Prior art keywords
circuit
radio frequency
clock signal
bus
emulation
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Application number
JP2008536072A
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English (en)
Japanese (ja)
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JP5123857B2 (ja
JP2009512382A (ja
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Priority claimed from FR0510590A external-priority patent/FR2892212A1/fr
Application filed filed Critical
Publication of JP2009512382A publication Critical patent/JP2009512382A/ja
Publication of JP2009512382A5 publication Critical patent/JP2009512382A5/ja
Application granted granted Critical
Publication of JP5123857B2 publication Critical patent/JP5123857B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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JP2008536072A 2005-10-17 2006-09-01 低電力消費量の受動的動作モードを有するnfc読み取り装置 Expired - Fee Related JP5123857B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
FR0510590 2005-10-17
FR0510590A FR2892212A1 (fr) 2005-10-17 2005-10-17 Lecteur nfc ayant un mode de fonctionnement passif a faible consommation electrique
PCT/FR2006/002013 WO2007045732A1 (fr) 2005-10-17 2006-09-01 Lecteur nfc ayant un mode de fonctionnement passif a faible consommation electrique

Publications (3)

Publication Number Publication Date
JP2009512382A JP2009512382A (ja) 2009-03-19
JP2009512382A5 true JP2009512382A5 (ru) 2012-05-10
JP5123857B2 JP5123857B2 (ja) 2013-01-23

Family

ID=36754085

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008536072A Expired - Fee Related JP5123857B2 (ja) 2005-10-17 2006-09-01 低電力消費量の受動的動作モードを有するnfc読み取り装置

Country Status (7)

Country Link
US (1) US7975921B2 (ru)
EP (1) EP1938242B1 (ru)
JP (1) JP5123857B2 (ru)
AT (1) ATE479156T1 (ru)
DE (1) DE602006016463D1 (ru)
FR (1) FR2892212A1 (ru)
WO (1) WO2007045732A1 (ru)

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