JP2009302140A - Silicon epitaxial wafer, and manufacturing method therefor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a wafer excelling in haze level, even if the tilt angle of a ä110} plane is small. <P>SOLUTION: This manufacturing method of a silicon epitaxial wafer includes processes of: using a ä110} plane as a principal surface, and growing an epitaxial layer on a silicon single-crystal substrate in which the off-angle of the ä110} plane is smaller than 1°; and treating a surface of the epitaxial layer by a warm ammonium fluoride at 30-90°C to allow a light point defect LPD to be measured without influence due to haze, wherein the haze level (measured in an sp2, DWO mode) of the surface of the epitaxial layer is ≤0.18 ppm. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a silicon epitaxial wafer and a method for manufacturing the same.

It is known that when a silicon wafer having a {110} plane as a main surface is used, the pMOS transistor has a higher carrier mobility than a wafer having a {100} plane as a main surface, so that the speed of the pMOS transistor can be increased.

On the other hand, an epitaxial wafer is used as a material for a high-performance device because an epitaxial layer has very few defects. For this reason, an epitaxial wafer having a {110} plane as a main surface is expected to exhibit excellent characteristics as a material for high-performance devices such as MPU.

However, in an epitaxial wafer having a {110} plane as a main surface, after the epitaxial growth, fogging called haze is likely to occur on the surface, and bright spot defects LPD (Light Point Defects) by a particle counter usually used in the industry. ) Measurement becomes difficult, and wafer quality cannot be guaranteed.

As a countermeasure, it is known that the haze level is lowered when epitaxial growth is performed on a silicon single crystal substrate having an off angle inclined by 0.5 degrees or more and 3 degrees or less in the <100> axis direction (Patent Document 1). ).

Japanese Patent Laid-Open No. 2005-39111

However, in this method, since the {110} plane is inclined, there is a concern that the carrier collides with the inclined lattice and the mobility of the carrier is lowered, and the haze level of the surface is not sufficient. There was a problem of being.

  The problem to be solved by the present invention is to provide a wafer having a good haze level even if the inclination angle of the {110} plane is small.

[1] A method for producing a silicon epitaxial wafer according to the first invention includes a step of growing an epitaxial layer on a silicon single crystal substrate having a {110} plane as a main plane and an off angle of the {110} plane of less than 1 degree;
The surface of the epitaxial layer is 30 ° C. to 90 ° C. so that the haze level (measured in SP2, DWO mode) of the epitaxial layer surface is 0.18 ppm or less and the bright spot defect LPD can be measured without the influence of haze. And a step of treating with a warm ammonium fluoride solution.

[2] A method for producing a silicon epitaxial wafer according to the second invention includes a step of growing an epitaxial layer on a silicon single crystal substrate having a {110} plane as a principal plane and an off angle of the {110} plane of less than 1 degree;
The surface of the epitaxial layer is heated to a temperature of 30 ° C. to 90 ° C. so that the mean square root RMS (measured in an area of 10 μm square by an atomic force microscope AFM) of the surface roughness of the epitaxial layer surface is 0.060 nm or less. And a step of treating with an ammonium fluoride solution.

[3] A silicon epitaxial wafer according to the third aspect of the present invention has an epitaxial layer grown on a silicon single crystal substrate having a {110} plane as a principal plane and an off angle of the {110} plane of less than 1 degree.
The epitaxial layer surface has a haze level (measured in SP2, DWO mode) of 0.18 ppm or less, and the surface of the epitaxial layer is heated to 30 ° C. to 90 ° C. so that the bright spot defect LPD can be measured without the influence of haze. It is characterized by being treated with an ammonium fluoride solution.

[4] The silicon epitaxial wafer according to the fourth aspect of the present invention has an epitaxial layer grown on a silicon single crystal substrate having a {110} plane as a principal plane and an off angle of the {110} plane of less than 1 degree.
The surface of the epitaxial layer is heated to a temperature of 30 ° C. to 90 ° C. so that the mean square root RMS (measured in a 10 μm square region by an atomic force microscope AFM) of the surface roughness of the epitaxial layer surface is 0.060 nm or less. It is characterized by being treated with an ammonium fluoride solution.

[5] A method for producing a silicon epitaxial wafer according to a fifth aspect of the present invention includes a step of growing an epitaxial layer on a silicon single crystal substrate having a {110} plane as a principal plane and an off angle of the {110} plane of less than 1 degree;
After oxidizing the surface of the epitaxial layer so that the haze level (measured in SP2, DWO mode) of the epitaxial layer surface is 0.18 ppm or less and the bright spot defect LPD can be measured without the influence of haze, the oxidation is performed. And a step of removing the membrane with hydrofluoric acid and hydrochloric acid.

[6] A method for producing a silicon epitaxial wafer according to a sixth aspect of the present invention includes a step of growing an epitaxial layer on a silicon single crystal substrate having a {110} plane as a main plane and an off angle of the {110} plane of less than 1 degree;
After oxidizing the surface of the epitaxial layer so that the mean square root RMS of the surface roughness of the epitaxial layer surface (measured in an area of 10 μm square by an atomic force microscope AFM) is 0.060 nm or less, the oxide film Removing with hydrofluoric acid and hydrochloric acid.

[7] A silicon epitaxial wafer according to the seventh aspect of the present invention, after growing an epitaxial layer on a silicon single crystal substrate having a {110} plane as a principal plane and an off-angle of the {110} plane being less than 1 degree,
After oxidizing the surface of the epitaxial layer so that the haze level (measured in SP2, DWO mode) of the epitaxial layer surface is 0.18 ppm or less and the bright spot defect LPD can be measured without the influence of haze, the oxidation is performed. The membrane is removed with hydrofluoric acid and hydrochloric acid.

[8] A silicon epitaxial wafer according to the eighth invention is obtained by growing an epitaxial layer on a silicon single crystal substrate having a {110} plane of the silicon single crystal as a main surface and an off angle of the {110} plane of less than 1 degree. ,
After oxidizing the surface of the epitaxial layer so that the mean square root RMS of the surface roughness of the epitaxial layer surface (measured in an area of 10 μm square by an atomic force microscope AFM) is 0.060 nm or less, the oxide film Is removed with hydrofluoric acid and hydrochloric acid.

[9] A method for producing a silicon epitaxial wafer according to the ninth invention includes a step of growing an epitaxial layer on a silicon single crystal substrate having a {110} plane as a principal plane and an off angle of the {110} plane of less than 1 degree;
The surface of the epitaxial layer is at a temperature exceeding 900 ° C. so that the haze level (measured in SP2, DWO mode) of the epitaxial layer surface is 0.18 ppm or less and the bright spot defect LPD can be measured without the influence of haze. And a heat treatment step.

[10] A method for producing a silicon epitaxial wafer according to a tenth aspect of the present invention includes a step of growing an epitaxial layer on a silicon single crystal substrate having a {110} plane as a principal plane and an off angle of the {110} plane of less than 1 degree;
The surface of the epitaxial layer is heat-treated at a temperature exceeding 900 ° C. so that the mean square root RMS (measured in an area of 10 μm square by an atomic force microscope AFM) of the surface roughness of the epitaxial layer is 0.060 nm or less. And a step of performing.

[11] A silicon epitaxial wafer according to an eleventh aspect of the present invention, after growing an epitaxial layer on a silicon single crystal substrate having a {110} plane as a principal plane and an off angle of the {110} plane of less than 1 degree,
The surface of the epitaxial layer is at a temperature exceeding 900 ° C. so that the haze level (measured in SP2, DWO mode) of the epitaxial layer surface is 0.18 ppm or less and the bright spot defect LPD can be measured without the influence of haze. It is characterized by heat treatment.

[12] A silicon epitaxial wafer according to a twelfth aspect of the present invention is obtained by growing an epitaxial layer on a silicon single crystal substrate having a {110} plane as a principal plane and an off-angle of the {110} plane being less than 1 degree.
The surface of the epitaxial layer is heat-treated at a temperature exceeding 900 ° C. so that the mean square root RMS (measured in an area of 10 μm square by an atomic force microscope AFM) of the surface roughness of the epitaxial layer is 0.060 nm or less. It is characterized by that.

  According to the present invention, a wafer having a small inclination angle of {110} plane and a good haze level can be obtained.

  Embodiments of the present invention will be described below.

<< First Embodiment >>
The objective of providing a wafer with a small {110} plane tilt angle and a better haze level than the prior art was realized by performing a warm ammonium fluoride solution treatment on the epitaxially grown wafer.

Example 1 :
A p-type silicon single crystal ingot having a main axis orientation of <110> and a diameter of 305 mm was manufactured by the CZ method. This ingot was notched after grinding the outer periphery to a diameter of 300 mm, and a plurality of blocks having an electric specific resistance of 5 to 10 mΩcm were cut out. Using this wire, using a wire saw, the inclination of the {110} plane is the three orientations <100>, <111>, <110> in Table 1, and off-angles of 0 to 10 degrees with respect to the respective inclination orientations. Sliced to be.

This wafer was processed in the order of chamfering, lapping, finishing chamfering, etching, double-side polishing, tape chamfering, edge mirror polishing, and single-side polishing of the surface to obtain a mirror-polished wafer. In addition, although description of the cleaning process between processes was abbreviate | omitted, it cleaned like the normal wafer processing process.

Thereafter, an epitaxial film having a thickness of 5 μm was grown using a single wafer type epitaxial furnace and treated with a warm ammonium fluoride solution at 30 ° C. to 90 ° C.

The obtained epitaxial wafer was subjected to DWO mode (Dark Field Wide Oblique mode: dark field, wide, oblique incidence) using a product name manufactured by KLA-Tencor Co., Ltd. Mode), the Haze level of the epitaxial layer surface was examined. Further, using AFM (atomic force microscope), the surface roughness was measured in a measurement range of 10 μm × 10 μm, and the RMS (Root Mean Square) of the surface roughness was calculated. The results are shown in Table 1.

本実施形態のシリコンエピタキシャルウェーハは、ＳＰ２，ＤＷＯモードで測定したヘイズレベルが良好で、４５ｎｍ以上の輝点欠陥ＬＰＤがヘイズの影響なく測定できるため、パーティクルカウンターによる本来のＬＰＤの測定が可能になり、ウェーハの品質管理が確実にできるようになる。

The silicon epitaxial wafer of this embodiment has a good haze level measured in the SP2 and DWO modes, and a bright spot defect LPD of 45 nm or more can be measured without the influence of haze, so that the original LPD can be measured by a particle counter. , Wafer quality control can be reliably performed.

In addition, the off-angle is small and the carrier mobility is good. Further, since a warm ammonium fluoride solution is used, a cleaning tank used in a normal process can be used.

<< Second Embodiment >>
For the purpose of providing a wafer having a small inclination angle of the {110} plane and a better haze level than the prior art, the wafer after epitaxial growth is oxidized, and the oxide film is HF: HCl = 1: 18-20. This was realized by removing with an acid having a mixing ratio of.

Example 2 :
A p-type silicon single crystal ingot having a main axis orientation of <110> and a diameter of 305 mm was manufactured by the CZ method. This ingot was notched after grinding the outer periphery to a diameter of 300 mm, and a plurality of blocks having an electric specific resistance of 5 to 10 mΩcm were cut out. Using this wire, using a wire saw, the inclination of the {110} plane has three orientations <100>, <111>, <110> in Table 2 and off-angles of 0 to 10 degrees with respect to the respective orientations. Sliced to be.

This wafer was processed in the order of chamfering, lapping, finishing chamfering, etching, double-side polishing, tape chamfering, edge mirror polishing, and single-side polishing of the surface to obtain a mirror-polished wafer. In addition, although description of the cleaning process between processes was abbreviate | omitted, it cleaned like the normal wafer processing process.

Thereafter, an epitaxial film having a thickness of 5 μm was grown using a single-wafer epitaxial furnace and oxidized, and the oxide film was removed with an acid having a mixing ratio of HF: HCl = 1: 18-20.

  The obtained epitaxial wafer was subjected to DWO mode (Dark Field Wide Oblique mode: dark field, wide, oblique incidence) using a product name manufactured by KLA-Tencor Co., Ltd. Mode), the Haze level of the epitaxial layer surface was examined. Further, using AFM (atomic force microscope), the surface roughness was measured in a measurement range of 10 μm × 10 μm, and the RMS (Root Mean Square) of the surface roughness was calculated. The results are shown in Table 2.

本実施形態のシリコンエピタキシャルウェーハは、ＳＰ２，ＤＷＯモードで測定したヘイズレベルが良好で、４５ｎｍ以上の輝点欠陥ＬＰＤがヘイズの影響なく測定できるため、パーティクルカウンターによる本来のＬＰＤの測定が可能になり、ウェーハの品質管理が確実にできるようになる。

The silicon epitaxial wafer of this embodiment has a good haze level measured in the SP2 and DWO modes, and a bright spot defect LPD of 45 nm or more can be measured without the influence of haze, so that the original LPD can be measured by a particle counter. , Wafer quality control can be reliably performed.

In addition, the off-angle is small and the carrier mobility is good. The oxide film may be any oxide film, such as ozone, or an oxidation furnace ordinarily used in a wafer process.

<< Third Embodiment >>
The object of providing a wafer having a small {110} plane inclination angle and a better haze level than the prior art has been realized by performing heat treatment on the epitaxially grown wafer.

Example 3 :
A p-type silicon single crystal ingot having a main axis orientation of <110> and a diameter of 305 mm was manufactured by the CZ method. This ingot was notched after grinding the outer periphery to a diameter of 300 mm, and a plurality of blocks having an electric specific resistance of 5 to 10 mΩcm were cut out. Using this block, a wire saw is used, and the inclination of the {110} plane is off with respect to the three orientations <100>, <111>, <110> in Table 1 of Example 1 described above and the respective orientations. The slice was sliced so that the angle was 0 to 10 degrees.

This wafer was processed in the order of chamfering, lapping, finishing chamfering, etching, double-side polishing, tape chamfering, edge mirror polishing, and single-side polishing of the surface to obtain a mirror-polished wafer. In addition, although description of the cleaning process between processes was abbreviate | omitted, it cleaned like the normal wafer processing process.

Thereafter, an epitaxial film having a thickness of 5 μm was grown using a single wafer epitaxial furnace, and heat treatment was performed at a temperature exceeding 900 ° C.

  The obtained epitaxial wafer was subjected to DWO mode (Dark Field Wide Oblique mode: dark field, wide, oblique incidence) using a product name manufactured by KLA-Tencor Co., Ltd. Mode), the Haze level of the epitaxial layer surface was examined. Further, using AFM (atomic force microscope), the surface roughness was measured in a measurement range of 10 μm × 10 μm, and the RMS (Root Mean Square) of the surface roughness was calculated. The result is shown in the upper part of FIG. In addition, the RMS of the surface roughness of the epitaxial wafer which did not perform the said heat processing as a comparative example is shown in the following figure.

The silicon epitaxial wafer of this embodiment has a good haze level measured in the SP2 and DWO modes, and a bright spot defect LPD of 45 nm or more can be measured without the influence of haze, so that the original LPD can be measured by a particle counter. , Wafer quality control can be reliably performed.

In addition, the off-angle is small and the carrier mobility is good.

Further, if the heat treatment is performed in a growth apparatus (reactor) after the epitaxial growth, it can be easily applied to the process. Further, since the surface heat treatment is performed, the heat treatment can also be performed by a method using an apparatus such as a flash lamp annealing FLA (FLASH LAMP ANNAL) or a laser spike annealing LSA (LASER SPIKE ENEAL) for heat treating the wafer surface.

It is a figure which shows the surface roughness of 3rd Embodiment which concerns on invention.

Claims (12)

A step of growing an epitaxial layer on a silicon single crystal substrate having a {110} plane as a principal plane and an off-angle of the {110} plane being less than 1 degree;
The surface of the epitaxial layer is 30 ° C. to 90 ° C. so that the haze level (measured in SP2, DWO mode) of the epitaxial layer surface is 0.18 ppm or less and the bright spot defect LPD can be measured without the influence of haze. And a step of treating with a warm ammonium fluoride solution. A step of growing an epitaxial layer on a silicon single crystal substrate having a {110} plane as a principal plane and an off-angle of the {110} plane being less than 1 degree;
The surface of the epitaxial layer is heated to a temperature of 30 ° C. to 90 ° C. so that the mean square root RMS (measured in an area of 10 μm square by an atomic force microscope AFM) of the surface roughness of the epitaxial layer surface is 0.060 nm or less. And a step of processing with an ammonium fluoride solution. After growing an epitaxial layer on a silicon single crystal substrate having a {110} plane as a principal plane and an off-angle of the {110} plane being less than 1 degree,
The epitaxial layer surface has a haze level (measured in SP2, DWO mode) of 0.18 ppm or less, and the surface of the epitaxial layer is heated to 30 ° C. to 90 ° C. so that the bright spot defect LPD can be measured without the influence of haze. A silicon epitaxial wafer characterized by being treated with an ammonium fluoride solution. After growing an epitaxial layer on a silicon single crystal substrate having a {110} plane as a principal plane and an off-angle of the {110} plane being less than 1 degree,
The surface of the epitaxial layer is heated to a temperature of 30 ° C. to 90 ° C. so that the mean square root RMS (measured in a 10 μm square region by an atomic force microscope AFM) of the surface roughness of the epitaxial layer surface is 0.060 nm or less. A silicon epitaxial wafer characterized by being treated with an ammonium fluoride solution. A step of growing an epitaxial layer on a silicon single crystal substrate having a {110} plane as a principal plane and an off-angle of the {110} plane being less than 1 degree;
After oxidizing the surface of the epitaxial layer so that the haze level (measured in SP2, DWO mode) of the epitaxial layer surface is 0.18 ppm or less and the bright spot defect LPD can be measured without the influence of haze, the oxidation is performed. And a step of removing the film with hydrofluoric acid and hydrochloric acid. A step of growing an epitaxial layer on a silicon single crystal substrate having a {110} plane as a principal plane and an off-angle of the {110} plane being less than 1 degree;
After oxidizing the surface of the epitaxial layer so that the mean square root RMS of the surface roughness of the epitaxial layer surface (measured in an area of 10 μm square by an atomic force microscope AFM) is 0.060 nm or less, the oxide film And a step of removing the substrate with hydrofluoric acid and hydrochloric acid. After growing an epitaxial layer on a silicon single crystal substrate having a {110} plane as a principal plane and an off-angle of the {110} plane being less than 1 degree,
After oxidizing the surface of the epitaxial layer so that the haze level (measured in SP2, DWO mode) of the epitaxial layer surface is 0.18 ppm or less and the bright spot defect LPD can be measured without the influence of haze, the oxidation is performed. A silicon epitaxial wafer characterized in that the film is removed with hydrofluoric acid and hydrochloric acid. After growing an epitaxial layer on a silicon single crystal substrate having a {110} plane as a principal plane and an off-angle of the {110} plane being less than 1 degree,
After oxidizing the surface of the epitaxial layer so that the mean square root RMS of the surface roughness of the epitaxial layer surface (measured in an area of 10 μm square by an atomic force microscope AFM) is 0.060 nm or less, the oxide film A silicon epitaxial wafer characterized in that is removed with hydrofluoric acid and hydrochloric acid. A step of growing an epitaxial layer on a silicon single crystal substrate having a {110} plane as a principal plane and an off-angle of the {110} plane being less than 1 degree;
The surface of the epitaxial layer is at a temperature exceeding 900 ° C. so that the haze level (measured in SP2, DWO mode) of the epitaxial layer surface is 0.18 ppm or less and the bright spot defect LPD can be measured without the influence of haze. And a step of heat-treating the silicon epitaxial wafer. A step of growing an epitaxial layer on a silicon single crystal substrate having a {110} plane as a principal plane and an off-angle of the {110} plane being less than 1 degree;
The surface of the epitaxial layer is heat-treated at a temperature exceeding 900 ° C. so that the mean square root RMS (measured in an area of 10 μm square by an atomic force microscope AFM) of the surface roughness of the epitaxial layer is 0.060 nm or less. A process for producing a silicon epitaxial wafer comprising the steps of: After growing an epitaxial layer on a silicon single crystal substrate having a {110} plane as a principal plane and an off-angle of the {110} plane being less than 1 degree,
The surface of the epitaxial layer is at a temperature exceeding 900 ° C. so that the haze level (measured in SP2, DWO mode) of the epitaxial layer surface is 0.18 ppm or less and the bright spot defect LPD can be measured without the influence of haze. A silicon epitaxial wafer characterized by heat treatment. After growing an epitaxial layer on a silicon single crystal substrate having a {110} plane as a principal plane and an off-angle of the {110} plane being less than 1 degree,
The surface of the epitaxial layer is heat-treated at a temperature exceeding 900 ° C. so that the mean square root RMS (measured in an area of 10 μm square by an atomic force microscope AFM) of the surface roughness of the epitaxial layer is 0.060 nm or less. A silicon epitaxial wafer characterized by that.

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