JP2012204369A - Manufacturing method for epitaxial wafer - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a method for manufacturing an epitaxial wafer having fewer particles attached on a surface of an epitaxial layer, having a flat chamfered shape, having an excellent oxygen precipitation characteristic and being suitable for an advanced CMOS stably and at low cost.SOLUTION: A method for manufacturing an epitaxial wafer by growing an epitaxial layer on a silicon single-crystal substrate includes: a step of growing the epitaxial layer on the silicon single-crystal substrate; a step of forming a protective oxide film on a surface of the epitaxial layer by holding the silicon single-crystal substrate on which the epitaxial layer has been grown at 650 to 800°C for an hour or more and then increasing the temperature at 850°C or more; a step of polishing a chamfered part of the silicon single-crystal substrate on which the protective oxide film has been formed; and a step of removing the protective oxide film and performing finishing washing.

Description

  The present invention relates to a method for manufacturing an epitaxial wafer, and more particularly, to a method for manufacturing an epitaxial wafer for a leading edge CMOS having excellent smoothness of a wafer peripheral chamfer and excellent gettering characteristics due to oxygen precipitation in a device process.

In the state-of-the-art semiconductor device manufacturing process, particle reduction is a major issue. Recently, epitaxial wafers are widely used in advanced CMOS.
In the production of epitaxial wafers, although the thickness of the epitaxial layer is reduced to maintain the flatness of the epitaxial wafer and to prevent the increase of particles, the thickness of the epitaxial layer is 3 μm, further 2 μm. If it is made thinner, the problem of out-diffusion of dopants and oxygen (out diffusion) occurs. For this reason, the thickness of the epitaxial layer is generally about 5 μm for the advanced CMOS.
However, when the epitaxial layer is thickened, the flatness deteriorates due to an increase in the epitaxial growth rate at the outer peripheral portion of the wafer, and the (311) facet growth occurring in the chamfered portion in the <110> direction causes local localization in the facet peripheral portion. There is a problem that sharp high-speed growth occurs and pointed parts appear.

In the manufacture of epitaxial wafers for leading-edge CMOS, the film thickness distribution and resistivity within the wafer can be precisely controlled, so that epitaxial growth is performed using a single wafer epitaxial apparatus. However, the deterioration of the shape of the outer peripheral portion of the wafer is still a problem because it is a problem rooted in the essence of crystal growth.
In single-wafer epitaxial equipment, it is necessary to increase the growth rate to minimize the decrease in productivity. On the other hand, as the diameter increases, the growth temperature has been lowered to suppress the occurrence of slip. Yes. As a result, the growth conditions are reaction-controlled, and facet growth is likely to occur.

In particular, for wafers with a diameter of 300 mm, mirroring of the front and back surfaces of the wafer is standard, so handling is mostly performed by gripping the outer periphery of the wafer, and the chamfered portion is smoothed to prevent chipping at the outer periphery. Is an even more important issue.
As the automation progresses, in the device process, as described above, there are more opportunities for the outer periphery of the wafer to come into contact with the jig, and it is known that the smoothness of the chamfered part is deeply related to dust generation in the process and device yield. Thus, for wafers with a diameter of 200 mm or more, it is standard to mirror the chamfered portion.

  Even if the wafer has a mirror-finished chamfered portion, if the epitaxial growth is performed, the smoothness of the chamfered portion is deteriorated. This is a serious problem particularly when epitaxial growth with a thickness of 40 μm or more and 50 μm or more is performed. In addition, even when an epitaxial layer having a thickness of 5 μm or less is grown, facet growth on the (311), (111), and (110) planes still occurs, and the abnormally grown pointed portion on the outer periphery of the facet tends to be a dust generation source. For this reason, measures such as setting the orientation of the notch to <100> may be taken.

  In recent years, an immersion exposure technique has been used in an advanced photolithography process. In this immersion exposure, it has also been known that a sharp point due to the (311) facet growth occurring in the outer periphery in the <110> direction has an adverse effect on liquid retention.

As a method for improving the shape of the chamfered portion of the epitaxial wafer, a method has been proposed in which the epitaxial layer and the chamfered portion are ground to adjust the shape after epitaxial growth (Patent Documents 1-3).
However, it is necessary to remove the strained layer generated during the processing of adjusting the shape by grinding by hydrofluoric acid-nitric acid etching. In this case, since a sharp step is formed at the boundary between the etching region and the masking region, a smooth chamfered shape cannot be finally obtained. Furthermore, there is a problem that scratches are generated on the surface of the epitaxial layer or particles are adhered during grinding or the like. For these reasons, until now, molding of a chamfered shape after epitaxial growth has not been performed even for an epitaxial wafer having a thickness of 40 μm or more.

Further, it is known that oxygen precipitation is less likely to occur in a wafer that has undergone epitaxial growth compared to a single crystal mirror wafer that has not undergone epitaxial growth. Even when a single crystal mirror surface wafer for producing an epitaxial wafer is manufactured by the CZ method, oxygen precipitation is insufficient in the wafer after the epitaxial growth, although a predetermined concentration of oxygen is dissolved in the crystal.
Therefore, various methods have been proposed to give the epitaxial wafer a gettering effect due to oxygen precipitation, but after the epitaxial growth, the surface state of the epitaxial wafer is deteriorated, etc., so that it has not been put into practical use.

  Thus, for various reasons in recent years, the epitaxial wafers widely used for the most advanced CMOS are items that cannot maintain the quality of the conventional mirror wafer, such as flatness of the epitaxial surface, few foreign matters, Items such as the smoothness of the chamfered portion or the gettering effect by oxygen precipitation remain as problems.

JP-A-6-112173 JP-A-3-295235 JP 2007-119300 A

  The present invention has been made in view of the above-mentioned problems, and has an epitaxial particle surface with few particles on the surface of the epitaxial layer, a smooth chamfered shape, and excellent oxygen precipitation characteristics. It is an object of the present invention to provide a method capable of manufacturing a wafer stably and at low cost.

  To achieve the above object, the present invention provides a method for producing an epitaxial wafer by growing an epitaxial layer on a silicon single crystal substrate, and the step of growing an epitaxial layer on the silicon single crystal substrate, Holding a silicon single crystal substrate on which an epitaxial layer has been grown at a temperature of 650 to 800 ° C. for 1 hour or more and then raising the temperature to a temperature of 850 ° C. or more to form a protective oxide film on the surface of the epitaxial layer; A method of manufacturing an epitaxial wafer, comprising: a step of polishing a chamfered portion of a silicon single crystal substrate on which the protective oxide film is formed; and a step of performing final cleaning after removing the protective oxide film I will provide a.

  As described above, by polishing the chamfered portion after epitaxial growth, a chamfered portion having a smooth and good shape can be efficiently obtained. When this chamfered portion is polished, since the epitaxial layer is protected by a protective oxide film formed in advance, generation of particles and scratches on the epitaxial layer can be prevented. Then, by forming the protective oxide film at the above temperature and time, the protective oxide film can be formed at a relatively low temperature, and the diffusion of the dopant from the substrate to the epitaxial layer can also be suppressed. The oxygen precipitation in the substrate can be promoted. As described above, an epitaxial wafer having a flat epitaxial layer with a good surface state, a smooth chamfered portion, and an enhanced gettering effect during the device process can be efficiently manufactured at low cost.

At this time, in the step of forming the protective oxide film, it is preferable to form the protective oxide film in an oxidizing atmosphere of steam, wet, or dry.
In such an oxidizing atmosphere, it is efficiently oxidized, a protective oxide film having a desired thickness can be formed in a short time, and dopant diffusion from the substrate being oxidized to the epitaxial layer can be further suppressed.

At this time, in the step of forming the protective oxide film, the protective oxide film is preferably formed to a thickness of 20 to 200 nm.
With such a thickness, the occurrence of scratches, particles, and contamination on the epitaxial layer can be reliably prevented when the chamfered portion is polished.

At this time, in the step of forming the protective oxide film, the diffusion coefficient D (T _EP ) and the growth time t _{EP at} the growth temperature T _EP (° C.) of the epitaxial layer and the protective oxide film forming temperature T _Ox ( C.) is set to oxidation conditions such that the diffusion coefficient D (T _Ox ) and the formation time t _Ox are √ (D (T _EP ) × t _EP )> 2 × √ (D (T _Ox ) × t _Ox ). The protective oxide film is preferably formed under the set oxidation conditions. Here, D (T) represents the diffusion coefficient (diffusion constant) of the dopant at the temperature T. Accordingly, D (T _EP ) represents the diffusion coefficient at the epitaxial growth temperature, and D (T _Ox ) represents the oxide film formation temperature. Represents the diffusion coefficient. Further, the growth time _tEP specifically represents the holding time at the epitaxial growth temperature, and the formation time _tOx specifically represents the holding time at the highest temperature in the heat treatment step.
Under such oxidation conditions, oxidation can be performed while suppressing diffusion of the dopant from the substrate to the epitaxial layer, and a high-quality epitaxial wafer having a good dopant distribution can be manufactured.

After the step of forming the protective oxide film, it is preferable to perform a step of forming a nitride film on the protective oxide film and then polishing the chamfered portion.
The nitride film is hard and can reliably prevent the occurrence of scratches, particles, and contamination on the surface of the epitaxial layer when the chamfered portion is polished.

It is preferable to polish the nitride film with an allowance of less than half of the formed thickness, and then polish the chamfered portion.
If the nitride film is polished with such allowance, protrusions and foreign matters on the surface of the epitaxial layer can be effectively removed.

After the step of forming the protective oxide film, the temperature is raised to a temperature of 1200 ° C. or higher with an RTA apparatus and held for 20 seconds or more, and then cooled to room temperature at a rate of 30 ° C./second or more. A polishing step is preferably performed.
By performing such RTA treatment, vacancies are injected into the substrate, and oxygen precipitation in device heat treatment or the like can be promoted. At this time, since a protective oxide film is formed, the surface state of the epitaxial layer Degradation does not occur.

After removing the protective oxide film, the epitaxial layer is preferably polished with a margin of 0.1 μm or less.
If the epitaxial layer is polished with the above allowance after removal of the protective oxide film, an epitaxial wafer having a good mirror surface with fewer particles can be produced.

  As described above, according to the present invention, an epitaxial wafer having an epitaxial layer with a smooth chamfered portion and a good surface state and an enhanced gettering effect in a device process is efficiently manufactured at low cost. be able to.

It is a flowchart which shows an example of the manufacturing method of the epitaxial wafer of this invention. It is the figure which observed the abnormal epitaxial growth part of the <110> direction of the chamfering part of the wafer of the crystal orientation <100> after epitaxial growth. It is a figure which shows the result of having measured the outer peripheral part of the wafer after epitaxial growth with the profiler in the Example. It is a figure which shows the result of having measured the wafer outer peripheral part after grinding | polishing of a chamfering part with the profiler in the Example. It is a measurement result of the BMD density after performing oxygen precipitation heat processing to the epitaxial wafer manufactured by the Example and the comparative example.

Hereinafter, the present invention will be described in detail as an example of an embodiment with reference to the drawings, but the present invention is not limited thereto.
FIG. 1 is a flowchart of the manufacturing method of the present invention.

In the present invention, first, a silicon single crystal substrate is prepared (FIG. 1A).
The silicon single crystal substrate to be prepared is not particularly limited. For example, after slicing a silicon single crystal rod grown by the Czochralski method, a wafer obtained by chamfering, lapping, etching, polishing, etc. can do. It should be noted that it may be a normal polished wafer that has been polished on one or both sides, or an etched wafer that has not been polished on either side. What kind of silicon single crystal substrate is used may be determined according to the standard.

Further, when an epitaxial wafer suitable for PMOS or IGBT is manufactured using a silicon single crystal substrate as a substrate having a resistivity of 20 mΩcm or less, particularly 10 mΩcm or less doped with a dopant at a high concentration, For the purpose of preventing auto-doping, it is preferable to form a back oxide film in advance. In this case, after an oxide film is formed on the surface (back surface) opposite to the side on which the epitaxial layer is grown by thermal oxidation, CVD, or the like, unnecessary portions can be removed by etching or the like.
On the other hand, this backside oxide film does not need to be formed when manufacturing a wafer in which the dopant concentrations of the substrate and the epitaxial layer are approximately equal.

Next, an epitaxial layer is grown on the silicon single crystal substrate using, for example, a radiant heating single-wafer epitaxial apparatus (FIG. 1B).
For example, the silicon source is trichlorosilane, the carrier gas is hydrogen, and pre-baking is performed at a temperature of about 1150 ° C., and finally the required in-plane variation of the required epitaxial layer thickness and in-plane variation of a predetermined resistivity are reduced. You can set the conditions to grow. The thickness for growing the epitaxial layer is not particularly limited. For example, in the case of a wafer for leading-edge CMOS, an epitaxial layer having a thickness of 5 μm or more is grown.

  FIG. 2 is a view of an abnormal epitaxial growth portion in the <110> direction of the chamfered portion of the crystal orientation <100> wafer after epitaxial growth (ORP). During epitaxial growth, facet growth occurs in a specific crystal orientation plane such as (311), (111), and (110) of the chamfered portion and its vicinity, and a pointed portion as shown in FIG. 2 is formed. . Such a part causes a minute chip or chipping generated in the chamfered part during the device manufacturing process. However, according to the present invention, the chamfering polishing in the subsequent process can efficiently smooth the part. It can be carried out.

Next, the silicon single crystal substrate on which the epitaxial layer is formed is put into, for example, a diffusion furnace (oxidation furnace), held in an oxidizing atmosphere at a temperature of 650 to 800 ° C. for 1 hour or more, and then heated to a temperature of 850 ° C. or more. Then, a protective oxide film is formed on the surface of the epitaxial layer (FIG. 1C).
With this protective oxide film, the surface of the epitaxial layer can be protected and the generation of scratches and particles can be prevented in the subsequent polishing of the chamfered portion. Further, by performing the two-stage heat treatment as described above, an oxide film can be efficiently formed at a relatively low temperature, so that diffusion of dopant from the substrate to the epitaxial layer can be prevented. Furthermore, by holding at a temperature of 650 to 800 ° C. for 1 hour or longer in the first stage, nucleation for oxygen precipitation can be performed, and oxygen precipitate formation during heat treatment in the device process can be promoted.

  Usually, in the manufacture of an epitaxial wafer, the atomic vacancy concentration of the substrate is reduced during epitaxial growth, so that oxygen precipitation is less likely to occur compared to a mirror wafer, and as a result, the gettering effect of the substrate is reduced. However, according to the present invention, the process for promoting the formation of oxygen precipitate nuclei can be performed simultaneously with the formation of the protective oxide film, and oxygen precipitates are formed more than the mirror surface wafer, so that an epitaxial wafer having high gettering ability can be efficiently produced. Can be manufactured. For this reason, if it is the epitaxial wafer manufactured by this invention, it can be used without a problem for the device kind which requires a gettering effect.

At this time, the diffusion coefficient D (T _EP ) and growth time t _{EP at} the growth temperature T _EP (° C.) of the epitaxial layer, and the diffusion coefficient D (T _Ox ) and formation at the formation temperature T _Ox (° C.) of the protective oxide film. The oxidation condition is set such that the time t _Ox is √ (D (T _EP ) × t _EP )> 2 × √ (D (T _Ox ) × t _Ox ), and the protective oxide film is formed under the set oxidation condition. It is preferable to form.
Thus, if √ (D (T) × t), which indicates a measure of the amount of dopant diffusion during heat treatment, is as described above, the dopant diffuses from the substrate to the epitaxial layer when the protective oxide film is formed. Therefore, it is possible to manufacture a high-quality epitaxial wafer without deteriorating element characteristics (leakage current and reverse breakdown voltage). For this reason, the above conditions are particularly suitable for the production of an epitaxial wafer using a low-resistance substrate doped with a dopant at a high concentration.

In addition, as an oxidation method, for example, it is possible to oxidize an oxide film at a relatively low temperature in a short time by oxidizing under conditions of any one of steam, wet O ₂ (oxygen containing water vapor, etc.) and dry O _2. Since it can form, it is preferable.
Further, by forming a protective oxide film having a thickness of 20 nm or more, particularly 30 nm or more, the purpose of preventing the generation of scratches and particles can be reliably achieved. The thickness of the protective oxide film is 200 nm or less, which is sufficient for preventing scratches and the like, and the above dopant diffusion can be suppressed.

Next, it is preferable to form a nitride film on the protective oxide film by, for example, CVD.
The formation of the nitride film is not essential, but it is preferably formed because the nitride film is hard and can improve the function as a protective film. If the thickness of the nitride film is 30 nm or more, scratches on the surface of the epitaxial layer and generation of particles can be reliably prevented.

Next, with an RTA (Rapid Thermal Annealing) device, for example, in a nitrogen atmosphere, the temperature is rapidly raised to a temperature of 1200 ° C. or higher and held for 20 seconds or more, and then cooled to room temperature at a rate of 30 ° C./second or higher. It is preferable to carry out (FIG. 1 (d)).
By performing such an RTA process, it is possible to increase the concentration of vacancies reduced during the epitaxial growth and further promote oxygen precipitation in the device process.

Further, when a nitride film is formed, it is preferable to polish with a machining allowance of less than half of the formed thickness.
By polishing the nitride film as a stopper in this way, it is possible to remove protrusions and foreign matters on the epitaxial layer while preventing scratches and the like.

Next, the chamfered portion is polished using, for example, an abrasive containing colloidal silica in an alkali-based aqueous solution or an abrasive containing cerium oxide (FIG. 1 (e)).
By polishing the chamfered portion, a portion that has abnormally grown during the epitaxial growth can be smoothed to obtain a chamfered portion having a desired shape with high accuracy. In this chamfered portion polishing, a sharp portion that is strongly pressed against the polishing pad is preferentially polished by using a polishing agent and polishing conditions in which the polishing rate ratio of the oxide film and silicon is close to 1.0. Can do. By smoothing the shape of the pointed portion by this polishing, it is possible to remarkably reduce the generation rate of chips and chips during wafer handling, thereby greatly improving the manufacturing yield of devices. At this time, since the epitaxial layer is protected by the protective oxide film, polishing can be performed while preventing generation of scratches, particles and contamination on the surface of the epitaxial layer.

  At this time, for example, it is possible to use a polishing machine for mirroring a chamfered part widely used in a mirror wafer having a diameter of 200 mm or 300 mm. In addition, in the chamfering part polishing machine, the wafer is rotated by adsorbing either the front surface or the back surface, but the thickness of the protective oxide film is as thick as the effect of this adsorption does not remain, The above thickness of 20 nm or more is preferable. In addition, the protective oxide film thickness is set to the minimum necessary thickness, and polishing is performed by setting the polishing agent and the polishing conditions so that the ratio of the polishing rate of the oxide film and silicon is close to 1.0. A more uniform and smooth shape can be obtained at the boundary with the oxide film.

Further, even in the chamfered portion on the back surface side, (111) facets may occur in the <110> direction during epitaxial growth. In addition, when using a boron-doped low-resistance substrate, etc., a backside oxide film is formed and the backside is sealed to suppress autodoping, but a backside crown occurs at the outer edge of this backside oxide film. Cheap. Such a crown can also be removed by polishing the chamfered portion in this step. However, since facet growth does not occur so significantly on the back surface side, the back surface side does not necessarily have to be polished when the back surface oxide film is not formed.
In this case, it is possible to grind the chamfered portion in advance, but in this case, the strained layer generated by grinding is removed by polishing.

Next, the protective oxide film is removed (FIG. 1 (f)).
At this time, the protective oxide film can be removed by etching with hydrofluoric acid, but two matters need to be taken into consideration.

One is well known that when etching an oxide film, foreign matter is likely to adhere, and the attached foreign matter is difficult to remove. This is also a problem of a hydrogen termination process called “HF last”. Therefore, it is preferable to remove the adhered particles in advance by thoroughly washing with an SC1 cleaning solution or the like before etching with hydrofluoric acid, or to etch with ammonium acid fluoride containing a surfactant.
The other is that, under polishing conditions where priority is given to shaping, minute distortions due to polishing and crushed layers (polishing latent scratches) remain. Since it is a chamfered part, it is not necessary to completely remove these latent scratches, but it may become a source of contamination, so in the cleaning before etching with hydrofluoric acid, the alkali concentration is increased to increase the etching amount of the latent scratches. It is preferable to remove the strained layer. At this time, even if alkali is strengthened, haze is not generated on the surface of the epitaxial layer because it is protected by the protective oxide film.

Next, for example, it is preferable to polish the epitaxial layer with an allowance of 0.1 μm or less with a polishing agent mainly composed of colloidal silica using a suede type polishing cloth (FIG. 1G).
When the protective oxide film is removed by etching, the mirror surface may become cloudy or countless fine particles may adhere. In such a case, it is possible to obtain an epitaxial wafer having a good mirror surface without any haze or haze by polishing under conditions that allow for polishing to be 0.1 μm or less. By adding such polishing to the final process, quality and cost can be stabilized. If an epitaxial layer with a thickness of 3 μm or more is formed in the previous process, even if such polishing is performed, since the allowance is 0.1 μm or less, the absolute value and variation of the thickness are hardly affected. Absent. In addition, when a double-sided polishing epitaxial substrate is used, this polishing may be performed simultaneously on both sides.

  Next, for example, as a final cleaning, cleaning with an ammonia-hydrogen peroxide solution (SC1 cleaning solution), and further cleaning with a hydrochloric acid-hydrogen peroxide solution (SC2 cleaning solution) eliminates metal ion contamination and causes extremely high particle adhesion. An epitaxial wafer having a small and good surface quality can be obtained (FIG. 1 (h)).

EXAMPLES Hereinafter, although an Example and a comparative example are shown and this invention is demonstrated more concretely, this invention is not limited to these.
(Example)
As a substrate for epitaxial growth, a P-type wafer having a diameter of 200 mm, a crystal orientation <100>, and a resistivity of 20 mΩcm prepared by the CZ method was prepared.
On this substrate, an epitaxial layer having a thickness of 6 μm was grown at a growth rate of 4.0 μm / min using SiHCl ₃ as a source gas by a single-wafer epitaxial growth apparatus (manufactured by AMAT Centura). The growth temperature was 1150 ° C.
The shape of the chamfered portion after epitaxial growth was examined using a profiler. The result is shown in FIG. FIG. 3 shows a cross-sectional shape of the position of the outer peripheral portion in the <110> direction. As shown in FIG. 3, it can be seen that a crown having a height of about 5 to 10% of the thickness of the epitaxial layer grows on the chamfered portion with reference to the epitaxial layer surface of the main surface portion of the wafer.

Next, the epitaxial wafer was held in a diffusion furnace in an oxygen atmosphere at 700 ° C. for 1 hour, and then thermally oxidized at 1000 ° C. to form a protective oxide film having a thickness of 0.1 μm.
Next, after holding at 1200 ° C. for 30 seconds with an RTA apparatus, cooling was performed at 50 ° C./second to perform RTA treatment.

Next, with a mirror chamfering device, the chamfered portion was polished with an abrasive containing cerium oxide, and the chamfered portion was made into a mirror surface state. At this time, the epitaxial surface was polished from an angle of 5 degrees or less with respect to the polishing cloth so that the (311) facet could be smoothed.
The shape of the chamfered portion of the epitaxial wafer after chamfering was examined using a profiler. The result is shown in FIG. FIG. 4 shows a cross-sectional shape of the position of the outer peripheral portion in the <110> direction. As shown in FIG. 4, by chamfering the chamfered portion, the height of the crown is lowered and the shape is smooth, and the probability of chipping due to contact and impact by handling can be greatly reduced. Recognize. Other parts are difficult to measure with a profiler, but not only at the boundary between the front and back surfaces and the chamfered part where the crown occurs, but also over the entire chamfered part, the sharp part is smoothed by grinding the chamfered part, so contact by handling, It is thought that the effect of preventing the occurrence of chipping by impact is great.

  Thereafter, the protective oxide film was removed by etching with hydrofluoric acid and finish cleaning was performed, followed by oxygen precipitation heat treatment at 800 ° C. for 4 hours and 1000 ° C. for 10 hours, and the oxygen precipitation density of the epitaxial wafer was measured. The measurement results are shown in FIG.

(Comparative example)
As in the example, a wafer was prepared, and epitaxial growth, chamfered portion polishing, etching removal, and finish cleaning were performed. However, when forming the protective oxide film before polishing the chamfered portion, a two-step heat treatment was not performed, a protective oxide film of 0.1 μm was formed at 1000 ° C., and an epitaxial wafer was manufactured without performing the RTA process.
Thereafter, as in the example, an oxygen precipitation heat treatment was performed, and the oxygen precipitation density of the epitaxial wafer was measured. The measurement results are shown in FIG.

  As shown in FIG. 5, in the example, since the two-stage heat treatment of the present invention is performed, oxygen precipitation is favorably generated. On the other hand, in the comparative example, oxygen precipitation is insufficient.

  The present invention is not limited to the above embodiment. The above-described embodiment is an exemplification, and the present invention has substantially the same configuration as the technical idea described in the claims of the present invention, and any device that exhibits the same function and effect is the present invention. It is included in the technical scope of the invention.

Claims (8)

In a method of manufacturing an epitaxial wafer by growing an epitaxial layer on a silicon single crystal substrate,
Growing an epitaxial layer on the silicon single crystal substrate;
A process of forming a protective oxide film on the surface of the epitaxial layer by holding the silicon single crystal substrate on which the epitaxial layer has been grown at a temperature of 650 to 800 ° C. for 1 hour or more and then raising the temperature to 850 ° C. or more. When,
Polishing the chamfered portion of the silicon single crystal substrate on which the protective oxide film is formed;
Then, the process of removing the said protective oxide film and performing a final cleaning is included, The manufacturing method of the epitaxial wafer characterized by the above-mentioned.   The method for producing an epitaxial wafer according to claim 1, wherein in the step of forming the protective oxide film, the protective oxide film is formed in an oxidizing atmosphere of steam, wet, or dry.   3. The method for manufacturing an epitaxial wafer according to claim 1, wherein in the step of forming the protective oxide film, the protective oxide film is formed with a thickness of 20 to 200 nm. In the step of forming the protective oxide film, the diffusion coefficient D (T _EP ) and the growth time t _{EP at} the growth temperature T _EP (° C.) of the epitaxial layer and the formation temperature T _Ox (° C.) of the protective oxide film The diffusion coefficient D (T _Ox ) and the formation time t _Ox are set to oxidation conditions such that √ (D (T _EP ) × t _EP )> 2 × √ (D (T _Ox ) × t _Ox ) The method for producing an epitaxial wafer according to any one of claims 1 to 3, wherein the protective oxide film is formed under set oxidation conditions.   5. The method according to claim 1, wherein after the step of forming the protective oxide film, a step of forming a nitride film on the protective oxide film and then polishing the chamfered portion is performed. The manufacturing method of the epitaxial wafer of claim | item.   6. The method of manufacturing an epitaxial wafer according to claim 5, wherein the nitride film is polished with a machining allowance of less than half of the formed thickness, and then the chamfered portion is polished.   After the step of forming the protective oxide film, the temperature is raised to a temperature of 1200 ° C. or higher with an RTA apparatus and held for 20 seconds or more, and then cooled to room temperature at a rate of 30 ° C./second or more. The method for manufacturing an epitaxial wafer according to any one of claims 1 to 6, wherein a polishing step is performed.   The method for manufacturing an epitaxial wafer according to claim 1, wherein after removing the protective oxide film, the epitaxial layer is polished with a machining allowance of 0.1 μm or less.

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