JP2009277888A5 - - Google Patents

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JP2009277888A5
JP2009277888A5 JP2008127811A JP2008127811A JP2009277888A5 JP 2009277888 A5 JP2009277888 A5 JP 2009277888A5 JP 2008127811 A JP2008127811 A JP 2008127811A JP 2008127811 A JP2008127811 A JP 2008127811A JP 2009277888 A5 JP2009277888 A5 JP 2009277888A5
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Japan
Prior art keywords
polishing
polishing step
insulating film
eddy current
current sensor
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JP2008127811A
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Japanese (ja)
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JP5160954B2 (en
JP2009277888A (en
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Priority to JP2008127811A priority Critical patent/JP5160954B2/en
Priority claimed from JP2008127811A external-priority patent/JP5160954B2/en
Priority to US12/465,024 priority patent/US7960188B2/en
Publication of JP2009277888A publication Critical patent/JP2009277888A/en
Publication of JP2009277888A5 publication Critical patent/JP2009277888A5/ja
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Claims (6)

溝を有する絶縁膜と、前記絶縁膜上に形成されたバリア膜と、前記バリア膜上に形成された金属膜とを有し、前記金属膜の一部が金属配線として前記溝内に形成されている基板を研磨する研磨方法であって、
前記金属膜を除去する第1研磨工程と、
前記第1研磨工程後、前記バリア膜を除去する第2研磨工程と、
前記第2研磨工程後、前記絶縁膜を研磨する第3研磨工程とを有し、
前記第2研磨工程および前記第3研磨工程の間、基板の研磨状態を渦電流センサでモニタし、
前記渦電流センサの出力信号値が、前記第2研磨工程終了時の前記渦電流センサの出力信号値から所定の値を減算した値に達したときに前記第3研磨工程を終了することを特徴とする研磨方法。
An insulating film having a groove; a barrier film formed on the insulating film; and a metal film formed on the barrier film, wherein a part of the metal film is formed in the groove as a metal wiring. A polishing method for polishing a substrate,
A first polishing step for removing the metal film;
A second polishing step for removing the barrier film after the first polishing step;
A third polishing step for polishing the insulating film after the second polishing step;
During the second polishing step and the third polishing step, the polishing state of the substrate is monitored with an eddy current sensor,
The third polishing step is ended when the output signal value of the eddy current sensor reaches a value obtained by subtracting a predetermined value from the output signal value of the eddy current sensor at the end of the second polishing step. Polishing method.
前記所定の値は、前記絶縁膜の所定の研磨量に対応する前記渦電流センサの出力信号値の変化量であることを特徴とする請求項に記載の研磨方法。 The polishing method according to claim 1 , wherein the predetermined value is a change amount of an output signal value of the eddy current sensor corresponding to a predetermined polishing amount of the insulating film. 前記第1研磨工程、前記第2研磨工程、および前記第3研磨工程は、
基板を基板保持具で保持して研磨テーブル上の研磨パッドの研磨面に押圧し、
前記基板保持具と前記研磨テーブルとを回転させることによって行われ、
前記第2研磨工程の終点を、前記渦電流センサの出力信号値と、前記研磨面の温度、前記研磨テーブルのトルク電流、前記基板保持具のトルク電流の少なくともいずれか1つとをモニタすることによって検出することを特徴とする請求項に記載の研磨方法。
The first polishing step, the second polishing step, and the third polishing step are:
Hold the substrate with the substrate holder and press against the polishing surface of the polishing pad on the polishing table,
Performed by rotating the substrate holder and the polishing table;
The end point of the second polishing step is monitored by monitoring at least one of the output signal value of the eddy current sensor, the temperature of the polishing surface, the torque current of the polishing table, and the torque current of the substrate holder. The polishing method according to claim 1 , wherein the polishing method is detected.
前記第2研磨工程の間、光学式センサで基板の研磨状態をモニタし、
前記渦電流センサの出力信号値と前記光学式センサの出力信号値の変化点から、前記第2研磨工程の研磨終点を検出することを特徴とする請求項に記載の研磨方法。
During the second polishing step, the polishing state of the substrate is monitored with an optical sensor,
The polishing method according to claim 1, characterized in that the transition points of the output signal value of the optical sensor and the output signal value of the eddy current sensor, for detecting the polishing end point of the second polishing step.
溝を有する絶縁膜と、前記絶縁膜上に形成されたバリア膜と、前記バリア膜上に形成された金属膜とを有し、前記金属膜の一部が金属配線として前記溝内に形成されている基板を研磨する研磨方法であって、
前記金属膜を除去する第1研磨工程と、
前記第1研磨工程後、前記バリア膜を除去する第2研磨工程と、
前記第2研磨工程後、前記絶縁膜を研磨する第3研磨工程とを有し、
前記第2研磨工程および前記第3研磨工程の間、基板の研磨状態を渦電流センサでモニタし、
前記渦電流センサの出力信号値が、前記絶縁膜の1つ下の階層に属する絶縁膜の研磨終了時の前記渦電流センサの出力信号値に所定の値を加えた値に達したときに前記第3研磨工程を終了することを特徴とする研磨方法。
An insulating film having a groove; a barrier film formed on the insulating film; and a metal film formed on the barrier film, wherein a part of the metal film is formed in the groove as a metal wiring. A polishing method for polishing a substrate,
A first polishing step for removing the metal film;
A second polishing step for removing the barrier film after the first polishing step;
A third polishing step for polishing the insulating film after the second polishing step;
During the second polishing step and the third polishing step, the polishing state of the substrate is monitored with an eddy current sensor,
When the output signal value of the eddy current sensor reaches a value obtained by adding a predetermined value to the output signal value of the eddy current sensor at the end of polishing of the insulating film belonging to the next lower layer of the insulating film. Migaku Ken how to, characterized in that to end the third polishing step.
前記第3研磨工程の終了時に前記金属配線の上面と前記絶縁膜の上面が同一平面内に位置するように、前記第1研磨工程、前記第2研磨工程、および前記第3研磨工程に研磨液として使用されるスラリの選択比を調整することを特徴とする請求項1乃至5のいずれか一項に記載の研磨方法。 A polishing liquid is used in the first polishing step, the second polishing step, and the third polishing step so that the upper surface of the metal wiring and the upper surface of the insulating film are located in the same plane at the end of the third polishing step. The polishing method according to any one of claims 1 to 5, wherein a selection ratio of a slurry to be used is adjusted.
JP2008127811A 2008-05-15 2008-05-15 Polishing method Active JP5160954B2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2008127811A JP5160954B2 (en) 2008-05-15 2008-05-15 Polishing method
US12/465,024 US7960188B2 (en) 2008-05-15 2009-05-13 Polishing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008127811A JP5160954B2 (en) 2008-05-15 2008-05-15 Polishing method

Publications (3)

Publication Number Publication Date
JP2009277888A JP2009277888A (en) 2009-11-26
JP2009277888A5 true JP2009277888A5 (en) 2011-06-16
JP5160954B2 JP5160954B2 (en) 2013-03-13

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Family Applications (1)

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JP2008127811A Active JP5160954B2 (en) 2008-05-15 2008-05-15 Polishing method

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JP (1) JP5160954B2 (en)

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4083342B2 (en) * 1999-04-09 2008-04-30 株式会社トクヤマ Polishing method
JP2001023940A (en) * 1999-07-09 2001-01-26 Seimi Chem Co Ltd Method for planarizing semiconductor integrated circuit and chemical mechanical polishing slurry therefor
JP3907414B2 (en) * 2000-01-17 2007-04-18 株式会社荏原製作所 Polishing device
JP2002086351A (en) * 2000-06-30 2002-03-26 Ebara Corp Polishing device
JP2005026453A (en) * 2003-07-02 2005-01-27 Ebara Corp Substrate polishing apparatus and method therefor
JP2005203729A (en) * 2003-12-19 2005-07-28 Ebara Corp Substrate polishing apparatus
JP4720089B2 (en) * 2004-02-18 2011-07-13 パナソニック株式会社 Method for forming wiring of semiconductor device
JP2007012679A (en) * 2005-06-28 2007-01-18 Asahi Glass Co Ltd Abrasive and manufacturing method of semiconductor integrated circuit device
JP4808453B2 (en) * 2005-08-26 2011-11-02 株式会社荏原製作所 Polishing method and polishing apparatus

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