JP2009277801A - バリスタ - Google Patents
バリスタ Download PDFInfo
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- JP2009277801A JP2009277801A JP2008126354A JP2008126354A JP2009277801A JP 2009277801 A JP2009277801 A JP 2009277801A JP 2008126354 A JP2008126354 A JP 2008126354A JP 2008126354 A JP2008126354 A JP 2008126354A JP 2009277801 A JP2009277801 A JP 2009277801A
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- 239000002131 composite material Substances 0.000 claims abstract description 74
- 239000004065 semiconductor Substances 0.000 claims abstract description 34
- 239000000919 ceramic Substances 0.000 claims description 18
- 229910044991 metal oxide Inorganic materials 0.000 claims description 16
- 150000004706 metal oxides Chemical class 0.000 claims description 16
- 229910052751 metal Inorganic materials 0.000 claims description 9
- 239000002184 metal Substances 0.000 claims description 9
- 239000000463 material Substances 0.000 claims description 8
- 239000012777 electrically insulating material Substances 0.000 claims 1
- 230000017525 heat dissipation Effects 0.000 abstract description 16
- 230000002349 favourable effect Effects 0.000 abstract 1
- 239000011810 insulating material Substances 0.000 description 10
- 230000004048 modification Effects 0.000 description 6
- 238000012986 modification Methods 0.000 description 6
- 239000011230 binding agent Substances 0.000 description 5
- 229910002601 GaN Inorganic materials 0.000 description 4
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 4
- 229910052777 Praseodymium Inorganic materials 0.000 description 4
- 229910052797 bismuth Inorganic materials 0.000 description 4
- 238000010292 electrical insulation Methods 0.000 description 4
- 239000002002 slurry Substances 0.000 description 4
- 239000000758 substrate Substances 0.000 description 4
- 230000000694 effects Effects 0.000 description 3
- 238000010304 firing Methods 0.000 description 3
- 229910052737 gold Inorganic materials 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 239000003960 organic solvent Substances 0.000 description 3
- 229910052594 sapphire Inorganic materials 0.000 description 3
- 239000010980 sapphire Substances 0.000 description 3
- 229910052709 silver Inorganic materials 0.000 description 3
- 229910001252 Pd alloy Inorganic materials 0.000 description 2
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 2
- 239000000969 carrier Substances 0.000 description 2
- 238000005253 cladding Methods 0.000 description 2
- 239000002019 doping agent Substances 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 239000000203 mixture Substances 0.000 description 2
- 150000004767 nitrides Chemical class 0.000 description 2
- 229910052760 oxygen Inorganic materials 0.000 description 2
- 239000001301 oxygen Substances 0.000 description 2
- 239000004014 plasticizer Substances 0.000 description 2
- 229910002704 AlGaN Inorganic materials 0.000 description 1
- 229910002367 SrTiO Inorganic materials 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 239000000843 powder Substances 0.000 description 1
- 238000005215 recombination Methods 0.000 description 1
- 230000006798 recombination Effects 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C7/00—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
- H01C7/10—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material voltage responsive, i.e. varistors
- H01C7/105—Varistor cores
- H01C7/108—Metal oxide
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01C—RESISTORS
- H01C7/00—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material
- H01C7/10—Non-adjustable resistors formed as one or more layers or coatings; Non-adjustable resistors made from powdered conducting material or powdered semi-conducting material with or without insulating material voltage responsive, i.e. varistors
- H01C7/1006—Thick film varistors
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/62—Protection against overvoltage, e.g. fuses, shunts
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/647—Resistive arrangements
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/05568—Disposition the whole external layer protruding from the surface
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05573—Single external layer
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16265—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being a discrete passive component
- H01L2224/16268—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being a discrete passive component the bump connector connecting to a bonding area protruding from the surface of the item
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- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01046—Palladium [Pd]
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- H—ELECTRICITY
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- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
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- H01L2924/095—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00 with a principal constituent of the material being a combination of two or more materials provided in the groups H01L2924/013 - H01L2924/0715
- H01L2924/097—Glass-ceramics, e.g. devitrified glass
- H01L2924/09701—Low temperature co-fired ceramic [LTCC]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/64—Heat extraction or cooling elements
- H01L33/641—Heat extraction or cooling elements characterized by the materials
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- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Electromagnetism (AREA)
- Thermistors And Varistors (AREA)
Abstract
【解決手段】バリスタV1では、ZnOとAgとの複合材料によって形成された放熱性の良好なコンポジット部5が、バリスタ素体2の主面2aから主面2bに至るように配置されている。したがって、外部電極3,3を介して半導体発光素子11からバリスタ部4に伝わった熱を、コンポジット部5を介して速やかに主面2b側に伝熱させることができる。また、バリスタV1では、上述した内側面6aと内側面7aとを除いた側面6b〜6f,7b〜7fが、バリスタ素体2の側面2c〜2fにそれぞれ露出した状態となっている。このような構成により、バリスタV1では、良好な放熱性が得られる。
【選択図】図1
Description
図1は、本発明の第1実施形態に係るバリスタを示す斜視図である。また、図2は、図1に示したバリスタの平面図であり、図3は、半導体発光素子を実装した状態で示す図1のIII−III線断面図である。図1〜図3に示すように、バリスタV1は、バリスタ素体(セラミック素体)2と、一対の外部電極3,3とを備えている。
図6は、本発明の第2実施形態に係るバリスタを示す断面図である。同図に示すように、第2実施形態に係るバリスタV2は、バリスタ素体2の主面2bに外部電極23,23が更に形成されている点で、主面2bに外部電極のない第1実施形態と異なっている。
図7は、本発明の第3実施形態に係るバリスタを示す断面図である。同図に示すように、第3実施形態に係るバリスタV3は、互いに対向する第1の内部電極31及び第2の内部電極32がバリスタ部34に形成されている点で、第1の内部電極31及び第2の内部電極32が形成されていない第1実施形態と異なっている。
図8は、本発明の第4実施形態に係るバリスタを示す斜視図である。また、図9は、図8に示したバリスタの平面図であり、図10は、半導体発光素子を実装した状態で示す図8のX−X線断面図である。図8〜図10に示すように、バリスタV4は、バリスタ素体42と、一対の外部電極43,43とを備えている。
図13は、本発明の第5実施形態に係るバリスタを示す斜視図である。また、図14は、図13に示したバリスタの平面図であり、図15は、半導体発光素子を実装した状態で示す図13のXV−XV線断面図である。図13〜図15に示すように、バリスタV5は、バリスタ素体52と、一対の外部電極53,53を有している。
Claims (11)
- 互いに対向する第1の主面及び第2の主面を有するセラミック素体と、
前記第1の主面に設けられた一対の外部電極と、を備え、
前記セラミック素体は、
金属酸化物を主成分とする半導体セラミックスからなり、前記外部電極間でバリスタ特性を発現するバリスタ部と、
金属及び金属酸化物の複合材料からなり、前記第1の主面から前記第2の主面に至るコンポジット部と、を備えたことを特徴とするバリスタ。 - 前記コンポジット部は、少なくとも一部が互いに対向するように配置された第1の部分と第2の部分とを有し、
前記バリスタ部は、前記第1の部分と前記第2の部分との間に位置していることを特徴とする請求項1記載のバリスタ。 - 前記バリスタ部は、前記第1の部分と前記第2の部分とに接触していることを特徴とする請求項2記載のバリスタ。
- 前記コンポジット部は、前記第1の部分と前記第2の部分との対向面を除いた面が前記セラミック素体の外表面となっていることを特徴とする請求項2又は3記載のバリスタ。
- 前記セラミック素体の外表面のうち、第1の主面及び第2の主面に直交する各側面は、電気絶縁性を有する材料によって覆われていることを特徴とする請求項4記載のバリスタ。
- 前記バリスタ部は、少なくとも一部が前記コンポジット部と対向するように配置された内部電極を有していることを特徴とする請求項2記載のバリスタ。
- 前記内部電極は、少なくとも一部が互いに対向するように配置された第1の内部電極と第2の内部電極とを有していることを特徴とする請求項6記載のバリスタ。
- 前記第1の内部電極は、前記バリスタ部と前記第1の部分との接触部分に配置され、前記第2の内部電極は、前記バリスタ部と前記第2の部分との接触部分に配置されていることを特徴とする請求項7記載のバリスタ。
- 前記第2の主面に一対の外部電極を更に備えたことを特徴とする請求項1〜7のいずれか一項記載のバリスタ。
- 前記バリスタ部を構成する前記金属酸化物と、前記コンポジット部を構成する前記金属酸化物とが同一材料からなることを特徴とする請求項1〜8のいずれか一項記載のバリスタ。
- 前記金属酸化物はZnOであり、前記金属はAgであることを特徴とする請求項9記載のバリスタ。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008126354A JP5233400B2 (ja) | 2008-05-13 | 2008-05-13 | バリスタ |
US12/426,589 US7994894B2 (en) | 2008-05-13 | 2009-04-20 | Varistor |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2008126354A JP5233400B2 (ja) | 2008-05-13 | 2008-05-13 | バリスタ |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2009277801A true JP2009277801A (ja) | 2009-11-26 |
JP5233400B2 JP5233400B2 (ja) | 2013-07-10 |
Family
ID=41442970
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2008126354A Expired - Fee Related JP5233400B2 (ja) | 2008-05-13 | 2008-05-13 | バリスタ |
Country Status (2)
Country | Link |
---|---|
US (1) | US7994894B2 (ja) |
JP (1) | JP5233400B2 (ja) |
Cited By (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2011162260A1 (ja) * | 2010-06-24 | 2011-12-29 | Tdk株式会社 | チップサーミスタ及びその製造方法 |
JP2012124203A (ja) * | 2010-12-06 | 2012-06-28 | Tdk Corp | チップバリスタ及びチップバリスタの製造方法 |
JP2012124202A (ja) * | 2010-12-06 | 2012-06-28 | Tdk Corp | チップバリスタ及びチップバリスタの製造方法 |
US20130049922A1 (en) * | 2011-08-29 | 2013-02-28 | Tdk Corporation | Chip varistor |
US20130049923A1 (en) * | 2011-08-29 | 2013-02-28 | Tdk Corporation | Chip varistor |
US8508325B2 (en) | 2010-12-06 | 2013-08-13 | Tdk Corporation | Chip varistor and chip varistor manufacturing method |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5233400B2 (ja) * | 2008-05-13 | 2013-07-10 | Tdk株式会社 | バリスタ |
JP2013005297A (ja) * | 2011-06-17 | 2013-01-07 | Sony Corp | 撮像素子および駆動方法、並びに電子機器 |
KR101483259B1 (ko) * | 2012-08-28 | 2015-01-14 | 주식회사 아모센스 | 무수축 바리스타 기판 및 그 제조 방법 |
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JP2007207927A (ja) * | 2006-01-31 | 2007-08-16 | Tdk Corp | バリスタ及び発光装置 |
JP2007288140A (ja) * | 2006-03-20 | 2007-11-01 | Tdk Corp | バリスタ素子 |
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JPH08246207A (ja) | 1995-03-06 | 1996-09-24 | Shingapoole Kk | 被服のウエスト調節方法およびウエスト調節機構を備えた被服 |
US7696856B2 (en) * | 2006-03-20 | 2010-04-13 | Tdk Corporation | Varistor element |
JP4577250B2 (ja) * | 2006-03-27 | 2010-11-10 | Tdk株式会社 | バリスタ及び発光装置 |
US7932806B2 (en) * | 2007-03-30 | 2011-04-26 | Tdk Corporation | Varistor and light emitting device |
JP5233400B2 (ja) * | 2008-05-13 | 2013-07-10 | Tdk株式会社 | バリスタ |
JP5262451B2 (ja) * | 2008-08-29 | 2013-08-14 | Tdk株式会社 | 積層型チップバリスタ |
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2008
- 2008-05-13 JP JP2008126354A patent/JP5233400B2/ja not_active Expired - Fee Related
-
2009
- 2009-04-20 US US12/426,589 patent/US7994894B2/en not_active Expired - Fee Related
Patent Citations (5)
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JPS6276506U (ja) * | 1985-10-31 | 1987-05-16 | ||
JP2003052185A (ja) * | 2001-05-30 | 2003-02-21 | Canon Inc | 電力変換器およびそれを用いる光起電力素子モジュール並びに発電装置 |
JP2007207927A (ja) * | 2006-01-31 | 2007-08-16 | Tdk Corp | バリスタ及び発光装置 |
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Cited By (13)
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---|---|---|---|---|
JP2014033241A (ja) * | 2010-06-24 | 2014-02-20 | Tdk Corp | チップサーミスタ及びその製造方法 |
WO2011162260A1 (ja) * | 2010-06-24 | 2011-12-29 | Tdk株式会社 | チップサーミスタ及びその製造方法 |
US9324483B2 (en) | 2010-06-24 | 2016-04-26 | Tdk Corporation | Chip thermistor and method of manufacturing same |
KR101471829B1 (ko) * | 2010-06-24 | 2014-12-24 | 티디케이가부시기가이샤 | 칩 서미스터 및 그 제조 방법 |
US8896410B2 (en) | 2010-06-24 | 2014-11-25 | Tdk Corporation | Chip thermistor and method of manufacturing same |
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JP2012124203A (ja) * | 2010-12-06 | 2012-06-28 | Tdk Corp | チップバリスタ及びチップバリスタの製造方法 |
JP2012124202A (ja) * | 2010-12-06 | 2012-06-28 | Tdk Corp | チップバリスタ及びチップバリスタの製造方法 |
US8508325B2 (en) | 2010-12-06 | 2013-08-13 | Tdk Corporation | Chip varistor and chip varistor manufacturing method |
US20130049922A1 (en) * | 2011-08-29 | 2013-02-28 | Tdk Corporation | Chip varistor |
US8552831B2 (en) * | 2011-08-29 | 2013-10-08 | Tdk Corporation | Chip varistor |
US8525634B2 (en) * | 2011-08-29 | 2013-09-03 | Tdk Corporation | Chip varistor |
US20130049923A1 (en) * | 2011-08-29 | 2013-02-28 | Tdk Corporation | Chip varistor |
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US20100117782A1 (en) | 2010-05-13 |
US7994894B2 (en) | 2011-08-09 |
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