JP2009270835A - Inspection method and device for semiconductor component - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an inspection device allowing simultaneous measurement with high accuracy upon inspection of a large number of semiconductor components such as LSIs and semiconductor modules even when the number of objects to be inspected or the number of parts to be measured is large. <P>SOLUTION: The inspection device for semiconductor components includes: a probe substrate (10) including an insulation substrate (11) having a plurality of probe contact points (22) formed on a first face and for contacting an object to be inspected (10) and a plurality of first electrode terminals (23) formed on a second face, and a plurality of through electrodes (24) electrically connecting the probe contact points and the first electrode terminals; a control substrate (30) having a rewritable hardware mounted thereon or incorporated therein and provided with, on one surface, a plurality of second electrode terminals (33) connected to the hardware; and a plurality of conductive buffer materials (26) provided between the first electrode terminals of the probe substrate and the second electrode terminals of the control substrate and electrically connecting each other. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a method and apparatus for inspecting a semiconductor component such as a large scale integrated circuit (LSI) or a semiconductor module.

  When manufacturing semiconductor components such as large-scale integrated circuits (LSIs) or semiconductor modules and semiconductor devices, processing such as circuit formation of a large number of semiconductor devices is performed on a single semiconductor wafer made of silicon. After the processing process on the wafer is completed, the wafer is cut by dicing and separated into individual semiconductor devices. In testing a semiconductor device, a test device capable of simultaneously measuring a plurality of semiconductor chip regions on a semiconductor wafer before being singulated is also used. Thus, a probe card is used when simultaneously measuring a large number of inspection locations in a plurality of semiconductor chip regions.

  Conventionally, this probe card has probe contacts or styluses that respectively contact a large number of inspection points. However, since the area on the semiconductor wafer that can be inspected at the same time depends on the area where the probe card hits and the processing capability of the test equipment that includes the probe card, several semiconductor devices are limited as areas that can be measured simultaneously. Met.

  Also, when measuring a plurality of inspection locations on a modularized semiconductor device at the same time, the semiconductor device is cut from the wafer and separated into individual pieces, and a test socket is used to realize simultaneous measurement at a plurality of locations. It was.

  FIG. 1 shows an outline of a conventional inspection method that can measure one or several chips 102 on a semiconductor wafer 100 simultaneously. A probe card 110 made of a printed wiring board has a plurality of styluses (probes) 112 from the center hole thereof, and these styluses 112 are required to be measured on one or a plurality of semiconductor chips 102 to be inspected. For example, it is designed to be in contact with the electrode 204 (FIG. 2) provided on the semiconductor chip 102.

  FIG. 2 is a plan view showing a state in which portions to be individual semiconductor modules are formed on a large-sized wiring board (printed wiring board). An external connection terminal 04 is formed on one surface (the surface in the drawing) of the large-sized wiring board 200, and a component (not shown) such as a semiconductor chip or a chip capacitor is formed on the other surface (the surface in the drawing). Is installed. The large-sized wiring board 200 is cut out individually to form a semiconductor module 202. In the conventional inspection apparatus, the semiconductor module 202 cut out individually is inserted into a test socket (not shown) for inspection.

  As a prior art known conventionally, there is Patent Document 1 (Japanese Patent Laid-Open No. 2002-174669). According to this, in a system for simultaneously testing a plurality of integrated circuit devices, from a single or a plurality of channel testers. An interface circuit coupled to the tester is provided for receiving the data value and providing error information to the integrated circuit. This interface circuit sends data values received from the tester to multiple devices simultaneously. The interface circuit reads out from the device and performs comparison using the data value, and in response, generates an error value indicating the result of the comparison. This error value can be returned to the tester via the same or different channels.

  In Patent Document 2 (Japanese Patent Laid-Open No. 2004-259530), in a semiconductor inspection apparatus in which a large number of external connection terminals made of spring-like wires are arranged, such as a semiconductor socket, the number of contact times of the contact terminals is several hundred times or Even when it is repeated thousands of times, a peelable plating layer is formed in multiple layers at the tip of the external connection terminal so that it can be used stably over a long period of time without changing the contact voltage. In addition, etching cleaning is performed according to the dirt on the tip of the external connection terminal, and it is reused.

  Patent Document 3 (Japanese Patent Application Laid-Open No. 2005-127916) provides a test substrate for inspecting a semiconductor package or a chip that has a simple structure, is low in manufacturing cost, and can cope with an increase in the number of pins. Is. The test substrate is arranged corresponding to the arrangement of a probe substrate such as a silicon substrate and a bump or a terminal to be inspected formed on one surface of the probe substrate by wire bonding, and has a plurality of thin protrusions at the tip. Ball bumps, a plurality of microsprings arranged on the other surface of the probe substrate, and conductive vias penetrating from the position surface of the probe substrate to the other surface for electrically connecting each ball bump and the microspring. It consists of.

JP 2002-174669 A

JP 2004-259530 A

JP 2005-127916 A

  According to the semiconductor device inspection method using the conventional probe card shown in FIG. 1 and FIG. 2, it depends on the range of the probe card and the processing capability of the test apparatus including the probe card. The limit was several semiconductor devices. In addition, in the case of a modularized semiconductor device, it is necessary to perform measurement by mounting individual chips on an inspection socket, which is not suitable for a large amount of processing in a short time. .

  Even in the prior arts disclosed in Patent Documents 1 to 3, although the semiconductor chip test apparatus has been improved, such as the durability of the test apparatus itself and the reduction of the measurement time, measurement of a large number of semiconductor devices is performed simultaneously. This is because there is a limit to the range of each probe, its processing capability, etc., and it has been substantially difficult to realize satisfactory simultaneous measurement for a large number of inspection objects.

  Therefore, in the present invention, when measuring a large number of semiconductor parts such as LSIs and semiconductor modules at the same time, even if the number of objects to be measured increases or the number of measurement points increases, simultaneous measurement is accurately performed. It is an object of the present invention to provide a semiconductor component inspection method and apparatus that can be used.

  To achieve the above object, according to the present invention, a plurality of probe contacts capable of contacting an object to be inspected are formed on a first surface of an insulating substrate, and a plurality of first electrode terminals are formed on a second surface. The probe substrate in which the probe contact and the first electrode terminal are electrically connected by a plurality of through electrodes penetrating the insulating substrate, and rewritable hardware can be mounted or built in, and the hardware is provided on one surface. A control board having a plurality of second electrode terminals connected to the wear, and a first electrode terminal of the probe board and a second electrode terminal of the control board, electrically connected to each other A semiconductor component inspection apparatus comprising a plurality of conductive buffer materials is provided.

  In this case, the insulating substrate constituting the probe is made of silicon, and the probe contact is formed by etching the silicon to form a plurality of conical projections, and further forming a conductive layer on the surface thereof. Features. Alternatively, the probe contact comprises a spring-like terminal formed by a bonding wire.

  The conductive cushioning material is made of conductive rubber. Alternatively, the conductive buffer material is characterized by comprising a spring-like terminal formed of a bonding wire.

  In addition, according to the present invention, a plurality of probe contacts that can contact an object to be inspected are formed on the first surface of the insulating substrate, a plurality of first electrode terminals are formed on the second surface, and a plurality of penetrating through the insulating substrate is formed. A probe substrate in which the probe contact and the first electrode terminal are electrically connected by a through electrode, and rewritable hardware can be mounted or built in, and a plurality of second electrodes connected to the hardware on one side A control board having two electrode terminals, a first electrode terminal of the probe board and a second electrode terminal of the control board are electrically connected to each other, and a plurality of probe contacts on the probe board are inspected. There is provided a semiconductor component inspection device comprising a positioning device for positioning and contacting a plurality of inspection locations of an object.

  Further, according to the present invention, a plurality of probe contacts are formed on the first surface of the insulating substrate, a plurality of first electrode terminals are formed on the second surface, and the insulating substrate is provided between the probe contacts and the first electrode terminals. A probe board electrically connected by a plurality of through electrodes penetrating, and a control board that can be equipped with or incorporates rewritable hardware, and has a plurality of second electrode terminals connected to the hardware on one side And interposing a conductive cushioning material between the first electrode terminal of the probe board and the second electrode terminal of the control board to position and electrically connect each other, A semiconductor component inspection method is provided, wherein a plurality of probe contacts are positioned and brought into contact with a plurality of inspection locations of an inspection object.

  In this case, the positioning between the probe substrate and the control substrate is performed by applying a vacuum suction force between them. Thus, if the probe board and the control board are pressed and connected by vacuum suction, they can be easily exchanged at the time of failure or the like, which is preferable.

  According to the present invention, a probe board having a plurality of probe contacts and a control board on which rewritable hardware can be mounted or embedded can be positioned with respect to each other with a conductive buffer material interposed therebetween, and Since a plurality of probe contacts are positioned and brought into contact with a plurality of inspection locations of the inspection object, and inspection is performed at the plurality of locations of the inspection object, a plurality of semiconductor chips in the semiconductor wafer are all in one test. The measurement can be completed. Further, for example, it is possible to inspect all semiconductor chips in one semiconductor wafer at a time.

  In addition, by combining a probe substrate having probe contacts arranged according to various inspection objects and a single control substrate, inspection of inspection objects having various inspection parts and measurement ranges is performed. be able to.

  In the inspection apparatus of the present invention, for example, a plurality of semiconductor chips formed on one semiconductor wafer can be inspected at a time. In the present invention, for example, the probe substrate is formed of a silicon substrate made of the same material as the semiconductor wafer. Therefore, the probe contact can be formed with high accuracy and high density according to the electrodes of the semiconductor chip of the semiconductor wafer. The control substrate is also formed of a silicon substrate made of the same material as the semiconductor wafer, for example. Therefore, the electrode terminals of the control board can be formed with high accuracy and high density, the control board and the probe board can be easily electrically connected, and the probe board can be controlled by the control board. As a result, the probe contacts corresponding to the electrodes of all the semiconductor chips formed on the semiconductor wafer can be brought into contact with each other and the inspection can be performed at a time. Note that the probe substrate and the control substrate may be formed of a substrate that can be processed with the same accuracy as the silicon substrate, such as a glass substrate, instead of the silicon substrate. Further, since the probe board and the control board have high accuracy and high density, even in the case of a module board, all module boards can be inspected at once in the state of a large board.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

  3A and 3B show a semiconductor component inspection apparatus according to the first embodiment of the present invention. In the semiconductor component inspection apparatus according to the first embodiment, an inspection object (device under test) (DUT) 10 is, for example, a single semiconductor wafer on which a large number of semiconductor chips are formed. This is a state before being cut into semiconductor chips. Among these many semiconductor chips, one or a plurality of semiconductor chips are inspected for a plurality of inspection target portions or parts. However, in the first embodiment, all semiconductor chips of a single semiconductor wafer (DUT) 10 are set as one inspection range.

  The probe substrate 20 is made of, for example, an insulating substrate 21 made of silicon, and a plurality of probe contacts 22 that can contact an object to be inspected are formed on the lower first surface in the drawing. For example, the probe contact 22 is formed by etching silicon, which is a material of the insulating substrate, to form a plurality of pointed cone-shaped protrusions, and then applying an insulating layer to the surface of the silicon, which is the insulating substrate 21, by thermal oxidation or the like. In addition, the conductive layer 22a is formed only on the surface of the protruding portion by electroless plating or the like. The arrangement of the probe contacts 22 corresponds to the measurement position of a specific inspection object 10 requiring inspection.

  A plurality of electrode terminals 23 are formed on the upper second surface of the probe substrate 20 in the figure. The plurality of electrode terminals 23 are arranged in correspondence with the arrangement of electrode terminals 33 of the control board 30 to be described later. In order to electrically connect between the probe contact 22 and the electrode terminal 23, a plurality of through electrodes 24 penetrating between the lower surface and the upper surface of the insulating substrate 11 are provided. In order to form these through electrodes 24, through holes are formed in the insulating substrate 21 made of silicon, and then an insulating layer is formed on the surface of the silicon by thermal oxidation or the like, and these through holes are filled with a metal paste. Alternatively, a method of forming vias by a method such as plating is used.

  The control substrate 30 is made of, for example, a silicon substrate 31, and an electrode terminal 33 that is in electrical contact with the electrode terminal 23 of the probe substrate 20 via a conductive buffer material 26 described later on the lower first surface in the drawing. Is formed. On the second surface of the upper side of the control board 30 shown in the figure, rewritable hardware 35 such as an FPGA (Field Programmable Gate Array) or a read-on memory (ROM) is mounted. Then, in order to electrically connect between the hardware 35 mounted on the upper surface of the control substrate 30 and the electrode terminal 33 on the lower surface, a plurality of through electrodes penetrating between the lower surface and the upper surface of the silicon substrate 31. 34 is provided. The method for forming these through electrodes 34 is the same as the method for forming the through electrodes 24 in the probe substrate 20.

  A printed wiring board 40 is mounted on the upper side of the control board 30 via solder balls 41. On the printed wiring board 40, a power supply circuit 42, an input / output device 43, and the like are mounted.

  In inspecting the inspection object 10, the conductive buffer material 26 is interposed between the electrode terminal 23 of the probe substrate 20 and the electrode terminal 33 of the control substrate 30 so as to be positioned and electrically connected to each other, The plurality of probe contacts 22 on the probe substrate 20 are positioned and brought into contact with the plurality of inspection locations of the inspection object 10. As the conductive buffer material 26, for example, conductive rubber can be used.

In order to ensure the positioning between the probe substrate 20 and the control substrate 30, it can also be performed by applying a vacuum suction force between them. In the illustrated embodiment, the space between the probe substrate 20 and the control substrate 30 is depressurized from the suction port 37 provided in the control substrate 30, and a vacuum suction force is applied between them. The space between the probe board 20 and the control board 30 is not shown in detail in the drawing, but is formed as a sealed space.
In forming the sealed space, for example, as shown in FIG. 3B, a seal ring 60 made of rubber, for example, is interposed between the periphery of the probe substrate 20 and the periphery of the control substrate 30, so that these substrates 20, A sealed space is formed between 30. This configuration facilitates vacuum suction and facilitates connection / positioning of the probe substrate 20 and the control substrate 30.

  Further, in order to electrically connect the electrode terminal 23 of the probe board 20 and the electrode terminal 33 of the control board 30 in this way, the conductive buffer material 26 is interposed therebetween, and the probe board 20 Since the vacuum suction force is applied to the control substrate 30, the electrical connection between the electrode terminals is further ensured, and the contact resistance does not increase with respect to the electrical contact.

  FIG. 4 shows a semiconductor component inspection apparatus according to the second embodiment of the present invention. The difference from the first embodiment is that in the first embodiment, the purpose is to inspect a region of a single inspection object 10, but in the second embodiment, a plurality of inspection objects 10 (for example, A region extending over the semiconductor wafer is defined as one inspection range. In the second embodiment, it is assumed that the arrangement of probe contacts (or through electrodes) on the probe board is the same as the arrangement of electrode terminals (or through electrodes) on the control board. Other points are the same as in the case of the first embodiment.

  FIG. 5 is a diagram showing the interrelationship among the host computer 50, the printed wiring board 40, the control unit (control board 30), the probe board 20, and the inspection object 10. The test circuit is registered in the control unit (FPGA or ROM) from the host computer 50 using an interface such as a JTAG (JTAG). The control board 30 and the probe board 20 are connected to each other through a buffer material 26 such as conductive rubber using means such as vacuum suction. A semiconductor wafer (DUT) 10 as an inspection object is set, and the probe substrate 20 and the control substrate 30 are brought into contact with each other. By transmitting a test start signal from the host computer 50, the tests of the DUTs 10 are started simultaneously. After the test is completed, the result of conformance or nonconformity is transmitted from the control unit to the host computer 50. The host computer 50 summarizes all test results.

  FIG. 6 shows a semiconductor component inspection apparatus according to the third embodiment of the present invention. The difference from the first embodiment is that, in the first embodiment, as the probe contact 22, the silicon 21 constituting the probe substrate 20 is etched to form a plurality of conical projections, and a conductive layer is formed on the surface thereof. In this third embodiment, a spring-like terminal 22 formed of a bonding wire is used as a probe contact. This spring-like terminal is formed into a substantially “<” shape by pulling out a thin wire such as a gold wire from the end of the through electrode 24 by a commonly used bonding apparatus (not shown). Ni, Co, or Au plating is applied to the surface to make it easy to provide buffering properties. Thereby, the front-end | tip part of the spring terminal 22 which functions as a front-end | tip needle | hook of a probe maintains a contact by contacting the test location of the test object 10, and bending. Other points are the same as in the case of the first embodiment.

FIG. 7 shows a semiconductor component inspection apparatus according to the fourth embodiment of the present invention. In the first to third embodiments, the printed wiring board 40 is configured separately from the control board 30 as the control unit. However, in the fourth embodiment, the printed wiring board 40 is collectively configured as the control board. Therefore, the printed wiring board 40 which is also a control board is equipped with rewritable hardware 35 such as an FPGA (Field Programmable Gate Array) and a read-on memory (ROM) on the upper surface thereof, and a power source. The circuit 42, the input / output device 43, and the like are also attached to the upper surface of the same printed wiring board 40. Therefore, in the fourth embodiment, the solder balls 41 and the like for connecting the control board 30 and the printed wiring board 40 that are necessary in the first to third embodiments are no longer necessary. However, in the fourth embodiment, there is no member that functions as an interface between the probe board 20 and the printed wiring board 40 as in the above-described embodiment. The arrangement of the electrode terminals 33 must always be the same as the arrangement of the electrode terminals 23 of the probe substrate 20.
In the fourth embodiment, in order to ensure the positioning between the probe board 20 and the printed wiring board 40, a vacuum suction force is applied between them. Provided on the wiring board 40, the space between the probe board 20 and the printed wiring board 40 is decompressed, and a vacuum suction force is applied between them. The space between the probe board 20 and the printed wiring board 40 in this embodiment is also formed as a sealed space, although not shown in detail in the drawing.

  FIG. 8 shows a semiconductor component inspection apparatus according to the fifth embodiment of the present invention. In the fourth embodiment described above, rewritable hardware 35 such as an FPGA (Field Programmable Gate Array) and a read-on-memory (ROM) is mounted on the printed wiring board 40 that functions as a control board. However, in the fifth embodiment, the hardware 35 is built in the printed wiring board 40. Therefore, the power supply circuit 42 and the input / output device 43 are mounted on the printed wiring board 40. Other configurations are the same as those of the fourth embodiment.

  FIG. 9 shows a semiconductor component inspection apparatus according to the sixth embodiment of the present invention. In the above-described embodiment, conductive rubber is used as the conductive buffer material 26 between the electrode terminals 23 and 33 to electrically connect the probe board 20 and the control board 30. In the sixth embodiment, a spring-like terminal formed by a bonding wire is used. As in the case of the spring-like terminal as the probe terminal in the third embodiment described above, this spring-like terminal is either of the probe board 20 or the control board 30 by a commonly used bonding apparatus (not shown). The electrode terminals 23 and 33 can be formed by drawing a thin wire such as a gold wire into a substantially “<” shape from the surface of the electrode terminals 23 and 33. Such a spring-like terminal 26 is provided in advance on either the electrode terminal 23 of the probe board 20 or the electrode terminal 33 of the control board 30.

  FIG. 10 shows a semiconductor component inspection apparatus according to the seventh embodiment of the present invention. In the first embodiment, rewritable hardware 35 such as an FPGA (Field Programmable Gate Array) and a read-on-memory (ROM) is mounted on the control substrate 30 made of silicon. In the seventh embodiment, the hardware 35 is built in the control substrate 30 made of silicon (built in the silicon substrate). Other configurations are the same as those in the first embodiment.

  FIG. 11 shows a semiconductor component inspection apparatus according to the eighth embodiment of the present invention. In the above-described embodiment, when the electrode terminal 23 of the probe substrate 20 and the electrode terminal 33 of the control substrate 30 are electrically connected, conductive rubber is used as the conductive buffer material 26 between the electrode terminals 23 and 33. It was interposed (first embodiment) or a spring-like terminal was interposed (sixth embodiment). In the eighth embodiment, the electrode terminals 23 and 33 are directly in contact with each other without interposing the conductive buffer material 26 between the electrode terminals 23 and 33. Other configurations are the same as those in the first embodiment.

  FIG. 12 shows a semiconductor component inspection apparatus according to the ninth embodiment of the present invention. In this embodiment, similarly to the seventh embodiment, rewritable hardware 35 such as an FPGA (Field Programmable Gate Array) and a read-on memory (ROM) is built in the control substrate 30 made of silicon. However, in mounting the printed wiring board 40 on which the power supply circuit 42 and the input / output device 43 are mounted on the upper side of the control board 30 made of silicon, the solder balls 41 are used in the above-described embodiment. In the ninth embodiment, a spring-like terminal 48 is used in place of the solder ball 41. The spring-like terminal 48 is connected to the control board 30 and the printed wiring board by a commonly used bonding apparatus (not shown) as in the case of the spring-like terminal as the probe terminal 22 in the third embodiment. It can be formed by drawing a thin wire such as a gold wire into a substantially “<” shape from the surface of any one of the electrode terminals 40. Such a spring-like terminal 48 is provided in advance on either the control board 30 or the printed wiring board 40. Other configurations are the same as those of the seventh embodiment.

  Although the embodiments of the present invention have been described above with reference to the accompanying drawings, the present invention is not limited to the above-described embodiments, and various forms, modifications, corrections, and the like are possible within the spirit and scope of the present invention. It is.

  As described above, according to the present invention, a plurality of semiconductor chips in a semiconductor wafer can be completed at the same time in a single test, and the number of measurement sites for simultaneous measurement can be increased. An inspection apparatus and method suitable for mass production of parts can be obtained.

  In addition, by combining a probe substrate having probe contacts arranged according to various inspection objects and a single control substrate, inspection of inspection objects having various inspection parts and measurement ranges is performed. Therefore, a wider range of semiconductor components can be inspected.

1 shows a conventional semiconductor wafer inspection apparatus. A state where individual semiconductor modules are separated from a large substrate is shown. 1 shows a semiconductor component inspection apparatus according to a first embodiment of the present invention. The modification of 1st Embodiment is shown. 4 shows a semiconductor component inspection apparatus according to a second embodiment of the present invention. The correlation of the member of the inspection device of the semiconductor parts of the present invention is shown. 8 shows a semiconductor component inspection apparatus according to a third embodiment of the present invention. 8 shows a semiconductor component inspection apparatus according to a fourth embodiment of the present invention. 9 shows a semiconductor component inspection apparatus according to a fifth embodiment of the present invention. 9 shows a semiconductor component inspection apparatus according to a sixth embodiment of the present invention. 9 shows a semiconductor component inspection apparatus according to a seventh embodiment of the present invention. 10 shows a semiconductor component inspection apparatus according to an eighth embodiment of the present invention; The semiconductor component inspection apparatus which concerns on 9th Embodiment of this invention are shown.

Explanation of symbols

10 Inspection object (DUT)
DESCRIPTION OF SYMBOLS 20 Probe board | substrate 21 Insulation board | substrate 22 Probe contact 23 Electrode terminal 24 Through-electrode 26 Conductive buffer material 30 Control board 33 Electrode terminal 34 Through-electrode 37 Adsorption port 40 Printed wiring board 50 Host computer

Claims (9)

A plurality of probe contacts that can contact the object to be inspected are formed on the first surface of the insulating substrate, a plurality of first electrode terminals are formed on the second surface, and the probe contacts and the first contact are formed by the plurality of through electrodes that penetrate the insulating substrate. A probe substrate electrically connected to one electrode terminal;
A control board that can be equipped with or incorporates rewritable hardware and has a plurality of second electrode terminals connected to the hardware on one surface;
A plurality of electrically conductive buffer materials interposed between the first electrode terminal of the probe board and the second electrode terminal of the control board and electrically connected to each other;
Inspection device for semiconductor parts.   The insulating substrate is made of silicon, and the probe contact is formed by etching the silicon to form a plurality of conical protrusions, and further forming a conductive layer on the surface of these protrusions. Item 2. A semiconductor component inspection apparatus according to Item 1.   2. The semiconductor component inspection apparatus according to claim 1, wherein the probe contact comprises a spring-like terminal formed of a bonding wire.   4. The semiconductor component inspection apparatus according to claim 1, wherein the conductive buffer material is made of conductive rubber.   4. The semiconductor component inspection apparatus according to claim 1, wherein the conductive buffer material is formed of a spring-like terminal formed of a bonding wire.   The control board can be equipped with or incorporates rewritable hardware, and has a silicon substrate having a plurality of second electrode terminals connected to the hardware on one surface, and is mounted on and connected to the silicon substrate. 6. The semiconductor component inspection apparatus according to claim 1, further comprising a printed circuit board on which a power supply circuit and an input / output device are mounted. A plurality of probe contacts that can contact the object to be inspected are formed on the first surface of the insulating substrate, a plurality of first electrode terminals are formed on the second surface, and the probe contacts and the first contact are formed by the plurality of through electrodes that penetrate the insulating substrate. A probe substrate electrically connected to one electrode terminal;
A control board that can be equipped with or incorporates rewritable hardware and has a plurality of second electrode terminals connected to the hardware on one surface;
The first electrode terminal of the probe board and the second electrode terminal of the control board are electrically connected to each other, and the plurality of probe contacts of the probe board are connected to the plurality of inspection points of the inspection object. A positioning device for positioning and contacting;
Inspection device for semiconductor parts. A plurality of probe contacts are formed on the first surface of the insulating substrate, a plurality of first electrode terminals are formed on the second surface, and a plurality of through electrodes that penetrate the insulating substrate between the probe contacts and the first electrode terminals Using an electrically connected probe board and a control board that can be equipped with or incorporate rewritable hardware and has a plurality of second electrode terminals connected to the hardware on one side,
A conductive cushioning material is interposed between the first electrode terminal of the probe board and the second electrode terminal of the control board to position and electrically connect to each other, and a plurality of probe contacts of the probe board are connected to each other. A method of inspecting a semiconductor component, comprising positioning and contacting a plurality of inspection locations of an inspection object.   9. The semiconductor component inspection method according to claim 8, wherein the positioning between the probe substrate and the control substrate is performed by applying a vacuum suction force between them.

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