JP2009212169A - Integrated circuit device and electronic apparatus - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an integrated circuit device, along with an electronic apparatus, capable of preventing breakage and malfunction of an integrated circuit caused by a surge voltage of negative polarity which is applied to an input terminal, with no use of an external component. <P>SOLUTION: An ESD protection element 11 includes: an NPN transistor 111 where an emitter is connected to an input terminal 13, a collector is connected to a power source Vcc, and a base is connected to the input terminal 13 thorough a resistive element 112; and the resistive element 112 where one end is connected to the base of the transistor 111 while the other end is connected to the input terminal 13. An integrated circuit 1 includes a substrate of P-type semiconductor, and a plurality of circuit formation elements where a P-type semiconductor part of P-type semiconductor is interposed between adjoining N wells, locally including the N well. A circuit formation element connected to the input terminal 13 among the circuit formation elements forming the integrated circuit 1 is a remaining portion excluding the N well. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to an integrated circuit device and an electronic apparatus that can prevent the integrated circuit from being destroyed even when an abnormal voltage is applied to an input terminal of the integrated circuit.

  When an abnormal voltage due to electrostatic discharge or the like is applied to the input terminal of the integrated circuit, an abnormal current may flow in the integrated circuit, and the integrated circuit may be destroyed. Conventional techniques for preventing the integrated circuit from being destroyed even when such an abnormal voltage is applied include the following.

For example, ESD (Electrostatic) of a semiconductor integrated circuit described in Patent Document 1
Discharge (electrostatic discharge) protection structure has a parasitic SCR (Silicon) in the integrated circuit so that the static electricity entering from the input / output pad can escape to the ground without destroying the semiconductor elements in the integrated circuit.
The integrated circuit is protected from electrostatic discharge by forming an ESD protection element comprising a Controlled Rectifier (thyristor).

  An electrostatic discharge protection circuit described in Patent Document 2 is an NPN bipolar transistor in which an emitter is connected to a terminal to be protected, a collector is connected to a power supply line for the integrated circuit, and a base is connected to the ground. Is provided. The operational amplifier circuit described in Patent Document 3 has a terminal connected to the base of a PNP transistor in the input section of the differential amplifier circuit, one end connected to the terminal, and a negative polarity signal input to the other end. A series connection row of a plurality of resistors to which a positive input terminal or a negative input terminal is connected, and a transistor having an emitter connected to one connection point of the series connection row and a collector and a base connected to the ground.

  FIG. 1 is a diagram showing a circuit configuration of an integrated circuit 9 according to a conventional technique. The integrated circuit 9 includes an ESD protection element 91, a signal processing circuit 92, and an input terminal 93. The signal processing circuit 92 includes a PNP transistor (hereinafter referred to as “PNP transistor”) 921 having a base connected to the input terminal 93. The input terminal 93 is connected to an input terminal (hereinafter referred to as “substrate input terminal”) 95 of the substrate via a resistance element 94. The ESD protection element 91 includes an NPN transistor (hereinafter referred to as “NPN transistor”) 911 having a collector connected to the input terminal 93, an emitter connected to the ground, and a base connected to the ground via the resistance element 912. , A resistance element 912 having one end connected to the base of the transistor 911 and the other end connected to the ground, and a diode 913 having a cathode connected to the power supply Vcc and an anode connected to the input terminal 93. .

JP 2002-94001 A JP-A-11-168181 JP 2001-308659 A

  When a positive surge voltage is applied to the substrate input terminal 95, the transistor 911 is turned on, and an increase in the potential of the input terminal 93 is suppressed, so that the integrated circuit can be protected from the positive surge voltage. However, when a negative surge voltage is applied to the substrate input terminal 95, the circuit may malfunction due to the influence of a parasitic transistor formed in the integrated circuit.

  FIG. 2 is a diagram for explaining a parasitic transistor formed in the integrated circuit 8. In the integrated circuit 8, N wells 802 and 803 made of an N type semiconductor are formed adjacent to a substrate 801 made of a P type semiconductor, and the N well 802 and the N well 803 are separated by a P type semiconductor separation layer 804. Yes. The N well is an N type semiconductor formed adjacent to a substrate made of a P type semiconductor. A P-type semiconductor 805 is formed in the N well 802, an N-type semiconductor 806 is formed in the P-type semiconductor 805, and an NPN transistor 81 is formed by the N-well 802, the P-type semiconductor 805, and the N-type semiconductor 806. . A P-type semiconductor 807 and a P-type semiconductor 807 are formed in the N well 803, and a PNP transistor 82 is formed by the N well 803, the P-type semiconductor 807 and the P-type semiconductor 807. Further, a parasitic transistor 83 is formed by a P-type semiconductor substrate 801, an N well 802 and an N well 803.

  When the base of the transistor 82 is connected to the input terminal 93, when a negative surge voltage is applied to the input terminal 93, a negative surge voltage is applied to the collector of the parasitic transistor 83. When a negative surge voltage is applied to the collector of the parasitic transistor 83, that is, the N well 803, the element isolation between the collector base of the parasitic transistor 83 established by the reverse bias of the P type diffusion and the N type diffusion can be maintained. As a result, the parasitic transistor 83 operates and the integrated circuit 8 malfunctions. Therefore, when the collector of the transistor 911 shown in FIG. 1 is an N well, the integrated circuit 9 similarly malfunctions.

  In the conventional technology, an external component such as a clamp circuit or a Schottky diode is connected to the input terminal of the integrated circuit to protect the integrated circuit from negative surge voltage. However, an external component is required. This is an obstacle to cost reduction and miniaturization.

  An object of the present invention is to provide an integrated circuit device and an electronic apparatus that can prevent destruction and malfunction of an integrated circuit due to a negative surge voltage applied to an input terminal without using an external component. .

The present invention (1) has an input terminal, a substrate made of a P-type semiconductor, and an N-type semiconductor portion made of an N-type semiconductor and formed adjacent to the substrate. An integrated circuit portion that operates in response to a signal input from an input terminal, and includes a plurality of circuit forming elements configured by interposing a P-type semiconductor portion made of a P-type semiconductor between N-type semiconductor portions,
A resistor having one end connected to the input terminal, a collector connected to a power source supplied to the integrated circuit unit, an emitter connected to the input terminal, and a base connected to the other end of the resistor And a protection circuit portion formed on the substrate and integrated with the integrated circuit portion, and a protection circuit portion formed on the substrate.
A circuit forming element connected to the input terminal among the plurality of circuit forming elements is connected to the input terminal in a remaining portion excluding the N-type semiconductor portion adjacent to the substrate. Integrated circuit device.

Further, the present invention (5) includes an input terminal, an integrated circuit unit that operates in response to a signal input from the input terminal, and a protection circuit unit that protects the integrated circuit unit from an abnormal voltage applied to the input terminal. An integrated circuit device comprising:
The protection circuit unit is
A first resistor having one end connected to the input terminal;
A first NPN-type transistor having a collector connected to a power source supplied to the integrated circuit unit, an emitter connected to the input terminal, and a base connected to the other end of the first resistor;
A second resistor having one end connected to the input terminal and the other end connected to the integrated circuit unit;
An integrated circuit device comprising: an emitter connected to the integrated circuit portion; a collector connected to the power supply; and a second NPN transistor having a predetermined potential applied to a base. .

  The present invention (6) is an electronic apparatus characterized by using the integrated circuit device.

  According to the present invention (1), a substrate having an input terminal and made of a P-type semiconductor and an N-type semiconductor portion made of an N-type semiconductor and formed adjacent to the substrate are partly provided. An integrated circuit portion including a plurality of circuit forming elements configured by interposing a P-type semiconductor portion made of a P-type semiconductor between adjacent N-type semiconductor portions, according to a signal input from an input terminal Works.

  A resistor having one end connected to the input terminal, a collector connected to a power source supplied to the integrated circuit unit, an emitter connected to the input terminal, and a base connected to the other end of the resistor A protection circuit portion including a type transistor is formed on the substrate and integrated with the integrated circuit portion. A circuit forming element connected to the input terminal among the plurality of circuit forming elements is connected to the input terminal in a remaining portion excluding the N-type semiconductor portion adjacent to the substrate.

  Therefore, even if a negative surge voltage is applied to the input terminal, the protection circuit unit prevents abnormal current from flowing through the integrated circuit unit, and negative voltage is applied to the N-type semiconductor unit of the integrated circuit unit. Since no voltage is applied, the integrated circuit portion can be prevented from being broken and malfunctioning due to a negative surge voltage applied to the input terminal without using external components. And since it is not necessary to use external parts, cost reduction and size reduction can be achieved.

  According to the invention (5), the integrated circuit device includes an input terminal, an integrated circuit unit that operates in response to a signal input from the input terminal, and an abnormal voltage applied to the input terminal. And a protection circuit part for protecting the part. The protection circuit unit includes a first resistor having one end connected to the input terminal, a collector connected to a power source supplied to the integrated circuit unit, an emitter connected to the input terminal, and a base A first NPN transistor connected to the other end of the first resistor; a second resistor having one end connected to the input terminal and the other end connected to the integrated circuit portion; and an emitter Is connected to the integrated circuit portion, a collector is connected to the power source, and a second NPN transistor having a predetermined potential applied to the base.

  Therefore, the ESD protection element composed of the first resistor and the first NPN transistor prevents the abnormal current from flowing through the integrated circuit section, and the second resistor and the second NPN transistor consist of the second resistor. The clamp circuit can prevent the input portion of the integrated circuit portion from becoming a negative voltage. That is, it is possible to prevent the integrated circuit portion from being destroyed and malfunctioning due to a negative surge voltage applied to the input terminal without using an external component. And since it is not necessary to use external parts, cost reduction and size reduction can be achieved.

  Further, according to the present invention (6), since the integrated circuit device is used, even if a negative surge is applied to the input terminal of the integrated circuit device used by the electronic device, the integrated circuit device is also destroyed and malfunctions. It is possible to realize an electronic device that is resistant to negative surges.

  FIG. 3 is a diagram showing a circuit configuration of the integrated circuit 1 according to the first embodiment of the present invention. An integrated circuit 1 that is an integrated circuit device includes an ESD protection element 11, a signal processing circuit 12, and an input terminal 13. The signal processing circuit 12, which is an integrated circuit unit, is a circuit such as a comparator or an amplifier, has an input terminal 13, and an input unit of a circuit such as a comparator or amplifier is connected to the input terminal 13. The input terminal 13 is connected to an input terminal (hereinafter referred to as “substrate input terminal”) 15 of the substrate via a resistance element 14.

  The ESD protection element 11 serving as a protection circuit unit includes an NPN transistor (hereinafter referred to as an NPN transistor) having an emitter connected to the input terminal 13, a collector connected to the power supply Vcc, and a base connected to the input terminal 13 via the resistance element 112. 111 (referred to as “NPN transistor”), and a resistance element 112 that is a resistor having one end connected to the base of the transistor 111 and the other end connected to the input terminal 13. The power source Vcc is a power source that supplies power to the integrated circuit 1, and is a DC power source such as a battery or a power source that steps down the voltage of the DC power source.

  The integrated circuit 1 includes a substrate made of a P-type semiconductor and an N-type semiconductor portion made of an N-type semiconductor and formed adjacent to the substrate, and P between the adjacent N-type semiconductor portions. And a plurality of circuit forming elements configured by interposing a P-type semiconductor portion made of a type semiconductor, and operates in accordance with a signal input from the input terminal 13. Hereinafter, an N-type semiconductor portion formed adjacent to a substrate made of a P-type semiconductor is referred to as an N well.

  The substrate made of the P-type semiconductor is, for example, the substrate 801 shown in FIG. 2, and the N-type semiconductor portion made of the N-type semiconductor and formed adjacent to the substrate is, for example, the N well 802 shown in FIG. And a P-type semiconductor portion made of a P-type semiconductor between adjacent N-type semiconductor portions is, for example, the P-type semiconductor 804 shown in FIG. They are an N well 803, a P type semiconductor 804, a P type semiconductor 805, an N type semiconductor 806, a P type semiconductor 807 and a P type semiconductor 807.

  The ESD protection element 11 and the signal processing circuit 12 are semiconductor elements formed in the integrated circuit 1. Among the circuit forming elements forming the integrated circuit 1, the circuit forming element connected to the input terminal 13 is This is the remaining part excluding the N-well. Therefore, since the N-well is not connected to the input terminal 13, the integrated circuit 1 is formed in the integrated circuit 1 even if a negative surge voltage (hereinafter referred to as "negative surge") is applied to the substrate input terminal 15. A negative voltage is not applied to the N well, and malfunctions due to parasitic transistors of the integrated circuit 1 can be prevented. Furthermore, even if a negative surge is applied to the input terminal 13, the ESD protection element 11 can prevent abnormal current from flowing to the signal processing circuit 12, and can prevent the integrated circuit 2 from being destroyed.

  As described above, the substrate having the input terminal 13 and made of a P-type semiconductor and the N-well made of an N-type semiconductor and formed adjacent to the substrate are partially provided between the adjacent N-wells. The signal processing circuit 12 including a plurality of circuit forming elements configured by interposing a P-type semiconductor portion made of a P-type semiconductor on the other side operates in accordance with a signal input from the input terminal 13.

  One end of the resistor 112 is connected to the input terminal 13, the collector is connected to the power supply Vcc supplied to the signal processing circuit 12, the emitter is connected to the input terminal 13, and the base is connected to the other end of the resistor 112. The ESD protection element 11 including the NPN transistor 111 is formed on the substrate and integrated with the signal processing circuit 12. The circuit forming element connected to the input terminal 13 among the plurality of circuit forming elements is connected to the input terminal 13 in the remaining portion excluding the N well adjacent to the substrate.

  Therefore, even if a negative surge voltage is applied to the input terminal 13, the ESD protection element 11 prevents an abnormal current from flowing through the signal processing circuit 12, and further, a negative voltage is applied to the N well of the integrated circuit 1. Therefore, the integrated circuit 1 can be prevented from being broken and malfunctioning due to a negative surge voltage applied to the input terminal without using an external component. And since it is not necessary to use external parts, cost reduction and size reduction can be achieved.

  FIG. 4 is a diagram showing a circuit configuration of the integrated circuit 2 according to the second embodiment of the present invention. The integrated circuit 2 that is an integrated circuit device includes an ESD protection element 21 and a signal processing circuit 22. The signal processing circuit 22, which is an integrated circuit unit, is a circuit such as a comparator or an amplifier, has an input terminal 23, and an input unit of a circuit such as a comparator or amplifier is connected to the input terminal 23. The input terminal 23 is connected to the substrate input terminal 25 via the resistance element 24.

  The ESD protection element 21 serving as a protection circuit section includes an NPN transistor 211 having an emitter connected to the input terminal 23, a collector connected to the power supply Vcc, and a base connected to the input terminal 13 via the resistance element 212. Is connected to the base of the transistor 211, and the other end is a resistor 212 connected to the input terminal 23, and a diode 213 whose cathode is connected to the power supply Vcc and whose anode is connected to the input terminal 23. I have. The power source Vcc is a power source that supplies power to the integrated circuit 2, and is a DC power source such as a battery, or a power source that steps down the voltage of the DC power source.

  Similar to the integrated circuit 1, the integrated circuit 2 includes a substrate made of a P-type semiconductor and an N-type semiconductor portion that is formed of an N-type semiconductor and is formed adjacent to the substrate. And a plurality of circuit forming elements configured by interposing a P-type semiconductor portion made of a P-type semiconductor between the type semiconductor portions, and operate in accordance with a signal input from the input terminal 23.

  The ESD protection element 21 and the signal processing circuit 22 are semiconductor elements formed in the integrated circuit 2. Among the circuit forming elements forming the integrated circuit 2, the circuit forming element connected to the input terminal 23 is This is the remaining part excluding the N-well. Therefore, since the N well is not connected to the input terminal 23 in the integrated circuit 2, even if a negative surge is applied to the substrate input terminal 25, a negative voltage is applied to the N well formed in the integrated circuit 2. Therefore, malfunction due to the parasitic transistor of the integrated circuit 2 can be prevented. Furthermore, even if a negative surge is applied to the input terminal 23, the ESD protection element 21 can prevent an abnormal current from flowing to the signal processing circuit 22, and can prevent the integrated circuit 2 from being destroyed.

  As described above, the ESD protection element 21 further includes the diode 213 having the cathode connected to the power supply Vcc and the anode connected to the input terminal 23. Therefore, the ESD tolerance when a positive surge voltage is applied. Can be improved.

  FIG. 5 is a diagram showing a circuit configuration of an integrated circuit 3 according to the third embodiment of the present invention. The integrated circuit 3 that is an integrated circuit device includes ESD protection elements 31 and 32 and a signal processing circuit 33. The signal processing circuit 33, which is an integrated circuit unit, includes input terminals 34 and 35 and a circuit such as a comparator or amplifier in which the transistors whose bases are connected to the input terminals 34 and 35 are formed by NPN transistors 331 and 332, respectively. I have. The input terminal 34 is connected to the substrate input terminal 38 via the resistance element 36, and the input terminal 35 is connected to the substrate input terminal 39 via the resistance element 37.

  The ESD protection elements 31 and 32, which are protection circuit sections, have the same circuit configuration as the ESD protection element 11 shown in FIG. 3, and description of the circuit configuration is omitted to avoid duplication. The emitter of the transistor 311 of the ESD protection element 31 is connected to the input terminal 34 and the base of the transistor 331, and the emitter of the transistor 321 of the ESD protection element 32 is connected to the input terminal 35 and the base of the transistor 332. The power source Vcc is a power source that supplies power to the integrated circuit 3, and is a DC power source such as a battery or a power source that steps down the voltage of the DC power source.

  Similar to the integrated circuit 1, the integrated circuit 3 includes a substrate made of a P-type semiconductor and an N-type semiconductor portion made of an N-type semiconductor and formed adjacent to the substrate. And a plurality of circuit forming elements formed by interposing a P-type semiconductor portion made of a P-type semiconductor between the type semiconductor portions, and operate in accordance with signals input from the input terminals 34 and 35.

  The ESD protection elements 31 and 32 and the signal processing circuit 33 are semiconductor elements formed in the integrated circuit 3, but are circuits connected to the input terminals 34 and 35 among the circuit forming elements forming the integrated circuit 3. The forming element is the remaining part excluding the N well. Therefore, since the N well is not connected to the input terminals 34 and 35 in the integrated circuit 3, even if a negative surge is applied to the substrate input terminals 38 and 39, a negative voltage is applied to the N well formed in the integrated circuit 3. Is not applied, and malfunction due to the parasitic transistor of the integrated circuit 3 can be prevented. Furthermore, even if a negative surge is applied to the input terminals 34 and 35, the ESD protection elements 31 and 32 prevent abnormal current from flowing into the signal processing circuit 33, and prevent the integrated circuit 3 from being destroyed. be able to.

  Thus, the signal processing circuit 33 includes the two input terminals 34 and 35 and the two differential NPN transistors 331 and 332 whose bases are connected to the two input terminals 34 and 35, respectively. The ESD protection elements 31 and 32 are individually provided for the two input terminals 34 and 35, respectively. Therefore, a negative signal applied to the input terminals 34 and 35 of the integrated circuit 3 without using external components even for a differential signal processing circuit 33 such as a comparator or amplifier using the NTN transistors 331 and 332. It is possible to prevent the integrated circuit 3 from being broken and malfunctioning due to the surge voltage of the nature.

  FIG. 6 is a diagram showing a circuit configuration of an integrated circuit 4 according to the fourth embodiment of the present invention. The integrated circuit 4 that is an integrated circuit device includes ESD protection elements 41 and 42 and a signal processing circuit 43. In the signal processing circuit 43 which is an integrated circuit section, the input terminals 44 and 45 and the transistors whose emitters are connected to the input terminals 44 and 45 are PNP type transistors (hereinafter referred to as “PNP transistors”) 431 and 432, respectively. And a circuit such as a comparator or amplifier. The input terminal 44 is connected to the substrate input terminal 48 via the resistance element 46, and the input terminal 45 is connected to the substrate input terminal 49 via the resistance element 47.

  The ESD protection elements 41 and 42 serving as the protection circuit section have the same circuit configuration as the ESD protection element 11 shown in FIG. 3, and the description of the circuit configuration is omitted to avoid duplication. The emitter of the transistor 411 of the ESD protection element 41 is connected to the input terminal 44 and the emitter of the transistor 431, and the emitter of the transistor 421 of the ESD protection element 42 is connected to the input terminal 45 and the emitter of the transistor 432. The power source Vcc is a power source that supplies power to the integrated circuit 4, and is a DC power source such as a battery or a power source obtained by stepping down the voltage of the DC power source.

  Similar to the integrated circuit 1, the integrated circuit 4 includes a substrate made of a P-type semiconductor and an N-type semiconductor portion made of an N-type semiconductor and formed adjacent to the substrate. And a plurality of circuit forming elements formed by interposing a P-type semiconductor portion made of a P-type semiconductor between the type semiconductor portions, and operate according to signals input from the input terminals 44 and 45.

  The ESD protection elements 41 and 42 and the signal processing circuit 43 are semiconductor elements formed in the integrated circuit 4, but are circuits connected to the input terminals 44 and 45 among the circuit forming elements forming the integrated circuit 4. The forming element is the remaining part excluding the N well. Therefore, since the N well is not connected to the input terminals 44 and 45 in the integrated circuit 4, even if a negative surge is applied to the substrate input terminals 48 and 49, a negative voltage is applied to the N well formed in the integrated circuit 4. Is not applied, and malfunction due to the parasitic transistor of the integrated circuit 4 can be prevented. Furthermore, even when a negative surge is applied to the input terminals 44 and 45, the ESD protection elements 41 and 42 prevent abnormal current from flowing into the signal processing circuit 43, and prevents the integrated circuit 4 from being destroyed. be able to.

  In this way, the signal processing circuit 43 includes two input terminals 44 and 45 and two differential PNP transistors 431 and 432 having emitters connected to the two input terminals 44 and 45, respectively. The ESD protection elements 41 and 42 are individually provided for the two input terminals 44 and 45, respectively. Therefore, a negative surge voltage applied to the input terminals 44 and 45 without using external components even for a differential signal processing circuit 43 such as a comparator or amplifier using the PNP transistors 431 and 432. It is possible to prevent the integrated circuit 4 from being broken and malfunctioning.

  FIG. 7 is a diagram showing a circuit configuration of an integrated circuit 5 according to the fifth embodiment of the present invention. The integrated circuit 5 that is an integrated circuit device includes protection circuits 51 and 52 and a signal processing circuit 53. The signal processing circuit 53, which is an integrated circuit unit, includes input terminals 54 and 55 and a circuit such as a comparator or amplifier in which the transistors connected to the respective bases of the input terminals 54 and 55 are PNP transistors 531 and 532. I have. The input terminal 54 is connected to the substrate input terminal 58 via the resistance element 56, and the input terminal 55 is connected to the substrate input terminal 59 via the resistance element 57.

  A protection circuit 51 as a protection circuit unit includes transistors 511 and 514, resistance elements 512 and 513, and a constant voltage source 515. The transistor 511 which is a first NPN transistor and the resistance element 512 which is a first resistor constitute an ESD protection element. The ESD protection element including the transistor 511 and the resistance element 512 has the same circuit configuration as that of the ESD protection element 11 illustrated in FIG. 3, and description of the circuit configuration is omitted to avoid duplication. The emitter of the transistor 511 is connected to the input terminal 54 and one end of the resistance element 513.

  The resistance element 513, which is a second resistor, the transistor 514, which is a second NPN transistor, and the constant voltage source 515 form a clamp circuit. One end of the resistance element 513 is connected to the input terminal 54, and the other end is connected to the emitter of the transistor 514 and the base of the transistor 531. The transistor 514 is an NPN transistor, the collector is connected to the power supply Vcc, and the base is connected to the constant voltage source 515.

  The power source Vcc is a power source that supplies power to the integrated circuit 5, and is a DC power source such as a battery or a power source obtained by stepping down the voltage of the DC power source. The constant voltage source 515 is, for example, a voltage obtained by resistance-dividing a voltage of the power supply Vcc with a resistor connected in series, and is set to a potential at which the transistor 514 is turned on when a negative voltage is applied to the input terminal 54. Yes.

  A protection circuit 52 that is a protection circuit unit includes transistors 521 and 524, resistance elements 522 and 523, and a constant voltage source 525. Transistors 521, 524, resistance elements 522, 523, and constant voltage source 525 correspond to transistors 511, 514, resistance elements 512, 513, and constant voltage source 515 of protection circuit 51, respectively, and the circuit configuration of protection circuit 52 is The circuit configuration of the protection circuit 51 is the same as that of the protection circuit 51, and the description of the circuit configuration of the protection circuit 52 is omitted to avoid duplication. One end of the resistance element 523 is connected to the input terminal 55, and the other end is connected to the emitter of the transistor 524 and the base of the transistor 532.

  Similar to the integrated circuit 1, the integrated circuit 5 includes a substrate made of a P-type semiconductor and an N-type semiconductor portion that is formed of an N-type semiconductor and is formed adjacent to the substrate. And a plurality of circuit forming elements configured by interposing a P-type semiconductor portion made of a P-type semiconductor between the type semiconductor portions, and operate in accordance with signals input from the input terminals 54 and 55.

  Even if a negative surge is applied to the substrate input terminals 58 and 59, the clamp circuit of the protection circuits 51 and 52 does not cause the input part of the signal processing circuit 53 to become a negative voltage. Even if the bases of 531 and 532 are formed of N-well circuit forming elements, malfunctions due to parasitic transistors of the integrated circuit 5 can be prevented. Furthermore, even if a negative surge is applied to the input terminals 54 and 55, the ESD protection element of the protection circuits 51 and 52 prevents abnormal current from flowing to the signal processing circuit 53, and the integrated circuit 5 is destroyed. Can be prevented.

  As described above, the integrated circuit 5 includes the input terminals 54 and 55, the signal processing circuit 53 that operates according to the signals input from the input terminals 54 and 55, and the abnormal voltage applied to the input terminals 54 and 55. Protection circuits 51 and 52 for protecting the signal processing circuit 53 are provided. The protection circuits 51 and 52 have one ends connected to the resistance elements 512 and 522 connected to the input terminals 54 and 55, the collector connected to the power source Vcc supplied to the signal processing circuit 53, and the emitters connected to the input terminals 54 and NPN transistor transistors 511 and 521 having a base connected to the other ends of the resistor elements 512 and 523, one end connected to the input terminals 54 and 55, and the other end connected to the signal processing circuit 53. NPN transistors 514 and 524 having resistance elements 513 and 523, emitters connected to the signal processing circuit 53, collectors connected to the power supply Vcc, and potentials of constant voltage sources 515 and 525 applied to the bases. And.

  That is, the ESD protection element including the resistance elements 512 and 522 and the transistor transistors 511 and 521 prevents abnormal current from flowing through the signal processing circuit 53, and the clamp circuit including the resistance elements 513 and 523 and the transistors 514 and 524 Therefore, it is possible to prevent the input portion of the signal processing circuit 53 from becoming a negative voltage. Therefore, it is possible to prevent the integrated circuit 5 from being broken and malfunctioning due to the negative surge voltage applied to the input terminals 54 and 55 without using external components. And since it is not necessary to use external parts, cost reduction and size reduction can be achieved.

  The integrated circuits 1 to 5 can be applied to electronic devices such as navigation devices or audio devices mounted on vehicles.

  As described above, since any one of the integrated circuits 1 to 5 is used, even if a negative surge is applied to the input terminal of the integrated circuit used by the electronic device, the integrated circuit may be destroyed or malfunction. Therefore, it is possible to realize an electronic device that is strong against negative surges.

It is a figure which shows the circuit structure of the integrated circuit 9 by a prior art. 3 is a diagram for explaining a parasitic transistor formed in a semiconductor element 8. FIG. It is a figure which shows the circuit structure of the integrated circuit 1 which is the 1st Embodiment of this invention. It is a figure which shows the circuit structure of the integrated circuit 2 which is the 2nd Embodiment of this invention. It is a figure which shows the circuit structure of the integrated circuit 3 which is the 3rd Embodiment of this invention. It is a figure which shows the circuit structure of the integrated circuit 4 which is the 4th Embodiment of this invention. It is a figure which shows the circuit structure of the integrated circuit 5 which is the 5th Embodiment of this invention.

Explanation of symbols

1 to 5, 8, 9 Integrated circuit 11, 21, 31, 32, 41, 42, 91 ESD protection device 12, 22, 33, 43, 53, 92 Signal processing circuit 13, 23, 34, 35, 44, 45 , 54, 55, 93 Input terminals 14, 24, 36, 37, 46, 47, 56, 57, 94, 112, 212, 312, 322, 412, 422, 512, 522, 513, 523, 912 Resistance element 15 , 25, 38, 39, 48, 49, 58, 59, 94 Substrate input terminal 51, 52 Protection circuit 81, 111, 211, 311, 321, 331, 332, 411, 421, 511, 514, 521, 524 911 NPN transistor 82,431,432,531,532,921 PNP transistor 83 Parasitic NPN transistor 213,913 Diode 5 15,525 Constant voltage source

Claims (6)

A substrate having an input terminal and made of a P-type semiconductor and an N-type semiconductor portion made of an N-type semiconductor and formed adjacent to the substrate are partly disposed between the adjacent N-type semiconductor portions. A plurality of circuit forming elements configured by interposing a P-type semiconductor portion made of a P-type semiconductor, and an integrated circuit portion that operates according to a signal input from an input terminal;
A resistor having one end connected to the input terminal, a collector connected to a power source supplied to the integrated circuit unit, an emitter connected to the input terminal, and a base connected to the other end of the resistor And a protection circuit portion formed on the substrate and integrated with the integrated circuit portion, and a protection circuit portion formed on the substrate.
A circuit forming element connected to the input terminal among the plurality of circuit forming elements is connected to the input terminal in a remaining portion excluding the N-type semiconductor portion adjacent to the substrate. Integrated circuit device.   The integrated circuit device according to claim 1, wherein the protection circuit unit further includes a diode having a cathode connected to the power source and an anode connected to the input terminal. The integrated circuit section includes two input terminals and two differential second NPN transistors each having a base connected to each of the two input terminals.
The integrated circuit device according to claim 1, wherein the protection circuit unit is individually provided for each of the two input terminals. The integrated circuit unit includes two input terminals and two differential PNP transistors in which an emitter is connected to each of the two input terminals.
The integrated circuit device according to claim 1, wherein the protection circuit unit is individually provided for each of the two input terminals. An integrated circuit device comprising: an input terminal; an integrated circuit unit that operates according to a signal input from the input terminal; and a protection circuit unit that protects the integrated circuit unit from an abnormal voltage applied to the input terminal Because
The protection circuit unit is
A first resistor having one end connected to the input terminal;
A first NPN-type transistor having a collector connected to a power source supplied to the integrated circuit unit, an emitter connected to the input terminal, and a base connected to the other end of the first resistor;
A second resistor having one end connected to the input terminal and the other end connected to the integrated circuit unit;
An integrated circuit device comprising: an emitter connected to the integrated circuit portion; a collector connected to the power supply; and a second NPN transistor having a predetermined potential applied to a base.   An electronic device using the integrated circuit device according to claim 1.

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