JP2009205187A - Memory controller, nonvolatile storage device, nonvolatile storage system, and memory control method - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To achieve high speed access and power saving by reducing the capacity of an RAM for storing a program to correspond to a plurality of types of flash memories by making programmable the processing of an interface unit to a flash memory. <P>SOLUTION: A program download unit 107 downloads, in accordance with a selecting instruction of a program selecting unit 105, a program to be performed by a memory interface unit 103, selectively from a nonvolatile memory 140 so that it is possible to reduce the capacity of an RAM 104. The download of the program is performed by the program download unit 107 in parallel with the processing in a control unit 102 so that any time overhead can be made unnecessary for the download. In accordance with a command from a host 160, the necessary program is selected so that it is not necessary to download any unnecessary program every time, and thereby it is possible to attain power saving. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a nonvolatile memory device such as a semiconductor memory card including a nonvolatile memory such as a flash memory as a main memory, and a memory controller built in the nonvolatile memory device. Further, a nonvolatile storage system in which an access device is added to the nonvolatile storage device as a constituent element, and a memory control method are also included.

  The demand for nonvolatile memory devices including a rewritable nonvolatile memory is increasing, especially for semiconductor memory cards. Semiconductor memory cards are very expensive compared to optical discs and tape media, but due to their merits such as small size, light weight, earthquake resistance, and easy handling, AV such as digital still cameras and video recording devices The demand for communication devices such as devices and mobile phones is increasing.

  This semiconductor memory card includes a flash memory as a nonvolatile main memory, and has a memory controller for controlling the flash memory. The memory controller performs read / write control on the flash memory in response to a read / write instruction from an access device such as a digital still camera body.

  In accordance with the need for higher quality AV content recorded on such a semiconductor memory card, in recent years, the capacity and cost of flash memories have been rapidly increasing. Specifically, in order to reduce the area occupied by the peripheral circuit of the memory cell array with respect to the memory cell array built in the flash memory, the size of the physical block, which is an erase unit, increases year by year, for example, 256 kbytes or 512 kbytes. It is coming.

  There is also a device for increasing the amount of information that can be stored in one memory cell from 1 bit to multiple bits. For example, the former is represented by a binary NAND flash memory, and the latter is represented by a multi-value NAND flash memory. A multi-level NAND flash memory is less expensive than a binary NAND flash memory, but has disadvantages such as a slow access speed or poor reliability. For example, high speed and high reliability are required. In applications, binary NAND flash memories are still used.

  In view of such a situation, it is desired to realize a versatile memory control method that can support various types of flash memories. For example, a program describing the processing of the memory interface unit in the memory controller is stored in advance in the flash memory, and the program is downloaded from the flash memory to the RAM in the memory controller and used when the power is turned on. Yes. By using this technology, it is possible to realize a semiconductor memory card with a long product life that can be easily handled by rewriting the program even if the type of flash memory mounted on the semiconductor memory card changes. It is possible to rationalize the costs related to

As the above-mentioned related technology, a function expansion method of a microcontroller is known as in Patent Document 1.
JP 2003-58377 A

  However, the conventional method for downloading the program of the memory interface unit described above requires a RAM that holds all the programs of the memory interface unit.

  In view of the above problems, an object of the present invention is to reduce the capacity of a RAM and the cost of a memory controller by selectively downloading a program of a memory interface unit.

  In order to achieve the above object, the present invention takes the following technical means.

  That is, the technical means in the present invention is a memory controller that writes data to the nonvolatile memory and reads data from the nonvolatile memory, the host interface unit that communicates with the outside, and the memory controller A control unit that controls the operation of each unit; and a memory interface unit that performs read / write control on the nonvolatile memory, wherein the control unit is a program necessary for read / write control of the memory interface unit with respect to the memory interface unit. The memory interface unit has a program download unit that selectively downloads the program from the nonvolatile memory in response to the selection instruction, and the downloaded program is stored in the RA. Characterized by holding the.

  The technical means in the present invention is a nonvolatile memory device having a nonvolatile memory and a memory controller for writing and reading data to and from the nonvolatile memory, and the memory controller communicates with the outside. A host interface unit; a control unit that controls the operation of each unit of the memory controller; and a memory interface unit that performs read / write control on the nonvolatile memory, the control unit including the memory interface unit with respect to the memory interface unit A program selection unit for instructing selection of a program necessary for read / write control of the unit, and the memory interface unit includes a program download unit for selectively downloading the program from the nonvolatile memory in accordance with the selection instruction. And, characterized by holding the program downloaded to the RAM.

  The technical means in the present invention is a nonvolatile storage system having a host device and a nonvolatile storage device connected to the host device, wherein the nonvolatile storage device includes a nonvolatile memory and the nonvolatile storage device. A memory controller that writes and reads data to and from the memory, and the memory controller includes a host interface unit that communicates with the host device, a control unit that controls the operation of each unit of the memory controller, and the nonvolatile memory A memory interface unit that performs read / write control on the memory, and the control unit includes a program selection unit that instructs the memory interface unit to select a program necessary for read / write control of the memory interface unit, The memory interface unit is It has selectively a program download unit for downloading the program from the nonvolatile memory in accordance with the-option indication, characterized by holding the program downloaded to the RAM.

  It is preferable that the program selection unit selects the program according to either the type of instruction designated from the outside or the operation mode.

  Further, the technical means in the present invention is a memory control method for a nonvolatile memory, wherein a program for executing data reading / writing from the nonvolatile memory is selectively selected from the nonvolatile memory in accordance with a data reading / writing command. A download process for reading and downloading the read program to the RAM is executed in parallel with other processes.

  Preferably, the nonvolatile memory program is selected by a data read / write instruction or a memory controller operation.

  According to the present invention, since the program download unit selectively downloads a program in accordance with a selection instruction from the program selection unit, the capacity of the RAM can be reduced.

  Furthermore, since the control unit executes the program download in parallel with the control of the operation of each unit, the time overhead required for the download can be reduced.

  Furthermore, since the necessary programs are selected and downloaded according to either the type of instruction or the operation mode specified from the outside, it is not necessary to download all the programs every time, resulting in power saving. Can be realized.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(Embodiment)
FIG. 1 is a block diagram showing a main configuration of a nonvolatile storage system according to an embodiment of the present invention. The nonvolatile storage system according to the present embodiment includes a host device (hereinafter referred to as a host) 160 and a nonvolatile storage device 150. The host 160 and the nonvolatile storage device 150 are connected by the bus 1.

  The nonvolatile storage device 150 includes a memory controller 100 and a nonvolatile memory 110. The memory controller 100 includes a host interface unit 101 that communicates with the host 160 via the bus 1, a control unit 102, a memory interface unit 103 that communicates with the nonvolatile memory 110 via the bus 2, and a RAM 104. The control unit 102 includes a program selection unit 105 and a logical / physical conversion table 106, and the memory interface unit 103 includes a program download unit 107. The nonvolatile memory 110 includes a program area 120 and a normal area 140, and the normal area 140 includes a table area 130.

  In the program area 120, a program describing the processing contents of the memory interface unit 103 is written in advance before product shipment. This program is, for example, a first processing program 121, a second processing program 122, and a third processing program 123. Here, when writing these programs into the program area 120, writing is performed with a number assigned to the first byte.

  The logical-physical conversion table 106 is temporarily stored in the RAM in the control unit 102, updated after data is written or erased by a write or erase command from the host 160, and is written back to the table area 130. .

  FIG. 2 is a flowchart showing the processing contents of the nonvolatile storage system according to the embodiment of the present invention.

  FIG. 3 is a time chart showing processing contents of the nonvolatile memory system according to the embodiment of the present invention.

  4 is a flowchart showing the contents of read processing of the memory interface unit 103, FIG. 5 is a flowchart showing contents of write processing of the memory interface unit 103, and FIG. 6 is a flowchart showing contents of erase processing of the memory interface unit 103.

  The operation of the nonvolatile storage system configured as described above will be described with reference to FIG.

  First, the host 160 transmits a command to the host interface unit 101 (S200), the host interface unit 101 receives the command (S201), and determines the operation mode from the command received by the host interface unit 101 (S202).

  Here, the processing of S202 will be described in detail using Table 1. The operation mode is classified into two types of initialization and normal operation according to the type of command transmitted from the host 160. The value of the first byte in the program area 120 is 0x01 for reading, 0x02 for writing, and 0x03 for erasing.

  Initialization means that the memory interface unit 103 loads the logical-physical conversion table 106 from the table area 130 to the RAM in the control unit 102 in accordance with an initialization command received from the host 160 immediately after the power of the nonvolatile storage device 150 is turned on. This refers to performing an operation such as reading and making data ready to be read or written. On the other hand, the normal operation is an operation in which the memory interface unit 103 writes, reads, or erases the normal area 140 in accordance with a command from the host 160 after initialization.

  Reading will be described with reference to the flowchart of FIG.

  Reading is an operation of reading data recorded at a physical address in the normal area 140 corresponding to a logical address designated by the host 160. The memory interface unit 103 transmits an address input command to the non-volatile memory 110 (S400), outputs a physical address (S401), and finally transmits a read start command (S402), thereby performing reading.

  Writing will be described with reference to the flowchart of FIG.

  The writing is an operation of writing data designated at a physical address in the normal area 140 corresponding to a logical address designated by the host 160. The memory interface unit 103 transmits a data / address input command to the nonvolatile memory 110 (S500), outputs a physical address (S501), further outputs data (S502), and finally transmits a write start command (S503). By doing so, writing is executed.

  The erasure will be described with reference to the flowchart of FIG.

  The erasing is an operation of erasing data of the physical address in the normal area 140 corresponding to the logical address designated by the host 160 from the normal area 140. The memory interface unit 103 transmits an address input command to the non-volatile memory 110 (S600), outputs a physical address (S601), and finally transmits an erase start command (S602) to execute erasure.

  Returning to FIG. 2, the following description will be given.

  The host interface unit 101 determines whether or not the operation mode is normal operation (S203). If the operation mode is normal operation, the host interface unit 101 extracts a logical address from the command argument (S204). Transmits a command and a logical address to the control unit 102 (S205), the control unit 102 converts the logical address into a physical address using the logical-physical conversion table 106 (S206), and the control unit 102 converts the physical address into the memory interface unit. 103 (S207), and the memory interface unit 103 accesses the normal area 140 based on the program on the RAM 104 (S213).

  The logical-physical conversion process described above is a so-called wear leveling process for dealing with the limit (lifetime) of the number of writes in the nonvolatile memory 110 and can be realized by using a known technique, and thus the description thereof is omitted. To do.

  Next, the operation from S208 will be described. S208 to S210 are executed in parallel with S203 after the processing of S202.

  A program to be executed by the program selection unit 105 is selected (S208).

  In selecting a program, for example, if the operation mode is initialization, a “read” program in which the first byte of the program area 120 is 0x01 is selected. If the operation mode is normal operation and the program selected from the command is erasure, the “erase” program whose first byte in the program area 120 is 0x03 is selected. Here, the program selection unit 105 holds data of the first byte (hereinafter referred to as a new first byte).

  Thereafter, it is determined whether the program has not been downloaded (S209). If the program has not been downloaded, the program download unit 107 downloads the program on the program area 120 to the RAM 104 (S210).

  Here, the processing of S209 and S210 will be described in detail. First, the first byte of the program already downloaded by the program download unit 107 (hereinafter referred to as the old first byte) is acquired from the RAM 104 and held. Compare the data in the new first byte and the old first byte. If they are different, it is determined as yes, and if they are the same, it is determined as no. If it is determined as no, the process of S210 is not executed. In S209, for example, when the command from the host 160 is continuous twice, the operation mode is normal operation, and the program is erase, the determination of S209 is no for the second time. If it is determined to be no, the process of S210 is skipped, and the program is not downloaded from the program area 120.

  Note that the processing from S205 to S207 is S220, and the processing from S208 to S210 is S230.

  Next, a process when the operation mode is initialization in the determination of S203 will be described.

  It is determined whether the program has been downloaded (S211). If the program has been downloaded, the control unit 102 reads the logical-physical conversion table 106 in the table area 130 into the RAM in the control unit 102 (S212).

  Here, the processing of S211 and S212 will be described in detail. First, since the program necessary for initialization is “read” as shown in Table 1, the first byte of the RAM 104 is acquired and it is checked whether it is 0x01. If it is not 0x01, the determination is no, so the first byte of the RAM 104 is acquired once again and the determination is made. At this time, the process of S230 is simultaneously performed. In S230, since the operation mode is initialization, a read program is downloaded. For this reason, when the download of the program is completed, the determination in S211 is yes, and the process of S212 is performed.

  The time relationship between the control unit 102, the program selection unit 105, and the program download unit 107 will be described with reference to FIG.

  First, the memory interface unit 103 accesses the nonvolatile memory 110 with a physical address. In the case of normal operation, the host 160 accesses the nonvolatile storage device 150 with a logical address, so the control unit 102 must convert the logical address to a physical address and pass the physical address to the memory interface unit 103. . That is, in order for the memory interface unit 103 to access the nonvolatile memory 110, the physical address must be determined by the logical-physical conversion process of the control unit 102.

  Therefore, the program download unit 107 downloads the program using the logical-physical conversion process period of the control unit 102.

  As described above, the nonvolatile storage system according to the embodiment of the present invention reduces the capacity of the ROM 104 because the program download unit 107 selectively downloads a program in response to a selection instruction from the program selection unit 105. Can do.

  Further, in the normal operation, the download process of the program download unit 107 is performed in parallel with the process such as logical-physical conversion of the control unit 102, so that the download process is performed within the time required for the process of the control unit 102. Can do. That is, the time overhead required for downloading is not required.

  Further, the program of the memory interface unit 130 is written in advance in the program area 120 before shipping the product, and a number is assigned to the first byte at the time of writing, so that the program area 120 is stored in the first processing program 121 and the second processing program. By distinguishing between the processing program 122 and the third processing program 123, the program on the RAM 104 can be compared before the program download unit 107 downloads the program selected by the program selection unit 105. As a result, the process of downloading to the RAM can be performed only when the comparison results are different. In this way, power saving can be realized by minimizing the download from the program area 120 to the RAM 104.

  The non-volatile memory according to the present invention proposes a cost reduction of a memory controller and a non-volatile memory device or a non-volatile memory system on which the memory controller is mounted, and uses a non-volatile memory device such as a semiconductor memory card. This is useful in an image recording / reproducing apparatus, a moving picture recording / reproducing apparatus, or a mobile phone.

The block diagram which shows the structure of the non-volatile storage system in embodiment of this invention Flow chart showing processing contents of the nonvolatile storage system Time chart showing processing contents of the nonvolatile storage system Flow chart showing read processing contents of memory interface unit Flow chart showing write processing contents of memory interface unit Flow chart showing contents of erasure processing in memory interface unit

Explanation of symbols

100 Memory Controller 101 Host Interface Unit 102 Control Unit 103 Memory Interface Unit 104 RAM
DESCRIPTION OF SYMBOLS 105 Program selection part 106 Logical-physical conversion table 107 Program download part 110 Non-volatile memory 120 Program area 121 1st process program 122 2nd process program 123 3rd process program 130 Table area 140 Normal area 150 Non-volatile storage device 160 host

Claims (8)

A memory controller for writing data to a nonvolatile memory and reading data from the nonvolatile memory,
A host interface unit that communicates with the outside, a control unit that controls the operation of each unit of the memory controller, and a memory interface unit that performs read / write control on the nonvolatile memory,
The control unit includes a program selection unit that instructs the memory interface unit to select a program necessary for read / write control of the memory interface unit,
The memory interface unit includes a program download unit that selectively downloads the program from the nonvolatile memory according to the selection instruction, and stores the downloaded program in a RAM. The memory controller according to claim 1, wherein the program selection unit selects the program in accordance with either a type of instruction designated from the outside or an operation mode. A non-volatile storage device having a non-volatile memory and a memory controller for writing and reading data to and from the non-volatile memory,
The memory controller includes a host interface unit that communicates with the outside, a control unit that controls the operation of each unit of the memory controller, and a memory interface unit that performs read / write control on the nonvolatile memory,
The control unit includes a program selection unit that instructs the memory interface unit to select a program necessary for read / write control of the memory interface unit,
The memory interface unit includes a program download unit that selectively downloads the program from the nonvolatile memory in response to the selection instruction, and stores the downloaded program in a RAM. . The non-volatile storage device according to claim 3, wherein the program selection unit selects the program in accordance with either the type of instruction designated from the outside or an operation mode. A nonvolatile storage system having a host device and a nonvolatile storage device connected to the host device,
The nonvolatile memory device includes a nonvolatile memory, and a memory controller that writes and reads data to and from the nonvolatile memory,
The memory controller includes a host interface unit that communicates with the host device, a control unit that controls the operation of each unit of the memory controller, and a memory interface unit that performs read / write control on the nonvolatile memory,
The control unit includes a program selection unit that instructs the memory interface unit to select a program necessary for read / write control of the memory interface unit,
The memory interface unit includes a program download unit that selectively downloads the program from the nonvolatile memory according to the selection instruction, and stores the downloaded program in a RAM. . 4. The nonvolatile storage system according to claim 3, wherein the program selection unit selects the program in accordance with either a type of instruction designated from the outside or an operation mode. A memory control method for a non-volatile memory, comprising:
In accordance with a data read / write instruction, a program for performing data read / write from the nonvolatile memory is selectively read from the nonvolatile memory,
A memory control method, wherein download processing for downloading the read program to a RAM is executed in parallel with other processing. 8. The memory control method according to claim 7, wherein a program of the nonvolatile memory is selected by a data read / write instruction or an operation of a memory controller.

Images