JP2009123754A - Light-emitting device and manufacturing method thereof - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a light-emitting device having a high reverse breakdown voltage and a manufacturing method of the light-emitting device capable of forming the light-emitting device having the high reverse breakdown voltage with a good yield. <P>SOLUTION: The light-emitting device comprises an electrically conductive support substrate having side faces mechanically processed, and a compound semiconductor layer having side faces formed by etching and provided on the support substrate, including at least an light-emitting layer. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a light emitting device and a method for manufacturing the light emitting device. In particular, the present invention relates to a light emitting device having a high reverse breakdown voltage yield and a method for manufacturing the light emitting device.

  As a conventional light emitting diode (LED), for example, there is an LED in which a compound semiconductor layer including an AlGaInP light emitting layer is bonded to a Si substrate via a metal layer. This LED includes a Si substrate and a compound semiconductor layer formed on the Si substrate via a metal layer, and the compound semiconductor layer includes an n-AlGaInP layer and an undoped AlGaInP formed on the n-AlGaInP layer. A p-AlGaInP layer formed on the undoped AlGaInP layer, and a p-AlGaAs layer formed on the p-AlGaInP layer (see, for example, Patent Document 1).

JP 2005-109207 A

  However, in the LED manufacturing method described in Patent Document 1, when the element is separated by a dicing apparatus from a wafer in which the Si substrate and the compound semiconductor layer are bonded together, the light emitting layer is directly diced and shaved and supplied to the light emitting layer. A leak path of the generated current is generated at the end face of the light emitting layer. This has the disadvantage that the reverse breakdown voltage of the light emitting element is reduced.

  Accordingly, an object of the present invention is to provide a method for manufacturing a light emitting device with a high reverse breakdown voltage and a light emitting device with a high reverse breakdown voltage that can be formed with high yield.

  In order to achieve the above object, the present invention has a conductive support substrate having a machined processed side surface and an etched side surface formed by etching, and is provided on the support substrate including at least a light emitting layer. There is provided a light emitting device including the compound semiconductor layer.

  In the light emitting device, the etching side surface of the compound semiconductor layer may be formed perpendicular to the support substrate. Alternatively, in the light emitting device, the etching side surface of the compound semiconductor layer may be formed at a predetermined angle with respect to the normal direction of the support substrate. In this case, the etching side surface may have an inclination of 10 degrees or more with respect to the normal direction.

  Further, in the light emitting device, the semiconductor layer is formed in a predetermined region of the semiconductor layer having a plurality of through holes, and is formed by filling the through holes with a transparent layer transparent to light emitted from the light emitting layer. And may have a plurality of contact junctions that are in ohmic contact with the semiconductor layer. Further, the ratio of the total value A of the areas where the plurality of contact junctions are in contact with the semiconductor layer to the total value C of the area B and the total value A of the area where the transparent layer is in contact with the semiconductor layer is 10% or less. It may be.

Further, the light emitting device, a transparent layer _may include one of SiO 2, SiN _x, or ITO. In the light emitting device, the semiconductor layer includes a first semiconductor layer of the first conductivity type and a second semiconductor layer of the second conductivity type having a resistance value lower than the resistance value of the first semiconductor layer. In addition, a light emitting layer may be provided between the first semiconductor layer and the second semiconductor layer.

  According to another aspect of the present invention, in order to achieve the above object, a first conductive type first semiconductor layer, a light emitting layer, and a second conductive type second semiconductor layer are sequentially formed on a semiconductor substrate; A step of forming a transparent layer transparent to light emitted from the light-emitting layer and having a plurality of openings in a predetermined region on the second semiconductor layer; and a contact electrically connected to the second semiconductor layer in the plurality of openings A step of forming an electrode, a step of forming at least a reflective layer for reflecting light emitted from the light emitting layer, and a bonding layer formed of a conductive material on the contact electrode and the transparent layer, and a conductive material. A step of preparing a conductive support substrate on which an adhesion layer to be formed is formed, a step of connecting the adhesion layer of the support substrate and the bonding layer, and a step of removing the semiconductor substrate and exposing the first semiconductor layer And at least a second semiconductor layer from the exposed first semiconductor layer side , A light emitting layer, through the second semiconductor layer, and etching to the top of the supporting substrate, a manufacturing method of a light-emitting device comprising a step of mechanically cutting is provided a supporting substrate.

  According to the method for manufacturing a light emitting device of the present invention, a light emitting device with a high reverse breakdown voltage can be formed with a high yield, and a light emitting device with a high reverse breakdown voltage can be provided.

[First Embodiment]
FIG. 1A is a schematic longitudinal sectional view of a light emitting device according to a first embodiment of the present invention. 1B shows a schematic top view of the light emitting device according to the first embodiment of the present invention, and FIG. 1B (b) shows a line AA in FIG. 1A. The typical top view of the light-emitting device at the time of cut | disconnecting a light-emitting device is shown.

(Configuration of light-emitting device 1)
The light emitting device 1 according to the first embodiment is electrically connected to a semiconductor multilayer structure 10 having an active layer 105 that emits light of a predetermined wavelength and a partial region of one surface of the semiconductor multilayer structure 10. A plurality of contact electrodes 120 as contact junctions that are electrically connected to the surface electrode 110, a part of another surface opposite to one surface of the semiconductor multilayer structure 10, and a plurality of contact electrodes 120 are provided. A transparent layer 140 that covers the other surface of the semiconductor multilayer structure 10 excluding the region being present, and a reflective portion 130 that is provided on the opposite side of the contact electrode 120 and the surface of the transparent layer 140 that contacts the other surface of the semiconductor multilayer structure 10. .

  Furthermore, the light-emitting device 1 includes the adhesion layer 200 provided on the opposite side of the surface in contact with the contact electrode 120 and the transparent layer 140 of the reflection unit 130 and the electric conductivity provided on the opposite side of the surface of the adhesion layer 200 in contact with the reflection unit 130. Support substrate 20 and back electrode 210 provided on the surface opposite to the surface in contact with adhesion layer 200 of support substrate 20.

  Also, the semiconductor multilayer structure 10 of the light emitting device 1 according to the present embodiment is a p-type contact layer 109 provided on the contact electrode 120 and the transparent layer 140, and a predetermined region on the outer periphery of the p-type contact layer 109. A p-type cladding layer 107 provided on a portion excluding the p-type contact layer surface 109a exposed to the outside, an active layer 105 as a light emitting layer provided on substantially the entire surface of the p-type cladding layer 107, and an active layer 105 And an n-type contact layer 101 provided in a predetermined region including the center of the n-type clad layer 103.

  Further, the reflective portion 130 is provided in contact with the reflective layer 132 provided in contact with the contact electrode 120 and the transparent layer 140, and on the opposite side of the surface of the reflective layer 132 in contact with the contact electrode 120 and transparent layer 140. The barrier layer 134 includes a bonding layer 136 provided in contact with the barrier layer 134 on the side opposite to the surface of the barrier layer 134 in contact with the reflective layer 132.

  The adhesion layer 200 includes a bonding layer 202 that is mechanically and electrically bonded to the bonding layer 136 of the reflective portion 130, a barrier layer 204 that is provided on the opposite side of the surface of the bonding layer 202 that contacts the reflective portion 130, and a barrier. A contact electrode 206 provided on the opposite side of the surface in contact with the bonding layer 202 of the layer 204;

  Here, the light emitting device 1 has a side surface 10 a as an etching side surface including at least the side surface of the active layer 105. More desirably, the light emitting device 1 has a side surface 10 a including at least a side surface of the n-type cladding layer 103, a side surface of the active layer 105, and a side surface of the p-type cladding layer 107. The side surface 10 a is formed perpendicular to the surface of the support substrate 20. Furthermore, the light emitting device 1 has a processed surface 10 b as a processed side surface including the side surface of the p-type contact layer 109, the side surface of the reflective portion 130, the side surface of the adhesion layer 200, and the side surface of the support substrate 20.

  The side surface 10a is a surface generated by removing a part of the n-type cladding layer 103, a part of the active layer 105, and a part of the p-type cladding layer 107 by a chemical reaction such as wet etching. . On the other hand, the processed surface 10b has a part of the p-type contact layer 109, a part of the reflection part 130, a part of the adhesion layer 200, and a part of the support substrate 20 respectively dicing using a dicing apparatus. It is a surface that is generated by mechanical cutting by means of, for example. Therefore, the side surface 10a has a smooth surface compared to the processed surface 10b. On the other hand, the processed surface 10b has an uneven shape.

  Moreover, as shown to Fig.1B (a), the light-emitting device 1 which concerns on this embodiment is formed in a substantially square by top view. As an example, the vertical dimension and the horizontal dimension of the light emitting device 1 are approximately 300 μm, respectively. The thickness of the light emitting device 1 is approximately 200 μm.

  The semiconductor multilayer structure 10 according to this embodiment is formed by including an AlGaInP-based compound semiconductor that is a III-V group compound semiconductor. Specifically, the semiconductor multilayer structure 10 includes an active layer 105 formed from a bulk of an undoped AlGaInP-based compound semiconductor that is not doped with an impurity dopant, and includes an n-type AlGaInP as a first conductivity type. The n-type cladding layer 103 to be formed is sandwiched between the p-type cladding layer 107 formed to include p-type AlGaInP as the second conductivity type.

Here, the active layer 105 emits light of a predetermined wavelength when a current is supplied from the outside. For example, the active layer 105 is formed to emit red light having a wavelength of 630 nm. As an example, the active layer 105 is formed of an undoped (Al _0.1 Ga _0.9 ) _0.5 In _0.5 P layer. The n-type cladding layer 103 includes an n-type dopant such as Si or Se at a predetermined concentration. As an example, the n-type cladding layer 103 is formed of an n-type (Al _0.7 Ga _0.3 ) _0.5 In _0.5 P layer doped with Si. Furthermore, the p-type cladding layer 107 contains a p-type dopant such as Zn or Mg at a predetermined concentration. As an example, the p-type cladding layer 107 is formed of a p-type (Al _0.7 Ga _0.3 ) _0.5 In _0.5 P layer doped with Mg.

  Furthermore, the p-type contact layer 109 included in the semiconductor multilayer structure 10 is formed of, for example, a p-type GaP layer doped with Mg at a predetermined concentration. The n-type contact layer 101 is formed from a GaAs layer doped with Si at a predetermined concentration. Here, the n-type contact layer 101 is provided only in the region where the surface electrode 110 is provided on the upper surface of the n-type cladding layer 103.

  That is, as shown in FIG. 1B (a), the surface electrode 110 is formed above the n-type cladding layer 103, and is formed to extend radially from the outer periphery of the pad portion 110a formed on a substantially circular shape and the pad portion 110a. And a plurality of branch portions 110b. An n-type contact layer 101 is provided at a position sandwiched between the n-type cladding layer 103 and the surface electrode 110 immediately below the surface electrode 110. As an example, the pad portion 110a is formed in a circular shape having a diameter of 100 μm, and the four branch portions 110b are formed in a line shape having a width of 10 μm. A wire made of Au or the like that supplies power to the active layer 105 is bonded to the pad portion 110a.

  Contact electrode 120 is formed on the surface of p-type contact layer 109 opposite to p-type contact layer surface 109a. Specifically, a plurality of contact electrodes 120 having a substantially circular shape in a top view are provided on the surface of the p-type contact layer 109 excluding a region immediately below the surface electrode 110. As an example, the contact electrode 120 is made of a metal material containing Au and Zn and has a substantially circular shape with a diameter of 15 μm.

  In the present embodiment, as shown in FIG. 1B (b), 40 contact electrodes 120 are irregularly arranged on the surface of the p-type contact layer 109. The arrangement of the contact electrode 120 may be a regular arrangement such as a matrix as long as it is not provided on the surface of the p-type contact layer 109 corresponding to the region immediately below the surface electrode 110. Further, the shape of the contact electrode 120 in a top view may be a polygonal shape.

The transparent layer 140 is provided on the opposite side of the p-type contact layer surface 109a of the p-type contact layer 109 and in a region where the plurality of contact electrodes 120 are not provided. The transparent layer 140 is formed of a material that is transparent to the wavelength of light emitted from the active layer 105. As an example, a transparent dielectric layer such as SiO ₂ , TiO ₂ , or SiN _x , or ITO (Indium Tin Oxide) is used. Formed of a transparent conductor layer containing a metal oxide material.

  Here, the relationship between the total area A of the plurality of contact electrodes 120 on the p-type contact layer 109 and the area B of the transparent layer 140 on the p-type contact layer 109 is 100 × from the viewpoint of improving light extraction efficiency. It is desirable that A / (A + B) ≦ 10 (%). This is because part of the light emitted by the active layer 105 is absorbed at the interface between the contact electrode 120 and the p-type contact layer 109, so that the total area of the contact electrode 120 is larger than the area of the p-type contact layer 109. This is because it is desirable to be equal to or less than a predetermined value.

  In this embodiment, the diameter of one contact electrode 120 is 15 μm, and the shape of the p-type contact layer 109 in a top view is 300 μm square. Then, 40 contact electrodes 120 are formed on the 300 μm square p-type contact layer 109. Therefore, the ratio of the area of the plurality of contact electrodes 120 to the area of the p-type contact layer 109 is 7.85%.

  As long as the relationship between the total area A of the plurality of contact electrodes 120 on the p-type contact layer 109 and the area B of the transparent layer 140 on the p-type contact layer 109 satisfies 100 × A / (A + B) ≦ 10. The size and number of the contact electrodes 120 are not limited to the above embodiment.

  The reflective layer 132 of the reflective unit 130 is formed of a conductive material having a predetermined reflectance with respect to light emitted from the active layer 105. The reflective layer 132 is made of a metal material such as Al, Au, or Ag. As an example, the reflective layer 132 is made of Al having a predetermined thickness. The barrier layer 134 of the reflection unit 130 is formed of a metal material such as Ti or Pt, and as an example, is formed of Ti having a predetermined thickness. The bonding layer 136 is formed of a material that is electrically and mechanically bonded to the bonding layer 202 of the adhesion layer 200, and is formed of Au having a predetermined thickness as an example.

  The support substrate 20 is formed from a conductive material. The support substrate 20 can be formed of a p-type or n-type conductive Si substrate, a Ge substrate, a GaAs substrate, or a substrate made of a metal material such as Cu. In this embodiment, the support Si substrate is a conductive Si substrate. It can be used as the support substrate 20.

  Then, the bonding layer 202 of the adhesion layer 200 can be formed of Au having a predetermined film thickness, similarly to the bonding layer 136 of the reflecting portion 130. The barrier layer 204 is formed of a metal material such as Ti or Pt, and can be formed of Pt having a predetermined thickness as an example. Further, the contact electrode 206 is formed from a material that is electrically bonded to the support substrate 20 and is formed from a metal material including Au, Ti, Al, or the like. As an example, the contact electrode 206 is made of Al having a predetermined thickness.

  The back electrode 210 is formed from a material that is electrically bonded to the support substrate 20, and is formed from a metal material such as Ti or Au, for example. In the present embodiment, the back electrode 210 has Ti and Au. Then, Ti having a predetermined film thickness is provided by being electrically joined to the support substrate 20, and Au having a predetermined film thickness is further provided on the Ti. The light emitting device 1 is mounted at a predetermined position of a stem formed of a metal such as Cu using a conductive bonding material such as Ag paste with the back electrode 210 facing down.

  In addition, although the light-emitting device 1 which concerns on this embodiment emits the light containing red with a wavelength of 630 nm, the wavelength of the light which the light-emitting device 1 emits is not limited to this wavelength. The light emitting device 1 that emits light in a predetermined wavelength range can be formed by controlling the structure of the active layer 105 of the semiconductor multilayer structure 10. The semiconductor multilayer structure 10 included in the light emitting device 1 can also be formed of an InAlGaN-based compound semiconductor including an active layer 105 that emits light in the ultraviolet region, the violet region, or the blue region.

  Furthermore, the semiconductor multilayer structure 10 included in the light emitting device 1 can be formed by including an AlGaInP-based active layer 105 that emits light having a wavelength of 560 nm to 660 nm. In this case, the light emitting device can be formed by using the same material, doping concentration, and the like for forming the other compound semiconductor layers except the active layer 105.

  Moreover, the planar dimension of the light-emitting device 1 is not restricted to said embodiment. For example, the planar dimension of the light emitting device 1 can be designed so that the vertical dimension and the horizontal dimension are approximately 350 mm, respectively, and the vertical dimension and the horizontal dimension are appropriately changed according to the use application of the light emitting apparatus 1. Thus, the light emitting device 1 can be formed.

  The quantum well structure of the active layer 105 can be formed from any structure of a single quantum well structure, a multiple quantum well structure, or a strained multiple quantum well structure. Also, for the purpose of spreading the current supplied from the back electrode 210 and supplying it to the active layer 105, the resistance value of the n-type cladding layer 103 as the n-type second semiconductor layer as the second conductivity type is The n-type cladding layer 103 and the p-type cladding layer 107 can also be formed by lowering the resistance value of the p-type cladding layer 107 as the p-type first semiconductor layer as the first conductivity type.

(Method for manufacturing light-emitting device 1)
2A to 2H show a flow of manufacturing steps of the light emitting device according to the first embodiment of the present invention.

  First, as shown in FIG. 2A (a), an AlGaInP-based material including a plurality of compound semiconductor layers on an n-GaAs substrate 100 by, for example, metal organic vapor phase epitaxy (MOVPE method). A semiconductor multilayer structure 11 is formed. Specifically, it is formed using an MOCVD apparatus using metal organic chemical vapor deposition (MOCVD).

Specifically, on the n-GaAs substrate 100, an etching stop layer 102 having undoped (Al _0.7 Ga _0.3 ) _0.5 In _0.5 P, and an n-type doped with Si N-type contact layer 101 having GaAs, n-type cladding layer 103 having n-type (Al _0.7 Ga _0.3 ) _0.5 In _0.5 P doped with Si, and undoped (Al _{0 .1} Ga _0.9 ) _0.5 In _0.5 P active layer 105 and Mg-doped p-type (Al _0.7 Ga _0.3 ) _0.5 In _0.5 P A p-type cladding layer 107 and a p-type contact layer 109 containing p-type GaP doped with Mg are formed in this order using the MOVPE method. As a result, an epitaxial wafer in which the semiconductor multilayer structure 11 is formed on the n-GaAs substrate 100 is formed.

Here, the formation of the semiconductor multilayer structure 11 using the MOVPE method is performed at a growth temperature of 650 ° C., a growth pressure of 50 Torr, and a growth rate of each compound semiconductor layer of the semiconductor multilayer structure 11 of 0.3 nm / It is carried out by setting the V / III ratio to about 200 from sec to 1.0 nm / sec. The V / III ratio is a group V such as arsine (AsH ₃ ) and phosphine (PH ₃ ) based on the number of moles of a group III raw material such as trimethylgallium (TMGa) or trimethylaluminum (TMAl). It is the ratio of the number of moles of raw materials.

The raw materials used in the MOVPE method are organometallic compounds such as trimethylgallium (TMGa), triethylgallium (TEGa), trimethylaluminum (TMAl), trimethylindium (TMIn), arsine (AsH ₃ ), and phosphine (PH ₃ ). A hydride gas such as can be used. Furthermore, disilane (Si ₂ H ₆ ) can be used as a raw material for the n-type dopant. Then, the raw material of p-type dopant can be used biscyclopentadienyl magnesium (Cp 2 _Mg).

Alternatively, hydrogen selenide (H ₂ Se), monosilane (SiH ₄ ), diethyl tellurium (DETe), or dimethyl tellurium (DMTe) can be used as a raw material for the n-type dopant. And dimethyl zinc (DMZn) or diethyl zinc (DEZn) can also be used as a raw material of a p-type dopant.

  The semiconductor multilayer structure 11 on the n-GaAs substrate 100 can also be formed using molecular beam epitaxy (MBE), halide vapor phase epitaxy (Halide Vapor Phase Epitaxy: HVPE), or the like. .

Next, as shown in FIG. 2A (b), after the epitaxial wafer formed in FIG. 2A (a) is unloaded from the MOCVD apparatus, a transparent layer 140 is formed on the surface of the p-type contact layer 109. Specifically, a SiO ₂ film as the transparent layer 140 is formed on the surface of the p-type contact layer 109 using a plasma CVD (Chemical Vapor Deposition) apparatus.

  Next, as shown in FIG. 2B (c), a plurality of openings 140a are formed in the transparent layer 140 by using a photolithography method and an etching method. Each of the plurality of openings 140 a is formed to penetrate from the surface of the transparent layer 140 to the interface between the p-type contact layer 109 and the transparent layer 140. Specifically, a plurality of openings 140 a having a substantially circular shape with a diameter of 15 μm as viewed from above are formed in the transparent layer 140 using an etchant as a hydrofluoric acid-based etching solution.

  Subsequently, as shown in FIG. 2B (d), an AuZn alloy as the contact electrode 120 is formed in each of the plurality of openings 140a by using a vacuum deposition method and a photolithography method. Next, as shown in FIG. 2B (e), an Al layer as the reflective layer 132, a Ti layer as the barrier layer 134, and an Au layer as the bonding layer 136 are formed by vacuum deposition. Thereby, the semiconductor laminated structure 1a is formed.

  Next, as shown in FIG. 2C (f), on the conductive Si substrate as the support substrate 20, Ti as the contact electrode 206, Pt as the barrier layer 204, and Au as the bonding layer 202 are formed. They are formed in this order using a vacuum deposition method. Thereby, the support structure 20a is formed. Subsequently, the bonding surface 136a, which is the surface of the bonding layer 136 of the semiconductor multilayer structure 1a, and the bonding surface 202a, which is the surface of the bonding layer 202 of the support structure 20a, face each other and overlap each other with a predetermined jig. Hold.

Subsequently, a jig holding a state in which the semiconductor multilayer structure 1a and the support structure 20a are overlapped is introduced into a wafer bonding apparatus used for a micromachine or the like. And the inside of a wafer bonding apparatus is made into a predetermined pressure. As an example, the pressure is set to 0.01 Torr. Then, a predetermined uniform pressure is applied to the semiconductor laminated structure 1a and the support structure 20a that are overlapped with each other via a jig. As an example, a pressure of 30 kgf / cm ² is applied. Next, the jig is heated to a predetermined temperature at a predetermined temperature increase rate.

  Specifically, after the jig temperature reaches about 350 ° C., the jig is held at the temperature for about 30 minutes. Thereafter, the jig is slowly cooled. The temperature of the jig is sufficiently lowered to, for example, room temperature. After the temperature of the jig has dropped, the pressure applied to the jig is released. And the pressure in a wafer bonding apparatus is made into atmospheric pressure, and a jig is taken out. As a result, as shown in FIG. 2C (g), a bonded structure 1b is formed in which the semiconductor multilayer structure 1a and the support structure 20a are mechanically and electrically bonded between the bonding layer 136 and the bonding layer 202. Is done.

  In the present embodiment, the semiconductor multilayer structure 1 a includes the barrier layer 134. Therefore, even when the semiconductor multilayer structure 1a and the support structure 20a are bonded to each other at the bonding surface 136a and the bonding surface 202a, the material forming the bonding layer 136 and the bonding layer 202 diffuses into the reflective layer 132. This can be prevented, and the reflection characteristics of the reflective layer 132 can be prevented from deteriorating.

  Next, the support substrate 20 is bonded to a predetermined jig with a predetermined bonding wax. Then, the n-GaAs substrate 100 of the bonded structure 1b is polished to a predetermined thickness. Subsequently, the polished bonded structure 1b is removed from the polishing plate, and the wax adhering to the surface of the support substrate 20 is washed away. Then, as shown in FIG. 2D (h), using the etchant for GaAs etching, the n-GaAs substrate 100 is selectively and completely removed from the polished bonded structure 1b to form the bonded structure 1c. . As an etchant for GaAs etching, for example, a mixed solution of ammonia water and hydrogen peroxide solution can be used.

  Next, as shown in FIG. 2D (i), the etching stop layer 102 is removed from the bonded structure 1c by etching using a predetermined etchant. Thereby, the bonded structure 1d from which the etching stop layer 102 has been removed is formed. As the predetermined etchant, an etchant containing hydrochloric acid can be used. As a result, the n-GaAs layer as the n-type contact layer 101 is exposed.

  Next, a plurality of surface electrodes 110 are formed at predetermined positions on the surface of the n-type contact layer 101 by using a photolithography method and a vacuum evaporation method. For the surface electrode 110, AuGe, Ti, and Au are formed on the n-type contact layer 101 in this order. In this case, each of the plurality of surface electrodes 110 is formed so as not to be positioned immediately above the contact electrode 120. Thereby, as shown to FIG. 2E (j), the joining structure 1e which has the some surface electrode 110 is formed.

Next, as shown in FIG. 2F (k), using the plurality of surface electrodes 110 formed in FIG. 2E as a mask, the n-type contact layer 101 excluding the n-type contact layer 101 corresponding directly below the plurality of surface electrodes 110 is formed. Etching is performed using a mixed solution of sulfuric acid, hydrogen peroxide solution, and water. By using the mixed solution, the n-type contact layer 101 formed of GaAs is changed to an n-type clad formed of n-type (Al _0.7 Ga _0.3 ) _0.5 In _0.5 P. The layer 103 can be selectively etched.

  Further, a back electrode 210 is formed on substantially the entire bottom surface of the support substrate 20 by vacuum deposition. The back electrode 210 is formed by depositing Ti and Au on the bottom surface of the support substrate 20 in this order. Thereby, the joined structure 1f is formed. Thereafter, between the contact electrode 120 and the p-type contact layer 109, between the surface electrode 110 and the n-type contact layer 101, between the contact electrode 206 and the support substrate 20, and between the back electrode 210 and the support substrate 20. An alloying process, which is an alloying process for forming the respective electrical joints, is applied to the joint structure 1f. As an example, the bonded structure 1f is subjected to heat treatment at 400 ° C. for 5 minutes in a nitrogen atmosphere.

  Next, by using a photolithography method and an etching method, as shown in FIG. 2G (l), the n-type cladding layer 103, the active layer 105, and the p-type contact layer surface 109a of the p-type contact layer 109 are exposed. Then, a part of each of the p-type cladding layer 107 is etched using a predetermined etchant. As the predetermined etchant, for example, a mixed liquid in which hydrochloric acid and water are mixed at a predetermined ratio can be used.

  Specifically, a resist mask is formed in a region where a plurality of light emitting devices 1 are to be formed. For example, the mask is formed such that the separation width L between one region forming one light emitting device 1 and another region forming another light emitting device 1 is 50 μm. Then, the n-type cladding layer 103, the active layer 105, and the p-type cladding layer 107 are etched using a predetermined etchant. Thereby, the bonded structure 1g is formed.

  In this case, the n-type cladding layer 103, the active layer 105, and the p-type cladding layer 107 are etched substantially perpendicular to the surface of the p-type contact layer 109. That is, the n-type cladding layer 103, the active layer 105, and the p-type cladding layer 107 are etched substantially horizontally with the normal direction of the p-type contact layer 109. Then, side surfaces 10 a are formed on the side surfaces of the n-type cladding layer 103, the active layer 105, and the p-type cladding layer 107 by etching.

  Since the side surface 10a is formed by etching, the side surface 10a is compared with the case where the n-type cladding layer 103, the active layer 105, and the p-type cladding layer 107 are mechanically cut using dicing or the like. Its surface is smooth and smooth. Furthermore, since the side surface 10a is formed by etching, the n-type cladding layer 103, the active layer 105, and the p-type cladding layer 107 are not mechanically damaged.

  Then, as shown in FIG. 2H (m), as an example, the bonding structure 1g is element-isolated using a dicing apparatus having a dicing blade having a dicing width D of 25 μm. Thereby, a plurality of light emitting devices 1 are formed. In this case, a processed surface 10b is generated in the region mechanically cut by the dicing blade. Since the processed surface 10b is a mechanically cut region, the surface has irregularities. The dicing width D is not limited to the above embodiment as long as it is narrower than the separation width L.

  The light emitting device 1 manufactured in such a manufacturing process is an LED that emits light having a wavelength of around 630 nm.

  The light-emitting device 1 formed through the process of FIG. 2H (m) is die-bonded to the TO-18 stem using a conductive bonding material such as Ag paste, and the surface electrode 110 and a predetermined region of the stem are bonded. Connect with a wire such as Au. Thereby, the characteristic of the light-emitting device 1 can be evaluated.

  Specifically, the initial characteristics of the light-emitting device 1 manufactured in this manufacturing process were evaluated without applying a resin mold. When 20 mA was applied to the light emitting device 1 as a forward current, the forward voltage was 2.01 V and the light emission output was 4.1 mW. Further, when 10 μA was applied as a reverse bias to the light emitting device 1, the reverse withstand voltage was 44.6V. Furthermore, when the reverse breakdown voltage of the plurality of light emitting devices 1 formed from the epitaxial wafer was measured, the reverse breakdown voltage yield was 97%. The yield is preferably 95% or more, and it has been found that a sufficient yield can be obtained in this embodiment.

  Here, with respect to a value of 100 × A / (A + B), which is a relationship between the total area A of the plurality of contact electrodes 120 on the p-type contact layer 109 and the area B of the transparent layer 140 on the p-type contact layer 109. Table 1 shows the relationship between the light emission outputs.

  Referring to Table 1, it can be seen that when the area ratio 100 × A / (A + B) is 10% or less, the light emission output increases rapidly. Specifically, the light emission output of the light emitting device 1 was 4.0 mW when the area ratio was 10%. In addition, when the area ratio was 5%, the light emission output of the light emitting device 1 was 5.2 mW. Furthermore, when the area ratio was 1%, the light emission output of the light emitting device 1 was 5.8 mW.

  Further, Table 2 shows a calculation relationship of the forward voltage of the light emitting element with respect to the area ratio.

In the present embodiment, the low contact efficiency of the contact electrode 120 with respect to the p-type contact layer 109 is 1 × 10 ⁻⁵ Ωcm ² . From this value, when the chip size of the light-emitting element 1 is 300 μm square, the voltage at 20 mA energization at the ohmic contact portion between the contact electrode 120 and the p-type contact layer 109 is calculated as shown in Table 2. .

  That is, when the area ratio is 0.1% or less, the forward voltage increases due to the increase in contact resistance. It can be seen that the area where the decrease in the area where the contact electrode 120 and the p-type contact layer 109 are in contact, that is, the increase in voltage due to the decrease in the area of the contact electrode 120 is allowable is up to about 0.1%. Therefore, in the present embodiment, the lower limit value of the area ratio is 0.1%. When combined with the results shown in Table 1, the contact electrode 120 is preferably formed so that the area ratio is in the range of 0.1 or more and less than 10%.

(Comparative example)
Here, although not illustrated, the light emission according to the comparative example in which the bonding structure 1f formed in FIG. 2F is directly separated into a plurality of light emitting devices using a dicing device without going through the steps of FIGS. 2G and 2H. The apparatus will be described.

  The light emitting device according to the comparative example is the same as the light emitting device 1 according to this embodiment in the manufacturing process up to FIG. 2F. Moreover, the evaluation method of the characteristics of the formed light emitting device according to the comparative example is also the same as the evaluation method of the light emitting device 1 according to this embodiment. In the light emitting device according to the comparative example, the bonded structure 1f formed in FIG. 2F is cut by a dicing device so that the planar size of the light emitting device is 300 μm square. That is, the light emitting device according to the comparative example is formed by cutting all the layers from the n-type cladding layer 103 to the back electrode 210 with a dicing device.

  The light emitting device according to the comparative example obtained by cutting with a dicing device was evaluated without applying a resin mold. When a forward current of 20 mA was applied to the light emitting device according to the comparative example, the forward voltage was 2.00 V and the light emission output was 4.0 mW. Further, when 10 μA was applied as a reverse bias to the light emitting device, the reverse breakdown voltage was 44.5V. On the other hand, when the reverse breakdown voltage of the plurality of light emitting devices according to the comparative example formed from the epitaxial wafer was measured, the reverse breakdown voltage yield was 25%.

  In the light emitting device according to the comparative example, the active layer 105 is mechanically cut by the dicing device, and a large number of mechanical defects are generated on the end surface of the light emitting device. It is considered that there is a leakage current path.

  On the other hand, the light emitting device 1 according to the present embodiment is formed without cutting the active layer 105 by a dicing device. Therefore, no mechanical defect occurs on the side surface 10 a including at least the end surface of the active layer 105 of the light emitting device 1. Thereby, in the light-emitting device 1 which concerns on this embodiment, it is thought that it can suppress that the path | pass of a leakage current arises in the side surface 10a of the light-emitting device 1. FIG.

(Effects of the first embodiment)
According to the light emitting device 1 according to the first embodiment of the present invention, when forming a plurality of light emitting devices 1 from an epitaxial wafer, at least a layer including the active layer 105 can be separated by etching. Thereby, when the light emitting device 1 is formed, a mechanical defect is not generated in the active layer 105 by the dicing device. Therefore, the yield of reverse breakdown voltage can be remarkably improved and a plurality of light emitting devices 1 can be formed. it can.

[Second Embodiment]
FIG. 3 shows a schematic longitudinal section of a light emitting device according to the second embodiment of the present invention.

  The light emitting device 2 according to the second embodiment is different from the light emitting device 1 according to the first embodiment in that the side surface of the n-type cladding layer 103, the side surface of the active layer 105, and the side surface of the p-type cladding layer 107. Since the configuration is substantially the same except that the shape is different, detailed description is omitted except for the difference.

  In the light emitting device 2 according to the second embodiment, each of the side surface of the n-type cladding layer 103, the side surface of the active layer 105, and the side surface of the p-type cladding layer 107 is a method of the p-type contact layer surface 109a. It is inclined with a predetermined angle with respect to the line direction. The inclined surface 10 c is formed by the side surface of the n-type cladding layer 103, the side surface of the active layer 105, and the side surface of the p-type cladding layer 107.

  Specifically, the inclined surface 10c is formed to be inclined at a predetermined angle with respect to the normal line of the p-type contact layer surface 109a for the purpose of obtaining a predetermined light extraction effect. As an example, the inclined surface 10c is formed with an inclination of 10 degrees or more with respect to the normal direction of the p-type contact layer surface 109a. In addition, in order to obtain a predetermined light extraction effect and to prevent a decrease in light emission output due to the area of the active layer 105 in a top view being a predetermined value or less, the inclined surface 10c with respect to the normal direction of the p-type contact layer surface 109a. The angle is preferably 70 degrees or less.

(Method for manufacturing light-emitting device 2)
FIG. 4 shows a part of the manufacturing process of the light emitting device according to the second embodiment of the present invention.

  The manufacturing method of the light emitting device 2 according to the second embodiment is the same as the manufacturing method of the light emitting device 1 except that the step (l) of FIG. 2G in the manufacturing method of the light emitting device 1 according to the first embodiment is different. Since it is the same as the method, detailed description will be omitted except for differences.

  That is, a bonded structure 2a as shown in FIG. 4 is formed from the bonded structure 1f obtained through the steps of FIG. 2A to FIG. 2F by using a photolithography method and an etching method. That is, a part of each of the n-type cladding layer 103, the active layer 105, and the p-type cladding layer 107 is made of hydrochloric acid until the p-type contact layer surface 109a of the p-type contact layer 109 of the bonded structure 1f is exposed. Etch with etchant containing.

  In this embodiment, since an etchant containing hydrochloric acid is used, when the n-type cladding layer 103, the active layer 105, and the p-type cladding layer 107 are etched, the side surface of the n-type cladding layer 103 and the side surface of the active layer 105 are obtained. And an end surface formed by the side surface of the p-type cladding layer 107 forms an inclined surface 10c having a predetermined angle with respect to the normal direction of the p-type contact layer surface 109a of the p-type contact layer 109.

  As a result of evaluating the initial characteristics of the light emitting device 2 manufactured in this manufacturing process without applying a resin mold, when a forward current of 20 mA was passed through the light emitting device 2, the forward voltage was 2.01 V and the light output was 5 It was 2 mW. That is, by forming the inclined surface 10c, the light emission output is improved by about 30% compared to the light emitting device 1 according to the first embodiment. Further, when 10 μA was applied as a reverse bias to the light emitting device 2, the reverse withstand voltage was 44.6V. Furthermore, when the reverse breakdown voltage of the plurality of light emitting devices 1 formed from the epitaxial wafer was measured, the reverse breakdown voltage yield was 97%.

(Effect of the second embodiment)
Since the light emitting device 2 according to the second embodiment of the present invention has the inclined surface 10c formed from the side surface of the n-type cladding layer 103, the side surface of the active layer 105, and the side surface of the p-type cladding layer 107. Of the light emitted from the active layer 105 and the light emitted from the active layer 105, the light reflected by the reflective layer 132 can be efficiently extracted outside the light emitting device 2.

(Modification)
In addition, when packaging the light-emitting device 1 or the light-emitting device 2 which concerns on embodiment of this invention, it can seal with transparent resins, such as an epoxy resin, or glass material. When sealing the light emitting device 1 or the light emitting device 2 with a glass material, each of the side surface 10a of the light emitting device 1 and the inclined surface 10c of the light emitting device 2 has a smooth surface. Generation of cracks can be suppressed.

  While the embodiments of the present invention have been described above, the embodiments described above do not limit the invention according to the claims. In addition, it should be noted that not all the combinations of features described in the embodiments are essential to the means for solving the problems of the invention.

It is a typical longitudinal section of the light emitting device concerning a 1st embodiment. (A) is a typical top view of the light-emitting device which concerns on 1st Embodiment, (b) is typical of the light-emitting device at the time of cutting a light-emitting device by the AA line of FIG. 1A. It is a top view. It is a figure which shows a part of manufacturing process of the light-emitting device which concerns on 1st Embodiment. It is a figure which shows a part of manufacturing process of the light-emitting device which concerns on 1st Embodiment. It is a figure which shows a part of manufacturing process of the light-emitting device which concerns on 1st Embodiment. It is a figure which shows a part of manufacturing process of the light-emitting device which concerns on 1st Embodiment. It is a figure which shows a part of manufacturing process of the light-emitting device which concerns on 1st Embodiment. It is a figure which shows a part of manufacturing process of the light-emitting device which concerns on 1st Embodiment. It is a figure which shows a part of manufacturing process of the light-emitting device which concerns on 1st Embodiment. It is a figure which shows a part of manufacturing process of the light-emitting device which concerns on 1st Embodiment. It is a typical longitudinal cross-sectional view of the light-emitting device which concerns on 2nd Embodiment. It is a figure which shows a part of manufacturing process of the light-emitting device which concerns on 2nd Embodiment.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1, 2 Light-emitting device 1a Semiconductor laminated structure 1b, 1c, 1d, 1e, 1f, 1g Junction structure 10 Semiconductor laminated structure 10a Side surface 10b Work surface 10c Inclined surface 11 Semiconductor laminated structure 20 Support substrate 20a Support structure 100 n- GaAs substrate 101 n-type contact layer 102 etching stop layer 103 n-type clad layer 105 active layer 107 p-type clad layer 109 p-type contact layer 109a p-type contact layer surface 110 surface electrode 110a pad part 110b branch part 120 contact electrode 130 reflective part 132 Reflective layer 134, 204 Barrier layer 136, 202 Bonding layer 136a, 202a Bonding surface 140 Transparent layer 140a Opening 200 Adhesion layer 206 Contact electrode 210 Back electrode

Claims (9)

A conductive support substrate having a mechanically machined working side;
A light emitting device comprising: a compound semiconductor layer having an etching side surface formed by etching and provided on the support substrate including at least a light emitting layer. The light emitting device according to claim 1, wherein the etching side surface of the compound semiconductor layer is formed perpendicular to the support substrate. The light emitting device according to claim 1, wherein the etching side surface of the compound semiconductor layer is formed at a predetermined angle with respect to a normal direction of the support substrate. The light emitting device according to claim 3, wherein the etching side surface has an inclination of 10 degrees or more with respect to the normal direction. The semiconductor layer is
A transparent layer that has a plurality of through holes and is formed in a predetermined region of the semiconductor layer, and is transparent to light emitted by the light emitting layer;
5. The light-emitting device according to claim 1, wherein the light-emitting device has a plurality of contact bonding portions that are formed by filling the through-holes and that are in ohmic contact with the semiconductor layer. The ratio of the total value A of the areas where the plurality of contact junctions are in contact with the semiconductor layer to the total value C of the area B and the total value A of the area where the transparent layer is in contact with the semiconductor layer is: The light emitting device according to claim 5, wherein the light emitting device is 10% or less. The light-emitting device according to claim 5, wherein the transparent layer includes any one of SiO ₂ , SiN _x , and ITO. The semiconductor layer is
A first semiconductor layer of a first conductivity type;
A second semiconductor layer of a second conductivity type having a resistance value lower than the resistance value of the first semiconductor layer,
8. The light-emitting device according to claim 1, wherein the light-emitting layer is provided between the first semiconductor layer and the second semiconductor layer. Sequentially forming a first conductive type first semiconductor layer, a light emitting layer, and a second conductive type second semiconductor layer on a semiconductor substrate;
Forming a transparent layer having a plurality of openings in a predetermined region on the second semiconductor layer and transparent to the light emitted from the light emitting layer;
Forming a contact electrode electrically connected to the second semiconductor layer in the plurality of openings;
Forming at least a reflective layer that reflects light emitted from the light emitting layer and a bonding layer formed of a conductive material on the contact electrode and the transparent layer;
Preparing a conductive support substrate on which an adhesion layer formed of a conductive material is formed;
Connecting the adhesion layer of the support substrate and the bonding layer;
Removing the semiconductor substrate to expose the first semiconductor layer;
Etching through the at least the second semiconductor layer, the light emitting layer, and the second semiconductor layer from the exposed side of the first semiconductor layer to the top of the support substrate;
And a step of mechanically cutting the support substrate.

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