JP2009105210A - Chip id marking method for semiconductor chip and marking device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a marking method and device, which can be applied to the traceabilty of a chip level in marking the chip ID of a semiconductor chip. <P>SOLUTION: In the method and device of marking a chip ID, when the chip ID is marked until a step in which chips are arranged in the form of a wafer, the wafer or a chip coordinate value in the wafer can be traced by detecting the chip ID even when a defect occurs during chip steps or after shipping of the chip. When an inspection result of a previous step is included in the chip ID, level identification on a defective or acceptable chip can be carried out by only reading the chip ID and thus this can quickly cope with the defect-cause analysis, shipping by characteristics, or the like. Since the chip ID is marked on a surface protective film regardless of circuit locations, this can even cope with chip miniaturization. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a chip ID marking method and a marking device for a semiconductor chip. In particular, the present invention relates to a marking method and a marking apparatus that can be applied to chip-level traceability by marking each semiconductor chip with a chip ID of each semiconductor chip from the time of the wafer state.

  Conventionally, in the semiconductor chip manufacturing process, production control and quality control are performed by ID marking on a wafer cassette or ID marking on a wafer. Therefore, the production information and quality information that can be managed are up to the wafer cassette unit or wafer unit.

  By marking a unique ID on a semiconductor chip, it can be used to improve the problem caused by the position of the chip in the wafer in order to improve the yield during production. Further, by detecting a chip ID when a defect occurs after shipment of a semiconductor chip, it can be used for analyzing manufacturing information and narrowing down defective products.

  As a chip ID marking method, a laser marking method disclosed in Japanese Patent Laid-Open No. 2000-252176 or an electrical ID adding method using a fuse or a memory cell disclosed in Japanese Patent Laid-Open No. 7-307257 is disclosed. It has been known.

  However, in order to summarize these methods, it is necessary to provide an ID area, an area for a fuse or a memory cell in the circuit part of the semiconductor chip, and a physical chip size by securing a place for ID marking on the chip. In order to enlarge or reduce the ID marking size, it has become a factor of technical difficulty and cost of the apparatus due to the refinement of the ID dots and the improvement of the accuracy of the marking apparatus.

  As disclosed in Japanese Patent Laid-Open No. 2002-280276, there is a method of marking an ID only on a non-defective chip based on the result of a probe test. However, the level of the defective product could not be identified, and the cause analysis of the defect of the defective product and the comparison with the inspection result of the subsequent process could not be performed.

JP 2000-252176 A JP 07-307257 A JP 2002-280276

  An object of the present invention is to provide a marking method and a marking device that can solve the problems of the prior art and secure an advantageous ID size in terms of cost.

  As described in claim 1 and claim 13, in the chip ID marking method and apparatus for a semiconductor chip according to the present invention, an array remains in the wafer shape even during the wafer process and / or after the dicing process. It is characterized by marking the chip ID on the semiconductor chip by the state. The chip ID described here is information set uniquely for each chip, and means identification information including wafer identification and chip position information on the wafer surface.

  As described in claim 2 and claim 14, in the chip ID marking method and apparatus for a semiconductor chip according to the present invention, the chip ID of each semiconductor chip includes not only normal chip identification information but also before chip ID marking. It is characterized by including information on process inspection results.

  As a result, it is possible to identify the level of a defective product or a non-defective product simply by reading the chip ID, and it is possible to quickly perform the cause analysis of the failure, the shipment according to the characteristics, and the like.

  As described in claim 3 and claim 15, the chip ID marking method and apparatus for a semiconductor chip according to the present invention is characterized in that the chip ID is marked on the surface protective film of each semiconductor chip.

  As described in claim 4 and claim 16, in the chip ID marking method and apparatus for a semiconductor chip according to the present invention, a chip ID having at least one side of 500 micrometers or more is marked on the surface of each semiconductor chip. And

  The “electrical” method used in the conventional ID marking, for example, the method of adding an ID with a fuse or memory, requires an area in the circuit, and depending on the product, there is no fuse or memory. In some cases, this method was not used. When marking the chip ID on the surface protective film of the semiconductor chip as in the invention of the present application, the chip size requires only a circuit portion necessary for the product function, and on the surface protective film of the semiconductor chip to be the product. ID marking can be performed using the entire size of the chip. In the case of the method of the invention of the application, since marking is performed on the entire surface of the semiconductor chip size, one side of the ID size can be enlarged to about 500 to 1000 micrometers, and marking can be performed with excessively high accuracy. It becomes unnecessary and can reduce costs.

  With the above invention, as in the conventional method, the chip size is increased to secure the location of the portion where the ID marking is additionally written, and the required ID size is reduced, so that the cost and labor for improving the accuracy of the marking device are reduced. You can avoid the disadvantages such as applying.

  As described in claim 5 and claim 17, in the chip ID marking method and apparatus for a semiconductor chip according to the present invention, the chip ID is marked after a base member is applied to the surface of each semiconductor chip. To do.

  As described in claim 6 and claim 18, in the chip ID marking method and apparatus for a semiconductor chip according to the present invention, a base member is applied to the surface of each semiconductor chip to absorb the stepped portion on the chip surface. The chip surface is flattened.

  As described in claim 7 and claim 19, in the chip ID marking method and apparatus for a semiconductor chip according to the present invention, by applying a base member to the surface of the semiconductor chip, the chip ID and the chip ID application surface are applied. It is characterized by enhancing contrast.

  There is a thing in which the color of the surface of a semiconductor chip changes greatly by the structure of the circuit and element in a semiconductor chip. When the chip ID is applied to the surface of such a semiconductor chip, it is necessary to distinguish the color change of the application surface of the chip ID from the color contrast of the ID dot, and the color of the ID material that can be used for the ID dot is limited. It is possible to avoid the disadvantage that it is necessary to devise illumination when reading the applied chip ID.

  In order to solve the above problems, for example, a base member having a color darker than the chip surface color is applied so as to conceal changes in the application surface, and a chip ID ID material having a lighter color than the base member is applied thereon. By using this, it is possible to easily and reliably read the chip ID.

  As described in claim 8 and claim 20, in the chip ID marking method and apparatus for a semiconductor chip according to the present invention, the wettability of the chip ID application surface is adjusted by applying a base member to the surface of the semiconductor chip. The size of the chip ID is adjusted by adjusting the size of the ID dot.

  As for wettability, when the ID dot of the chip ID is directly applied to the surface of the semiconductor chip, even when the diameter spreads to 250 μm, the water repellent coat is applied to the chip surface, so that the diameter is 50 μm. The ID dot size of the chip ID can be adjusted, for example, the ID dot can be reduced to a meter.

  As described in claim 9 and claim 21, in the chip ID marking method and apparatus for a semiconductor chip according to the present invention, the chip ID marking is performed by multiple times of material application.

  When there is a step on the surface of the semiconductor chip, when ID dots are applied in a single layer, the ID material may flow into the stepped portion or the shape of the ID dot may collapse. Thus, there is an advantage that the shape of the ID dot is maintained and the visibility of the chip ID is improved.

  As described in claim 10 and claim 22, in the chip ID marking method and apparatus for a semiconductor chip according to the present invention, the chip ID is marked on the surface of the semiconductor chip using a material that does not easily transmit X-rays. It is characterized by.

  By marking the chip ID using a material that does not easily transmit X-rays as described above, it is possible to detect the chip ID in a non-destructive manner even for an assembled chip, and reliably and quickly at the chip level. Traceability is possible.

  In the chip production process, when an ID material having a chip ID that easily transmits X-rays is used, the chip ID becomes invisible after the packaging process and there is no means for confirming the chip ID. In this case, the chip ID information is read by a reader before the packaging process, and the chip ID information is stored in a storage device so that the information is transmitted to the package ID marking process on the package surface after the packaging process. Is required.

  There is no problem in transmitting the information as long as the production line is operating normally. However, when the number of semiconductor chips in production that are aligned fluctuates due to the occurrence of an abnormality, which chip ID information is which chip. The relationship becomes unclear. Therefore, there is a problem that reliable traceability cannot be achieved.

  Therefore, when an ID material that does not easily transmit X-rays is used, the chip ID on the chip surface is read with X-rays immediately before marking the package ID on the package surface after the packaging process, and the chip ID or chip ID An ID associated with the information can be immediately marked on the package surface as a package ID. Further, it is possible to confirm the chip ID with X-rays for confirmation even after the package ID marking on the package surface. As a result, reliable traceability is possible.

  The semiconductor chip ID marking method and apparatus according to the present invention are characterized in that the chip ID marking is a non-contact marking on the semiconductor chip.

  In the case of non-contact marking, the method is not limited to the description method without strictly correcting the gap between the chip ID application surface and the height direction (Z direction) of the application head. A coating method such as a dispenser method that allows rough spacing adjustment can also be adopted, and simplification of devices such as a height adjusting mechanism can be achieved. Further, the operation in the height direction (Z direction) of the coating head is not required, and the coating speed can be increased.

  As described in claim 12 and claim 24, the chip ID marking method and apparatus for a semiconductor chip according to the present invention is characterized in that the marking of the chip ID is marked by inkjet.

  For the non-contact marking, the above-described effects can be obtained, but among these methods, it is particularly excellent to use an ink jet method. For example, ID dots can be continuously applied at several to several tens kHz, and a semiconductor wafer to be applied can be applied at a high speed running at several tens mm / sec to several hundred mm / sec. Further, the distance between the chip ID application surface and the height direction (Z direction) of the application head is as large as about 0.5 to 1.0 mm, and even if there is a variation of about ± 0.1 mm in the distance, There is no effect.

  The marking method and the marking apparatus of the present invention detect a chip ID even during a semiconductor chip production process or when a defect occurs after chip shipment by marking the chip ID before the process of arranging in a wafer shape. By doing this, it is possible to trace to the wafer and the chip coordinates within the wafer. By including the inspection result of the previous process in the chip ID, it is possible to identify the level of defective products and non-defective products simply by reading the chip ID, and it is possible to quickly analyze the cause of defects and ship by characteristics. it can.

  Further, by marking the chip ID on the surface protective film regardless of the circuit portion, it is possible to cope with the miniaturization of the chip, and the cost of the marking device can be reduced. Furthermore, by marking the chip ID using a material that does not transmit X-rays, the chip ID can be detected in a non-destructive manner even with an assembled chip, ensuring reliable and rapid chip level traceability. Is possible.

  Hereinafter, a marking method and a marking apparatus according to the present invention will be described in detail based on embodiments shown in the accompanying drawings.

  FIG. 1 is a diagram showing semiconductor chips arranged in a wafer shape in a semiconductor wafer. As shown in the figure, a wafer ID 2, which is an ID unique to the wafer, is marked on the semiconductor wafer 1, and the semiconductor chips 3 are regularly arranged on the wafer surface. Each semiconductor chip 3 is marked with a unique chip ID 4.

  FIG. 2 is a diagram showing the relationship between the semiconductor manufacturing process and the chip ID 4. As shown in the figure, in the wafer process 100, for example, when a probe electrical test 101 for wafer inspection is performed, the inspection result 111 of the wafer is stored in the database 110 together with the ID of the wafer ID 2 of the wafer. Other inspections and process information performed in the wafer process are similarly stored in the database together with the ID of wafer ID2.

  The chip ID marking 103 is performed during the wafer process 100 and before the process of arranging the semiconductor wafer 1 in the dicing 104 process. At this time, related information such as the chip ID 4 and coordinates within the surface of the semiconductor wafer 1 and the wafer ID 2 is stored in the database 110 as ID information 113. Alternatively, related information such as the coordinates in the surface of the semiconductor wafer 1 and the wafer ID 2 can be included in the ID of the chip ID 4.

  When the semiconductor chip 3 is separated into pieces after the dicing 104 step and the chip inspection 105 is performed, the inspection result 115 of the chip is stored in the database 110 together with the ID of the chip ID 4 of the chip. Alternatively, the inspection result 115 of the chip can be included in the ID of the chip ID 4 instead of being stored in the database 110.

  By collecting all inspection and process information, wafer ID 2 and chip ID 4 in the database 110 in this way, traceability at the chip level is possible without interruption of information. For example, even if a defect occurs after chip shipment, if the chip ID 4 can be detected, the wafer 110 at the time of manufacture can be identified by checking the database 110 to determine which chip is at which coordinate. It can be analyzed later such as how the result 111 is and what the chip inspection result 115 is.

  FIG. 3 shows the relationship between the semiconductor chip and the chip ID and shows the conventional method 15 and the method 16 of the present invention. In the conventional method 15, the ID is marked in the circuit portion 6 of the semiconductor chip 3 by a laser marking method or the like. Therefore, in the same way as the circuit unit 6, the size of the chip ID4 affects the size of the chip, and when the chip size is increased or the ID size is reduced, the ID dot miniaturization or marking device is performed in parallel. Therefore, the technical complexity has increased, and the cost has been increased accordingly.

  On the other hand, in the method 16 of the present invention, the chip ID 4 is marked on the upper surface of the surface protective film 5 protecting the circuit portion 6 of the semiconductor chip 3. As a result, the chip ID 4 is marked on the surface protective film 5 of the semiconductor chip 3 on the surface protection film 5 of the semiconductor chip 3 without being influenced by the size and arrangement of the circuit unit 6, so that the chip can be made finer. The manufacturing cost of the marking device can be reduced.

  FIG. 4 is a view showing a cross section of the semiconductor chip when the base member 9 is not provided. As shown in the figure, the step portion 10 is shown in the circuit portion 6 of the semiconductor chip 3. When the ID dots 7 are applied on the upper surface of the surface protective film 5, the coating member flows into the step portion, or the dot shape collapses and is abnormal. There was a case where it became like ID dot 8. Further, when the circuit portion 6 of the semiconductor chip 3 has a color change (a circuit portion 66 different in color from the circuit portion 6), the color is different from that of the circuit portion 6 seen through the surface protection film 5 close to the ID dot 7 and transparency. There was a case where the contrast of the different color circuit portion 66 deteriorated.

  Thus, FIG. 5 shows a cross section of the semiconductor chip when the base member 9 is provided. As shown in FIG. 5, when the circuit portion 6 on the surface of the semiconductor chip 3 has a stepped portion 10 or a color change (a different color circuit portion 66 having a different color from the circuit portion 6), a base member is formed on the surface protective film 5. After applying 9, the chip ID is marked by applying ID dots 7. This makes it possible to flatten the ID dot application surface, maintain the dot shape of the ID dot 7, enhance the contrast between the ID dot 7 and the base member 9 serving as the application surface, and improve the visibility of the chip ID 4 I was able to.

  In addition, by making the base member 9 a material that can adjust the wettability of the application surface of the chip ID 4, the size of the ID dot 7 can be adjusted and the size of the chip ID 4 can be adjusted.

  Moreover, FIG. 6 is a figure which shows the cross section of the semiconductor chip in case chip ID4 is marked by multiple times of material application. As shown in FIG. 6, when there is a stepped portion 10 on the surface of the semiconductor chip 3, when applying the first layer of the ID dot 7, the dot shape may collapse due to the application member flowing into the stepped portion. However, the ID dot 7 was laminated as shown in the figure by applying the ID dot 7 a plurality of times as in the case of applying the second layer of the ID dot 7 and the third layer of the ID dot 7. It was possible to maintain the shape of the coating layer and improve the visibility of the chip ID4.

  Further, FIG. 7 shows an example in which the chip ID marking of the semiconductor chip is a non-contact marking on the chip, but a non-contact dispenser or an ink-jet method is used. In this application, an example using an ink-jet is used. Is shown in the figure.

  In the embodiment corresponding to FIGS. 4 and 5, even when the same ID member is applied, if the base member 9 of FIG. 4 is not provided, the application member flows into the stepped portion 10 on the chip surface or the shape of the ID dot 7. The chip ID4 coated with the ID dot 7 could not be read by a two-dimensional code reader. Further, when the base member 9 is not provided as shown in FIG. 4, the diameter of the ID dot 7 is as large as 300 to 200 micrometers. However, by applying the base member 9 having a water repellent effect as shown in FIG. The diameter of the dot 7 could be reduced to 100 to 50 micrometers.

  In the example corresponding to FIG. 6, the chip ID 4 coated with the ID dot 7 once could not be read by the two-dimensional code reader, but the chip ID 4 coated twice or three times is read by the two-dimensional code reader. I was able to.

  In the embodiment corresponding to FIG. 7, as shown in the figure, the height of the semiconductor chips 3 arranged on the semiconductor wafer is adjusted in the vertical direction shown in the Z-axis direction 24 and the wafer travels relative to the inkjet head 21. The vehicle travels in direction 23. The ID material 22 is sequentially discharged from the nozzles of the inkjet head 21 as the ID dots 7 of the chip ID 4 according to the position of the semiconductor chip 3 to mark the chip ID 4.

  In FIG. 7, ID dots 7 are applied directly on the surface protective film 5. However, as shown in FIG. 5, when the base member 9 is used, the ID material 22 is applied similarly to the surface of the base member 9. Mark.

  Since it is a non-contact marking, it is not necessary to strictly correct the gap between the application surface of the chip ID 4 and the height direction (Z-axis direction 24) of the inkjet head 21 as shown in FIG. Was achieved.

  The present invention relates to an ID marking method and a marking device for a semiconductor chip, and in particular, marking that enables traceability at the semiconductor chip level by marking the chip ID of each semiconductor chip on each semiconductor chip from the time of the wafer state. The present invention relates to a method and a marking device.

It is a figure which shows the semiconductor chip arranged in the wafer shape in the semiconductor wafer. It is a figure which shows the relationship between a semiconductor manufacturing process and chip ID. It is a relationship between a semiconductor chip and a chip ID, and is a diagram showing a conventional method and a method of the present invention. It is a figure which shows the cross section of a semiconductor chip when there is no base member. It is a figure which shows the cross section of a semiconductor chip in case there exists a base member. It is a figure which shows the cross section of the semiconductor chip in case chip ID is marked by multiple times of material application | coating. It is a figure which shows the state which is carrying out the application | coating of the ID dot of chip ID with an inkjet.

Explanation of symbols

1 Semiconductor wafer 2 Wafer ID
3 Semiconductor chip 4 Chip ID
DESCRIPTION OF SYMBOLS 5 Surface protective film 6 Circuit part 66 Dissimilar circuit part 7 ID dot 8 Abnormal ID dot 9 Base member 10 Step part 12 Chip | tip 21 After assembly Inkjet head 22 ID material 23 Wafer traveling direction 24 Z-axis direction 100 Wafer process 101 Wafer inspection 102 Wafer final inspection 103 Chip ID marking 104 Dicing 105 Chip inspection 110 Database 111 Wafer inspection result 113 ID information 115 Chip inspection result 120 Chip assembly process

Claims (24)

A chip ID of a semiconductor chip characterized in that a unique chip ID is marked on the semiconductor chip by the process of arranging the wafer shape even during the semiconductor chip manufacturing process and / or after the dicing process. Marking method. 2. The chip ID marking method for a semiconductor chip according to claim 1, wherein the information including the inspection result of the previous process is marked on the chip ID of the semiconductor chip. 3. The chip ID marking method for a semiconductor chip according to claim 1, wherein the chip ID of the semiconductor chip is marked on the surface protective film of the semiconductor chip. 4. A chip ID marking method for a semiconductor chip according to claim 1, wherein a chip ID having a dimension of at least one side of 500 micrometers or more is marked on the surface of the semiconductor chip. 5. The chip ID marking method for a semiconductor chip according to claim 1, wherein a chip ID is marked after a base member is applied to the surface of the semiconductor chip. 6. The chip ID marking method for a semiconductor chip according to claim 5, wherein the base member absorbs a step on the surface of the semiconductor chip and flattens the surface of the semiconductor chip. 6. The chip ID marking method for a semiconductor chip according to claim 5, wherein the base member emphasizes a contrast between a chip ID of the semiconductor chip and a coating surface of the chip ID. 6. The chip ID marking method for a semiconductor chip according to claim 5, wherein the base member adjusts the wettability of the chip ID application surface of the semiconductor chip to adjust the size of the chip ID marking of the semiconductor chip. 5. A chip ID marking method for a semiconductor chip according to claim 1, wherein the chip ID marking of the semiconductor chip is performed by applying the material a plurality of times. The chip ID marking is performed using a material that hardly transmits X-rays when chip ID marking is performed by applying a material to the surface of the semiconductor chip. The chip ID marking method of the semiconductor chip of description. The chip ID marking method of a semiconductor chip according to any one of claims 1 to 10, wherein the chip ID marking of the semiconductor chip is a non-contact marking on the chip. The chip ID marking method for a semiconductor chip according to any one of claims 1 to 11, wherein the chip ID marking of the semiconductor chip is performed by inkjet. A chip ID of a semiconductor chip characterized in that a unique chip ID is marked on the semiconductor chip by the process of arranging the wafer shape even during the semiconductor chip manufacturing process and / or after the dicing process. Marking device. 14. The chip ID marking device for a semiconductor chip according to claim 13, wherein the information including the inspection result of the previous process is marked on the chip ID of the semiconductor chip. 15. The chip ID marking device for a semiconductor chip according to claim 13, wherein the chip ID of the semiconductor chip is marked on the surface protective film of the semiconductor chip. The chip ID marking device for a semiconductor chip according to any one of claims 13 to 15, wherein a chip ID having a dimension of at least one side of 500 micrometers or more is marked on the surface of the semiconductor chip. The chip ID marking device for a semiconductor chip according to any one of claims 13 to 16, wherein the chip ID is marked after a base member is applied to the surface of the semiconductor chip. 18. The chip ID marking device for a semiconductor chip according to claim 17, wherein the base member absorbs a step on the surface of the semiconductor chip and flattens the surface of the semiconductor chip. 18. The chip ID marking device for a semiconductor chip according to claim 17, wherein the base member emphasizes a contrast between a chip ID of the semiconductor chip and a coating surface of the chip ID. 18. The chip ID marking device for a semiconductor chip according to claim 17, wherein the base member adjusts the wettability of the chip ID application surface of the semiconductor chip to adjust the size of the chip ID marking of the semiconductor chip. The chip ID marking device for a semiconductor chip according to any one of claims 13 to 16, wherein the chip ID marking of the semiconductor chip is performed by applying the material a plurality of times. The chip ID is marked by using a material that hardly transmits X-rays when chip ID marking is performed by applying a material to the surface of the semiconductor chip. The chip ID marking device of the semiconductor chip as described. 23. The chip ID marking device for a semiconductor chip according to claim 13, wherein the chip ID marking of the semiconductor chip is a non-contact marking on the chip. The chip ID marking device for a semiconductor chip according to any one of claims 13 to 23, wherein the chip ID marking of the semiconductor chip is performed by inkjet.

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