JP2009099669A - Mounting structure of electronic component, and mounting method thereof - Google Patents

Mounting structure of electronic component, and mounting method thereof Download PDF

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JP2009099669A
JP2009099669A JP2007267890A JP2007267890A JP2009099669A JP 2009099669 A JP2009099669 A JP 2009099669A JP 2007267890 A JP2007267890 A JP 2007267890A JP 2007267890 A JP2007267890 A JP 2007267890A JP 2009099669 A JP2009099669 A JP 2009099669A
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electronic component
conductive adhesive
mounting
solder bump
conductive
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Akira Ouchi
明 大内
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NEC Corp
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NEC Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83192Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body

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  • Wire Bonding (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide a mounting structure of a bare chip or chip-sized package low in conduction resistance, high in adhesion strength, and high in connection reliability; and to provide a mounting method thereof. <P>SOLUTION: A solder bump 3 is formed on each electrode terminal 1b of a semiconductor element 1, and the electrode terminal 1b of the semiconductor element 1 is connected to an electrode pad 2b of a mounting board 2 through the solder bump 3 and a conductive adhesive 4. Each conductive particle included in the conductive adhesive 4 contains an intermetallic compound using Sn being a metal material of solder as a constituent. <P>COPYRIGHT: (C)2009,JPO&amp;INPIT

Description

本発明は、ベアチップ、CSP、BGAなどの電子部品の実装構造と実装方法に関するものであり、特に半田バンプや半田ボールと導電性接着剤とを用いて電子部品−実装基板間の接続を行なう電子部品の実装構造および実装方法に関する。   The present invention relates to a mounting structure and mounting method for an electronic component such as a bare chip, CSP, and BGA, and particularly to an electronic device that performs connection between an electronic component and a mounting substrate using a solder bump or solder ball and a conductive adhesive. The present invention relates to a component mounting structure and a mounting method.

電子機器の急速な発達に伴い、LSIなど半導体素子にはこれまで以上に高機能化が求められるようになってきている。半導体素子の多機能化に伴い半導体素子の入出力端子数は増加し、また半導体素子を高速動作させるための配線長は短縮化が求められている。こうした要求を実現するために開発された接続工法としてフリップチップ接続がある。フリップチップ接続は半導体素子の配線面にエリア状に接続パッドを設けることができるため多ピン化に適している。また、ワイヤボンディングやテープオートメイティッドボンディングの様な他の半導体素子接続工法と比較し、引き出し線を必要としないため配線長の短縮化が可能である。
以上のような理由から電子機器に用いられる半導体素子の実装には、フリップチップ接続を使用したものが増加している。
With the rapid development of electronic devices, semiconductor elements such as LSIs are required to have higher functionality than ever. As the number of multifunctional semiconductor elements increases, the number of input / output terminals of the semiconductor elements increases, and the wiring length for operating the semiconductor elements at high speed is required to be shortened. As a connection method developed to realize such a requirement, there is a flip chip connection. Flip chip connection is suitable for increasing the number of pins because connection pads can be provided in the form of areas on the wiring surface of a semiconductor element. In addition, compared with other semiconductor element connection methods such as wire bonding and tape automated bonding, the lead length is not required, so that the wiring length can be shortened.
For the reasons described above, the number of semiconductor devices used in electronic devices using flip chip connection is increasing.

現在、フリップチップに使用される一般的なバンプ電極の材料としては、Auや半田等が用いられている。半田の材質の例としてはSn−Pb共晶はんだがあるが、Sn−Pb共晶はんだに限定されず、たとえばSn−Pb(共晶を除く)、Sn−Ag、Sn−Cu、Sn−Zn、Sn−Biおよびこれら前記した材料に特定の添加元素をさらに加えた材料を挙げることができ、これらが適宜用いられる。
一方、フリップチップ接続される半導体素子の多くは、半導体素子−基板間の熱膨張差による応力を緩和するため、半導体素子−基板の隙間を樹脂封止することにより、接続信頼性を確保する必要がある(例えば、特許文献1参照)。
At present, Au, solder, or the like is used as a material for a general bump electrode used for a flip chip. Examples of the solder material include Sn-Pb eutectic solder, but are not limited to Sn-Pb eutectic solder. For example, Sn-Pb (excluding eutectic), Sn-Ag, Sn-Cu, Sn-Zn. , Sn-Bi, and materials obtained by further adding a specific additive element to the above-described materials can be used as appropriate.
On the other hand, in many of the semiconductor elements that are flip-chip connected, in order to relieve stress due to the difference in thermal expansion between the semiconductor element and the substrate, it is necessary to ensure connection reliability by sealing the gap between the semiconductor element and the substrate. (For example, refer to Patent Document 1).

半田バンプのみでフリップチップ接合する従来例では、弾性率が高い半田バンプにおいて半導体素子−基板間の熱膨張差により高い応力が発生し、接合部近傍のチップ、バンプ、基板等を破壊する問題がある。そこでバンプにかかる応力を緩和する目的で半導体素子と基板の隙間をアンダーフィル樹脂で封止することで接続信頼性を向上させることができる。しかし、樹脂封止前の工程において、バンプ接合部に集中的に応力がかかるため、製造工程における応力対策が必要となる。弾性率が高い鉛フリー半田の適用やチップに機械的強度が低いLow−k膜を使用する製品が増えてくると、この問題は一層深刻になる。また、アンダーフィル樹脂で封止した後においても、半田バンプの弾性率の方がアンダーフィル樹脂のそれに比較してはるかに高く、例えばSn−3Ag−0.5Cu半田の弾性率は約40GPaであるのに対し、アンダーフィル樹脂の弾性率は充填剤を混入して高弾性率化した場合でも10GPa程度である。このため、弾性率の高い半田接合部分に依然として応力が集中して、繰返しの温度変化等により、半田バンプやその接続端部のチップ、あるいは基板にクラックが発生する問題がある。
半田バンプ接合部の弾性率を下げるには、半田バンプをこれより弾性率の低い導電性接着剤を用いて接続することが考えられる。而して、半田バンプを導電性接着剤により接続することは従来より試みられてきた(例えば、特許文献2、3参照)。特許文献2、3に記載された接合方法は、半田バンプまたは基板上の電極パッドに導電性接着剤を塗布し、基板上に半導体素子を搭載し、半田の融点以下の温度で導電性接着剤を硬化して接続を行なうものである。
特開平11−233558号公報 特開平1−226161号公報 特開2001−44606号公報
In the conventional example in which the flip chip bonding is performed only with the solder bump, a high stress is generated in the solder bump having a high elastic modulus due to the difference in thermal expansion between the semiconductor element and the substrate, and there is a problem of destroying the chip, the bump, the substrate, etc. in the vicinity of the bonding portion. is there. Therefore, the connection reliability can be improved by sealing the gap between the semiconductor element and the substrate with an underfill resin for the purpose of relaxing the stress applied to the bumps. However, since stress is concentrated on the bump bonding portion in the process before resin sealing, it is necessary to take measures against stress in the manufacturing process. This problem becomes more serious as the use of lead-free solder with a high elastic modulus and products using low-k films with low mechanical strength for chips increase. Even after sealing with the underfill resin, the elastic modulus of the solder bump is much higher than that of the underfill resin. For example, the elastic modulus of Sn-3Ag-0.5Cu solder is about 40 GPa. On the other hand, the elastic modulus of the underfill resin is about 10 GPa even when the elastic modulus is increased by mixing a filler. For this reason, there is a problem that stress is still concentrated on the solder joint portion having a high elastic modulus, and cracks are generated in the solder bump, the chip at the connection end, or the substrate due to repeated temperature changes.
In order to lower the elastic modulus of the solder bump bonding portion, it is conceivable to connect the solder bump using a conductive adhesive having a lower elastic modulus. Thus, it has been attempted to connect the solder bumps with a conductive adhesive (see, for example, Patent Documents 2 and 3). In the joining methods described in Patent Documents 2 and 3, a conductive adhesive is applied to a solder bump or an electrode pad on a substrate, a semiconductor element is mounted on the substrate, and the conductive adhesive is at a temperature lower than the melting point of the solder. Is cured and connected.
Japanese Patent Laid-Open No. 11-233558 JP-A-1-226161 JP 2001-44606 A

特許文献2、3に記載された従来の導電性接着剤を用いた接合方法では、接合界面における低い導通抵抗と高い接着強度を実現することは困難であった。その理由は、以下の通りである。従来の接合構造では、導電性接着剤の導電粒子と半田バンプとは単に接触しているのみでこの接触部分では接着力は得られず、接着力は導電性接着剤の基材である絶縁樹脂にのみ依存していた。界面の導通抵抗を低減させようとした場合、導電性接着剤の導電粒子と半田バンプの接触面積を増やす必要があるが、接触面積を増やすには導電粒子の比率を高める必要があり、これを満たすことは必然的に基材樹脂の低減を招くことになる。逆に、接着強度を高めるには、絶縁樹脂の比率を高めなければならないが、このことは必然的に導電粒子と半田バンプとの接触面積の低減を招く。つまり、従来の接合方法では、低い導通抵抗と高い接着強度とは、トレードオフ関係にあった。   In the joining method using the conventional conductive adhesive described in Patent Documents 2 and 3, it is difficult to realize low conduction resistance and high adhesive strength at the joining interface. The reason is as follows. In the conventional bonding structure, the conductive particles of the conductive adhesive and the solder bumps are merely in contact with each other, and no adhesive force can be obtained at this contact portion. The adhesive force is an insulating resin that is a base material of the conductive adhesive. Relied only on. When trying to reduce the conduction resistance at the interface, it is necessary to increase the contact area between the conductive particles of the conductive adhesive and the solder bumps, but to increase the contact area, it is necessary to increase the ratio of the conductive particles. Filling inevitably leads to a reduction in the base resin. On the other hand, in order to increase the adhesive strength, the ratio of the insulating resin must be increased. This inevitably leads to a reduction in the contact area between the conductive particles and the solder bumps. That is, in the conventional joining method, there was a trade-off relationship between low conduction resistance and high adhesive strength.

この点に対処すべく、本発明者は、半田を導電性接着剤の導電粒子と溶融接合する接合方式を考案した。この接合方式によれば、半田バンプと導電粒子との低抵抗での接合が実現できるばかりでなく、半田バンプと導電粒子との間に接着力が発現されるので、上記のトレードオフ関係を解消することができ、導通抵抗の低減と接着強度の向上の両方を実現できるものと考えられた。しかし、実際にこの接合構造を製作してみると導通抵抗は期待したほどには下がらないことが明らかとなった。その原因を調べてみると、半田バンプと導電性接着剤との接合界面近傍の導電粒子が半田のSnに取り込まれてしまう結果であることが判明した。
本発明の課題は、上述した従来技術の問題点を解決することであって、その目的は、半導体素子−実装基板間の熱膨張係数の差に起因する応力を緩和すると共に、低抵抗で接着強度の高い電子部品の実装構造を提供できるようにすることである。
In order to cope with this point, the present inventor has devised a joining method in which solder is melt-joined with conductive particles of a conductive adhesive. According to this bonding method, not only the solder bump and the conductive particles can be bonded with low resistance, but also an adhesive force is developed between the solder bump and the conductive particles, so the above trade-off relationship is eliminated. It was thought that both reduction of conduction resistance and improvement of adhesive strength could be realized. However, when this junction structure was actually manufactured, it became clear that the conduction resistance did not drop as expected. As a result of examining the cause, it was found that the conductive particles in the vicinity of the bonding interface between the solder bump and the conductive adhesive are taken into Sn of the solder.
An object of the present invention is to solve the above-mentioned problems of the prior art, the purpose of which is to relieve stress caused by a difference in thermal expansion coefficient between a semiconductor element and a mounting substrate, and to bond with low resistance. It is to be able to provide a mounting structure for a high-strength electronic component.

上記の目的を達成するため、本発明によれば、電子部品の電極端子と実装基板の電極パッドとが半田バンプと導電性接着剤を介して接続されている電子部品の実装構造において、電極端子と電極パッドとのいずれか一方または両方に半田バンプが形成され、半田バンプと電極パッド若しくは電極端子が、または、半田バンプ同士が導電性接着剤を介して接続されており、半田バンプと導電性接着剤の接合界面は、半田が導電性接着剤中の導電粒子と溶融接合していることを特徴とする電子部品の実装構造、が提供される。   In order to achieve the above object, according to the present invention, in an electronic component mounting structure in which an electrode terminal of an electronic component and an electrode pad of a mounting substrate are connected via a solder bump and a conductive adhesive, Solder bumps are formed on one or both of the electrode pads and the electrode pads, the solder bumps and the electrode pads or electrode terminals, or the solder bumps are connected via a conductive adhesive, The bonding interface of the adhesive provides a mounting structure for an electronic component in which solder is melt-bonded to conductive particles in the conductive adhesive.

そして、好ましくは、前記導電性接着剤中に含まれている導電粒子は、金属間化合物を含んでいる。また、一層好ましくは、前記導電性接着剤中に含まれている導電粒子は、前記半田の主要構成金属を構成要素とする金属間化合物を含んでいる。また、好ましくは、前記金属間化合物の周囲は金属層で被覆されている。また、好ましくは、前記導電粒子は、前記金属間化合物の外に前記金属間化合物より電気伝導性の良好な金属の良伝導性導電粒子を含んでいる。   And preferably, the electroconductive particle contained in the said electrically conductive adhesive contains the intermetallic compound. More preferably, the conductive particles contained in the conductive adhesive contain an intermetallic compound having a main constituent metal of the solder as a constituent element. Preferably, the periphery of the intermetallic compound is covered with a metal layer. Preferably, the conductive particles include well-conductive conductive particles of metal having better electrical conductivity than the intermetallic compound in addition to the intermetallic compound.

また、上記の目的を達成するため、本発明によれば、電子部品に電極端子あるいは実装基板の電極パッドの少なくとも一方に、半田バンプを形成する工程と、電子部品および実装基板の一方あるいは両方の電極に導電性接着剤を供給する工程と、実装基板上に位置合わせして電子部品を搭載して、電子部品の電極端子と実装基板の電極パッドとを半田バンプと導電性接着剤を介して接続する工程と、半田バンプを溶融させて導電性接着剤の導電粒子と溶融接合させると共に導電性接着剤の硬化を進める工程と、を含むことを特徴とする電子部品の実装方法、が提供される。   In order to achieve the above object, according to the present invention, a step of forming a solder bump on at least one of an electrode terminal or an electrode pad of a mounting board on an electronic component, and one or both of the electronic component and the mounting board A step of supplying a conductive adhesive to the electrodes, an electronic component mounted on the mounting substrate, and the electrode terminals of the electronic component and the electrode pads of the mounting substrate are connected via the solder bumps and the conductive adhesive. There is provided a method for mounting an electronic component, comprising: a step of connecting; and a step of melting a solder bump to melt and bond with conductive particles of a conductive adhesive and proceeding to cure the conductive adhesive The

また、上記の目的を達成するため、本発明によれば、電子部品電極端子あるいは実装基板の電極パッドの少なくとも一方に、半田バンプを形成する工程と、電子部品および実装基板の一方あるいは両方の電極に導電性接着剤を供給する工程と、実装基板上に位置合わせして電子部品を搭載して、電子部品の電極端子と実装基板の電極パッドとを半田バンプと導電性接着剤を介して接続する工程と、導電性接着剤の硬化を進める工程と、電子部品と実装基板の隙間にアンダーフィル樹脂を注入する工程と、半田バンプを溶融させて導電性接着剤の導電粒子と溶融接合させる工程と、を含むことを特徴とする電子部品の実装方法、が提供される。   In order to achieve the above object, according to the present invention, a step of forming a solder bump on at least one of an electronic component electrode terminal or an electrode pad of a mounting substrate, and one or both electrodes of the electronic component and the mounting substrate Supplying a conductive adhesive to the mounting board, positioning the electronic component on the mounting board, and connecting the electrode terminal of the electronic part and the electrode pad of the mounting board via the solder bump and the conductive adhesive A step of advancing the curing of the conductive adhesive, a step of injecting an underfill resin into the gap between the electronic component and the mounting substrate, and a step of melting the solder bump to melt-bonding with the conductive particles of the conductive adhesive And an electronic component mounting method characterized by comprising:

また、上記の目的を達成するため、本発明によれば、電子部品の電極端子あるいは実装基板の電極パッドの少なくとも一方に、半田バンプを形成する工程と、電子部品および実装基板の一方あるいは両方の電極に導電性接着剤を供給し硬化を進める工程と、実装基板上にアンダーフィル樹脂を供給する工程と、実装基板上に位置合わせして電子部品を搭載して、電子部品の電極端子と実装基板の電極パッドとを半田バンプと導電性接着剤を介して接続する工程と、半田バンプを溶融させて導電粒子と溶融接合させる工程と、を含むことを特徴とする電子部品の実装方法、が提供される。   In order to achieve the above object, according to the present invention, a step of forming a solder bump on at least one of an electrode terminal of an electronic component or an electrode pad of a mounting substrate, and one or both of the electronic component and the mounting substrate The process of supplying a conductive adhesive to the electrode and proceeding with the curing, the process of supplying the underfill resin on the mounting board, and mounting the electronic component on the mounting board, mounting it on the electrode terminal of the electronic component A method for mounting an electronic component, comprising: a step of connecting an electrode pad of a substrate to a solder bump through a conductive adhesive; and a step of melting the solder bump and melt-bonding the conductive bump to a conductive particle. Provided.

本発明によると、電子部品と実装基板との接合部は半田バンプと導電性接着剤によって構成されているので、電子部品の基板(半導体基板)と実装基板との熱膨張係数の差がある場合でも、導電性接着剤層による応力緩和効果により、電子部品と実装基板との熱膨張差により生じる応力を緩和することが可能になり、クラックや断線の発生を防止することができる。また、本発明によると、導電性接着剤半田バンプが導電性接着剤の導電粒子と溶融接合しているので、導電性接着剤の樹脂による接着力に加え半田の接着力が加わり、半田バンプと導電性接着剤との間に高い接着強度が得られる。更に、導電性接着剤半田バンプが導電性接着剤の導電粒子と溶融接合しており、そして導電性接着剤中の導電粒子が半田バンプ中のSnに取り込まれて消失することがないため、半田バンプと導電性接着剤との間の導通抵抗を低く抑えることができる。したがって、本発明によれば、弾性率の高い鉛フリー半田が使用され、また機械的強度の低いLow-k絶縁膜が採用されても、導通抵抗の低減、接着強度の向上が図れるばかりでなく、信頼性の高い実装構造を実現することができる。   According to the present invention, since the joint between the electronic component and the mounting substrate is constituted by the solder bump and the conductive adhesive, there is a difference in thermal expansion coefficient between the electronic component substrate (semiconductor substrate) and the mounting substrate. However, due to the stress relaxation effect of the conductive adhesive layer, it is possible to relax the stress caused by the difference in thermal expansion between the electronic component and the mounting substrate, and the occurrence of cracks and disconnections can be prevented. Further, according to the present invention, since the conductive adhesive solder bump is melt-bonded to the conductive particles of the conductive adhesive, the adhesive force of the solder is added in addition to the adhesive force of the conductive adhesive resin, High adhesive strength can be obtained between the conductive adhesive. Furthermore, since the conductive adhesive solder bump is melt-bonded to the conductive particles of the conductive adhesive, and the conductive particles in the conductive adhesive are not taken in and disappear by Sn in the solder bump, the solder The conduction resistance between the bump and the conductive adhesive can be kept low. Therefore, according to the present invention, even when a lead-free solder having a high elastic modulus is used and a low-k insulating film having a low mechanical strength is employed, not only the conduction resistance can be reduced and the adhesive strength can be improved. A highly reliable mounting structure can be realized.

以下、フリップチップ接続方式により、本発明の実施の形態を示すが、本発明の適用される電子部品は、ベアチップ、CSP、BGA等、いずれの形態でもよく特に限定されるものではない。
〔第1の実施の形態(実装構造)〕
まず、本発明の半導体素子の実装構造の第1の実施の形態ついて、図1、図2を参照して説明する。図1は、本発明の第1の実施の形態の要部を示す断面図であり、図2は、図1の半田バンプ3と導電性接着剤4の接合部を示した部分拡大断面図である。半導体基板1a上に電極端子1bを有する半導体素子1の電極端子1bには、半田バンプ3が形成されている。半田バンプの材料としては、Sn/Pb、Sn/Ag、Sn/Cu、Sn/Zn、Sn/Biおよびこれらに特定の添加元素をさらに加えた材料を挙げることができ、これらを適宜用いることができる。半田バンプの形成方法としては、フラックスを含んだ半田ペーストをメタルマスク等を使用して電極端子上に印刷し、リフローしたのちにフラックス洗浄する方法でもよいし、電極端子上に塗布したフラックスにハンダボールを転写して、リフローした後にフラックス洗浄を行なう方法でもよい。半導体素子1が搭載される実装基板2は、基板2aとその表面に形成された電極パッド2bとソルダーレジスト2cとを有する。電極端子1b上の半田バンプ3と基板2a上の電極パッド2bの間は、導電性接着剤4で接続されており、半導体素子1と実装基板2間の電気的接続が達成されている。基板2a上の電極パッド2bの一例としては銅配線の表面にニッケルメッキが施されており、さらにその上に金メッキが形成されているものが挙げられる。
Hereinafter, embodiments of the present invention will be shown by a flip chip connection method, but the electronic component to which the present invention is applied may be any form such as bare chip, CSP, BGA, and the like, and is not particularly limited.
[First embodiment (mounting structure)]
First, a first embodiment of a semiconductor element mounting structure according to the present invention will be described with reference to FIGS. FIG. 1 is a cross-sectional view showing the main part of the first embodiment of the present invention, and FIG. 2 is a partially enlarged cross-sectional view showing the joint between the solder bump 3 and the conductive adhesive 4 of FIG. is there. Solder bumps 3 are formed on the electrode terminals 1b of the semiconductor element 1 having the electrode terminals 1b on the semiconductor substrate 1a. Examples of the solder bump material include Sn / Pb, Sn / Ag, Sn / Cu, Sn / Zn, Sn / Bi, and materials obtained by further adding specific additive elements to them, and these can be used as appropriate. it can. As a method for forming solder bumps, a solder paste containing flux may be printed on the electrode terminal using a metal mask, etc., reflowed and then washed with flux, or solder applied to the flux applied on the electrode terminal. A method of performing flux cleaning after transferring the ball and reflowing may be used. The mounting substrate 2 on which the semiconductor element 1 is mounted has a substrate 2a, electrode pads 2b formed on the surface thereof, and a solder resist 2c. The solder bump 3 on the electrode terminal 1b and the electrode pad 2b on the substrate 2a are connected by a conductive adhesive 4, and electrical connection between the semiconductor element 1 and the mounting substrate 2 is achieved. An example of the electrode pad 2b on the substrate 2a is one in which the surface of the copper wiring is nickel-plated and further gold-plated.

導電性接着剤4の基材となる絶縁樹脂4bは、アクリル樹脂、メラミン樹脂、エポキシ樹脂、ポリオレフィン樹脂、ポリウレタン樹脂、ポリカーボネート樹脂、ポリスチレン樹脂、ポリエーテル樹脂、ポリアミド樹脂、ポリイミド樹脂、フッ素樹脂、ポリエステル樹脂、フェノール樹脂、フルオレン樹脂、ベンゾシクロブテン樹脂、シリコーン樹脂等様々な材料があるが、特に限定されるものではなく、これらを1種あるいは2種以上組み合わせて用いることもできる。粘度、コスト、耐熱性、接着性等の面に優れるエポキシ樹脂が一般に用いられるが、25℃程度の室温において液状である樹脂が望ましい。
さらに導電性接着剤4の絶縁樹脂4bは、酸化膜除去作用を含んでいることが望ましい。その理由は、半田バンプ3と導電性接着剤4の接合時において、半田バンプ3表面の酸化膜を除去し、半田バンプ3と導電性接着剤4中に含まれる導電粒子4aとの接合性を向上させることが出来るからである。エポキシ樹脂に酸化膜除去作用を与えるには、(メタ)アクリル酸、マレイン酸などの不飽和酸、蓚酸、マロン酸などの有機二酸、クエン酸などの有機酸をはじめ、炭化水素の側鎖に、ハロゲン基、水酸基、ニトリル基、ベンジル基、カルボキシル基等を少なくとも1つ以上を添加することにより可能である。これらの添加剤を3〜10wt%(重量%)加えてもよいし、他の方法としては、エポキシ樹脂の硬化剤と主剤の反応時に生成される前記物質を利用して、酸化膜除去を行なうことも可能である。エポキシ樹脂の主剤と硬化剤の混合比は、主剤60〜90wt%に対して、硬化剤10〜40wt%が望ましい。
The insulating resin 4b serving as the base material of the conductive adhesive 4 is acrylic resin, melamine resin, epoxy resin, polyolefin resin, polyurethane resin, polycarbonate resin, polystyrene resin, polyether resin, polyamide resin, polyimide resin, fluorine resin, polyester. There are various materials such as a resin, a phenol resin, a fluorene resin, a benzocyclobutene resin, and a silicone resin, but there is no particular limitation, and these can be used alone or in combination of two or more. Epoxy resins that are excellent in terms of viscosity, cost, heat resistance, adhesion and the like are generally used, but resins that are liquid at room temperature of about 25 ° C. are desirable.
Furthermore, it is desirable that the insulating resin 4b of the conductive adhesive 4 includes an oxide film removing action. The reason is that when the solder bump 3 and the conductive adhesive 4 are joined, the oxide film on the surface of the solder bump 3 is removed, and the solder bump 3 and the conductive particles 4a contained in the conductive adhesive 4 are joined. This is because it can be improved. In order to give an oxide film removal action to epoxy resins, unsaturated acids such as (meth) acrylic acid and maleic acid, organic diacids such as oxalic acid and malonic acid, organic acids such as citric acid, and hydrocarbon side chains Further, it is possible to add at least one halogen group, hydroxyl group, nitrile group, benzyl group, carboxyl group or the like. These additives may be added in an amount of 3 to 10 wt% (weight%). As another method, the oxide film is removed by using the substance generated during the reaction between the curing agent of the epoxy resin and the main agent. It is also possible. The mixing ratio of the epoxy resin main agent and the curing agent is preferably 10 to 40 wt% with respect to 60 to 90 wt% of the main agent.

ここで重要なのが、導電性接着剤4中に含まれている導電粒子4aは金属間化合物を含んでいることである。その理由は、図2に示す半田バンプ3と導電性接着剤4の接合界面において、半田バンプ3と電気的接続を保っている接合界面上の導電粒子4aは、実装時や実装後の加熱により拡散が進行し、接合界面の導電粒子4aは半田バンプ3中に取り込まれて消失し、半田バンプ3と導電性接着剤4の電気的接続が得られなくなる問題が発生するためである。一例を示すと、導電粒子4aにAgを用いた場合では、接合界面のAg粒子は半田バンプ3中に取り込まれて消失し、半田バンプ3の中で、Snと結合してAgSnの金属間化合物として存在する。そこで、導電粒子4aの中にあらかじめ金属間化合物を用いることで、実装後の拡散による接合界面の導電粒子4aの消失を防止し、接続信頼性の高いバンプ接合構造を得ることが出来る。導電粒子として添加する金属間化合物の一例としては、AuSn、AgSn、CuSn、CuSn等が挙げられる。ここで、半田バンプ3と導電性接着剤4中の導電粒子4aとの接合状態に関して、半田が導電粒子4aに溶融接合していることが望ましい。その理由は、接合界面の密着力に関して言えば、絶縁樹脂4bと半田との接着力に加えて、半田と導電粒子4aの溶融接合による結合力が得られるために界面の接合強度が飛躍的に向上し、接合信頼性が向上することと、溶融接合することで接合界面における導通抵抗が少ない良好な接合界面を得られるためである。この効果により、従来、導電性接着剤による接続の課題であった電気抵抗の低減と密着強度向上の両立を容易に実現することが可能となる。さらに望ましくは、金属間化合物からなる導電粒子4aの周囲には、導電率のよい金属層を形成した方がよい。その理由は、導電性接着剤4中の導電粒子4aどうしの導通において、金属間化合物自身よりも導電率のよい金属層を形成することにより、導電性接着剤中の導通抵抗を低減することが可能となるからである。金属層の材料としては、Au、Cu等が挙げられる。導電粒子4aの平均粒径は、10μm程度で、周囲に金属層を形成する場合、金属層厚さは0.1μm以下が目安となるが、バンプピッチが微細の場合には、粒径を小さくすることもある。導通抵抗の低減のために、導電粒子4aとしてSnを含む金属間化合物の外にこれより電気伝導度の高い金属からなる金属粒子を含むようにすることが望ましい。そのための金属材料としては、Ag、Au、Cu、Pd、Ag-Pd合金が挙げられる。Snを含む金属間化合物より電気伝導度の高い金属の導電粒子の導電粒子全体におけるwt%は、5〜30%の範囲であることが望ましい。これ以下であると導通抵抗の低減効果が少なく、またこれ以上にAg、Au等の比率が高まると、半田に取り込まれる導電粒子が多くなって導通抵抗の上昇を招くからである。導電性接着剤バンプに添加されている導電粒子4aの量に関しては、粒子形状や粒子材質、製造方法等により異なるので、一概に規定することは出来ないが、一例を挙げるとすれば、樹脂に対する導電粒子の体積比率で考えた場合、20〜50%であることが望ましい。 What is important here is that the conductive particles 4a contained in the conductive adhesive 4 contain an intermetallic compound. The reason for this is that the conductive particles 4a on the bonding interface that maintains electrical connection with the solder bump 3 at the bonding interface between the solder bump 3 and the conductive adhesive 4 shown in FIG. This is because the diffusion proceeds, and the conductive particles 4a at the bonding interface are taken into the solder bumps 3 and disappear, so that the electrical connection between the solder bumps 3 and the conductive adhesive 4 cannot be obtained. As an example, when Ag is used for the conductive particles 4a, the Ag particles at the bonding interface are taken in and disappear in the solder bumps 3, and are combined with Sn in the solder bumps 3 to form Ag 3 Sn metal. It exists as an intercalation compound. Therefore, by using an intermetallic compound in the conductive particles 4a in advance, the disappearance of the conductive particles 4a at the bonding interface due to diffusion after mounting can be prevented, and a bump bonding structure with high connection reliability can be obtained. Examples of intermetallic compounds added as the conductive particles include AuSn, Ag 3 Sn, Cu 3 Sn, Cu 6 Sn 5 and the like. Here, regarding the bonding state between the solder bump 3 and the conductive particles 4 a in the conductive adhesive 4, it is desirable that the solder is melt bonded to the conductive particles 4 a. The reason for this is that in terms of the adhesion strength at the bonding interface, in addition to the bonding strength between the insulating resin 4b and the solder, the bonding strength by fusion bonding of the solder and the conductive particles 4a can be obtained, so the bonding strength at the interface is dramatically increased. This is because it is possible to improve the bonding reliability and to obtain a good bonding interface with low conduction resistance at the bonding interface by melt bonding. With this effect, it is possible to easily realize both the reduction of electric resistance and the improvement of adhesion strength, which have been problems in connection with a conductive adhesive. More preferably, a metal layer with good conductivity should be formed around the conductive particles 4a made of an intermetallic compound. The reason is that the conduction resistance in the conductive adhesive can be reduced by forming a metal layer having better conductivity than the intermetallic compound itself in the conduction between the conductive particles 4 a in the conductive adhesive 4. This is because it becomes possible. Examples of the material for the metal layer include Au and Cu. The average particle diameter of the conductive particles 4a is about 10 μm. When a metal layer is formed around the conductive particles 4a, the standard thickness of the metal layer is 0.1 μm or less. However, when the bump pitch is fine, the particle diameter is small. Sometimes. In order to reduce the conduction resistance, it is desirable that the conductive particles 4a include metal particles made of a metal having higher electrical conductivity in addition to the intermetallic compound containing Sn. Examples of the metal material for this purpose include Ag, Au, Cu, Pd, and Ag—Pd alloy. It is desirable that the wt% of the conductive particles of the metal having higher electrical conductivity than the intermetallic compound containing Sn is in the range of 5 to 30%. This is because if the ratio is less than this, the effect of reducing the conduction resistance is small, and if the ratio of Ag, Au, etc. is further increased, the number of conductive particles taken into the solder increases and the conduction resistance is increased. The amount of the conductive particles 4a added to the conductive adhesive bumps varies depending on the particle shape, particle material, manufacturing method, etc., and thus cannot be specified in general. When considered in terms of the volume ratio of the conductive particles, it is preferably 20 to 50%.

半導体素子の微細化が進み、電極端子1bが一層微細化されると、半導体基板1aと基板2aの熱膨張係数差により熱応力で半田バンプや配線が破壊する可能性がある。この場合は、半田バンプの周囲、つまり半導体素子1と実装基板2との隙間をアンダーフィル樹脂にて封止して、バンプ接合部を保護することが有効である。アンダーフィル樹脂には、導電性接着剤の絶縁樹脂同様、エポキシ樹脂を用いることが一般的であるが、アンダーフィル樹脂の熱膨張係数低下や弾性率の向上を図るためにシリカフィラー等を添加してもよい。また、アンダーフィル樹脂による封止方法として、特に半導体素子1を搭載する前にあらかじめ実装基板2上にアンダーフィル形成用樹脂を塗布しておく場合、アンダーフィル形成用樹脂が酸化膜除去作用を含んでいることが望ましい。その理由は、実装時に半田バンプ3の酸化膜を除去することで、半田バンプと導電粒子4aの良好な溶融接合を実現することができるからである。アンダーフィル形成用樹脂に酸化膜除去作用を付加する手段は、上述した導電性接着剤の絶縁樹脂に酸化膜除去作用を付加する場合と同様の手段を用いることが出来る。
以上説明した実施の形態は、半導体素子1側に半田バンプを形成するものであったが、逆に、実装基板2側に半田バンプを設けるようにしてもよい。
If the semiconductor element is further miniaturized and the electrode terminal 1b is further miniaturized, there is a possibility that the solder bump and the wiring are destroyed by the thermal stress due to the difference in thermal expansion coefficient between the semiconductor substrate 1a and the substrate 2a. In this case, it is effective to protect the bump bonding portion by sealing the periphery of the solder bump, that is, the gap between the semiconductor element 1 and the mounting substrate 2 with an underfill resin. For the underfill resin, it is common to use an epoxy resin, like the insulating resin of the conductive adhesive, but silica filler or the like is added to lower the thermal expansion coefficient of the underfill resin and improve the elastic modulus. May be. As a sealing method using an underfill resin, in particular, when an underfill forming resin is applied on the mounting substrate 2 in advance before mounting the semiconductor element 1, the underfill forming resin includes an oxide film removing function. It is desirable that The reason is that by removing the oxide film of the solder bump 3 at the time of mounting, it is possible to realize good fusion bonding between the solder bump and the conductive particles 4a. As the means for adding the oxide film removing action to the underfill forming resin, the same means as that for adding the oxide film removing action to the insulating resin of the conductive adhesive described above can be used.
In the embodiment described above, solder bumps are formed on the semiconductor element 1 side. Conversely, solder bumps may be provided on the mounting substrate 2 side.

〔第2の実施の形態(実装構造)〕
図3は、本発明の実装構造の第2の実施の形態を示す要部断面図である。図3において、第1の実施の形態を示す図1と同等の部材には同一の参照符号が付せられている。本実施の形態の実装構造は、図1に示した構造に対して、実装基板2の電極パッド2b上にも半田バンプ5を形成した構造である。実装基板2側への半田バンプの形成方法および半田材質については、上述した半導体素子1側の半田バンプ3の場合と同様である。また、半田材質に関しては、半導体素子側の半田バンプ3と同じであることが望ましい。その理由は、導電性接着剤4中の導電粒子4aと半田バンプ3および半田バンプ5をそれぞれの接合界面において溶融接合させる場合、材質が同じであれば、融点も同じになるので、一度のプロセスで両方の溶融接合を行なうことが出来るため効率的であるからである。
また、本実施の形態の構造のようにバンプ構成を半田バンプ3、導電性接着剤4、半田バンプ5のような3層構造とすることで、導電性接着剤4の接合界面を全て半田とし、かつ溶融接合とすることが出来るため、接合界面における導通抵抗の低減と密着力の向上を同時に実現でき、強固でかつ導通抵抗の低い導電性接着剤接合構造を得ることが可能となる。この点は従来導電性接着剤接続では両立が難しい課題であった。その理由は、界面の導通抵抗を低減させようとした場合、導電粒子とバンプの接触面積を増やす必要があるが、接触による導通の場合、導通部分では接着力は得られないため、接着力は導電性接着剤の絶縁樹脂と半田バンプの接着力のみとなる。従って接着力を増すために絶縁樹脂と半田バンプの接触面積を増やせば、必然的に導電粒子と半田バンプの接触面積が減ることとなるためである。
また、本実施の形態の実装構造においても、図1に示す第1の実施の形態の構造と同様、半導体素子1と実装基板2との隙間をアンダーフィル樹脂にて封止して、バンプ接合部を保護することができる。
[Second Embodiment (Mounting Structure)]
FIG. 3 is a cross-sectional view of a main part showing a second embodiment of the mounting structure of the present invention. In FIG. 3, the same reference numerals are given to the members equivalent to those in FIG. 1 showing the first embodiment. The mounting structure of the present embodiment is a structure in which solder bumps 5 are also formed on the electrode pads 2b of the mounting substrate 2 with respect to the structure shown in FIG. The method of forming solder bumps on the mounting substrate 2 side and the solder material are the same as in the case of the solder bumps 3 on the semiconductor element 1 side described above. The solder material is preferably the same as that of the solder bump 3 on the semiconductor element side. The reason for this is that when the conductive particles 4a in the conductive adhesive 4, the solder bumps 3 and the solder bumps 5 are melt-bonded at the respective bonding interfaces, the melting point will be the same if the materials are the same. This is because it is efficient because both melt bonding can be performed.
Further, the bump configuration is a three-layer structure such as the solder bump 3, the conductive adhesive 4, and the solder bump 5 as in the structure of the present embodiment, so that the joint interface of the conductive adhesive 4 is all solder. In addition, since it is possible to perform melt bonding, it is possible to simultaneously reduce conduction resistance and improve adhesion at the bonding interface, and to obtain a conductive adhesive bonding structure that is strong and has low conduction resistance. This is a problem that is difficult to achieve with conventional conductive adhesive connection. The reason for this is that when the conduction resistance at the interface is to be reduced, it is necessary to increase the contact area between the conductive particles and the bumps. Only the adhesive force between the insulating resin of the conductive adhesive and the solder bumps is obtained. Therefore, if the contact area between the insulating resin and the solder bumps is increased in order to increase the adhesive force, the contact area between the conductive particles and the solder bumps inevitably decreases.
Also in the mounting structure of the present embodiment, the gap between the semiconductor element 1 and the mounting substrate 2 is sealed with an underfill resin, as in the structure of the first embodiment shown in FIG. The part can be protected.

〔第1の実施の形態(実装方法)〕
次に、本発明の実装構造を実現するための実装方法について説明する。図4は、本発明の実装方法の第1の実施の形態を示す工程順の断面図である。まず、図4(a)に示すように、半導体素子1および実装基板2を用意し、半導体素子1の電極端子上に半田バンプ3を、実装基板2の電極パッド上に半田バンプ5を形成する。半田バンプの形成方法は、フラックスを含んだ半田ペーストをメタルマスク等を使用して電極端子(電極パッド)上に印刷し、リフローしたのちにフラックス洗浄する方法でもよいし、電極端子(電極パッド)上に塗布したフラックスにハンダボールを転写して、リフローした後にフラックス洗浄を行なう方法でもよい。なお、図4(a)では、半導体素子1側および実装基板2側に半田バンプを形成しているが、どちらか一方にのみ半田バンプを形成した場合でも、以下に説明する本実施の形態の実装方法を用いることが出来る。続いて、実装基板2側の電極部分に導電性接着剤4を供給する。供給方法はメタルマスクを用いた印刷による供給が一般的であるが、ディスペンサー等を用いて供給することも可能である。導電性接着剤は、半導体素子1側に供給するようにしてもよい。あるいは、半導体素子1側と実装基板2側の双方に供給するようにしてもよい。この段階では、導電性接着剤4は、未硬化の状態にしておく。次に、図4(b)に示すように、半導体素子1と実装基板2を位置合わせ後、半導体素子1を実装基板2上に搭載する。このとき、半導体素子側の半田バンプ3と実装基板側の半田バンプ5が接触しないようにマウンタの搭載高さ位置制御機能を使って、高さ調整を行なう。
[First Embodiment (Mounting Method)]
Next, a mounting method for realizing the mounting structure of the present invention will be described. FIG. 4 is a cross-sectional view in order of steps showing the first embodiment of the mounting method of the present invention. First, as shown in FIG. 4A, the semiconductor element 1 and the mounting substrate 2 are prepared, and the solder bump 3 is formed on the electrode terminal of the semiconductor element 1 and the solder bump 5 is formed on the electrode pad of the mounting substrate 2. . The solder bump can be formed by printing a solder paste containing flux on the electrode terminal (electrode pad) using a metal mask or the like, reflowing and then cleaning the flux, or electrode terminal (electrode pad). A method may be used in which the solder balls are transferred to the flux applied above and the flux is washed after reflow. In FIG. 4A, solder bumps are formed on the semiconductor element 1 side and the mounting substrate 2 side. However, even when solder bumps are formed only on one of them, the embodiment described below will be described. A mounting method can be used. Subsequently, the conductive adhesive 4 is supplied to the electrode portion on the mounting substrate 2 side. The supply method is generally supply by printing using a metal mask, but it is also possible to supply using a dispenser or the like. The conductive adhesive may be supplied to the semiconductor element 1 side. Or you may make it supply to both the semiconductor element 1 side and the mounting substrate 2 side. At this stage, the conductive adhesive 4 is left in an uncured state. Next, as shown in FIG. 4B, the semiconductor element 1 and the mounting substrate 2 are aligned, and then the semiconductor element 1 is mounted on the mounting substrate 2. At this time, the height adjustment is performed by using the mounting height position control function of the mounter so that the solder bumps 3 on the semiconductor element side and the solder bumps 5 on the mounting substrate side do not come into contact with each other.

続いて導電性接着剤4の硬化を進める工程に移行するが、この後の工程での実装方法は2通りあるので、それぞれについて説明する。まず、1つめの方法は、高さ制御を行なった状態で半田バンプを溶融温度まで加熱し、半田バンプを溶融させながら導電性接着剤4の硬化を進める。このとき、溶融した半導体素子側および実装基板側の半田バンプは、導電性接着剤4中の導電粒子4aと溶融接合し、かつ絶縁樹脂4bが硬化することで、半導体素子1と実装基板2は半田バンプ3、導電性接着剤4、半田バンプ5の3層構造のバンプを介して電気的に接合される。続いて、アンダーフィル樹脂6を毛細管現象を利用し、半導体素子1と実装基板2の隙間に注入したのち、アンダーフィル樹脂6を硬化することで、図4(c)に示される本発明の実装構造を得ることができる。
続いて、2つめの方法について説明する。この方法の場合、半導体素子1を実装基板2上に搭載した後、高さ制御を行なった状態で導電性接着剤4の硬化を進めるが、硬化温度は半田バンプの融点よりも低い温度で行なう。次に、アンダーフィル樹脂6を毛細管現象を利用し、半導体素子1と実装基板2の隙間に注入したのち、アンダーフィル樹脂6を硬化する。次に、半田バンプを融点以上に加熱して半田バンプ3および半田バンプ5を溶融させ、半田バンプと接触状態である導電粒子4aと溶融接合させることで、図4(c)に示される本発明の実装構造が完成する。
Subsequently, the process proceeds to a step of proceeding with the curing of the conductive adhesive 4, and there are two mounting methods in the subsequent steps, and each will be described. First, in the first method, the solder bump is heated to a melting temperature in a state where the height is controlled, and the conductive adhesive 4 is cured while the solder bump is melted. At this time, the melted solder bumps on the semiconductor element side and the mounting substrate side are melt bonded to the conductive particles 4a in the conductive adhesive 4 and the insulating resin 4b is cured, so that the semiconductor element 1 and the mounting board 2 are The solder bumps 3, the conductive adhesive 4, and the solder bumps 5 are electrically connected via bumps having a three-layer structure. Subsequently, the underfill resin 6 is injected into the gap between the semiconductor element 1 and the mounting substrate 2 using a capillary phenomenon, and then the underfill resin 6 is cured, whereby the mounting of the present invention shown in FIG. A structure can be obtained.
Next, the second method will be described. In the case of this method, after the semiconductor element 1 is mounted on the mounting substrate 2, the conductive adhesive 4 is cured while the height is controlled, but the curing temperature is lower than the melting point of the solder bump. . Next, after the underfill resin 6 is injected into the gap between the semiconductor element 1 and the mounting substrate 2 by utilizing a capillary phenomenon, the underfill resin 6 is cured. Next, the solder bump is heated to a melting point or higher to melt the solder bump 3 and the solder bump 5, and melt-bonded to the conductive particles 4a in contact with the solder bump, whereby the present invention shown in FIG. The mounting structure is completed.

〔第2の実施の形態(実装方法)〕
図5は、本発明の実装方法の第2の実施の形態を示す工程順の断面図である。まず、図5(a)に示すように、半導体素子1および実装基板2を用意し、半導体素子1の電極端子上に半田バンプ3を形成し、実装基板2側に導電性接着剤4を供給する。半田バンプは、実装基板2側に形成するようにしてもよい。あるいは、半導体素子1側と実装基板2側の双方に形成するようにしてもよい。導電性接着剤は、半導体素子1側に供給するようにしてもよい。あるいは、半導体素子1側と実装基板2側の双方に供給するようにしてもよい。半田バンプ3の形成方法および導電性接着剤4の供給方法は、上述した図4での実装方法の場合と同様である。続いて、実装基板2側に塗布した導電性接着剤の硬化をわずかに進める。具体的には導電性接着剤絶縁樹脂がエポキシ樹脂の場合、150℃で60〜120秒程度がよい。この導電性接着剤4の硬化をわずかに進める工程は、実装基板上にアンダーフィル樹脂6を塗布した際に導電性接着剤4とアンダーフィル樹脂6が混ざり合わないようにするために必要となる。続いて、実装基板2側の半導体素子1の搭載箇所にアンダーフィル樹脂6を塗布する。然る後、半導体素子1と実装基板2を位置合わせ後、半導体素子1を実装基板2上に搭載する。その後、加熱を行ない、導電性接着剤4とアンダーフィル樹脂6を硬化させるが、加熱の方法は半田バンプ3の融点以上に加熱し、樹脂硬化工程と同時に半田バンプ3と導電粒子4aを溶融接合させてもよいし、導電性接着剤4とアンダーフィル樹脂6の硬化工程では、半田バンプ3の融点以下の温度で硬化し、硬化後に半田バンプ3の融点以上の温度に加熱して、半田バンプ3と導電粒子4aを溶融接合させてもよい。以上の方法により、図5(b)に示される本発明の実装構造が完成する。
[Second Embodiment (Mounting Method)]
FIG. 5 is a sectional view in the order of steps showing a second embodiment of the mounting method of the present invention. First, as shown in FIG. 5A, a semiconductor element 1 and a mounting substrate 2 are prepared, solder bumps 3 are formed on electrode terminals of the semiconductor element 1, and a conductive adhesive 4 is supplied to the mounting substrate 2 side. To do. The solder bumps may be formed on the mounting substrate 2 side. Or you may make it form in both the semiconductor element 1 side and the mounting substrate 2 side. The conductive adhesive may be supplied to the semiconductor element 1 side. Or you may make it supply to both the semiconductor element 1 side and the mounting substrate 2 side. The method for forming the solder bump 3 and the method for supplying the conductive adhesive 4 are the same as those in the mounting method in FIG. Subsequently, the curing of the conductive adhesive applied to the mounting substrate 2 side is slightly advanced. Specifically, when the conductive adhesive insulating resin is an epoxy resin, it is preferably about 60 to 120 seconds at 150 ° C. The step of slightly curing the conductive adhesive 4 is necessary to prevent the conductive adhesive 4 and the underfill resin 6 from being mixed when the underfill resin 6 is applied on the mounting substrate. . Subsequently, an underfill resin 6 is applied to the mounting location of the semiconductor element 1 on the mounting substrate 2 side. Thereafter, the semiconductor element 1 and the mounting substrate 2 are aligned, and then the semiconductor element 1 is mounted on the mounting substrate 2. Thereafter, heating is performed to cure the conductive adhesive 4 and the underfill resin 6, but the heating method is to heat the melting point of the solder bump 3 or higher, and the solder bump 3 and the conductive particles 4a are melt-bonded simultaneously with the resin curing step. In the curing step of the conductive adhesive 4 and the underfill resin 6, the solder bump 3 is cured at a temperature not higher than the melting point of the solder bump 3 and heated to a temperature not lower than the melting point of the solder bump 3. 3 and the conductive particles 4a may be melt-bonded. With the above method, the mounting structure of the present invention shown in FIG. 5B is completed.

本発明の第1の実施の形態の実装構造を示す断面図。Sectional drawing which shows the mounting structure of the 1st Embodiment of this invention. 図1の、半田バンプと導電性接着剤の接合界面部分の拡大図。The enlarged view of the joining interface part of a solder bump and conductive adhesive of FIG. 本発明の第2の実施の形態の実装構造を示す断面図。Sectional drawing which shows the mounting structure of the 2nd Embodiment of this invention. 本発明の第1の実施の形態の実装方法を示す工程順の断面図。Sectional drawing of the order of a process which shows the mounting method of the 1st Embodiment of this invention. 本発明の第2の実施の形態の実装方法を示す工程順の断面図。Sectional drawing of the process order which shows the mounting method of the 2nd Embodiment of this invention.

符号の説明Explanation of symbols

1 半導体素子
1a 半導体基板
1b 電極端子
2 実装基板
2a 基板
2b 電極パッド
2c ソルダーレジスト
3、5 半田バンプ
4 導電性接着剤
4a 導電粒子
4b 絶縁樹脂
6 アンダーフィル樹脂
DESCRIPTION OF SYMBOLS 1 Semiconductor element 1a Semiconductor substrate 1b Electrode terminal 2 Mounting substrate 2a Substrate 2b Electrode pad 2c Solder resist 3, 5 Solder bump 4 Conductive adhesive 4a Conductive particle 4b Insulating resin 6 Underfill resin

Claims (12)

電子部品の電極端子と実装基板の電極パッドとが半田バンプと導電性接着剤を介して接続されている電子部品の実装構造において、電極端子と電極パッドとのいずれか一方または両方に半田バンプが形成され、半田バンプと電極パッド若しくは電極端子が、または、半田バンプ同士が導電性接着剤を介して接続されており、半田バンプと導電性接着剤の接合界面は、半田が導電性接着剤中の導電粒子と溶融接合していることを特徴とする電子部品の実装構造。 In an electronic component mounting structure in which an electrode terminal of an electronic component and an electrode pad of a mounting substrate are connected via a solder bump and a conductive adhesive, a solder bump is provided on one or both of the electrode terminal and the electrode pad. The solder bump and the electrode pad or electrode terminal, or the solder bumps are connected to each other through a conductive adhesive, and the solder bump and the conductive adhesive are bonded at the bonding interface between the solder and the conductive adhesive. An electronic component mounting structure characterized by being melt-bonded to the conductive particles. 前記導電性接着剤中に含まれている導電粒子は、金属間化合物を含んでいることを特徴とする請求項1に記載の電子部品の実装構造。 The mounting structure for an electronic component according to claim 1, wherein the conductive particles contained in the conductive adhesive contain an intermetallic compound. 前記導電性接着剤中に含まれている導電粒子は、前記半田バンプの主要構成金属を構成要素とする金属間化合物を含んでいることを特徴とする請求項1に記載の電子部品の実装構造。 2. The electronic component mounting structure according to claim 1, wherein the conductive particles contained in the conductive adhesive include an intermetallic compound having a main constituent metal of the solder bump as a constituent element. . 前記導電性接着剤中に含まれている導電粒子は、Snを構成要素とする金属間化合物を含んでいることを特徴とする請求項1に記載の電子部品の実装構造。 2. The electronic component mounting structure according to claim 1, wherein the conductive particles contained in the conductive adhesive contain an intermetallic compound containing Sn as a constituent element. 前記金属間化合物の周囲は金属層で被覆されていることを特徴とする請求項2から4のいずれかに記載の電子部品の実装構造。 5. The electronic component mounting structure according to claim 2, wherein the periphery of the intermetallic compound is covered with a metal layer. 前記導電粒子は、前記金属間化合物の外に前記金属間化合物より電気伝導性の良好な金属の良伝導性導電粒子を含んでいることを特徴とする請求項2から5のいずれかに記載の電子部品の実装構造。 6. The conductive particles according to any one of claims 2 to 5, wherein the conductive particles include, in addition to the intermetallic compound, highly conductive conductive particles of metal having better electrical conductivity than the intermetallic compound. Electronic component mounting structure. 前記導電性接着剤の基材となる絶縁樹脂は、酸化膜を除去する成分を含んでいることを特徴とする請求項1から6のいずれかに記載の電子部品の実装構造。 The mounting structure for an electronic component according to claim 1, wherein the insulating resin serving as a base material for the conductive adhesive includes a component for removing an oxide film. 前記半田バンプおよび前記導電性接着剤の周囲はアンダーフィル樹脂により封止されていることを特徴とする請求項1から7のいずれかに記載の電子部品の実装構造。 8. The electronic component mounting structure according to claim 1, wherein the periphery of the solder bump and the conductive adhesive is sealed with an underfill resin. 前記アンダーフィル樹脂は、酸化膜を除去する成分を含んでいることを特徴とする請求項8に記載の電子部品の実装構造。 The electronic component mounting structure according to claim 8, wherein the underfill resin includes a component for removing an oxide film. 電子部品に電極端子あるいは実装基板の電極パッドの少なくとも一方に、半田バンプを形成する工程と、電子部品および実装基板の一方あるいは両方の電極に導電性接着剤を供給する工程と、実装基板上に位置合わせして電子部品を搭載して、電子部品の電極端子と実装基板の電極パッドとを半田バンプと導電性接着剤を介して接続する工程と、半田バンプを溶融させて導電性接着剤の導電粒子と溶融接合させると共に導電性接着剤の硬化を進める工程と、を含むことを特徴とする電子部品の実装方法。 Forming a solder bump on at least one of an electrode terminal or an electrode pad of the mounting board on the electronic component, supplying a conductive adhesive to one or both electrodes of the electronic component and the mounting board, and on the mounting board Positioning and mounting the electronic component, connecting the electrode terminal of the electronic component and the electrode pad of the mounting substrate via the solder bump and the conductive adhesive, and melting the solder bump to form the conductive adhesive And a step of melt-bonding with the conductive particles and advancing curing of the conductive adhesive. 電子部品電極端子あるいは実装基板の電極パッドの少なくとも一方に、半田バンプを形成する工程と、電子部品および実装基板の一方あるいは両方の電極に導電性接着剤を供給する工程と、実装基板上に位置合わせして電子部品を搭載して、電子部品の電極端子と実装基板の電極パッドとを半田バンプと導電性接着剤を介して接続する工程と、導電性接着剤の硬化を進める工程と、電子部品と実装基板の隙間にアンダーフィル樹脂を注入する工程と、半田バンプを溶融させて導電性接着剤の導電粒子と溶融接合させる工程と、を含むことを特徴とする電子部品の実装方法。 A step of forming a solder bump on at least one of an electronic component electrode terminal or an electrode pad of the mounting board, a step of supplying a conductive adhesive to one or both electrodes of the electronic component and the mounting board, and a position on the mounting board Mounting the electronic component together, connecting the electrode terminal of the electronic component and the electrode pad of the mounting substrate via the solder bump and the conductive adhesive, the step of promoting the curing of the conductive adhesive, the electronic An electronic component mounting method comprising: a step of injecting an underfill resin into a gap between a component and a mounting substrate; and a step of melting a solder bump and melt-bonding with a conductive particle of a conductive adhesive. 電子部品の電極端子あるいは実装基板の電極パッドの少なくとも一方に、半田バンプを形成する工程と、電子部品および実装基板の一方あるいは両方の電極に導電性接着剤を供給し一定程度硬化を進める工程と、実装基板上にアンダーフィル樹脂を供給する工程と、実装基板上に位置合わせして電子部品を搭載して、電子部品の電極端子と実装基板の電極パッドとを半田バンプと導電性接着剤を介して接続する工程と、半田バンプを溶融させて導電粒子と溶融接合させる工程と、を含むことを特徴とする電子部品の実装方法。 Forming a solder bump on at least one of the electrode terminal of the electronic component or the electrode pad of the mounting substrate; and supplying the conductive adhesive to one or both electrodes of the electronic component and the mounting substrate to advance the curing to a certain extent; , Supplying the underfill resin onto the mounting substrate, positioning the electronic component on the mounting substrate, mounting the electronic component electrode terminals and the mounting substrate electrode pads with solder bumps and conductive adhesive An electronic component mounting method comprising: a step of connecting via a solder bump; and a step of melting and bonding a solder bump to a conductive particle.
JP2007267890A 2007-10-15 2007-10-15 Mounting structure of electronic component, and mounting method thereof Pending JP2009099669A (en)

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US9252076B2 (en) 2013-08-07 2016-02-02 Taiwan Semiconductor Manufacturing Company, Ltd. 3D packages and methods for forming the same
US9543284B2 (en) 2013-08-07 2017-01-10 Taiwan Semiconductor Manufacturing Company, Ltd. 3D packages and methods for forming the same
US9376541B2 (en) 2013-10-10 2016-06-28 Samsung Electronics Co., Ltd. Non-conductive film and non-conductive paste including zinc particles, semiconductor package including the same, and method of manufacturing the semiconductor package
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