JP2009088194A - 半導体装置および半導体集積回路装置 - Google Patents
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 154
- 238000005530 etching Methods 0.000 claims abstract description 85
- 239000000758 substrate Substances 0.000 claims abstract description 13
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims description 10
- 150000001875 compounds Chemical class 0.000 claims description 7
- 230000010354 integration Effects 0.000 abstract description 5
- 238000010276 construction Methods 0.000 abstract 1
- PHLXSNIEQIKENK-UHFFFAOYSA-N 2-[[2-[5-methyl-3-(trifluoromethyl)pyrazol-1-yl]acetyl]amino]-4,5,6,7-tetrahydro-1-benzothiophene-3-carboxamide Chemical compound CC1=CC(C(F)(F)F)=NN1CC(=O)NC1=C(C(N)=O)C(CCCC2)=C2S1 PHLXSNIEQIKENK-UHFFFAOYSA-N 0.000 description 16
- 101100230601 Saccharomyces cerevisiae (strain ATCC 204508 / S288c) HBT1 gene Proteins 0.000 description 16
- 239000013078 crystal Substances 0.000 description 9
- 238000000034 method Methods 0.000 description 8
- 125000005842 heteroatom Chemical group 0.000 description 5
- 230000001681 protective effect Effects 0.000 description 5
- 229910052737 gold Inorganic materials 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 238000007747 plating Methods 0.000 description 2
- 229910052719 titanium Inorganic materials 0.000 description 2
- -1 GaAs compound Chemical class 0.000 description 1
- 229910000530 Gallium indium arsenide Inorganic materials 0.000 description 1
- 238000002513 implantation Methods 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 230000000149 penetrating effect Effects 0.000 description 1
- 229910052697 platinum Inorganic materials 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
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Abstract
【解決手段】基板上に、それぞれ第1層、ベース層、及び、第2層を順に有し、前記第1層、及び、前記第2層の一方がコレクタ層であり、他方がエミッタ層であるトランジスタセルを複数含み、前記各トランジスタセルの前記第1層に接続される第1電極が、前記第1層に形成されたエッチング溝に形成された半導体装置において、前記エッチング溝は、その長手方向に沿った側面が順メサ面となっており、複数のトランジスタセル間の前記第1電極が、前記各順メサ面に交差するように設けられた、まとめ配線によって接続される半導体装置である。
【選択図】図1
Description
Bob Yeats et al. 2000 GaAsMANTECH 131-135 (2000)
すなわち、本発明に係る第1の半導体装置は、基板上に、それぞれ第1層、ベース層、及び、第2層を順に有し、前記第1層、及び、前記第2層の一方がコレクタ層であり、他方がエミッタ層であるトランジスタセルを複数含み、前記各トランジスタセルの前記第1層に接続される第1電極が、前記第1層に形成されたエッチング溝に形成された半導体装置において、前記エッチング溝は、その長手方向に沿った側面が順メサ面となっており、複数のトランジスタセル間の前記第1電極が、前記各順メサ面に交差するように設けられた、まとめ配線によって接続されることを特徴とする。
したがって、本発明によれば、半導体集積回路装置の高集積化及び低コスト化を可能にする複数のトランジスタセルを含む半導体装置を提供することができる。
また、本発明に係る半導体装置を用いることによりレイアウトの自由度が向上し、高集積化された小型で安価な半導体集積回路装置の提供が可能となる。
・実施の形態1
図3(a)〜(f)は、本発明に係るトランジスタセルの一例である実施の形態1のヘテロバイポーラトランジスタ一(HBT、Hetero Junction Bipolar Transistor)セル1の製造方法を示す断面図であり、図1はバイポーラトランジスタ1を含む半導体装置250の上面図であり、図2Aは、図1のIIA−IIA断面を、図2Bは、図1のIIB−IIB断面を示す。
<実施の形態1のヘテロバイポーラトランジスタ1の製造工程>
GaAsの化合物半導体基板10の上に、順に、高濃度n型GaAsよりなる厚さ約0.5μmのサブコレクタ層20と、n型GaAsよりなる厚さ0.5μm〜1.5μmのコレクタ層30と、p型GaAsよりなる厚さ0.05μm〜0.15μmのベース層40と、n型InGaPよりなるエミッタ層50と、GaAsおよびInGaAsよりなるエミッタ上部層60を形成する。
トランジスタセル1’’と同じく、トランジスタセル1のエッチング溝35の延在方向(X方向)に垂直な断面(Y−Z面)の断面形状は順メサ形状となっている。
図4は、本発明の実施の形態2に係る半導体装置250Aの上面図である。図5は、図4のV−V断面を示す。なお、図4のIIa−IIa断面は、図1に示す実施の形態1にかかる半導体装置250のIIa−IIa断面(図2A)と同じである。
・実施の形態3
次に、上述した半導体装置250を用いた、半導体集積回路装置の詳細を以下に例示する。
図6は、実施の形態3で示す半導体集積回路装置の回路図である。3段のヘテロバイポーラトランジスタ(HBT)装置よりなるアンプ回路を2個含む。アンプ回路の一方は、動作周波数が0.9GHz付近のLoバンド用であり、他方は、動作周波数が1.8GHz付近のHiバンド用となっている。
Claims (6)
- 基板上に、それぞれ第1層、ベース層、及び、第2層を順に有し、前記第1層、及び、前記第2層の一方がコレクタ層であり、他方がエミッタ層であるトランジスタセルを複数含み、前記各トランジスタセルの前記第1層に接続される第1電極が、前記第1層に形成されたエッチング溝に形成された半導体装置において、
前記エッチング溝は、その長手方向に沿った側面が順メサ面となっており、複数のトランジスタセル間の前記第1電極が、前記各順メサ面に交差するように設けられた、まとめ配線によって接続されることを特徴とする半導体装置。 - 基板上に、それぞれ第1層、ベース層、及び、第2層を順に有し、前記第1層、及び、前記第2層の一方がコレクタ層であり、他方がエミッタ層であるトランジスタセルを複数含み、前記各トランジスタセルの前記第1層に接続される第1電極が、前記第1層に形成されたエッチング溝に形成された半導体装置において、
隣接するトランジスタセル間の前記エッチング溝が、前記第1層に設けられた第2エッチング溝によって繋がっており、複数のトランジスタセル間の前記第1電極が、前記第2エッチング溝に設けられた第2電極によって接続されていることを特徴とする半導体装置。 - 前記基板、第1層、ベース層、及び、第2層の少なくとも1層が化合物半導体よりなることを特徴とする請求項1または2に記載の半導体装置。
- 前記第1層が、GaAsよりなる層であり、前記エッチング溝の長手方向が、前記第1層の[01−1]方向に平行な方向であることを特徴とする請求項3に記載の半導体装置。
- 前記第1層がコレクタ層とサブコレクタ層からなり、前記エッチング溝が前記コレクタ層を貫通し、前記第1の電極が前記サブコレクタ層と接触していることを特徴とする請求項1〜4のいずれかに記載の半導体層。
- 請求項1〜5のいずれかに記載の半導体装置を第1半導体装置とし、該第1半導体装置のトランジスタセルと同じ基板の上に形成され、前記第1半導体装置のトランジスタセルのエッチング溝に対し、基板に平行な平面で略90°回転したエッチング溝を備えた複数の第2トランジスタセルを有する第2半導体装置を含むことを特徴とする半導体集積回路装置。
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JP2007255317A JP2009088194A (ja) | 2007-09-28 | 2007-09-28 | 半導体装置および半導体集積回路装置 |
US12/237,648 US20090085162A1 (en) | 2007-09-28 | 2008-09-25 | Semiconductor device and integrated semiconductor circuit device |
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JP2003051502A (ja) * | 2001-05-29 | 2003-02-21 | Sharp Corp | 半導体装置およびその製造方法 |
JP2003086600A (ja) * | 2001-09-11 | 2003-03-20 | Sharp Corp | 半導体装置およびそれを備えた高周波増幅器 |
JP2006185990A (ja) * | 2004-12-27 | 2006-07-13 | Renesas Technology Corp | 半導体装置およびその製造方法ならびに電子装置 |
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JP2004047967A (ja) * | 2002-05-22 | 2004-02-12 | Denso Corp | 半導体装置及びその製造方法 |
JP5011549B2 (ja) * | 2004-12-28 | 2012-08-29 | 株式会社村田製作所 | 半導体装置 |
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JP2003051502A (ja) * | 2001-05-29 | 2003-02-21 | Sharp Corp | 半導体装置およびその製造方法 |
JP2003086600A (ja) * | 2001-09-11 | 2003-03-20 | Sharp Corp | 半導体装置およびそれを備えた高周波増幅器 |
JP2006185990A (ja) * | 2004-12-27 | 2006-07-13 | Renesas Technology Corp | 半導体装置およびその製造方法ならびに電子装置 |
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