JP2009060520A - Image reader - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an image reader for optimizing sampling timing of an output signal of a CCD line sensor and providing an excellent image. <P>SOLUTION: The image reader is provided with: a first sampling timing setting means for setting a plurality of timings for sampling an output sinal of a photoelectric conversion means; and a data holding means for holding equalization data which have equalized digital image data outputted by a signal processing means; a statistical quantity calculating means for calculating a prescribed statistical quantity from the held equalization data; a completion determining means for determining whether sampling processing is completed with set sampling timings; a retrieving means for retrieving the statistical quantity corresponding to a prescribed condition and sampling timing corresponding to the statistical quantity when it is determined that the sampling processing is finished; and a second sampling timing setting means for setting final sampling timing on the basis of the retrieval result. A CPU has functions of the respective means. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to an image reading apparatus having an original reading unit that optically reads an original. In particular, the present invention relates to an image reading apparatus characterized by a technique for optimizing a sampling timing when AD converting an analog image signal output from a photoelectric conversion device such as a CCD.

  An analog image signal output from a photoelectric conversion device such as a CCD line sensor is sampled by an analog processing circuit arranged at a subsequent stage, and is digitally converted by an AD converter to become digital image data.

  In recent image reading apparatuses, a CCD dedicated signal processing IC is often used. This IC performs sampling processing, AD conversion function, and gain processing automatically so that the signal level becomes a predetermined value, and automatically corrects the black level by referring to the optical black level (shading pixel level) of the sensor It has the function to do.

  The analog image signal output from the CCD line sensor is generally sampled in two modes (methods).

  One is a so-called sample hold mode. In this mode, the portion of the CCD line sensor output signal that changes in magnitude according to the incident light is sampled, and the difference between the sampled result and the reference voltage generated inside the CCD line sensor dedicated signal processing IC or the like is used as an image signal. Convert.

  The other is a so-called correlated double sampling mode. In this mode, two parts of the CCD line sensor output signal that are large and small according to the incident light and a part that does not vary according to the incident light (generally called a feedthrough part and a pedestal part) are sampled. The difference is AD converted as an image signal.

  In either sampling method, in order to stably read a high-quality image, it is necessary to sample the signal in a region where the output signal waveform of the CCD line sensor is stable.

  FIG. 1 is a diagram schematically showing a CCD line sensor output signal and its sampling timing.

  An example of the correlated double sampling described above is shown. (A) is a CCD line sensor output signal. The signal waveform of (b) is an SHP signal for sampling the feedthrough part, and (c) is the SHD signal for sampling the signal output part.

  In FIG. 1, a period A is a reset period of the CCD output signal, that is, a period of resetting the capacitor potential of the charge-voltage converter in the previous pixel, and is usually controlled by a reset signal input to the CCD line sensor. The

  Period B is the feedthrough section. When the CCD line sensor has a clamp function for each pixel, a clamp signal is input during period B and clamped to a predetermined voltage level. During this period, the incident light to the CCD line sensor is not sensitive and always has a constant voltage level. One sampling in the case of correlated double sampling is performed during this period at the falling edge of the SHP signal.

  The period C is a signal output period in which the voltage level varies according to the amount of light incident on the CCD line sensor. The other sampling in the correlated double sampling is performed during this period by the SHD signal.

  When sampling in the sample hold mode, the CCD line sensor output signal in the period C is sampled by the SHD signal, and a reference voltage separately generated by the SHP signal is sampled.

  The sampling signal is generated and output by a timing generator circuit. The timing generator circuit is realized by a custom IC such as an ASIC or prepared as one of the functions of the CCD signal processing IC. The timing generator has an operation setting register, and can generate various timings by register setting by a CPU or the like.

  The CCD output signal is observed at the time of product design, and the phase adjustment is performed by changing the register setting of the timing generator so that the SHP signal and SHD signal output from the timing generator are optimized in accordance with the CCD output signal timing. Since the determined register settings for the timing generator are stored as firmware, a signal having a predetermined timing is always output from the timing generator.

  When trying to increase the reading productivity, the driving speed of the CCD line sensor is increased in order to increase the reading speed, so that the time periods A, B, and C in FIG. 1 are shortened. Accordingly, the periods B and C, which are sampling periods, are shortened. As a result, the CCD output signal stabilization period in the periods B and C is also shortened, and more accurate sampling timing control is required. .

  However, for example, when a buffer or the like is used while the sampling signal is output from the timing generator and transmitted to the CCD signal processing IC, a delay or the like may occur in the signal output timing. That is, temperature fluctuations occur due to manufacturing variations of the buffer IC itself, self-heating of the buffer IC, and the influence of surrounding heating members.

  Furthermore, if there is cable transmission between the timing generator and the CCD signal processing IC, the waveform of the sampling signal may vary depending on the machine due to impedance variation of the transmission means.

  As a result, the CCD output signal may not be sampled at the optimum sampling position, and image quality may be deteriorated such that image data reading variation occurs.

  Further, when the drive speed of the CCD line sensor is increased, the CCD must be driven with a large current in order to drive the CCD without defective transfer. As a result, ringing noise synchronized with the rising and falling edges of the clock signal for driving the CCD may be superimposed on the CCD output waveform.

  When the ringing noise generation position is close to the signal sampling timing, appropriate sampling cannot be performed due to the influence of the ringing noise, and image quality deterioration such as image data reading variation may occur.

  Patent Document 1 proposes an image reading apparatus having the following functions.

That is, in the technique described in Patent Document 1, the difference between the correction reference data obtained by the average data generation unit and the correction reference data obtained by the peak hold data generation unit is calculated for the image data. Then, the magnitude of noise superimposed on the image data is determined by determining whether the calculated difference is equal to or greater than a predetermined value.
Japanese Patent Laid-Open No. 10-271328

  In the above-described conventional technology, it is possible to detect image noise caused by the optical system and electric circuit including the lamp and a decrease in the light amount of the light source, but it detects image quality degradation factors such as noise caused by the sampling position of the CCD output signal. It is difficult to judge.

  An object of the present invention is to provide an image reading apparatus that optimizes the sampling timing of an output signal of a CCD line sensor and realizes a good image.

  In order to achieve the above object, an image reading apparatus according to claim 1, wherein a photoelectric conversion means for converting reflected light from a document into an electric signal, sampling of an output signal of the photoelectric conversion means, and digital image data are obtained. An image reading apparatus comprising: a signal processing unit that outputs a first sampling timing setting unit that sets a plurality of timings for sampling an output signal of the photoelectric conversion unit; and the digital image data output from the signal processing unit. Set by data holding means for holding averaged averaged data, statistic calculation means for calculating a predetermined statistic from the averaged data held in the data holding means, and the first sampling timing setting means Judge whether or not the sampling process at the multiple sampling timings completed An end determination means; and a search means for searching for the statistic that matches a predetermined condition and the sampling timing corresponding to the statistic when the end determination means determines that the sampling process has ended, And a second sampling timing setting means for setting the final sampling timing based on the search result of the search means.

  The image reading apparatus according to claim 2, a photoelectric conversion unit that converts reflected light from an original into an electric signal, a signal processing unit that converts an analog electric signal from the photoelectric conversion unit into a digital signal, and processes the digital signal. In the image reading apparatus, comprising: photoelectric conversion means; drive signal generation means for outputting a drive signal for operating the signal processing means; and a memory for storing digital image data output from the signal processing means. A plurality of lines are read out, averaged data averaged for each corresponding pixel on the line is stored in the memory, averaged data generation means, and a predetermined statistical value from the averaged data stored in the memory Statistic calculation means for calculating the value, determination means for determining whether the value calculated by the statistic calculation means is a predetermined value or more, and the determination Based on the determination result by the stage, characterized in that it comprises a driving signal output phase control means for changing the output phase of the drive signal generated by the drive signal generating means.

  According to the image reading apparatus of the present invention, it is possible to optimize the sampling timing of the output signal of the CCD line sensor (photoelectric conversion means) and realize a good image.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

  FIG. 2 is a principal block diagram of the image reading apparatus according to the embodiment of the present invention.

  2, the image reading apparatus includes a CCD line sensor 201, a CCD signal processing unit (signal processing means) 202, a timing generator 203, a CPU 204, and an image processing unit 205. Here, the CCD line sensor 201 is a photoelectric conversion means for converting the reflected light from the document into an electric signal.

  The output signal of the CCD line sensor 201 is input to the CCD signal processing unit 202 after impedance conversion by an emitter follower circuit (not shown) or the like. The CCD signal processing unit 202 includes a circuit that samples a CCD output signal, an AD converter, and the like.

  A sampling signal for controlling the CCD output signal sampling in the CCD signal processing unit 202 is output from the timing generator 203. The timing generator 203 has an operation setting register therein, and is configured to be able to adjust the output signal timing by changing the internal register value.

  The CPU 204 changes the register value. The timing generator 203 also outputs a signal for driving the CCD line sensor 201.

  The CPU 204 performs register setting and control for the timing generator 203 and the image processing unit 205. Note that the line memory 206 included in the image processing unit 205 is configured to allow read access, and the CPU 204 can refer to the line memory data.

  The image processing unit 205 performs predetermined image processing such as shading correction on the digital image data of the CCD signal processing unit 202. The image data after the image processing unit 205 is sent to a subsequent printer image processing unit (not shown) or the like.

  The image processing unit 205 is equipped with a line memory 206. The line memory 206 has a capacity for adding the number of pixels of the CCD line sensor 201, the number of bits of the digital image data, and adding the image data for a predetermined line and performing a bit shift averaging process.

  The timing generator 203 and the image processing unit 205 operate with a reference clock from an external clock means (not shown), and operate in synchronization with each other.

  The CPU 204 performs control such as register setting so that the timing generator 203 outputs predetermined drive signals to the CCD line sensor 201 and the CCD signal processing unit 202.

  In response to a control signal from the timing generator 203, the CCD line sensor 201 and the CCD signal processing unit 202 start a reading processing operation. A signal output from the CCD signal processing unit 202 is held in the line memory 206 as digital image data for one main scanning line based on a line synchronization signal from the timing generator 203.

  When writing image data to the line memory 206, the image data for one main scanning line is added by the number of lines specified by a power of 2, and averaged by performing bit shift processing in accordance with the specified number of lines. Generate data.

  Since the line memory 206 is configured so that the internal data can be referred to by the CPU 204, the CPU 204 refers to the image data in the line memory 206, and performs statistics such as variance, standard deviation, and average for the main-scanning one-line image data. The amount can be calculated. The statistic calculation function can be realized by software processing by the CPU 204, and can also be implemented as hardware in the image processing unit.

  Sampling clock control to the CCD signal processing unit 202 will be described.

  The sampling clock signal supplied to the CCD signal processing unit 202 can be adjusted in rising and falling timing by register setting by the CPU 204 for the timing generator 203.

  FIG. 3 is a diagram showing sampling clock signals SHP and SHD supplied from the timing generator in FIG.

  Sampling signals SHP and SHD A, B, and C are signals with different timings. The sampling position of the CCD output signal (output signal of the CCD line sensor 201) by each sampling signal is a position indicated by an arrow in the figure.

  In the image reading apparatus of the present invention, a sampling clock adjustment mode is prepared in order to determine an optimum sampling timing.

  Specifically, as a result of performing sampling with a sampling signal in which the CCD signal sampling position is changed, such as A, B, and C of the above-described sampling signals SHP and SHD, variation in the image data value from the obtained image data, The brightness level and the like are calculated. Then, control is performed to determine whether the image quality is good or bad from the calculation result and to determine the optimum sampling timing for image reading.

  The SHP signal A in FIG. 3 is the first sampling timing for sampling the feedthrough portion of the CCD output signal. Digital image data obtained by performing sampling with the SHP signal A is added and averaged for a predetermined number of lines, and held in the line memory 206. For the stored data, the CPU 204 is controlled to calculate a variance value, which is one of the statistical values, that is, the degree of variation of the main-scanning 1-line image data.

  FIG. 4 is a flowchart showing the procedure of the sampling clock adjustment process in the sampling clock adjustment mode executed by the image reading apparatus of FIG.

  This process is performed under the control of the CPU 204 in FIG.

[Step S401]
A plurality of register setting information relating to the timing of the sampling signal is prepared. Specifically, a plurality of register setting values of the timing generator 203 are prepared. For example, as shown in FIG. 3, register setting values are prepared for three types of signals: SHP signals (A), (B), and (C) and SHP signals (A), (B), and (C).

  A plurality of register setting information is read in order corresponding to the number of processing loops in the sampling clock adjustment mode, and is registered in the timing generator 203. Note that the register setting information is implemented as a software program.

  Step S401 functions as first sampling timing setting means for setting a plurality of timings for sampling the output signal of the CCD line sensor 201.

[Step S402]
The read register setting information is set in the timing generator 203 via the CPU 204, and a sampling signal based on the register setting information is output. At the same time, since the CCD control signal is output from the timing generator 203, the CCD line sensor 201 and the CCD signal processing unit 202 are in operation, and the CCD signal processing unit 202 outputs digital image data.

[Step S403]
One line of main scanning of the digital image data output from the CCD signal processing unit 202 is held in the line memory 206. Data stored in the line memory 206 is subjected to addition and averaging for a predetermined line.

  Step S403 functions as a data holding unit that holds averaged data obtained by averaging the digital image data output from the CCD signal processing unit 202.

[Step S404]
The CPU 204 refers to the line memory 206 and calculates a predetermined statistic from the image data for one line. The calculated statistic is once held in the work RAM together with the register setting information.

  Step S404 functions as a statistic calculation unit that calculates a predetermined statistic from the averaged data held in the data holding unit.

[Step S405]
It is determined whether there is next register setting information. If there is next register setting information, the process proceeds to step S401, and the processes after step S402 are performed with the new register setting value. If there is no next register setting information, a series of processing has been performed based on all the register setting information, and the process proceeds to step S406.

  Step S405 functions as an end determination unit that determines whether or not sampling processing at a plurality of sampling timings set by the first sampling timing setting unit has ended.

[Step S406]
In step S404, the statistic data matching the predetermined condition and the corresponding register setting information are found from the statistic data corresponding to each register setting information held in the work RAM.

  For example, if the statistic calculated in step S404 is variance, the minimum variance value is searched. The variance value is a statistic indicating the degree of data variation, and the smaller the value, the better the image.

  After searching for the minimum variance value, the corresponding register setting information is obtained. If the statistic is an average value, register setting information with a condition closest to the target average value is acquired.

  Step S406 functions as a search unit that searches for a statistic that meets a predetermined condition and a sampling timing corresponding to the statistic when the end determination unit determines that the sampling process has ended.

[Step S407]
Based on the register setting information acquired in step S406, register settings are made in the timing generator 203 in order to optimize the sampling signal timing.

  FIG. 3 is a diagram for explaining the correlated double sampling as a sampling method of the CCD output signal, but the sampling method may be a sample hold method. In the case of sample hold, the above sequence may be executed with three types of sampling signals SHD signals (A), (B), and (C).

  Step S407 functions as second sampling timing setting means for setting the final sampling timing based on the search result of the search means.

  As described above, according to the present embodiment, the sampling clock adjustment mode makes it possible to find the sampling timing with the smallest variance value, and the sampling timing is set based on the result. Image reading becomes possible.

  By the way, as shown in FIG. 1, the CCD output waveform in the period C changes depending on whether the light source is turned on or off.

  In the region where the period C starts, the signal waveform is not stable in the transient period in which signal output is started from the period B. Therefore, when sampling is performed in this region, there is a problem that variation in output image data increases. .

  Therefore, in the present embodiment, the flow shown in FIG. 4 is performed with the light source that illuminates the document turned off and turned on to realize an optimum sampling position corresponding to the change in the CCD signal output.

  Specifically, the processes from step S401 to step S405 are performed in the light source on state and in the off state, respectively, and optimum sampling conditions are determined from the statistic calculation results obtained in the state of each light source. is there.

  Since the light enters the CCD line sensor 201 when the light source is turned on, shot noise corresponding to the amount of incident light is generated, and the calculated value calculated from the image data increases. Therefore, when calculating statistics with divided values, conditions for determining the sampling timing are prepared for each state when the light is on and when it is off, and the sampling timing that matches that condition is used as the sampling timing when reading the actual image Is done.

  The same applies to the calculation of the average value as the statistic, and the reading level varies depending on each condition. Therefore, a sampling timing determination condition corresponding to each state is prepared.

  By determining the sampling timing based on the output signal waveform of the CCD line sensor 201 when the light source is turned on and off, a more optimal sampling timing can be determined, so that good image reading can be performed.

  Since the temperature in the image reading device depends on the temperature environment in which the image reading apparatus is installed, the temperature of mounted components such as ICs on the substrate varies depending on the environment, and as a result, the timing of the sampling signal may vary slightly. In such a case, the above-described sampling timing condition determination control may be executed as an initial operation sequence when the power is turned on.

  Furthermore, when there is a printing device at the lower stage of the image reading device such as a copying machine, or depending on the frequency of use of the image reading device, the temperature conditions fluctuate due to the tilt temperature from the printer, self-heating of parts of the image reading device, etc. . As a result, the timing of the sampling signal may vary slightly. In such a situation where the temperature fluctuation is large, the sampling timing condition determination control may be performed immediately before the reading job is started.

  An image reading apparatus according to the present invention includes a photoelectric conversion unit (CCD line sensor 201) that converts reflected light from an original into an electric signal, and a signal processing unit that converts an analog electric signal from the photoelectric conversion unit into a digital signal for processing. (CCD signal processing unit 202). In addition, a photoelectric conversion unit and a drive signal generation unit (timing generator 203) that outputs a drive signal for operating the signal processing unit, and a memory (line memory 206) that stores digital image data output from the signal processing unit Is provided.

  Then, an averaged data generation unit (CCD signal processing unit 202) is provided that reads a plurality of lines of the photoelectric conversion unit and holds averaged data averaged for each corresponding pixel on the line in a memory. Also provided is a statistic calculating means (CPU 204) for calculating a predetermined statistical value from the averaged data held in the memory. Moreover, the determination means (CPU204) which determines whether the value calculated by the statistics calculation means is more than predetermined value is provided. In addition, drive signal output phase control means (CPU 204) is provided for changing the output phase of the drive signal generated by the drive signal generation means based on the determination result by the determination means.

  Here, the drive signal output phase control means is controlled a plurality of times, and average data generation by the averaged data generation means and statistical calculation for the averaged data by the statistic calculation means are performed for each obtained read data. . The drive signal output phase control means determines the output phase of the drive signal based on the determination result by the determination means for each statistic.

  The drive signal output phase control means determines the output phase of the drive signal with respect to the read data when the illumination means is extinguished or turned on.

  The drive signal output phase control means determines the output phase of the drive signal after the power is turned on, immediately before the start of the reading job, or in the inspection process at the time of shipment.

It is a figure which shows typically a CCD line sensor output signal and its sampling timing. It is a principal part block diagram of the image reading apparatus which concerns on embodiment of this invention. FIG. 3 is a diagram showing sampling clock signals SHP and SHD supplied from the timing generator in FIG. 2. 3 is a flowchart showing a procedure of sampling clock adjustment processing in a sampling clock adjustment mode executed by the image reading apparatus of FIG. 2.

Explanation of symbols

201 CCD line sensor 202 CCD signal processing unit 203 Timing generator 204 CPU
205 Image processing unit 206 Line memory

Claims (5)

Photoelectric conversion means for converting reflected light from the original into an electrical signal;
Signal processing means for sampling the output signal of the photoelectric conversion means and outputting digital image data;
First sampling timing setting means for setting a plurality of timings for sampling the output signal of the photoelectric conversion means;
Data holding means for holding averaged data obtained by averaging the digital image data output from the signal processing means;
Statistic calculation means for calculating a predetermined statistic from the averaged data held in the data holding means;
End determination means for determining whether or not sampling processing at a plurality of sampling timings set by the first sampling timing setting means has ended;
Search means for searching for the statistic that matches a predetermined condition and the sampling timing corresponding to the statistic when it is determined by the end determination means that the sampling process has ended;
Second sampling timing setting means for setting the final sampling timing based on the search result of the search means;
An image reading apparatus comprising: Operates photoelectric conversion means for converting light reflected from a document into electrical signals, signal processing means for converting analog electrical signals from the photoelectric conversion means into digital signals, processing the photoelectric conversion means, and signal processing means In an image reading apparatus comprising a drive signal generating means for outputting a drive signal for causing the signal to be stored and a memory for storing digital image data output from the signal processing means,
An averaged data generating means for performing reading for a plurality of lines of the photoelectric conversion means and holding averaged data averaged for each corresponding pixel on the line in the memory;
Statistic calculation means for calculating a predetermined statistical value from the averaged data held in the memory;
Determination means for determining whether or not the value calculated by the statistic calculation means is a predetermined value or more;
Drive signal output phase control means for changing the output phase of the drive signal generated by the drive signal generation means based on the determination result by the determination means;
An image reading apparatus comprising:   The drive signal output phase control unit is controlled a plurality of times, and average data generation by the averaged data generation unit and statistical calculation of the averaged data by the statistic calculation unit are performed for each obtained read data. 3. The image reading apparatus according to claim 2, wherein the drive signal output phase control means determines an output phase of the drive signal based on a determination result by the determination means for each statistic.   4. The image reading apparatus according to claim 3, wherein the drive signal output phase control means determines an output phase of the drive signal with respect to read data when the illumination means is turned off or turned on.   4. The image reading apparatus according to claim 3, wherein the drive signal output phase control means determines the output phase of the drive signal after the power is turned on, immediately before the start of the reading job, or in an inspection process at the time of shipment. .

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