JP5293353B2 - Image reading apparatus and image forming apparatus - Google Patents

Description

  The present invention relates to an image reading apparatus and an image forming apparatus, and more particularly to an image reading apparatus and an image forming apparatus that read an original by exposing the original and receiving reflected light by a photoelectric conversion element.

  2. Description of the Related Art Conventionally, there is known an image reading apparatus that reads a document image with a photoelectric conversion element and converts image data into a digital signal for processing. This type of image reading apparatus generally has a first carriage made up of a contact glass for placing a document, a light source for document exposure and a first reflection mirror, a second reflection mirror and a second reflection mirror. A carriage, a CCD linear image sensor (hereinafter referred to as a CCD) as a photoelectric conversion element, a lens unit for forming an image on the CCD, a reference white plate for correcting various distortions (such as shading correction) by a reading optical system, etc. It is composed of

  During scanning of the document, the first carriage and the second carriage are moved in the sub-scanning direction by the stepping motor. In an image reading apparatus, an analog image signal from a CCD that has read an image is input to an A / D conversion circuit to obtain a digital signal. At that time, in order to fully demonstrate the accuracy of the A / D converter, the gain amount in the gain amplifier is set so that the analog image signal changes widely between the upper limit reference value and the lower limit reference value of the A / D converter. It is necessary to adjust the offset amount in the offset setting unit.

  In such a conventional image reading apparatus, the output of the peak-detected A / D converter is taken into the CPU, and an optimum gain setting value is calculated by comparison with the target value, and the gain of the gain amplifier is calculated based on the gain setting value. The configuration is changed. In this peak detection, the above-described reference white plate is used to automatically adjust the reading level.

  The above operations are usually performed by a CCD, an ASIC that is a timing generation source for driving the CCD, an A / D conversion circuit, and an analog front end (AFE) in which a gain adjustment function and the like are integrated on one chip. ing.

  FIG. 10 is a timing chart showing the output timing of a conventional CCD, and FIG. 11 is a timing chart showing the output timing of a CCD equipped with a sample hold function. As shown in FIG. 11, the analog image signal of the CCD is output at the timing as shown in FIG. That is, (A) in FIG. 10 is a cycle, (B) is a transfer clock (PH2B), (C) is a clamp signal (CP), (D) is a reset signal (RS), (E) is a CCD output signal, ( F) is a sampling signal (XSHD). The output of the CCD output signal starts at the falling timing of the transfer clock (PH2B) in (B) and ends at the rising timing of the reset signal. The clamp signal (CP) is for making the reference voltage of the CCD output constant.

  For this reason, as shown in FIG. 10, the CCD output falls during the CCD output delay period from the fall of the transfer clock and becomes an output stabilization period. Thus, the CCD output period is reduced by the output delay time from the time from the fall of the transfer clock to the rise of the reset signal. In fact, since the start of the fall of the CCD output is from 10% of the fall of the transfer clock, it takes time to fall of the transfer clock. These CCD drive signals are usually input to the CCD from a timing generation source via a driver. In this timing generation source and driver, skew between signals occurs, and therefore, the time from the fall of the transfer clock to the rise of the reset signal may be reduced by the delay difference. As described above, the CCD stable output period may be shortened due to various factors.

  For example, assuming that the output delay time is 10 ns, the transfer clock fall time is 3 ns, and the delay difference between the timing generation source and the driver is about 2 ns, if the period is about 30 MHz, the output stabilization period is only a few ns. . A signal for sampling this output stabilization period by the AFE in the subsequent stage is a sampling signal (XSHD) shown in FIG. In this AFE, the analog image signal level is held at the rising timing of the sampling signal. However, in the same way as the transfer clock and reset signal described above, a skew is generated with respect to the transfer clock and reset signal. In the ns CCD output stabilization period, levels other than the output stabilization period are held, and a correct image signal level cannot be obtained. (Here, the AFE sampling signal is a negative logic sampling signal, but the contents are the same even when the analog image signal level is held at the falling edge of the sampling signal with a positive logic signal.)

  Thus, in order to prevent the timing from being not established, a timing adjustment method as shown in Patent Document 1 has been proposed. The CCD driving device disclosed in Japanese Patent Application Laid-Open No. 2005-228561 is a technique for obtaining optimum reset pulse and sample hold pulse timings by performing characteristic analysis from multi-value data of CCD output for each combination of reset pulse and sample hold pulse timing positions. Is disclosed.

  However, in the above-mentioned Patent Document 1, the causes of variations in the output delay time of the CCD and the skew between signals become higher in response to an image reading apparatus having a higher driving frequency, whereas There is a problem that there is no means for shortening or there is a limit. For example, assume that the reset signal is delayed in order to increase the output stabilization period. However, on the other hand, the timing of the normal reset signal and the clamp signal is more severe because there is a timing regulation with the clamp signal.

  Thus, since the output stabilization period becomes extremely short as the frequency becomes faster, even timing adjustment becomes difficult in the following cases. For example, when the output stabilization period is 2.2 ns, an adjustment accuracy of 2.0 ns or less is required to adjust the timing by setting the timing generation source. In the worst case, if the phase is shifted with half-cycle accuracy obtained by multiplying the source oscillation of 30 MHz by 8 in the ASIC phase-locked loop (PLL) of the timing source at 30 MHz, the adjustment accuracy will be about 2.1 ns. May cause adjustments to be lost.

  Therefore, in order to reduce this risk, there is no method other than widening the output stabilization period. As a method for widening the output stabilization period, a CCD equipped with a sample hold function as shown in FIG. 11 has been proposed. The timing chart shown in FIG. 11 is an example. For example, the internal sampling signal is asserted during the period from the fall of the transfer clock (PH2B) in FIG. 11B to the rise of the reset signal. When the rising edge of the reset signal is input, the internally held CCD output level is output to the outside as an output signal. In the method of FIG. 11, since the reset time can be advanced, even if the stable transition period of the CCD output hold unit is equivalent to the conventional output delay time, the sampling signal in the AFE at the subsequent stage is significantly higher than the conventional one. It can be seen that the area that can be sampled is widened. In the case of FIG. 11 as well, the hold period ends at the falling edge of the transfer clock and shifts to the sampling period. At this time, sampling noise enters the CCD output, and then a voltage having an offset with respect to the hold period is output during the sampling period. Appears at the CCD output terminal.

  As described above, the CCD having the sample hold function shown in FIG. 11 can take a long output stabilization period. However, if the frequency becomes fast, there is a possibility that timing cannot be obtained without timing adjustment. That is, the time obtained by subtracting the sampling time in the CCD and the stable transition period in which the CCD output shifts to hold from the time of one cycle of the CCD drive clock gradually decreases as the frequency increases, and sampling is performed by AFE. There is a problem that the timing design cannot be performed when the variation between the signal and the CCD output does not fit within that time.

  However, if the timing can be adjusted, the timing can be adjusted even at a faster frequency than the method of adjusting the timing by detecting the reset noise as in the prior art described above with the CCD output waveform of FIG. It becomes possible to do. However, as shown in FIG. 11, since the CCD output waveform of the sample hold output has no reset noise, the reset noise cannot be detected and the timing cannot be adjusted like the CCD output waveform of FIG. Therefore, even if the CCD output waveform of the sample hold output in FIG. 11 is used, a CCD with a built-in sample hold function is used by using a specific pixel output in a state where the CCD output outputs a certain white level. A method that enables timing adjustment is proposed below.

  The present invention has been made in view of the above, and timing adjustment is possible even with a sample hold output type CCD. By establishing a reading timing, sampling is accurately performed at the timing at which the AFE should sample. An object of the present invention is to provide an image reading apparatus and an image forming apparatus that can set a signal, can adjust timing even with a CCD having a plurality of channels, and can reduce the time required for timing adjustment.

  In order to solve the above-described problems and achieve the object, the present invention includes a reading unit incorporating a sample hold output function, and a signal processing unit that takes an output signal of the reading unit as a sampling signal and converts it into a digital signal. And a timing generation means capable of arbitrarily adjusting the timing of the sampling signal of the signal processing means, and the timing generation means delays the sampling signal input to the signal processing means by one step at the time of timing adjustment. The position where the output change of the final pixel of the reading means or the transfer efficiency measuring pixel reaches an arbitrary value is detected as a sampling noise position, and the sampling signal input to the signal processing means is advanced by an arbitrary time. Timing adjustment is performed.

  Further, the present invention is an image forming apparatus using the image reading apparatus, and is characterized by adjusting the timing of the sampling signal of the signal processing means.

  According to the present invention, the timing adjustment is possible even with a sample hold output type CCD, and the reading timing can be established. Therefore, the sampling signal can be accurately set at the timing at which the AFE should sample. There is an effect that can be done.

FIG. 1 is a longitudinal sectional view showing a schematic configuration of the image reading apparatus according to the first embodiment of the present invention. FIG. 2 is a block diagram illustrating the configuration of the reading substrate and the image processing unit in FIG. FIG. 3 is a flowchart for explaining the sampling timing adjustment operation of the read signal of the image reading apparatus according to the first embodiment. FIG. 4 is a flowchart showing a subroutine of the timing adjustment process of FIG. FIG. 5 is a diagram illustrating a pixel state of a transfer efficiency measuring pixelless CCD. FIG. 6 is a waveform diagram of the final effective pixel output in the CCD of FIG. FIG. 7 is a diagram showing a pixel state of a CCD with a transfer efficiency measurement pixel. FIG. 8 is a waveform diagram of the pixel output for measuring transfer efficiency in the CCD of FIG. FIG. 9 is a flowchart for explaining a sampling timing adjustment operation of a read signal of the image reading apparatus according to the second embodiment. FIG. 10 is a timing chart showing the output timing of a conventional CCD. FIG. 11 is a timing chart showing the output timing of a CCD equipped with a sample hold function.

  Exemplary embodiments of an image reading apparatus and an image forming apparatus according to the present invention are explained in detail below with reference to the accompanying drawings. In the following embodiments, an example in which a flat bed type image scanner is used as an image reading apparatus will be described. However, the present invention is not necessarily limited to this and can be applied to various image reading apparatuses.

(First embodiment)
FIG. 1 is a longitudinal sectional view showing a schematic configuration of the image reading apparatus according to the first embodiment of the present invention. As shown in FIG. 1, the image reading apparatus (image scanner) 1 includes a first carriage including a contact glass 3 on which a document 2 is placed, a halogen lamp 4 for exposing the document 2, and a first reflection mirror 5. 6, a second carriage 9 including a second reflecting mirror 7 and a third reflecting mirror 8, a CCD (Charge Coupled Devices) 10 as an image sensor, a lens unit 11 for forming an image on the CCD 10, and shading correction White reference plate 12. The CCD 10 is provided on a reading substrate 13, and the reading substrate 13 is connected to an image processing unit 14 (see FIG. 2) for performing various signal processing on an image signal output from the CCD 10 via a connection cable 15. ing. That is, the halogen lamp 4, the first, second and third reflecting mirrors 5, 7, 8 and the lens unit 11 constitute a scanning optical system. Although the scanning optical system is relatively moved, a type in which a mirror or the like is fixed and the document side is moved may be used.

  The halogen lamp 4 irradiates light at a certain angle with respect to the reading surface of the white reference plate 12 or the contact glass 3, and the light reflected by the white reference plate 12 or the document 2 is the first, second and third reflecting mirrors. The light enters the CCD 10 via 5, 7, 8 and the lens unit 11. The CCD 10 outputs a voltage corresponding to the amount of incident light as an analog image signal. The first and second carriages 6 and 9 are moved in the sub-scanning direction (arrow A direction) while maintaining a constant distance between the reading surface of the document 2 and the CCD 10 by driving a stepping motor (not shown). Is scanned by exposure. The CCD 10 outputs a voltage corresponding to the amount of incident light as an analog image signal, performs predetermined processing on the reading substrate 13, and then transfers the digital image signal to the image processing unit 14.

  FIG. 2 is a block diagram illustrating the configuration of the reading substrate and the image processing unit in FIG. As shown in FIG. 2, a timing generation ASIC 131, a CCD 132, and an AFE 133 are provided on the reading substrate 13. The timing generation ASIC 131 generates a CCD drive signal for extracting an analog image signal from the CCD 132 and a sampling signal for A / D converting the image signal by the AFE 133. The analog image signal extracted from the CCD 132 is A / D converted by the AFE 133 and transmitted to the image processing unit 14 as a digital image signal.

  The image processing unit 14 is provided with an image processing ASIC 141 and a CPU 142. The CPU 142 is not necessarily required to be in the image processing unit 14. The digital image signal transmitted from the reading board 13 calculates a reading value by the image processing ASIC 141. The calculated read value is stored in a register (not shown) in the image processing ASIC 141. The CPU 142 can obtain the read value by reading the data in the register. Further, the CPU 142 can communicate with the timing generation ASIC 131 of the reading substrate 13 to set the timing of the CCD drive signal and the timing of the AFE sampling signal.

  The image reading apparatus according to the first embodiment is configured as described above, and the operation thereof will be described below. FIG. 3 is a flowchart for explaining the sampling timing adjustment operation of the read signal of the image reading apparatus according to the first embodiment. FIG. 4 is a flowchart showing the timing adjustment processing subroutine of FIG. FIG. 6 is a diagram showing a pixel state of a CCD having no transfer efficiency measuring pixel, FIG. 6 is a waveform diagram of a final effective pixel output in the CCD of FIG. 5, and FIG. 7 is a pixel of a CCD having a transfer efficiency measuring pixel. FIG. 8 is a waveform diagram of pixel output for measuring transfer efficiency in the CCD of FIG.

  As shown in FIGS. 2 and 3, the image reading apparatus adjusts the timing of the sampling signal when the AFE 133 takes the CCD output signal from the line sensor (CCD) 132 as the sampling signal and performs A / D conversion. When performing, first, after the image reading apparatus 10 is powered on (step S100), an abnormality detection process of the image reading apparatus 10 is performed (step S101). In this abnormality detection process, various ICs are checked or reset cancellation is confirmed.

  Then, initialization for adjustment necessary for timing adjustment is performed (step S102). This is because the sampling signal of the AFE 133 is moved by timing adjustment, and in addition to various settings for normal operation, it is necessary to set the AFE 133 so that the operation such as the input stage clamping is not performed using the sampling signal period. is there.

  Further, in step S103, after adjusting the timing of the sampling signal characteristic of the present invention, various settings for normal operation are performed (step S104), and by automatically adjusting the reading level, the power is turned on. The various adjustments are completed (step S105), and a scan standby state is entered.

  Next, details of the timing adjustment operation in step S103 of FIG. 3 will be described with reference to FIG. First, in the case of the above-described conventional CCD (see FIG. 10), timing adjustment can be performed by detecting reset noise. However, in the first embodiment, a CCD equipped with a sample hold function is provided. Therefore, a CCD output waveform as shown in FIG. 11 is obtained. For this reason, since there is no reset noise and the sampling noise that shifts to the sampling period is also low in level, it is difficult to adjust the timing with high accuracy in a normal pixel.

  Therefore, in the first embodiment, as shown in FIGS. 5 and 6, when a CCD without transfer efficiency measurement pixels is used, the CCD output is set to a state in which a certain white level is output. The level difference between the last effective pixel and the next empty transfer pixel is detected. It is also possible to use a CCD having transfer efficiency measurement pixels as shown in FIGS.

  First, in the timing adjustment operation shown in FIG. 4, the phase of the sampling signal (XSHD) of the AFE 133 is set so that it does not reach the hold transition period and the sampling period of the CCD output signal in the default state. If the offset with respect to the hold level is sufficiently smaller than the predicted white level, there is no problem even if the default phase is in the aforementioned period. Here, in the first timing adjustment operation start, the phase of the sampling signal (XSHD) is left in the default state, and the timing of the sampling signal (XSHD) is changed when the flow shown in step S203 is followed. One step is delayed (step S200).

  In the subsequent step S201, the image reading data is acquired at the XSHD sampling timing set in the preceding step S200 and stored as the current value. The reading data to be stored can reduce the influence of noise and jitter (illusion) by averaging the values of a plurality of pixels and a plurality of lines. If there is a previous value, the current value is stored separately from the previous value.

  In the subsequent step S202, if there is a previous value in the previous step S201, the difference between the previous value and the current value is calculated. If the previous value is the hold period and the current value is the sampling unit, the difference increases (output decreases). Then, it is determined whether or not the difference is equal to or greater than a threshold value. If the difference is equal to or greater than the threshold value, it is determined that the sampling signal (XSHD) has reached the reset noise at the current set value. If reset noise can be detected, the process proceeds to step S203.

  If no reset noise is detected in step S202 or if there is no previous value at the first timing adjustment operation start, the flow proceeds to step S200, and the above steps are repeated until a value equal to or greater than the threshold value is detected. The process from S200 to step S202 is repeated.

  In step S203, the phase of XSHD is set to a position where the AFE 133 can sample the hold portion of the CCD output. Since this XSHD has shifted the phase in the direction of slowing down at the time of detection, it is adjusted so as to advance the phase after detecting the sampling position. However, in this step of advancing the phase, a value smaller than the time obtained by subtracting the sum of the sampling time in the CCD and the hold transition period from one cycle of the CCD drive clock is set so that the CCD hold period can be sampled. To do.

  In the first embodiment, the case where the image signal photoelectrically converted by the CCD 132 is output on one channel has been described. However, the same applies to the case where the image signal is output on a plurality of channels. Do this for each channel.

  As described above, according to the first embodiment, even when the sample hold output type CCD is used, the sampling timing can be adjusted, and an appropriate reading timing can be obtained.

  Further, according to the first embodiment, the sampling signal can be set accurately at the timing when the AFE should sample.

  Furthermore, according to the first embodiment, the sampling timing can be adjusted even with a CCD having a plurality of channel outputs.

(Second Embodiment)
The feature of the second embodiment is that the time required for adjusting the sampling timing is shortened.

  FIG. 9 is a flowchart for explaining a sampling timing adjustment operation of a read signal of the image reading apparatus according to the second embodiment. As shown in FIGS. 2 and 9, in the image reading apparatus, when the AFE 133 takes the CCD output signal from the line sensor (CCD) 132 as a sampling signal and performs A / D conversion, the timing adjustment of the sampling signal is performed. When performing, first, after the image reading apparatus 10 is powered on (step S300), an abnormality detection process of the image reading apparatus 10 is performed (step S301). In this abnormality detection process, as in the first embodiment, various ICs are checked or reset cancellation is confirmed.

  In the second embodiment, as shown in FIG. 9, it is determined whether or not timing adjustment has been performed when the power is turned on last time based on the presence or absence of the previous value (step S302). If the previous timing adjustment is performed and the previous value exists (YES in step S302), the timing adjustment in step S304 is skipped, and the process proceeds to step S305.

  In step S302, if the previous timing adjustment has not been performed and there is no previous value (NO in step S302), initial setting for adjustment necessary for timing adjustment is performed (step S303). This is because the sampling signal of the AFE 133 is moved by timing adjustment, and in addition to various settings for normal operation, it is necessary to set the AFE 133 so that the operation such as the input stage clamping is not performed using the sampling signal period. is there.

  Subsequently, in step S304, the characteristic sampling timing of the present invention is adjusted. Since this timing adjustment operation has been described with reference to FIG. 4 in the first embodiment, it is omitted here. Then, after the timing adjustment, various settings for normal operation are performed (step S305), and various adjustments when the power is turned on are completed by performing automatic adjustment of the reading level (step S306).

  In the second embodiment, as the subsequent operation, the automatic adjustment value of the reading level is stored as the current value (step S307). Here, if there is no previous value of the automatic adjustment value of the reading level (YES in step S308), various adjustments when the power is turned on are finished, and the scan standby state is entered.

  In step S308, if there is a previous value, if the current value has changed more than a certain value from the previous value (NO in step S308), the process returns to step S303, and step S304. Timing adjustment is performed at. However, at the stage of returning to step S303, the current value and the previous value of the automatic adjustment value are also cleared.

  When the image reading apparatus is not used for a certain period of time, in the apparatus that shifts to the energy saving mode for reducing the power consumption, the response at the time of returning from the energy saving mode is not the first power ON but the second power ON or later. As in the case of time, the sampling signal is set from the result of the previous timing adjustment without adjusting the timing.

  Thus, according to the second embodiment, it is determined whether or not to perform timing adjustment based on the presence or absence of the previous value of timing adjustment, and when there is a previous value, the timing adjustment can be omitted. The time required for timing adjustment can be shortened. In the case of returning from the energy saving mode, the timing adjustment is omitted in the same manner, so that the time required for the timing adjustment can be shortened.

  In addition, according to the second embodiment, even if there is a previous value, the timing adjustment is performed when the current value changes more than a certain value from the previous value. Thus, the reading timing can be established.

  In the first and second embodiments, the present invention can be applied to an image forming apparatus such as a copying machine or a facsimile machine using the image reading apparatus of the present invention, but further includes a copy function, a printer function, and a scanner. The present invention can also be applied to a multifunction machine having at least two functions among a function and a facsimile function.

1 Image reading device 4 Halogen lamp 10 CCD
13 Reading board 131 Timing generation ASIC
132 CCD
133 AFE
14 Image Processing Unit 141 Image Processing ASIC
142 CPU

Japanese Unexamined Patent Publication No. 7-250288

Claims (6)

Reading means with a built-in sample hold output function;
Signal processing means for taking the output signal of the reading means as a sampling signal and converting it into a digital signal;
Timing generating means capable of arbitrarily adjusting the timing of the sampling signal of the signal processing means;
The timing generation unit delays the sampling signal input to the signal processing unit by one step at the time of timing adjustment, and the output change of the final pixel of the reading unit or the transfer efficiency measurement pixel reaches an arbitrary value. An image reading apparatus characterized in that the detected position is detected as a sampling noise position and the timing is adjusted so that the sampling signal input to the signal processing means is advanced by an arbitrary time.   The time for advancing the sampling signal input to the signal processing means during timing adjustment by the timing generating means is the time of one cycle of the driving clock of the reading means, the sampling time inside the reading means, and the output signal from the reading means. The image reading apparatus according to claim 1, wherein the time is less than a time obtained by subtracting a sum of the stable transition period.   3. The image reading apparatus according to claim 1, wherein when the image signal photoelectrically converted by the reading unit is output in a plurality of channels, timing adjustment is performed for each channel.   The timing generation means adjusts the timing when the power is turned on for the first time, turns on the sample hold output function of the reading means without adjusting the timing when the power is turned on for the second time and thereafter, and performs the signal processing by automatically adjusting the reading level. 4. The image reading apparatus according to claim 1, wherein the gain adjustment of the means is performed, and the timing adjustment is performed only when the gain adjustment result has changed from a previous value by a certain value or more.   The timing generation unit sets a sampling signal from the result of the previous timing adjustment without performing timing adjustment when the image reading apparatus returns from the energy saving mode in which power consumption is low when the image reading apparatus is not used for a certain period of time. An image reading apparatus according to any one of claims 1 to 4.   6. An image forming apparatus, wherein the timing of a sampling signal of the signal processing means is adjusted using the image reading apparatus according to claim 1.

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