JP2006050330A - Image reading device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide an image reading device which pays attention to sampling timing failure of a clock for ADC (Analog to Digital Converter) which is considered as a factor of abnormal performance, stably takes in an aimed image data even if a delay amount changes to what extent, and can adjust to be set in an aimed reading level according to density of the draft. <P>SOLUTION: The image reading device uses CCD (Charge Coupled device) as a reading device, and comprises an ADC which converts an analog image signal output from the CCD to digital data. It arranges patches of various different density on a reference white board as a white level, reads the patches each time when the power source of the device is powered in, confirms where the patches of respective colors are arranged in the CCD effective pixels, and changes the phase of the sampling clock of the ADC so that the excess value of levels of respective density patches read after black level adjustment and white level adjustment which are executed at the time when powered in, and an ideal output in respective density patches to be minimum. <P>COPYRIGHT: (C)2006,JPO&NCIPI

Description

  The present invention relates to an image reading apparatus, and more particularly to an image reading apparatus having an AD converter clock phase adjustment function for converting an analog image signal output from a reading device into digital data.

Conventionally, there are image reading apparatuses such as a scanner configured as a single unit, and there are apparatuses incorporated in a copying machine or a facsimile machine to read an image as a pre-stage of image processing.
In any of the above apparatuses, when reading an image, a document to be printed is illuminated with a lamp or the like, and image processing is performed based on the reflected light. In the image processing, white data as white as a reference for image density is required. The white data is generally obtained by reading a reference white plate.
In addition, fluorescent lamps are often used as the above lamps in recent years for reasons such as low power consumption.
However, the above-mentioned fluorescent lamp has a characteristic that when the lamp is turned on after being left in a dark place for a certain period of time, a phenomenon that the rise time of the lamp light amount takes longer than usual occurs, which is called a dark start characteristic. .
Since the white data is generally read before the original is read, if the rise of the lamp light amount is slow due to the dark start characteristic, the white data may be read as black because the light has not reached.
As a conventional technique for solving the above problem, there is an image reading apparatus disclosed in Patent Document 1. This image reading device detects the value of the read reference white data, and when the clearly inaccurate reference white data is read, it performs the reading operation again to check whether it is due to the dark start characteristic. If it is determined that it is due to the dark start characteristic, the reading operation is performed again. If it is determined not to be due to the dark start characteristic, the reading of the white data is stopped, so that it is based on inaccurate white data. It is an apparatus that avoids performing useless image processing.
JP 2002-84402 A

However, various factors such as a light source failure, CCD damage, and peripheral circuit malfunction may be considered as the cause of the abnormal state. In the above apparatus, it is determined whether or not the data obtained by reading the reference white plate is a value indicating white, and if it is determined that the data is not white, the reading operation is only disabled.
The present invention has been made in consideration of the above-mentioned circumstances, paying attention to the clock sampling timing failure for the AD converter, which is considered as one factor in abnormal operation, and is stable regardless of how the delay amount fluctuates. Thus, an object of the present invention is to provide an image reading apparatus capable of taking in target image data and adjusting the target reading level according to the document density.

In order to solve the above-mentioned problems, the invention described in claim 1 is an image reading apparatus using a CCD as a reading device and having an AD converter for converting an analog image signal output from the CCD into digital data. Various density patches are arranged on a reference white plate that serves as a level reference, and a reading unit that reads the patch every time the device is turned on, and each density patch read by the reading unit is a CCD effective pixel. It is characterized by having a confirmation means for confirming in which position it is arranged.
According to a second aspect of the present invention, in the image reading apparatus according to the first aspect, the level of each density patch read by the reading unit after black level adjustment and white level adjustment performed at power-on is set in advance. Comparing means for comparing the ideal output with each density patch is provided.
According to a third aspect of the present invention, in the image reading apparatus according to the first or second aspect, the level of each density patch read by the reading unit after black level adjustment and white level adjustment performed when the power is turned on is set in advance. And changing means for changing the phase of the sampling clock of the AD converter so that the difference value from the ideal output at each density patch is minimized.

According to the present invention, the delay amount from the output of the CCD drive clock to the input of the analog image signal to the AD converter includes various variation factors. Sampling can be performed in the region.
Further, the target output level can be achieved at the sampling point.

Hereinafter, preferred embodiments of an image reading apparatus according to the present invention will be described with reference to the drawings.
FIG. 1 is a block diagram showing a configuration of an image reading apparatus. In FIG. 1, the image reading apparatus executes a program stored in a ROM 5 to control the entire system, and reads a transmission original. A scanner 2 for performing printing, a plotter 3 for writing on transfer paper, an operation unit 4 for interfacing with a user, a ROM 5 for storing a program for controlling an image reading apparatus, and various data are temporarily stored. The RAM 6 is provided.
FIG. 2 is an internal configuration diagram of the scanner, and reads an image of a document by scanning a reading unit including a first carriage 506 and a second carriage 507. A fluorescent lamp 504 and a first mirror 511 are attached to the first carriage 506, and a second mirror 512 and a third mirror 513 are attached to the second carriage 507.
The fluorescent lamp 504 moves along the document on the contact glass 505 at a constant speed V and irradiates the document. The irradiated reflected light enters the first mirror 511 and is reflected in the horizontal direction. The reflected light reflected by the first mirror 511 is further folded by the second mirror 512 and the third mirror 513 attached to the second carriage 507 to the lens 508 in the horizontal direction, converged by the lens 508, and incident on the CCD 509. The photoelectric conversion is performed.
In such an image reading apparatus, when the reading start signal is received and the reading unit is driven and the driven reading unit reaches the reference white plate region, the SLEAD signal (a signal generated when the reading unit reaches the reference white plate region). When a document reading start position is reached, an SSCAN signal (a signal indicating the document reading start position) is generated.
Upon receiving this signal, the reading unit outputs the SHGATE signal and the FGATE signal, which are signals opposite to the actual white plate reading position and the document reading position, to the image processing unit in line synchronization. The image processing unit receives this signal and saves the data in a memory or the like to perform each processing.

FIG. 3 is a schematic configuration diagram of the signal processing unit of the scanner 2. In FIG. 3, the drive clock output from the module 10 that generates the CCD drive clock corresponding to the reading speed of the system is formed on the signal line. The signal is input to the CCD 14 via the filter 11, the CCD driving buffer 12, and the filter 13 formed again on the signal line.
The analog image signal output from the CCD 14 is subjected to signal processing by the analog processing circuit 15 so as to have an optimum level suitable for the dynamic range of the AD converter 16, and is input to the AD converter 16.
The image signal input to the AD converter 16 is sampled by the AD converter clock output from the clock generation module 10 and converted into digital data. FIG. 4 shows a state from the analog image signal sample to the digital data output.
Depending on the system configuration, the board on which the CCD is mounted, the module on which various clocks are generated, and the board on which the AD converter is mounted may be separate boards. In this case, a transmission path is used for connection between the boards. Various clocks and image signals pass through.
As described above, there are various elements in which signal delay occurs from when the CCD driving clock is output until the image signal is input to the AD converter 16. This signal delay has various variations such as the output resistance and filter constant of the clock generation module 10, the input capacity / output resistance / output delay of the CCD drive buffer 12, the CCD input capacity / output delay, and the delay amount of the analog processing circuit 15. Although it exists, it is necessary to sample the image data input in the AD converter 16 in an optimum image area with the AD converter clock in any state of these variations.
However, the resolution and speed of reading devices are increasing, and taking into account the above variation, it is becoming difficult to always perform sampling in an optimal image region. Therefore, a system that can perform optimum sampling in any image reading apparatus is required.

The image reading apparatus according to this embodiment includes a reference white plate as shown in FIG. 5 and is arranged as shown in FIG.
Normally, the effective pixel of the CCD is used with a larger value than the reading range of the device, and the alignment in the main scanning direction of the document is performed within the range of the surplus pixels (registration adjustment in the main scanning direction) ). A plurality of black and gray patches are arranged in the surplus pixel portion not used as the read data.
A processing procedure for detecting where each density patch is located in the CCD effective pixel using such a reference white plate will be described with reference to the flowchart of FIG.
When the power of the device is turned on (step S1), initialization of the register of the reading ASIC having the CCD driving clock and the AD converter clock generation module is performed (step S2).
After that, the black level reference level is adjusted so that the reading level of the OPB pixel (shield pixel) on the CCD becomes the target level (step S3), and it is confirmed whether the black level has reached the target level. (Step S4) If it does not end within a specified number of times (N in Step S5), there is a possibility that a normal read image may not be obtained due to adjustment failure, so that the user is notified with a message or sound ( Step S12).
On the other hand, if the processing is completed within the specified number of times (Y in step S4), the white level is adjusted by adjusting the reference voltage of the AD converter so that the peak level of one line becomes the target level when reading the reference white plate (step S6). ), It is confirmed whether the white level has become the target level (step S7). If the white level does not end within a predetermined number of times (N in step S8), normal reading is possible due to an adjustment failure as in the black level adjustment. Since there is a possibility that an image cannot be obtained, this is notified to the user by a message or sound (step S12).
On the other hand, when the process is completed within the specified number of times (Y in step S7), the above-described patch arranged outside the reading area range of the reference white board is detected (step S9). Using the black portion in the patch as a reference position, the position where each color patch is located in the CCD effective pixel is detected, and the reading level of each density patch is stored in the RAM (steps S10 and S11). ).

In addition, when the power is turned on using the flowchart of FIG. 8, the initial value of the register, black level adjustment, and white level adjustment are performed, then the position of each density patch is detected, and the difference value from the ideal output level. A processing procedure in the case of calculating?
When the power of the device is turned on (step S21), initialization of the register of the reading ASIC having the CCD driving clock and AD converter clock generation module is performed (step S22).
Thereafter, the reference level of the black level is adjusted so that the reading level of the OPB pixel (shield pixel) on the CCD becomes the target level (step S23), and it is confirmed whether the black level has become the target level. (Step S24) If it does not end within a specified number of times (N in Step S25), there is a possibility that a normal read image may not be obtained due to adjustment failure. Step S29).
On the other hand, when the processing is completed within the specified number of times (Y in step S24), the white level is adjusted by adjusting the reference voltage of the AD converter so that the peak level of one line becomes the target level when reading the reference white plate (step S26). ), It is confirmed whether the white level has reached the target level (step S27). If the white level does not end within a specified number of times (N in step S28), normal reading is possible due to an adjustment failure as in the black level adjustment. Since there is a possibility that an image cannot be obtained, this is notified to the user by a message or sound (step S29).
On the other hand, when the process is completed within the specified number of times (Y in step S27), the above-described patch arranged outside the reading area range of the reference white board is detected (step S30). Using the black portion in the patch as a reference position, the position where each color patch is located in the CCD effective pixel is detected, and the reading level of each density patch is stored in the RAM (steps S31 and S32). ).
Here, it is assumed that a density-controlled patch is used (see FIG. 9). The ideal output level of the managed density patch is compared with the read level of each patch stored in the RAM, and the difference value is obtained. Calculate (steps S33 and S34).

In addition, when the power is turned on using the flowchart of FIG. 10, the initial value setting of the register, the black level adjustment, and the white level adjustment are performed, and then the position detection of each density patch is performed to determine the reading level of each density patch. A procedure for calculating a difference value from the ideal output and changing the phase of the sampling clock of the AD converter so as to minimize the difference value will be described.
When the power of the device is turned on (step S41), initialization of the register of the reading ASIC having the CCD driving clock and AD converter clock generation module is performed (step S42).
Thereafter, the reference level of the black level is adjusted so that the reading level of the OPB pixel (shield pixel) on the CCD becomes the target level (step S43), and it is confirmed whether or not the black level has become the target level. (Step S44) If the process is not completed within a specified number of times (N in Step S45), there is a possibility that a normal read image may not be obtained due to an adjustment failure. Step S49).
On the other hand, when the processing is completed within the specified number of times (Y in step S44), the white level is adjusted by adjusting the reference voltage of the AD converter so that the peak level of one line becomes the target level when reading the reference white plate (step S46). ), It is confirmed whether the white level has reached the target level (step S47). If the white level does not end within a predetermined number of times (N in step S48), normal reading is possible due to an adjustment failure as in the black level adjustment. Since there is a possibility that an image cannot be obtained, this is notified to the user by a message or sound (step S49).
On the other hand, when the process is completed within the specified number of times (Y in step S47), the above-described patch arranged outside the reading area range of the reference white board is detected (step S50). Using the black portion in the patch as a reference position, the position where each color patch is located in the CCD effective pixel is detected, and the reading level of each density patch is stored in the RAM (steps S51 and S52). ).

Here, it is assumed that a density-controlled patch is used, and the ideal output level of the managed density patch is compared with the read level of each patch stored in the RAM, and a difference value is calculated (step S53). , S54).
The phase of the AD converter clock is changed by the AD converter clock generation module (step S55), and the reading level of each density patch is confirmed again. The phase of the AD converter clock is changed again for confirmation (steps S50 to S56). When confirmation is performed in all phases that can generate the AD converter clock (Y in step S56), the point having the smallest difference value from the ideal output is determined as the AD sampling point (step S57), and the subsequent reading operation is performed. Do.

1 is a block diagram illustrating a configuration of an image reading device. The internal block diagram of an image reading apparatus. 1 is a schematic configuration diagram of a signal processing unit of a scanner. The figure which shows the mode from the sample of an analog image signal to digital data output. The figure for demonstrating the reference | standard white board of this invention. The figure for demonstrating the arrangement position of the reference | standard white board of this invention. 6 is a flowchart for explaining a processing procedure when detecting where a patch of each color is located in a CCD effective pixel using the reference white plate of the present invention. The flowchart explaining the process sequence which calculates the difference value with an ideal output level. The graph which shows the relationship between the reading level of each density patch, and an ideal output. The flowchart explaining the process sequence in the case of changing the phase of the sampling clock of AD converter.

Explanation of symbols

1 system control unit, 2 scanner, 3 plotter, 4 operation unit, 5 ROM, 6 RAM, 10 clock generation module, 11 filter, 12 CCD drive buffer, 13 filter, 14 CCD, 15 analog processing circuit, 16 AD converter, 502 reference white plate, 503 document, 504 fluorescent lamp, 505 contact glass, 506 first carriage, 507 second carriage, 508 lens, 509 CCD, 511 first mirror, 512 second mirror, 513 third mirror, 514 scanner motor

Claims (3)

  In an image reading apparatus that uses a CCD as a reading device and has an AD converter that converts an analog image signal output from the CCD into digital data, patches of various different densities are arranged on a reference white plate as a white level reference. And a reading means for reading the patch every time the device is turned on, and a checking means for checking at which position in the CCD effective pixel the patch of each density read by the reading means is arranged. A featured image reading apparatus.   2. The image reading apparatus according to claim 1, wherein a level of each density patch read by the reading unit after black level adjustment and white level adjustment performed when the power is turned on, and an ideal output at each preset density patch. An image reading apparatus comprising comparison means for comparing. 3. The image reading apparatus according to claim 1, wherein the level of each density patch read by the reading unit after black level adjustment and white level adjustment performed at power-on, and an ideal output at each preset density patch. An image reading apparatus comprising: changing means for changing a phase of a sampling clock of the AD converter so that a difference value between the AD converter and the AD converter is minimized.

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